[FPD Lib][PDK-4985]Updated UB9702 driver for test pattern generation API
authorVivek Dhande <a0132295@ti.com>
Thu, 26 Mar 2020 13:35:25 +0000 (19:05 +0530)
committerSivaraj R <sivaraj@ti.com>
Tue, 14 Apr 2020 05:23:07 +0000 (00:23 -0500)
- Added test patter generation API
- Curretly support following:
    - 1920x1080 @30 FPS
    - 3840x2160 @40 FPS

Signed-off-by: Vivek Dhande <a0132295@ti.com>
packages/ti/board/src/devices/fpd/ds90ub9702.c
packages/ti/board/src/devices/fpd/ds90ub9702.h

index d5d0f5430ecc96f174fff82054727644e17593c9..543b37b670696e25ea90c44d762dca0f2f73388a 100755 (executable)
  */
 #include "ds90ub9702.h"
 
+/* DES UB9702 configurations for RAW12 1920x1080 30fps, 4 lanes @1.5Gbps */
+Board_I2cRegProgObj Board_FpdUb9702PGCfg0[] =
+{
+    {0x32, 0x01, 0x50},
+       {0x1F, 0x00, 0x50},
+       {0xC9, 0x1E, 0x50},
+       {0xB0, 0x1C, 0x50},
+       {0xB1, 0x92, 0x50},
+       {0xB2, 0x40, 0x50},
+       {0xB0, 0x01, 0x50},
+       {0xB1, 0x01, 0x50},
+       {0xB2, 0x01, 0x50},
+       {0xB1, 0x02, 0x50},
+       {0xB2, 0x33, 0x50},
+       {0xB1, 0x03, 0x50},
+       {0xB2, 0x2C, 0x50},
+       {0xB1, 0x04, 0x50},
+       {0xB2, 0x0B, 0x50},
+       {0xB1, 0x05, 0x50},
+       {0xB2, 0x40, 0x50},
+       {0xB1, 0x06, 0x50},
+       {0xB2, 0x01, 0x50},
+       {0xB1, 0x07, 0x50},
+       {0xB2, 0x68, 0x50},
+       {0xB1, 0x08, 0x50},
+       {0xB2, 0x04, 0x50},
+       {0xB1, 0x09, 0x50},
+       {0xB2, 0x38, 0x50},
+       {0xB1, 0x0A, 0x50},
+       {0xB2, 0x07, 0x50},
+       {0xB1, 0x0B, 0x50},
+       {0xB2, 0x98, 0x50},
+       {0xB1, 0x0C, 0x50},
+       {0xB2, 0x06, 0x50},
+       {0xB1, 0x0D, 0x50},
+       {0xB2, 0xB3, 0x50},
+       {0xB1, 0x0E, 0x50},
+       {0xB2, 0x07, 0x50},
+       {0xB1, 0x0F, 0x50},
+       {0xB2, 0x08, 0x50},
+       {0x33, 0x03, 0x50},
+    {BOARD_DEVICES_CONFIG_END},
+};
+
+/* DES UB9702 configurations for RAW12 3840x2160 40fps, 4 lanes @1.5Gbps */
+Board_I2cRegProgObj Board_FpdUb9702PGCfg1[] =
+{
+    {0x32, 0x01, 0x50},
+       {0x1F, 0x10, 0x50},
+       {0xC9, 0x32, 0x50},
+       {0xB0, 0x1C, 0x50},
+       {0xB1, 0x92, 0x50},
+       {0xB2, 0x40, 0x50},
+       {0xB0, 0x01, 0x50},
+       {0xB1, 0x01, 0x50},
+       {0xB2, 0x01, 0x50},
+       {0xB1, 0x02, 0x50},
+       {0xB2, 0x33, 0x50},
+       {0xB1, 0x03, 0x50},
+       {0xB2, 0x2C, 0x50},
+       {0xB1, 0x04, 0x50},
+       {0xB2, 0x16, 0x50},
+       {0xB1, 0x05, 0x50},
+       {0xB2, 0x80, 0x50},
+       {0xB1, 0x06, 0x50},
+       {0xB2, 0x02, 0x50},
+       {0xB1, 0x07, 0x50},
+       {0xB2, 0xD0, 0x50},
+       {0xB1, 0x08, 0x50},
+       {0xB2, 0x08, 0x50},
+       {0xB1, 0x09, 0x50},
+       {0xB2, 0x70, 0x50},
+       {0xB1, 0x0A, 0x50},
+       {0xB2, 0x08, 0x50},
+       {0xB1, 0x0B, 0x50},
+       {0xB2, 0x80, 0x50},
+       {0xB1, 0x0C, 0x50},
+       {0xB2, 0x04, 0x50},
+       {0xB1, 0x0D, 0x50},
+       {0xB2, 0x7D, 0x50},
+       {0xB1, 0x0E, 0x50},
+       {0xB2, 0x07, 0x50},
+       {0xB1, 0x0F, 0x50},
+       {0xB2, 0x08, 0x50},
+       {0x33, 0x03, 0x50},
+    {BOARD_DEVICES_CONFIG_END},
+};
+
+Board_I2cRegProgObj *Board_FpdUb9702PGCfg[BOARD_FPD_UB9702_PG_MAX] =
+{
+    &Board_FpdUb9702PGCfg0[0U],       /* RAW12 1920x1080 30fps */
+    &Board_FpdUb9702PGCfg1[0U],       /* RAW12 3840x2160 40fps */
+};
+
 /**
  * \brief  Set deserializer device Id
  *
@@ -122,10 +216,10 @@ Board_STATUS Board_fpdUb9702SetDigitalRst1ModeCtrl(void *handle,
     }
 
     /* Reset digital RESET1, resets the entire digital block including registers */
-       
+
     regData &= ~(BOARD_FPD_UB9702_DIGITAL_RESET1_BIT_MASK);
     regData |= (cfgMode << BOARD_FPD_UB9702_DIGITAL_RESET1_SHIFT_CNT);
-    
+
     boardStatus = Board_i2c8BitRegWr(handle,
                                      fpdModParams->desSlvAddr,
                                      regAddr,
@@ -174,7 +268,7 @@ Board_STATUS Board_fpdUb9702SetI2cMstrEnModeCtrl(void *handle,
 
     regData &= ~(BOARD_FPD_UB9702_I2C_MASTER_EN_BIT_MASK);
     regData |= (cfgMode << BOARD_FPD_UB9702_I2C_MASTER_EN_SHIFT_CNT);
-    
+
     boardStatus = Board_i2c8BitRegWr(handle,
                                      fpdModParams->desSlvAddr,
                                      regAddr,
@@ -223,7 +317,7 @@ Board_STATUS Board_fpdUb9702SetOutputEnMode(void *handle,
 
     regData &= ~(BOARD_FPD_UB9702_OUTPUT_EN_MODE_BIT_MASK);
     regData |= (cfgMode << BOARD_FPD_UB9702_OUTPUT_EN_MODE_SHIFT_CNT);
-    
+
     boardStatus = Board_i2c8BitRegWr(handle,
                                      fpdModParams->desSlvAddr,
                                      regAddr,
@@ -272,7 +366,7 @@ Board_STATUS Board_fpdUb9702SetOutputEnCtrlMode(void *handle,
 
     regData &= ~(BOARD_FPD_UB9702_OUTPUT_ENABLE_BIT_MASK);
     regData |= (cfgMode << BOARD_FPD_UB9702_OUTPUT_ENABLE_SHIFT_CNT);
-    
+
     boardStatus = Board_i2c8BitRegWr(handle,
                                      fpdModParams->desSlvAddr,
                                      regAddr,
@@ -323,7 +417,7 @@ Board_STATUS Board_fpdUb9702SetOSSSelModeCtrl(void *handle,
        including registers */
     regData &= ~(BOARD_FPD_UB9702_OUTPUT_SLEEP_STATE_SEL_BIT_MASK);
     regData |= (cfgMode << BOARD_FPD_UB9702_OUTPUT_SLEEP_STATE_SEL_SHIFT_CNT);
-    
+
     boardStatus = Board_i2c8BitRegWr(handle,
                                      fpdModParams->desSlvAddr,
                                      regAddr,
@@ -400,7 +494,7 @@ Board_STATUS Board_fpdUb9702SetBCCWatchDogTImer(void *handle,
 
     /* Enables and watch dog timer and sets the watch dog timer count */
     regData = ((timeoutCnt << BOARD_FPD_UB9702_BCC_WATCHDOG_TIMER_SHIFT_CNT) | BOARD_FPD_UB9702_BCC_WATCHDOG_TIMER_DISABLE_BIT_MASK);
-    
+
     boardStatus = Board_i2c8BitRegWr(handle,
                                      fpdModParams->desSlvAddr,
                                      regAddr,
@@ -471,7 +565,7 @@ Board_STATUS Board_fpdUb9702SetBCCI2CSlvPortMap(void *handle,
              boardStatus = -1;
              break;
     }
-    
+
     if(boardStatus == -1)
     {
         return boardStatus;
@@ -547,7 +641,7 @@ Board_STATUS Board_fpdUb9702SetRcvrPortEnModeCtrl(void *handle,
              boardStatus = -1;
              break;
     }
-    
+
     if(boardStatus != 0)
     {
         return boardStatus;
@@ -611,7 +705,7 @@ Board_STATUS Board_fpdUb9702SetIOPinSupply(void *handle,
 
     regData &= ~(BOARD_FPD_UB9702_SEL3P3V_BIT_MASK);
     regData |= (ioLevel << BOARD_FPD_UB9702_SEL3P3V_SHIFT_CNT);
-    
+
     boardStatus = Board_i2c8BitRegWr(handle,
                                      fpdModParams->desSlvAddr,
                                      regAddr,
@@ -697,7 +791,7 @@ Board_STATUS Board_fpdUb9702SetIOSupplyOverrideModeCtrl(void *handle,
 
     regData &= ~(BOARD_FPD_UB9702_IO_SUPPLY_MODE_OV_BIT_MASK);
     regData |= (cfgMode << BOARD_FPD_UB9702_IO_SUPPLY_MODE_OV_SHIFT_CNT);
-    
+
     boardStatus = Board_i2c8BitRegWr(handle,
                                      fpdModParams->desSlvAddr,
                                      regAddr,
@@ -756,7 +850,7 @@ Board_STATUS Board_fpdUb9702SetIOSupplyMode(void *handle,
 
     regData &= ~(BOARD_FPD_UB9702_IO_SUPPLY_MODE_BIT_MASK);
     regData |= (ioLevel << BOARD_FPD_UB9702_IO_SUPPLY_MODE_SHIFT_CNT);
-    
+
     boardStatus = Board_i2c8BitRegWr(handle,
                                      fpdModParams->desSlvAddr,
                                      regAddr,
@@ -841,7 +935,7 @@ Board_STATUS Board_fpdUb9702SetFSModeCtrl(void *handle,
 
     regData &= ~(BOARD_FPD_UB9702_FS_MODE_BIT_MASK);
     regData |= (frameSync << BOARD_FPD_UB9702_FS_MODE_SHIFT_CNT);
-    
+
     boardStatus = Board_i2c8BitRegWr(handle,
                                      fpdModParams->desSlvAddr,
                                      regAddr,
@@ -890,7 +984,7 @@ Board_STATUS Board_fpdUb9702SetFSPulseGenModeCtrl(void *handle,
 
     regData &= ~(BOARD_FPD_UB9702_FS_SINGLE_BIT_MASK);
     regData |= (cfgMode << BOARD_FPD_UB9702_FS_SINGLE_SHIFT_CNT);
-    
+
     boardStatus = Board_i2c8BitRegWr(handle,
                                      fpdModParams->desSlvAddr,
                                      regAddr,
@@ -939,7 +1033,7 @@ Board_STATUS Board_fpdUb9702SetFSGenEnModeCtrl(void *handle,
 
     regData &= ~(BOARD_FPD_UB9702_FS_GEN_ENABLE_BIT_MASK);
     regData |= (cfgMode << BOARD_FPD_UB9702_FS_GEN_ENABLE_SHIFT_CNT);
-    
+
     boardStatus = Board_i2c8BitRegWr(handle,
                                      fpdModParams->desSlvAddr,
                                      regAddr,
@@ -1192,7 +1286,7 @@ Board_STATUS Board_fpdUb9702SelOscClk(void *handle,
 
     regData &= ~(BOARD_FPD_UB9702_SEL_OSC_200M_BIT_MASK);
     regData |= (refClk << BOARD_FPD_UB9702_SEL_OSC_200M_SHIFT_CNT);
-    
+
      boardStatus = Board_i2c8BitRegWr(handle,
                                      fpdModParams->desSlvAddr,
                                      regAddr,
@@ -1241,7 +1335,7 @@ Board_STATUS Board_fpdUb9702SetRefClkModeCtrl(void *handle,
 
     regData &= ~(BOARD_FPD_UB9702_REF_CLK_MODE_BIT_MASK);
     regData |= (refClk << BOARD_FPD_UB9702_REF_CLK_MODE_SHIFT_CNT);
-    
+
     boardStatus = Board_i2c8BitRegWr(handle,
                                      fpdModParams->desSlvAddr,
                                      regAddr,
@@ -1290,7 +1384,7 @@ Board_STATUS Board_fpdUb9702SelCSITxSpeed(void *handle,
 
     regData &= ~(BOARD_FPD_UB9702_CSI_TX_SPEED_BIT_MASK);
     regData |= (txSpeed << BOARD_FPD_UB9702_CSI_TX_SPEED_SHIFT_CNT);
-    
+
     boardStatus = Board_i2c8BitRegWr(handle,
                                      fpdModParams->desSlvAddr,
                                      regAddr,
@@ -1338,7 +1432,7 @@ Board_STATUS Board_fpdUb9702SetFwdPortDisModeCtrl(void *handle,
     {
         return boardStatus;
     }
-    
+
     switch(fwdPort)
     {
         case BOARD_FPD_9702_FWD_PORT_3:
@@ -1361,7 +1455,7 @@ Board_STATUS Board_fpdUb9702SetFwdPortDisModeCtrl(void *handle,
              boardStatus = -1;
              break;
     }
-    
+
     if(boardStatus != 0)
     {
         return boardStatus;
@@ -1414,7 +1508,7 @@ Board_STATUS Board_fpdUb9702SetRxPortMap(void *handle,
     {
         return boardStatus;
     }
-    
+
     switch(rxPort)
     {
         case BOARD_FPD_9702_FWD_PORT_3:
@@ -1437,7 +1531,7 @@ Board_STATUS Board_fpdUb9702SetRxPortMap(void *handle,
              boardStatus = -1;
              break;
     }
-    
+
     if(boardStatus == -1)
     {
         return boardStatus;
@@ -1491,7 +1585,7 @@ Board_STATUS Board_fpdUb9702SelTxPortRdBackRegBlk(void *handle,
 
     regData &= ~(BOARD_FPD_UB9702_TX_READ_PORT_BIT_MASK);
     regData |= (regBlk << BOARD_FPD_UB9702_TX_READ_PORT_SHIFT_CNT);
-    
+
    boardStatus = Board_i2c8BitRegWr(handle,
                                      fpdModParams->desSlvAddr,
                                      regAddr,
@@ -1540,7 +1634,7 @@ Board_STATUS Board_fpdUb9702SetTxPort1WrEnModeCtrl(void *handle,
 
     regData &= ~(BOARD_FPD_UB9702_TX_WRITE_PORT_1_BIT_MASK);
     regData |= (cfgMode << BOARD_FPD_UB9702_TX_WRITE_PORT_1_SHIFT_CNT);
-    
+
     boardStatus = Board_i2c8BitRegWr(handle,
                                      fpdModParams->desSlvAddr,
                                      regAddr,
@@ -1589,7 +1683,7 @@ Board_STATUS Board_fpdUb9702SetTxPort0WrEnModeCtrl(void *handle,
 
     regData &= ~(BOARD_FPD_UB9702_TX_WRITE_PORT_0_BIT_MASK);
     regData |= (cfgMode << BOARD_FPD_UB9702_TX_WRITE_PORT_0_SHIFT_CNT);
-    
+
     boardStatus = Board_i2c8BitRegWr(handle,
                                      fpdModParams->desSlvAddr,
                                      regAddr,
@@ -1602,7 +1696,7 @@ Board_STATUS Board_fpdUb9702SetTxPort0WrEnModeCtrl(void *handle,
     }
 
     return 0;
-    
+
 }
 
 /**
@@ -1639,7 +1733,7 @@ Board_STATUS Board_fpdUb9702SetCSILaneCnt(void *handle,
 
     regData &= ~(BOARD_FPD_UB9702_CSI_LANE_COUNT_BIT_MASK);
     regData |= (laneCnt << BOARD_FPD_UB9702_CSI_LANE_COUNT_SHIFT_CNT);
-    
+
     boardStatus = Board_i2c8BitRegWr(handle,
                                      fpdModParams->desSlvAddr,
                                      regAddr,
@@ -1688,7 +1782,7 @@ Board_STATUS Board_fpdUb9702SetCSIContsClkModeCtrl(void *handle,
 
     regData &= ~(BOARD_FPD_UB9702_CSI_CONTS_CLOCK_BIT_MASK);
     regData |= (cfgMode << BOARD_FPD_UB9702_CSI_CONTS_CLOCK_SHIFT_CNT);
-    
+
     boardStatus = Board_i2c8BitRegWr(handle,
                                      fpdModParams->desSlvAddr,
                                      regAddr,
@@ -1737,7 +1831,7 @@ Board_STATUS Board_fpdUb9702SetCSIEnableModeCtrl(void *handle,
 
     regData &= ~(BOARD_FPD_UB9702_CSI_ENABLE_BIT_MASK);
     regData |= (cfgMode << BOARD_FPD_UB9702_CSI_ENABLE_SHIFT_CNT);
-    
+
     boardStatus = Board_i2c8BitRegWr(handle,
                                      fpdModParams->desSlvAddr,
                                      regAddr,
@@ -1786,7 +1880,7 @@ Board_STATUS Board_fpdUb9702SetCSIPassModeCtrl(void *handle,
 
     regData &= ~(BOARD_FPD_UB9702_CSI_PASS_MODE_BIT_MASK);
     regData |= (cfgMode << BOARD_FPD_UB9702_CSI_PASS_MODE_SHIFT_CNT);
-    
+
     boardStatus = Board_i2c8BitRegWr(handle,
                                      fpdModParams->desSlvAddr,
                                      regAddr,
@@ -1840,7 +1934,7 @@ Board_STATUS Board_fpdUb9702GetBCCStatus(void *handle,
 /**
  * \brief  Select receive port read back register block
  *
- * This function is used to select the receive port register block for read back 
+ * This function is used to select the receive port register block for read back
  *
  * \param   handle         [IN]   Low level driver handle
  * \param   fpdModParams   [IN]   FPD module params
@@ -1871,7 +1965,7 @@ Board_STATUS Board_fpdUb9702SelRxPortRdBackRegBlk(void *handle,
 
     regData &= ~(BOARD_FPD_UB9702_RX_READ_PORT_BIT_MASK);
     regData |= (regBlk << BOARD_FPD_UB9702_RX_READ_PORT_SHIFT_CNT);
-    
+
     boardStatus = Board_i2c8BitRegWr(handle,
                                      fpdModParams->desSlvAddr,
                                      regAddr,
@@ -1942,7 +2036,7 @@ Board_STATUS Board_fpdUb9702SetRxPortWrEnModeCtrl(void *handle,
              boardStatus = -1;
              break;
     }
-    
+
     if(boardStatus == -1)
     {
         return boardStatus;
@@ -1996,7 +2090,7 @@ Board_STATUS Board_fpdUb9702SetI2CPassThrAllModeCtrl(void *handle,
 
     regData &= ~(BOARD_FPD_UB9702_I2C_PASS_THROUGH_ALL_BIT_MASK);
     regData |= (cfgMode << BOARD_FPD_UB9702_I2C_PASS_THROUGH_ALL_SHIFT_CNT);
-    
+
     boardStatus = Board_i2c8BitRegWr(handle,
                                      fpdModParams->desSlvAddr,
                                      regAddr,
@@ -2045,7 +2139,7 @@ Board_STATUS Board_fpdUb9702SetI2CPassThrModeCtrl(void *handle,
 
     regData &= ~(BOARD_FPD_UB9702_I2C_PASS_THROUGH_BIT_MASK);
     regData |= (cfgMode << BOARD_FPD_UB9702_I2C_PASS_THROUGH_SHIFT_CNT);
-    
+
     boardStatus = Board_i2c8BitRegWr(handle,
                                      fpdModParams->desSlvAddr,
                                      regAddr,
@@ -2094,7 +2188,7 @@ Board_STATUS Board_fpdUb9702SetI2CAutoAckModeCtrl(void *handle,
 
     regData &= ~(BOARD_FPD_UB9702_AUTO_ACK_ALL_BIT_MASK);
     regData |= (cfgMode << BOARD_FPD_UB9702_AUTO_ACK_ALL_SHIFT_CNT);
-    
+
      boardStatus = Board_i2c8BitRegWr(handle,
                                      fpdModParams->desSlvAddr,
                                      regAddr,
@@ -2143,7 +2237,7 @@ Board_STATUS Board_fpdUb9702SetBCCEnModeCtrl(void *handle,
 
     regData &= ~(BOARD_FPD_UB9702_BC_ALWAYS_ON_BIT_MASK);
     regData |= (cfgMode << BOARD_FPD_UB9702_BC_ALWAYS_ON_SHIFT_CNT);
-    
+
     boardStatus = Board_i2c8BitRegWr(handle,
                                      fpdModParams->desSlvAddr,
                                      regAddr,
@@ -2192,7 +2286,7 @@ Board_STATUS Board_fpdUb9702SelBCFreq(void *handle,
 
     regData &= ~(BOARD_FPD_UB9702_BC_FREQ_SELECT_BIT_MASK);
     regData |= (bcFreq << BOARD_FPD_UB9702_BC_FREQ_SELECT_SHIFT_CNT);
-    
+
     boardStatus = Board_i2c8BitRegWr(handle,
                                      fpdModParams->desSlvAddr,
                                      regAddr,
@@ -2241,7 +2335,7 @@ Board_STATUS Board_fpdUb9702SetRmtSerId(void *handle,
 
     regData &= ~(BOARD_FPD_UB9702_SER_ID_BIT_MASK);
     regData |= ((rmtSerId << BOARD_FPD_UB9702_SER_ID_SHIFT_CNT) | BOARD_FPD_UB9702_FREEZE_DEVICE_ID_BIT_MASK);
-    
+
     boardStatus = Board_i2c8BitRegWr(handle,
                                      fpdModParams->desSlvAddr,
                                      regAddr,
@@ -2340,7 +2434,7 @@ void Board_fpdUb9702GetI2CAddr(uint8_t hubInstance,
 {
     *domain = BOARD_SOC_DOMAIN_MAIN;
     *chNum = 6U;
-    
+
     if(hubInstance == BOARD_FPD_9702_CSI2_DES_HUB1)
     {
         *i2cAddr = 0x3DU;
@@ -2358,3 +2452,66 @@ void Board_fpdUb9702GetI2CAddr(uint8_t hubInstance,
         BOARD_DEVICES_STS_LOG("Enter the correct hub instance");
     }
 }
+
+Board_STATUS Board_fpdUb9702CfgPG(void *handle,
+                                  Board_FpdModuleObj *fpdModParams,
+                                  uint32_t pgType)
+{
+    Board_STATUS ret = BOARD_SOK;
+    uint16_t index = 0;
+#if defined(BOARD_FPD_I2C_CFG_RD_BACK_EN)
+    uint8_t rdData;
+#endif
+    Board_I2cRegProgObj *ub9702Cfg;
+
+    if((handle == NULL) && (pgType >= BOARD_FPD_UB9702_PG_MAX))
+    {
+        ret = BOARD_INVALID_PARAM;
+    }
+
+    if (ret == BOARD_SOK)
+    {
+        ub9702Cfg = Board_FpdUb9702PGCfg[pgType];
+        BOARD_DEVICES_STS_LOG("PG configurations for deserializer with slave address - 0x%x...\n\r",
+                              fpdModParams->desSlvAddr);
+        while(ub9702Cfg[index].regAddr != BOARD_DEVICES_CONFIG_END)
+        {
+#if defined(BOARD_FPD_I2C_CFG_RD_BACK_EN)
+            BOARD_DEVICES_STS_LOG("regAddr - 0x%2x --- regData - 0x%2x\n\r",
+                                  (uint8_t)ub9702Cfg[index].regAddr,
+                                  ub9702Cfg[index].regData);
+#endif
+            ret = Board_i2c8BitRegWr(handle,
+                                     fpdModParams->desSlvAddr,
+                                     (uint8_t)ub9702Cfg[index].regAddr,
+                                     (uint8_t *)(&ub9702Cfg[index].regData),
+                                     1U,
+                                     BOARD_I2C_TRANSACTION_TIMEOUT);
+            if(ret != 0)
+            {
+                return BOARD_I2C_TRANSFER_FAIL;
+            }
+
+            if(ub9702Cfg[index].i2cDelay != 0)
+                Board_delay(ub9702Cfg[index].i2cDelay);
+
+#if defined(BOARD_FPD_I2C_CFG_RD_BACK_EN)
+            ret = Board_i2c8BitRegRd(handle,
+                                     fpdModParams->desSlvAddr,
+                                     (uint8_t)ub9702Cfg[index].regAddr,
+                                     &rdData,
+                                     1U,
+                                     BOARD_I2C_TRANSACTION_TIMEOUT);
+            if(ret != 0)
+            {
+                return BOARD_I2C_TRANSFER_FAIL;
+            }
+
+            BOARD_DEVICES_STS_LOG(" --- read back data - 0x%2x\n\r", rdData);
+#endif
+            index++;
+        }
+    }
+
+    return (ret);
+}
index 7ea6e39a18809ea690d7c005fcc7331d5b2c1437..b987f13daeed9ab3292b9d97cf67a011eb2c2bd5 100755 (executable)
@@ -76,7 +76,7 @@ extern "C" {
 
 #define BOARD_FPD_UB9702_FPD3_PORT_SEL_REG_ADDR                 (0x4CU)
 
-#define BOARD_FPD_UB9702_BCC_STATUS_REG_ADDR                    (0x47U)                                                             
+#define BOARD_FPD_UB9702_BCC_STATUS_REG_ADDR                    (0x47U)
 #define BOARD_FPD_UB9702_BCC_CONFIG_REG_ADDR                    (0x58U)
 
 #define BOARD_FPD_UB9702_SER_ID_REG_ADDR                        (0x5BU)
@@ -236,7 +236,7 @@ extern "C" {
 #define BOARD_FPD_UB9702_DIGITAL_RESET1_BIT_MASK               (0x01 << BOARD_FPD_UB9702_DIGITAL_RESET1_SHIFT_CNT)
 #define BOARD_FPD_UB9702_DIGITAL_RESET0_BIT_MASK               (0x01 << BOARD_FPD_UB9702_DIGITAL_RESET0_SHIFT_CNT)
 
-/** GENERAL_CFG Register Field */               
+/** GENERAL_CFG Register Field */
 #define BOARD_FPD_UB9702_I2C_MASTER_EN_BIT_MASK                (0x01 << BOARD_FPD_UB9702_I2C_MASTER_EN_SHIFT_CNT)
 #define BOARD_FPD_UB9702_OUTPUT_EN_MODE_BIT_MASK               (0x01 << BOARD_FPD_UB9702_OUTPUT_EN_MODE_SHIFT_CNT)
 #define BOARD_FPD_UB9702_OUTPUT_ENABLE_BIT_MASK                (0x01 << BOARD_FPD_UB9702_OUTPUT_ENABLE_SHIFT_CNT)
@@ -244,16 +244,16 @@ extern "C" {
 #define BOARD_FPD_UB9702_RX_PARITY_CHECK_EN_BIT_MASK           (0x01 << BOARD_FPD_UB9702_RX_PARITY_CHECK_EN_SHIFT_CNT)
 #define BOARD_FPD_UB9702_FORCE_REFCLK_DET_BIT_MASK             (0x01 << BOARD_FPD_UB9702_FORCE_REFCLK_DET_SHIFT_CNT)
 
-/** BCC_Watchdog_Control Register Fields */          
+/** BCC_Watchdog_Control Register Fields */
 #define BOARD_FPD_UB9702_BCC_WATCHDOG_TIMER_BIT_MASK           (0x7F << BOARD_FPD_UB9702_BCC_WATCHDOG_TIMER_SHIFT_CNT)
 #define BOARD_FPD_UB9702_BCC_WATCHDOG_TIMER_DISABLE_BIT_MASK   (0x01 << BOARD_FPD_UB9702_BCC_WATCHDOG_TIMER_DISABLE_SHIFT_CNT)
 
-/** SCL_High_Time Register Fields */                           
+/** SCL_High_Time Register Fields */
 #define BOARD_FPD_UB9702_SCL_HIGH_TIME_BIT_MASK                (0xFF << BOARD_FPD_UB9702_SCL_HIGH_TIME_SHIFT_CNT)
-/** SCL_Low_Time Register Fields */                         
+/** SCL_Low_Time Register Fields */
 #define BOARD_FPD_UB9702_SCL_LOW_TIME_BIT_MASK                 (0xFF << BOARD_FPD_UB9702_SCL_LOW_TIME_SHIFT_CNT)
 
-/** RX_PORT_CTL Register Fields */                           
+/** RX_PORT_CTL Register Fields */
 #define BOARD_FPD_UB9702_BCC3_MAP_BIT_MASK                     (0x01 << BOARD_FPD_UB9702_BCC3_MAP_SHIFT_CNT)
 #define BOARD_FPD_UB9702_BCC2_MAP_BIT_MASK                     (0x01 << BOARD_FPD_UB9702_BCC2_MAP_SHIFT_CNT)
 #define BOARD_FPD_UB9702_BCC1_MAP_BIT_MASK                     (0x01 << BOARD_FPD_UB9702_BCC1_MAP_SHIFT_CNT)
@@ -263,28 +263,28 @@ extern "C" {
 #define BOARD_FPD_UB9702_PORT1_EN_BIT_MASK                     (0x01 << BOARD_FPD_UB9702_PORT1_EN_SHIFT_CNT)
 #define BOARD_FPD_UB9702_PORT0_EN_BIT_MASK                     (0x01 << BOARD_FPD_UB9702_PORT0_EN_SHIFT_CNT)
 
-/** IO_CTL Register Fields */                                  
+/** IO_CTL Register Fields */
 #define BOARD_FPD_UB9702_SEL3P3V_BIT_MASK                      (0x01 << BOARD_FPD_UB9702_SEL3P3V_SHIFT_CNT)
 #define BOARD_FPD_UB9702_IO_SUPPLY_MODE_OV_BIT_MASK            (0x01 << BOARD_FPD_UB9702_IO_SUPPLY_MODE_OV_SHIFT_CNT)
 #define BOARD_FPD_UB9702_IO_SUPPLY_MODE_BIT_MASK               (0x03 << BOARD_FPD_UB9702_IO_SUPPLY_MODE_SHIFT_CNT)
 
-/** FS_CTL Register Fields */                                  
+/** FS_CTL Register Fields */
 #define BOARD_FPD_UB9702_FS_MODE_BIT_MASK                      (0x0F << BOARD_FPD_UB9702_FS_MODE_SHIFT_CNT)
 #define BOARD_FPD_UB9702_FS_SINGLE_BIT_MASK                    (0x01 << BOARD_FPD_UB9702_FS_SINGLE_SHIFT_CNT)
 #define BOARD_FPD_UB9702_FS_INIT_STATE_BIT_MASK                (0x01 << BOARD_FPD_UB9702_FS_INIT_STATE_SHIFT_CNT)
 #define BOARD_FPD_UB9702_FS_GEN_MODE_BIT_MASK                  (0x01 << BOARD_FPD_UB9702_FS_GEN_MODE_SHIFT_CNT)
 #define BOARD_FPD_UB9702_FS_GEN_ENABLE_BIT_MASK                (0x01 << BOARD_FPD_UB9702_FS_GEN_ENABLE_SHIFT_CNT)
 
-/** FS_HIGH_TIME_1 Register Field */                           
+/** FS_HIGH_TIME_1 Register Field */
 #define BOARD_FPD_UB9702_FRAMESYNC_HIGH_TIME_1_BIT_MASK        (0xFF << BOARD_FPD_UB9702_FRAMESYNC_HIGH_TIME_1_SHIFT_CNT)
 
-/** FS_HIGH_TIME_0 Register Field */                           
+/** FS_HIGH_TIME_0 Register Field */
 #define BOARD_FPD_UB9702_FRAMESYNC_HIGH_TIME_0_BIT_MASK        (0xFF << BOARD_FPD_UB9702_FRAMESYNC_HIGH_TIME_0_SHIFT_CNT)
 
-/** FS_LOW_TIME_1 Register Field */                            
+/** FS_LOW_TIME_1 Register Field */
 #define BOARD_FPD_UB9702_FRAMESYNC_LOW_TIME_1_BIT_MASK         (0xFF << BOARD_FPD_UB9702_FRAMESYNC_LOW_TIME_1_SHIFT_CNT)
 
-/** FS_LOW_TIME_0 Register Field */                            
+/** FS_LOW_TIME_0 Register Field */
 #define BOARD_FPD_UB9702_FRAMESYNC_LOW_TIME_1_BIT_MASK         (0xFF << BOARD_FPD_UB9702_FRAMESYNC_LOW_TIME_1_SHIFT_CNT)
 
 /** MAX_FRM_HI Register Field */
@@ -470,7 +470,7 @@ extern "C" {
 
 #define BOARD_FPD_9702_FORWARD_ENABLE                           (0x00U)
 #define BOARD_FPD_9702_FORWARD_DISABLE                          (0x01U)
-    
+
 #define BOARD_FPD_9702_CSI2_DES_HUB1                            (0U)
 #define BOARD_FPD_9702_CSI2_DES_HUB2                            (1U)
 #define BOARD_FPD_9702_CSI2_DES_HUB3                            (2U)
@@ -479,6 +479,21 @@ extern "C" {
 #define BOARD_FPD_9702_CSI2_DES_HUB2_ADDR                       (0x30U)
 #define BOARD_FPD_9702_CSI2_DES_HUB3_ADDR                       (0x32U)
 
+/**
+ *  \anchor DESUB9702_patternType
+ *  \name   Pattern type for generation
+ *  \brief  Id for pattern generation.
+ *
+ *  @{
+ */
+/** \brief Pattern type: RGB888 1280x720 30fps */
+#define BOARD_FPD_UB9702_PG_RAW12_1920_1080_30_FPS             ((uint32_t) 0x0U)
+/** \brief Pattern type: RGB888 1920x1080 30fps */
+#define BOARD_FPD_UB9702_PG_RAW12_3840_2160_40_FPS             ((uint32_t) 0x1U)
+/** \brief Pattern type: Maximum Val */
+#define BOARD_FPD_UB9702_PG_MAX                                ((uint32_t) 0x2U)
+/* @} */
+
 /**
  * \brief  Set deserializer device Id
  *
@@ -1082,7 +1097,7 @@ Board_STATUS Board_fpdUb9702GetBCCStatus(void *handle,
 /**
  * \brief  Select receive port read back register block
  *
- * This function is used to select the receive port register block for read back 
+ * This function is used to select the receive port register block for read back
  *
  * \param   handle         [IN]   Low level driver handle
  * \param   fpdModParams   [IN]   FPD module params
@@ -1241,6 +1256,22 @@ void Board_fpdUb9702GetI2CAddr(uint8_t hubInstance,
                                uint8_t *domain,
                                uint8_t *chNum,
                                uint8_t *i2cAddr);
+
+/**
+ * \brief  FPD UB902 pattern generation configurations.
+ *
+ * This function is used for configuring the pattern generator for FPD UB9702
+ *
+ * \param   handle          [IN]  Low level driver handle
+ * \param   fpdModParams    [IN]  FPD module params
+ * \param   pgType          [IN]  Pattern Generation Type
+ *                                See \ref DESUB9702_patternType for details.
+ *
+ * \return  BOARD_SOK in case of success or appropriate error code.
+ */
+Board_STATUS Board_fpdUb9702CfgPG(void *handle,
+                                  Board_FpdModuleObj *fpdModParams,
+                                  uint32_t pgType);
 #ifdef __cplusplus
 }
 #endif /* __cplusplus */