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raw | patch | inline | side by side (parent: 19122f5)
raw | patch | inline | side by side (parent: 19122f5)
author | Don Dominic <a0486429@ti.com> | |
Wed, 4 Aug 2021 09:32:10 +0000 (15:02 +0530) | ||
committer | Ankur <ankurbaranwal@ti.com> | |
Wed, 18 Aug 2021 07:49:06 +0000 (02:49 -0500) |
- Linker File updates
- Add ipc custom linker files for c66x freertos
- Rename main_tirtos.c to main_rtos.c
- Make file and Source updates related to R5F only TCMB tests
Signed-off-by: Don Dominic <a0486429@ti.com>
- Add ipc custom linker files for c66x freertos
- Rename main_tirtos.c to main_rtos.c
- Make file and Source updates related to R5F only TCMB tests
Signed-off-by: Don Dominic <a0486429@ti.com>
diff --git a/packages/ti/drv/ipc/examples/common/j721e/freertos/linker_c66_c66xdsp_1_freertos.lds b/packages/ti/drv/ipc/examples/common/j721e/freertos/linker_c66_c66xdsp_1_freertos.lds
--- /dev/null
@@ -0,0 +1,11 @@
+#include "memory_map_defines.inc"
+
+#define __BOOT C66X1_TEXT
+#define __CORE_IPC_DATA C66X1_IPC_D
+#define __CORE_EXT_DATA_BASE C66x1_EXT_DATA_BASE
+#define __CORE_EXT_DATA C66X1_EXT_D
+#define __CORE_C66_MEM_TEXT C66X1_TEXT
+#define __CORE_C66_MEM_DATA C66X1_DATA
+#define __CORE_DDR_SPACE C66X1_DDR_SPACE
+
+#include "linker_c66_freertos_common.inc"
\ No newline at end of file
diff --git a/packages/ti/drv/ipc/examples/common/j721e/freertos/linker_c66_c66xdsp_2_freertos.lds b/packages/ti/drv/ipc/examples/common/j721e/freertos/linker_c66_c66xdsp_2_freertos.lds
--- /dev/null
@@ -0,0 +1,11 @@
+#include "memory_map_defines.inc"
+
+#define __BOOT C66X1_TEXT
+#define __CORE_IPC_DATA C66X1_IPC_D
+#define __CORE_EXT_DATA_BASE C66x1_EXT_DATA_BASE
+#define __CORE_EXT_DATA C66X1_EXT_D
+#define __CORE_C66_MEM_TEXT C66X1_TEXT
+#define __CORE_C66_MEM_DATA C66X1_DATA
+#define __CORE_DDR_SPACE C66X1_DDR_SPACE
+
+#include "linker_c66_freertos_common.inc"
\ No newline at end of file
diff --git a/packages/ti/drv/ipc/examples/common/j721e/freertos/linker_c66_freertos_common.inc b/packages/ti/drv/ipc/examples/common/j721e/freertos/linker_c66_freertos_common.inc
--- /dev/null
@@ -0,0 +1,79 @@
+/*=========================*/
+/* Linker Settings */
+/*=========================*/
+
+-stack 0x2000 /* SOFTWARE STACK SIZE */
+-heap 0x1000 /* HEAP AREA SIZE */
+--symbol_map _Hwi_intcVectorTable=Hwi_intcVectorTable
+
+/*--------------------------------------------------------------------------*/
+/* Memory Map */
+/*--------------------------------------------------------------------------*/
+MEMORY
+{
+ /*===================== C66 SRAM Locations ========================*/
+ L2SRAM : ORIGIN = 0x00800000 LENGTH = 0x00048000 /* 288KB LOCAL L2/SRAM */
+ L1PSRAM : ORIGIN = 0x00E00000 LENGTH = 0x00008000 /* 32KB LOCAL L1P/SRAM */
+ L1DSRAM : ORIGIN = 0x00F00000 LENGTH = 0x00008000 /* 32KB LOCAL L1D/SRAM */
+
+ /*=================== COMPUTE_CLUSTER0_MSMC_SRAM ==================*/
+ /*---------- J721E Reserved Memory for ARM Trusted Firmware -------*/
+ MSMC3_ARM_FW (RWIX) : ORIGIN = 0x70000000 LENGTH = 0x00040000 /* 256KB */
+ /*-----------------------------------------------------------------*/
+ MSMC3 (RWIX) : ORIGIN = 0x70040000 LENGTH = 0x007B0000 /* 8MB - 320KB */
+ /*------------- J721E Reserved Memory for DMSC Firmware -----------*/
+ MSMC3_DMSC_FW (RWIX) : ORIGIN = 0x707F0000 LENGTH = 0x00010000 /* 64KB */
+
+ /*===================== J721E DDR Locations =======================*/
+ /* DDR Memory Map is included from memory_map_ddr.cmd -------------*/
+}
+
+/*--------------------------------------------------------------*/
+/* Section Configuration */
+/*--------------------------------------------------------------*/
+SECTIONS
+{
+ .hwi_vect: {. = align(32); } > __BOOT ALIGN(0x400)
+ .text:csl_entry:{} > __BOOT
+ .text:_c_int00 load > __BOOT ALIGN(0x400)
+ .text: > __CORE_DDR_SPACE
+ .stack: > __CORE_DDR_SPACE
+ GROUP: > __CORE_DDR_SPACE
+ {
+ .bss:
+ .neardata:
+ .rodata:
+ }
+ .cio: > __CORE_DDR_SPACE
+ .const: > __CORE_DDR_SPACE
+ .data: > __CORE_DDR_SPACE
+ .switch: > __CORE_DDR_SPACE
+ .sysmem: > __CORE_DDR_SPACE
+ .far: > __CORE_DDR_SPACE
+ .args: > __CORE_DDR_SPACE
+ .ppinfo: > __CORE_DDR_SPACE
+ .ppdata: > __CORE_DDR_SPACE
+ .ti.decompress: > __CORE_DDR_SPACE
+ .ti.handler_table: > __CORE_DDR_SPACE
+
+ /* COFF sections */
+ .pinit: > __CORE_DDR_SPACE
+ .cinit: > __CORE_DDR_SPACE
+
+ /* EABI sections */
+ .binit: > __CORE_DDR_SPACE
+ .init_array: > __CORE_DDR_SPACE
+ .fardata: > __CORE_DDR_SPACE
+ .c6xabi.exidx: > __CORE_DDR_SPACE
+ .c6xabi.extab: > __CORE_DDR_SPACE
+
+ .csl_vect: > __CORE_DDR_SPACE
+
+ ipc_data_buffer: > __CORE_DDR_SPACE type=NOLOAD
+ .resource_table:
+ {
+ __RESOURCE_TABLE = .;
+ } > __CORE_EXT_DATA_BASE
+
+ .tracebuf : {} align(1024) > __CORE_EXT_DATA
+}
diff --git a/packages/ti/drv/ipc/examples/common/j721e/freertos/memory_map_ddr.cmd b/packages/ti/drv/ipc/examples/common/j721e/freertos/memory_map_ddr.cmd
index 11d1693c20258cb0241472ea9275ceb5498db905..1f047860ba6c64d93044f7fd1a91fc5d74a2176d 100644 (file)
MCU3_1_R5F_MEM_DATA (RWIX) : ORIGIN = MCU3_1_MEM_DATA_BASE LENGTH = MEM_DATA_SIZE
MCU3_1_DDR_SPACE (RWIX) : ORIGIN = MCU3_1_DDR_SPACE_BASE LENGTH = DDR_SPACE_SIZE
/*---------------------------------- C66x DSP CORE1 ---------------------------------*/
- C66X1_IPC_D (RWIX) : ORIGIN = C66x_1_IPC_DATA_BASE LENGTH = IPC_DATA_SIZE
- C66X1_EXT_D (RWIX) : ORIGIN = C66x_1_EXT_DATA_BASE LENGTH = EXT_DATA_SIZE
- C66X1_TEXT (RWIX) : ORIGIN = C66x_1_MEM_TEXT_BASE LENGTH = MEM_TEXT_SIZE
- C66X1_DATA (RWIX) : ORIGIN = C66x_1_MEM_DATA_BASE LENGTH = MEM_DATA_SIZE
- C66X1_DDR_SPACE (RWIX) : ORIGIN = C66x_1_DDR_SPACE_BASE LENGTH = DDR_SPACE_SIZE
+ C66X1_IPC_D (RWIX) : ORIGIN = C66x1_IPC_DATA_BASE LENGTH = IPC_DATA_SIZE
+ C66X1_EXT_D (RWIX) : ORIGIN = C66x1_EXT_DATA_BASE LENGTH = EXT_DATA_SIZE
+ C66X1_TEXT (RWIX) : ORIGIN = C66x1_MEM_TEXT_BASE LENGTH = MEM_TEXT_SIZE
+ C66X1_DATA (RWIX) : ORIGIN = C66x1_MEM_DATA_BASE LENGTH = MEM_DATA_SIZE
+ C66X1_DDR_SPACE (RWIX) : ORIGIN = C66x1_DDR_SPACE_BASE LENGTH = DDR_SPACE_SIZE
/*---------------------------------- C66x DSP CORE2 ---------------------------------*/
- C66X2_IPC_D (RWIX) : ORIGIN = C66x_2_IPC_DATA_BASE LENGTH = IPC_DATA_SIZE
- C66X2_EXT_D (RWIX) : ORIGIN = C66x_2_EXT_DATA_BASE LENGTH = EXT_DATA_SIZE
- C66X2_TEXT (RWIX) : ORIGIN = C66x_2_MEM_TEXT_BASE LENGTH = MEM_TEXT_SIZE
- C66X2_DATA (RWIX) : ORIGIN = C66x_2_MEM_DATA_BASE LENGTH = MEM_DATA_SIZE
- C66X2_DDR_SPACE (RWIX) : ORIGIN = C66x_2_DDR_SPACE_BASE LENGTH = DDR_SPACE_SIZE
+ C66X2_IPC_D (RWIX) : ORIGIN = C66x2_IPC_DATA_BASE LENGTH = IPC_DATA_SIZE
+ C66X2_EXT_D (RWIX) : ORIGIN = C66x2_EXT_DATA_BASE LENGTH = EXT_DATA_SIZE
+ C66X2_TEXT (RWIX) : ORIGIN = C66x2_MEM_TEXT_BASE LENGTH = MEM_TEXT_SIZE
+ C66X2_DATA (RWIX) : ORIGIN = C66x2_MEM_DATA_BASE LENGTH = MEM_DATA_SIZE
+ C66X2_DDR_SPACE (RWIX) : ORIGIN = C66x2_DDR_SPACE_BASE LENGTH = DDR_SPACE_SIZE
/*---------------------------------- C7x-------- -----------------------------------*/
C7X_IPC_D (RWIX) : ORIGIN = C7x_1_IPC_DATA_BASE LENGTH = IPC_DATA_SIZE
C7X_EXT_D (RWIX) : ORIGIN = C7x_1_EXT_DATA_BASE LENGTH = EXT_DATA_SIZE
diff --git a/packages/ti/drv/ipc/examples/common/j721e/freertos/memory_map_defines.inc b/packages/ti/drv/ipc/examples/common/j721e/freertos/memory_map_defines.inc
index 5d6f360e4fdcc69a3fc3fe5ff1e7583ce5318f8e..a7fbdf4309ece0e1e5c89ff6172d1394a4078faf 100644 (file)
#define MCU2_1_ALLOCATED_START MCU2_0_ALLOCATED_START + CORE_TOTAL_SIZE
#define MCU3_0_ALLOCATED_START MCU2_1_ALLOCATED_START + CORE_TOTAL_SIZE
#define MCU3_1_ALLOCATED_START MCU3_0_ALLOCATED_START + CORE_TOTAL_SIZE
-#define C66x_1_ALLOCATED_START MCU3_1_ALLOCATED_START + CORE_TOTAL_SIZE
-#define C66x_2_ALLOCATED_START C66x_1_ALLOCATED_START + CORE_TOTAL_SIZE
-#define C7x_1_ALLOCATED_START C66x_2_ALLOCATED_START + CORE_TOTAL_SIZE
+#define C66x1_ALLOCATED_START MCU3_1_ALLOCATED_START + CORE_TOTAL_SIZE
+#define C66x2_ALLOCATED_START C66x1_ALLOCATED_START + CORE_TOTAL_SIZE
+#define C7x_1_ALLOCATED_START C66x2_ALLOCATED_START + CORE_TOTAL_SIZE
/*--------------------------- MCU R5FSS0 CORE0 --------------------------*/
#define MCU1_0_IPC_DATA_BASE MCU1_0_ALLOCATED_START
#define MCU3_1_MEM_DATA_BASE MCU3_1_MEM_TEXT_BASE + MEM_TEXT_SIZE
#define MCU3_1_DDR_SPACE_BASE MCU3_1_MEM_DATA_BASE + MEM_DATA_SIZE
/*--------------------------- C66x DSP CORE1 ----------------------------*/
-#define C66x_1_IPC_DATA_BASE C66x_1_ALLOCATED_START
-#define C66x_1_EXT_DATA_BASE C66x_1_IPC_DATA_BASE + IPC_DATA_SIZE
-#define C66x_1_MEM_TEXT_BASE C66x_1_EXT_DATA_BASE + EXT_DATA_SIZE
-#define C66x_1_MEM_DATA_BASE C66x_1_MEM_TEXT_BASE + MEM_TEXT_SIZE
-#define C66x_1_DDR_SPACE_BASE C66x_1_MEM_DATA_BASE + MEM_DATA_SIZE
+#define C66x1_IPC_DATA_BASE C66x1_ALLOCATED_START
+#define C66x1_EXT_DATA_BASE C66x1_IPC_DATA_BASE + IPC_DATA_SIZE
+#define C66x1_MEM_TEXT_BASE C66x1_EXT_DATA_BASE + EXT_DATA_SIZE
+#define C66x1_MEM_DATA_BASE C66x1_MEM_TEXT_BASE + MEM_TEXT_SIZE
+#define C66x1_DDR_SPACE_BASE C66x1_MEM_DATA_BASE + MEM_DATA_SIZE
/*--------------------------- C66x DSP CORE2 ----------------------------*/
-#define C66x_2_IPC_DATA_BASE C66x_2_ALLOCATED_START
-#define C66x_2_EXT_DATA_BASE C66x_2_IPC_DATA_BASE + IPC_DATA_SIZE
-#define C66x_2_MEM_TEXT_BASE C66x_2_EXT_DATA_BASE + EXT_DATA_SIZE
-#define C66x_2_MEM_DATA_BASE C66x_2_MEM_TEXT_BASE + MEM_TEXT_SIZE
-#define C66x_2_DDR_SPACE_BASE C66x_2_MEM_DATA_BASE + MEM_DATA_SIZE
+#define C66x2_IPC_DATA_BASE C66x2_ALLOCATED_START
+#define C66x2_EXT_DATA_BASE C66x2_IPC_DATA_BASE + IPC_DATA_SIZE
+#define C66x2_MEM_TEXT_BASE C66x2_EXT_DATA_BASE + EXT_DATA_SIZE
+#define C66x2_MEM_DATA_BASE C66x2_MEM_TEXT_BASE + MEM_TEXT_SIZE
+#define C66x2_DDR_SPACE_BASE C66x2_MEM_DATA_BASE + MEM_DATA_SIZE
/*--------------------------- C7x ---------------------------------------*/
#define C7x_1_IPC_DATA_BASE C7x_1_ALLOCATED_START
#define C7x_1_EXT_DATA_BASE C7x_1_IPC_DATA_BASE + IPC_DATA_SIZE
diff --git a/packages/ti/drv/ipc/examples/common/makefile.mk b/packages/ti/drv/ipc/examples/common/makefile.mk
index ed50631d91355668a79497c29d0257395e255d36..9e86c4fa84701fa5fb2bb2ac6fb5298e2cb89d1e 100644 (file)
COMP_LIST_COMMON += sciserver_tirtos
endif
endif
- SRCS_COMMON += main_tirtos.c ipc_testsetup.c
+ SRCS_COMMON += main_rtos.c ipc_testsetup.c
SRCS_COMMON += ipc_utils.c
CFLAGS_LOCAL_COMMON += -DSYSBIOS
INCLUDE_EXTERNAL_INTERFACES += xdc bios
COMP_LIST_COMMON += sciserver_tirtos
endif
endif
- SRCS_COMMON += main_tirtos.c ipc_testsetup.c
+ SRCS_COMMON += main_rtos.c ipc_testsetup.c
SRCS_COMMON += ipc_trace.c
CFLAGS_LOCAL_COMMON += -DFREERTOS
INCLUDE_EXTERNAL_INTERFACES += freertos
EXTERNAL_LNKCMD_FILE_LOCAL = $(PDK_INSTALL_PATH)/ti/drv/ipc/examples/common/$(SOC)/$(BUILD_OS_TYPE)/linker_$(ISA)_$(CORE)_$(BUILD_OS_TYPE).lds
APPEND_LNKCMD_FILE += $(PDK_INSTALL_PATH)/ti/drv/ipc/examples/common/$(SOC)/$(BUILD_OS_TYPE)/memory_map_ddr.cmd
ifeq ($(ECHO_TEST_BTCM), 1)
+ ifeq ($(ISA), r5f)
EXTERNAL_LNKCMD_FILE_LOCAL = $(PDK_INSTALL_PATH)/ti/drv/ipc/examples/common/$(SOC)/$(BUILD_OS_TYPE)/linker_$(ISA)_$(CORE)_btcm_$(BUILD_OS_TYPE).lds
+ endif
endif
endif
diff --git a/packages/ti/drv/ipc/examples/common/src/main_tirtos.c b/packages/ti/drv/ipc/examples/common/src/main_rtos.c
similarity index 99%
rename from packages/ti/drv/ipc/examples/common/src/main_tirtos.c
rename to packages/ti/drv/ipc/examples/common/src/main_rtos.c
index c8ebff4c19c60a455aceec1e89cdbf55c86f3b9b..2383ac88f3a5497d8a00e03b33463fc582355576 100644 (file)
rename from packages/ti/drv/ipc/examples/common/src/main_tirtos.c
rename to packages/ti/drv/ipc/examples/common/src/main_rtos.c
index c8ebff4c19c60a455aceec1e89cdbf55c86f3b9b..2383ac88f3a5497d8a00e03b33463fc582355576 100644 (file)
-#if defined ECHO_TEST_BTCM && defined FREERTOS
+#if defined ECHO_TEST_BTCM && defined FREERTOS && defined BUILD_MCU
/* Relocate FreeRTOS Reset Vectors from BTCM*/
void _freertosresetvectors (void);
memcpy((void *)0x0, (void *)_freertosresetvectors, 0x40);
diff --git a/packages/ti/drv/ipc/examples/ipc_multicore_perf_test.mk b/packages/ti/drv/ipc/examples/ipc_multicore_perf_test.mk
index 1f2f3080b963a4e8f461c4000a5fd5461c6a60a1..9b90619bd29e83e2942b93687e48671d02b28c6a 100644 (file)
# Local name of IPC test app
RPRC_PREFIX = ipc_perf_test
-# FreeRTOS is currently supported only on R5F cores.
+# FreeRTOS is currently supported only on R5F/C66x cores.
# So for multicore performance test, use tirtos binary on other cores
define BIN_PATH_PREFIX_RULE
diff --git a/packages/ti/drv/ipc/examples/ipc_perf_test/main_tirtos.c b/packages/ti/drv/ipc/examples/ipc_perf_test/main_rtos.c
similarity index 100%
rename from packages/ti/drv/ipc/examples/ipc_perf_test/main_tirtos.c
rename to packages/ti/drv/ipc/examples/ipc_perf_test/main_rtos.c
rename from packages/ti/drv/ipc/examples/ipc_perf_test/main_tirtos.c
rename to packages/ti/drv/ipc/examples/ipc_perf_test/main_rtos.c
diff --git a/packages/ti/drv/ipc/examples/ipc_perf_test/makefile.mk b/packages/ti/drv/ipc/examples/ipc_perf_test/makefile.mk
index abe4c3c721a507d7a7492aabe927864e09002ce8..460dd3f9d203ad48f277d8e240fa6554fce70409 100644 (file)
COMP_LIST_COMMON += mailbox
endif
-SRCS_COMMON += main_tirtos.c
+SRCS_COMMON += main_rtos.c
ifeq ($(SOC),$(filter $(SOC), j721e j7200))
ifeq ($(CORE),mcu1_0)
COMP_LIST_COMMON += sciserver_tirtos