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raw | patch | inline | side by side (parent: 0e459bc)
raw | patch | inline | side by side (parent: 0e459bc)
author | Vineet Roy <a0131726@ti.com> | |
Thu, 10 Dec 2020 12:25:17 +0000 (17:55 +0530) | ||
committer | Sivaraj R <sivaraj@ti.com> | |
Wed, 16 Dec 2020 07:42:15 +0000 (01:42 -0600) |
1. Firmware patch to fix race condition while updating NSP credit value
2. The fix is taken directly from PINDSW-2997 which has already been validated on HSR-PRP
2. The fix is taken directly from PINDSW-2997 which has already been validated on HSR-PRP
diff --git a/packages/ti/drv/icss_emac/firmware/icss_dualemac/src/icss_emacSwitch.h b/packages/ti/drv/icss_emac/firmware/icss_dualemac/src/icss_emacSwitch.h
index c4e47213f3e4a4d9522420e0dc87a9e55614e4e2..5c5ffea8e97bf7dc9f8bee9e556bda0b19e35fc2 100644 (file)
;EMAC Time Triggered Send Constants
ICSS_EMAC_TTS_IEP_MAX_VAL .set 0x3B9ACA00
-ICSS_EMAC_TTS_FIRST_CST_SAFETY_MARGIN .set 0x3A98
+ICSS_EMAC_TTS_FIRST_CST_SAFETY_MARGIN .set 0x3A98
+SP_COUNTER_UPDATE_INTERVAL_DEFAULT .set 100000000
;Other protocols related defines
TRANSMIT_QUEUES_BUFFER_OFFSET .set 0
; 3. Port Status Offset *
;* These are present on both PRU0 and PRU1 *
;****************************************************************************
-STORM_PREVENTION_OFFSET_BC .set STATISTICS_OFFSET + STAT_SIZE ;4 bytes
-PHY_SPEED_OFFSET .set STATISTICS_OFFSET + STAT_SIZE + 4 ;4 bytes
-PORT_STATUS_OFFSET .set STATISTICS_OFFSET + STAT_SIZE + 8 ;1 byte
-COLLISION_COUNTER .set STATISTICS_OFFSET + STAT_SIZE + 9 ;1 byte
-RX_PKT_SIZE_OFFSET .set STATISTICS_OFFSET + STAT_SIZE + 10 ;4 bytes
-PORT_CONTROL_ADDR .set STATISTICS_OFFSET + STAT_SIZE + 14 ;4 bytes
-PORT_MAC_ADDR .set STATISTICS_OFFSET + STAT_SIZE + 18 ;6 bytes
-RX_INT_STATUS_OFFSET .set STATISTICS_OFFSET + STAT_SIZE + 24 ;1 byte
-STORM_PREVENTION_OFFSET_MC .set STATISTICS_OFFSET + STAT_SIZE + 25 ;4 bytes
-STORM_PREVENTION_OFFSET_UC .set STATISTICS_OFFSET + STAT_SIZE + 29 ;4 bytes
+STORM_PREVENTION_OFFSET_BC_DRIVER .set STATISTICS_OFFSET + STAT_SIZE ;4 bytes
+PHY_SPEED_OFFSET .set STATISTICS_OFFSET + STAT_SIZE + 4 ;4 bytes
+PORT_STATUS_OFFSET .set STATISTICS_OFFSET + STAT_SIZE + 8 ;1 byte
+COLLISION_COUNTER .set STATISTICS_OFFSET + STAT_SIZE + 9 ;1 byte
+RX_PKT_SIZE_OFFSET .set STATISTICS_OFFSET + STAT_SIZE + 10 ;4 bytes
+PORT_CONTROL_ADDR .set STATISTICS_OFFSET + STAT_SIZE + 14 ;4 bytes
+PORT_MAC_ADDR .set STATISTICS_OFFSET + STAT_SIZE + 18 ;6 bytes
+RX_INT_STATUS_OFFSET .set STATISTICS_OFFSET + STAT_SIZE + 24 ;1 byte
+STORM_PREVENTION_OFFSET_MC_DRIVER .set STATISTICS_OFFSET + STAT_SIZE + 25 ;4 bytes
+STORM_PREVENTION_OFFSET_UC_DRIVER .set STATISTICS_OFFSET + STAT_SIZE + 29 ;4 bytes
+STORM_PREVENTION_OFFSET_BC .set STATISTICS_OFFSET + STAT_SIZE + 33 ;4 bytes
+STORM_PREVENTION_OFFSET_MC .set STATISTICS_OFFSET + STAT_SIZE + 37 ;4 bytes
+STORM_PREVENTION_OFFSET_UC .set STATISTICS_OFFSET + STAT_SIZE + 41 ;4 bytes
+SP_UPDATE_TIMESTAMP_OFFSET .set STATISTICS_OFFSET + STAT_SIZE + 45 ;4 bytes
+SP_INCREMENT_COUNT_OFFSET .set STATISTICS_OFFSET + STAT_SIZE + 49 ;4 bytes
+SP_COUNTER_UPDATE_INTERVAL_OFFSET .set STATISTICS_OFFSET + STAT_SIZE + 53 ;4 bytes
;***********************************************************************************************************
; *
diff --git a/packages/ti/drv/icss_emac/firmware/icss_dualemac/src/micro_scheduler.asm b/packages/ti/drv/icss_emac/firmware/icss_dualemac/src/micro_scheduler.asm
index 72698646e9c9db7586915439bd02596628213a04..412ac39c6c05c27237b0b515f0dd4ed1296f1c2e 100644 (file)
.endif
;Configure the Task Table. (Currently no used as the task table is very small.)
- LDI32 TASK_TABLE_ROW0, 0x00020100
+ LDI32 TASK_TABLE_ROW0, 0x00020100
+
+ ;load storm prevention timer interval
+ MOV32 RCV_TEMP_REG_1, SP_COUNTER_UPDATE_INTERVAL_DEFAULT
+ LDI RCV_TEMP_REG_2, SP_COUNTER_UPDATE_INTERVAL_OFFSET
+ SBCO &RCV_TEMP_REG_1, PRU_DMEM_ADDR, RCV_TEMP_REG_2, 4
START_THE_MS:
JAL CALL_REG, FN_PTP_BACKGROUND_TASK
.endif ;PRU0
.endif ;PTP
+
+STORM_PREVENTION_COUNTER_UPDATE_CHECK:
+ ;current IEP counter value
+ LBCO &RCV_TEMP_REG_2, IEP_CONST, IEP_COUNTER_OFFSET, 4
+ AND RCV_TEMP_REG_1, RCV_TEMP_REG_2, RCV_TEMP_REG_2
+ LDI RCV_TEMP_REG_3, SP_UPDATE_TIMESTAMP_OFFSET
+ LBCO &RCV_TEMP_REG_4, PRU_DMEM_ADDR, RCV_TEMP_REG_3 , 4
+ QBGE IEP_WRAPAROUND_HAPPENED, RCV_TEMP_REG_2, RCV_TEMP_REG_4
+ SUB RCV_TEMP_REG_2, RCV_TEMP_REG_2, RCV_TEMP_REG_4
+ QBA CHECK_100_MS_PASSED
+IEP_WRAPAROUND_HAPPENED:
+ ;check compare enable and see if wraparound is enabled
+ LBCO &RCV_TEMP_REG_3, IEP_CONST, IEP_CMP_CFG_REG, 1
+ QBBC IEP_CMP0_NOT_ENABLED_HERE, RCV_TEMP_REG_3, 1
+ LBCO &RCV_TEMP_REG_3, IEP_CONST, IEP_CMP0_REG, 4
+ QBA CALCULATE_PASSED_TIME_FOR_IEP_WRAPAROUND
+IEP_CMP0_NOT_ENABLED_HERE:
+ FILL &RCV_TEMP_REG_3, 4
+CALCULATE_PASSED_TIME_FOR_IEP_WRAPAROUND:
+ SUB RCV_TEMP_REG_4, RCV_TEMP_REG_3, RCV_TEMP_REG_4
+ ADD RCV_TEMP_REG_2, RCV_TEMP_REG_4, RCV_TEMP_REG_2
+CHECK_100_MS_PASSED:
+ ;check if 100ms has passed
+ LDI RCV_TEMP_REG_3, SP_COUNTER_UPDATE_INTERVAL_OFFSET
+ LBCO &RCV_TEMP_REG_3, PRU_DMEM_ADDR, RCV_TEMP_REG_3, 4
+ QBGE SKIP_STORM_PREVENTION_COUNTER_UPDATE, RCV_TEMP_REG_2, RCV_TEMP_REG_3
+ LDI RCV_TEMP_REG_3, SP_UPDATE_TIMESTAMP_OFFSET
+ SBCO &RCV_TEMP_REG_1, PRU_DMEM_ADDR, RCV_TEMP_REG_3, 4
+;for BC
+ LDI RCV_TEMP_REG_3, STORM_PREVENTION_OFFSET_BC_DRIVER
+ LBCO &RCV_TEMP_REG_4, PRU_DMEM_ADDR, RCV_TEMP_REG_3, 4
+ LDI RCV_TEMP_REG_3, STORM_PREVENTION_OFFSET_BC
+ SBCO &RCV_TEMP_REG_4, PRU_DMEM_ADDR, RCV_TEMP_REG_3, 4
+;for MC
+ LDI RCV_TEMP_REG_3, STORM_PREVENTION_OFFSET_MC_DRIVER
+ LBCO &RCV_TEMP_REG_4, PRU_DMEM_ADDR, RCV_TEMP_REG_3, 4
+ LDI RCV_TEMP_REG_3, STORM_PREVENTION_OFFSET_MC
+ SBCO &RCV_TEMP_REG_4, PRU_DMEM_ADDR, RCV_TEMP_REG_3, 4
+;for UC
+ LDI RCV_TEMP_REG_3, STORM_PREVENTION_OFFSET_UC_DRIVER
+ LBCO &RCV_TEMP_REG_4, PRU_DMEM_ADDR, RCV_TEMP_REG_3, 4
+ LDI RCV_TEMP_REG_3, STORM_PREVENTION_OFFSET_UC
+ SBCO &RCV_TEMP_REG_4, PRU_DMEM_ADDR, RCV_TEMP_REG_3, 4
+SKIP_STORM_PREVENTION_COUNTER_UPDATE:
+
QBBS stat_task_called, R23, TX_STAT_PEND ;check if TX_STAT_PEND is set then jump to stat task
QBBC coll_task_called, R23, RX_STAT_PEND ;check if RX_STAT_PEND is clear then jump to next task else jump to stat task
stat_task_called:
diff --git a/packages/ti/drv/icss_emac/firmware/icss_switch/src/icss_switch.h b/packages/ti/drv/icss_emac/firmware/icss_switch/src/icss_switch.h
index c2d1646bc33ce825ec737ecf5143a5e8ddbb0ac6..5acf2861d419cd74dab7cb95ca41adf41eb8fd4c 100644 (file)
; such license is granted solely to the extent that any such patent is necessary
; to Utilize the software alone. The patent license shall not apply to any
; combinations which include this software, other than combinations with devices
-; manufactured by or for TI (¿TI Devices¿). No hardware patent is licensed hereunder.
+; manufactured by or for TI (�TI Devices�). No hardware patent is licensed hereunder.
;
; Redistributions must preserve existing copyright notices and reproduce this license
; (including the above copyright notice and the disclaimer and (if applicable) source
;
; DISCLAIMER.
;
-; THIS SOFTWARE IS PROVIDED BY TI AND TI¿S LICENSORS "AS IS" AND ANY EXPRESS OR IMPLIED
+; THIS SOFTWARE IS PROVIDED BY TI AND TI�S LICENSORS "AS IS" AND ANY EXPRESS OR IMPLIED
; WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
-; AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL TI AND TI¿S
+; AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL TI AND TI�S
; LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
; GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
QUEUE_1_SIZE .set 97 ; Network Management high
QUEUE_2_SIZE .set 97 ; Network Management low
QUEUE_3_SIZE .set 97 ; Protocol specific
-QUEUE_4_SIZE .set 97 ; NRT (IP,ARP, ICMP, \85)
+QUEUE_4_SIZE .set 97 ; NRT (IP,ARP, ICMP, �)
; HOST PORT QUEUES can buffer up to 4 full sized frames per queue
HOST_QUEUE_1_SIZE .set 194 ; Protocol and/or VLAN priority 7 and 6
HOST_QUEUE_2_SIZE .set 194 ; Protocol mid
HOST_QUEUE_3_SIZE .set 194 ; Protocol low
-HOST_QUEUE_4_SIZE .set 194 ; NRT (IP, ARP, ICMP \85)
+HOST_QUEUE_4_SIZE .set 194 ; NRT (IP, ARP, ICMP �)
COLLISION_QUEUE_SIZE .set 48
P0_COL_TOP_MOST_BD_OFFSET .set (4*COLLISION_QUEUE_SIZE) + P0_COL_BD_OFFSET - 4
; 3. Port Status Offset *
;* These are present on both PRU0 and PRU1 *
;****************************************************************************
-;STATISTICS_OFFSET .set 0x1f00
-STORM_PREVENTION_OFFSET_BC .set STATISTICS_OFFSET + STAT_SIZE ;4 bytes
-PHY_SPEED_OFFSET .set STATISTICS_OFFSET + STAT_SIZE + 4 ;4 bytes
-PORT_STATUS_OFFSET .set STATISTICS_OFFSET + STAT_SIZE + 8 ;1 byte
-COLLISION_COUNTER .set STATISTICS_OFFSET + STAT_SIZE + 9 ;1 byte
-RX_PKT_SIZE_OFFSET .set STATISTICS_OFFSET + STAT_SIZE + 10 ;4 bytes
-PORT_CONTROL_ADDR .set STATISTICS_OFFSET + STAT_SIZE + 14 ;4 bytes
-PORT_MAC_ADDR .set STATISTICS_OFFSET + STAT_SIZE + 18 ;6 bytes
-RX_INT_STATUS_OFFSET .set STATISTICS_OFFSET + STAT_SIZE + 24 ;1 byte
-STORM_PREVENTION_OFFSET_MC .set STATISTICS_OFFSET + STAT_SIZE + 25 ;4 bytes
-STORM_PREVENTION_OFFSET_UC .set STATISTICS_OFFSET + STAT_SIZE + 29 ;4 bytes
+STORM_PREVENTION_OFFSET_BC_DRIVER .set STATISTICS_OFFSET + STAT_SIZE ;4 bytes
+PHY_SPEED_OFFSET .set STATISTICS_OFFSET + STAT_SIZE + 4 ;4 bytes
+PORT_STATUS_OFFSET .set STATISTICS_OFFSET + STAT_SIZE + 8 ;1 byte
+COLLISION_COUNTER .set STATISTICS_OFFSET + STAT_SIZE + 9 ;1 byte
+RX_PKT_SIZE_OFFSET .set STATISTICS_OFFSET + STAT_SIZE + 10 ;4 bytes
+PORT_CONTROL_ADDR .set STATISTICS_OFFSET + STAT_SIZE + 14 ;4 bytes
+PORT_MAC_ADDR .set STATISTICS_OFFSET + STAT_SIZE + 18 ;6 bytes
+RX_INT_STATUS_OFFSET .set STATISTICS_OFFSET + STAT_SIZE + 24 ;1 byte
+STORM_PREVENTION_OFFSET_MC_DRIVER .set STATISTICS_OFFSET + STAT_SIZE + 25 ;4 bytes
+STORM_PREVENTION_OFFSET_UC_DRIVER .set STATISTICS_OFFSET + STAT_SIZE + 29 ;4 bytes
+STORM_PREVENTION_OFFSET_BC .set STATISTICS_OFFSET + STAT_SIZE + 33 ;4 bytes
+STORM_PREVENTION_OFFSET_MC .set STATISTICS_OFFSET + STAT_SIZE + 37 ;4 bytes
+STORM_PREVENTION_OFFSET_UC .set STATISTICS_OFFSET + STAT_SIZE + 41 ;4 bytes
+SP_UPDATE_TIMESTAMP_OFFSET .set STATISTICS_OFFSET + STAT_SIZE + 45 ;4 bytes
+SP_INCREMENT_COUNT_OFFSET .set STATISTICS_OFFSET + STAT_SIZE + 49 ;4 bytes
+SP_COUNTER_UPDATE_INTERVAL_OFFSET .set STATISTICS_OFFSET + STAT_SIZE + 53 ;4 bytes
+
+SP_COUNTER_UPDATE_INTERVAL_DEFAULT .set 100000000
;****************************************************************************