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raw | patch | inline | side by side (parent: 6930852)
author | M V Pratap Reddy <x0257344@ti.com> | |
Wed, 3 Mar 2021 05:15:30 +0000 (10:45 +0530) | ||
committer | Sujith Shivalingappa <sujith.s@ti.com> | |
Thu, 4 Mar 2021 15:24:33 +0000 (09:24 -0600) |
- CSL SerDes USB configurations are updated to fix enumeration failures.
Updated the board library and USB driver to align with updated SerDes
configurations.
Updated the board library and USB driver to align with updated SerDes
configurations.
diff --git a/packages/ti/board/src/am65xx_evm/am65xx_evm_serdes_cfg.c b/packages/ti/board/src/am65xx_evm/am65xx_evm_serdes_cfg.c
index 86d300164e580041b33896cc7437d0bf032c0894..f040e035c0103ab68ecf7874bd200519158f7810 100644 (file)
/******************************************************************************
- * Copyright (c) 2018 Texas Instruments Incorporated - http://www.ti.com
+ * Copyright (c) 2018-2021 Texas Instruments Incorporated - http://www.ti.com
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
serdesLane0EnableParams.phyType = CSL_SERDES_PHY_TYPE_USB ;
serdesLane0EnableParams.operatingMode = CSL_SERDES_FUNCTIONAL_MODE;
serdesLane0EnableParams.iterationMode = CSL_SERDES_LANE_ENABLE_COMMON_INIT;
+ serdesLane0EnableParams.forceAttBoost = CSL_SERDES_FORCE_ATT_BOOST_DISABLED;
+ serdesLane0EnableParams.sscMode = CSL_SERDES_SSC_DISABLED;
for(index = 0; index < serdesLane0EnableParams.numLanes; index++)
{
- serdesLane0EnableParams.loopbackMode[index] = CSL_SERDES_LOOPBACK_DISABLED;
- serdesLane0EnableParams.laneCtrlRate[index] = CSL_SERDES_LANE_FULL_RATE;
+ serdesLane0EnableParams.loopbackMode[index] = CSL_SERDES_LOOPBACK_DISABLED;
+ serdesLane0EnableParams.laneCtrlRate[index] = CSL_SERDES_LANE_FULL_RATE;
+ serdesLane0EnableParams.rxCoeff.forceAttVal[index] = 7;
+ serdesLane0EnableParams.rxCoeff.forceBoostVal[index] = 1;
}
/* Configuring PCIe1 Lane0 */
CSL_serdesPorReset(serdesLane1EnableParams.baseAddr);
/* USB3.0 initializations */
- result = CSL_serdesUSBInit(serdesLane0EnableParams.baseAddr,
- serdesLane0EnableParams.numLanes,
- serdesLane0EnableParams.refClock,
- serdesLane0EnableParams.linkRate);
+ result = CSL_serdesUSBInit(&serdesLane0EnableParams);
if (result != CSL_SERDES_NO_ERR)
{
return BOARD_FAIL;
index 2f219b5dc6fbb5859b2e0f4896977e14a6c6db05..802ca0ea41a6fa64fcb3ace766754eb1ebca7f5f 100644 (file)
#
-# Copyright (c) 2016-2018, Texas Instruments Incorporated
+# Copyright (c) 2016-2021, Texas Instruments Incorporated
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
#CFLAGS_LOCAL_COMMON += -DDEBUG_PRINT_EN #this flag enable debug prints. Used only with UART in poll mode
endif
+ifeq ($(SOC),$(filter $(SOC), am65xx))
+#CFLAGS_LOCAL_COMMON += -DENABLE_SERDES_SSC_MODE #this flag enables SerDes SSC mode
+endif
+
# this is to disable the dsb instruction in usb/src/include/hw_types.h
#CFLAGS_LOCAL_COMMON += -DMEM_BARRIER_DISABLE
diff --git a/packages/ti/drv/usb/soc/am65xx/usb_wrapper.c b/packages/ti/drv/usb/soc/am65xx/usb_wrapper.c
index 093ab9eaef849619abcf5fe2b359bb7a238173bf..3d3fe6388be4975ef17a4ee47f0b1f2298aaa55d 100644 (file)
* As the name suggests this file implements the USB wrapper as
* impemented by AM6x .
*
- * \copyright Copyright (C) 2018-2019 Texas Instruments Incorporated -
+ * \copyright Copyright (C) 2018-2021 Texas Instruments Incorporated -
* http://www.ti.com/
*/
CSL_SerdesRefClock refClock = CSL_SERDES_REF_CLOCK_100M;
CSL_SerdesLinkRate linkRate = CSL_SERDES_LINK_RATE_5G;
int32_t i;
- int32_t rc;
+ int32_t rc = 0;
CSL_SerdesLaneEnableParams serdesLaneEnableParams;
CSL_SerdesLaneEnableStatus laneRetVal = CSL_SERDES_LANE_ENABLE_NO_ERR;
MAIN_CTRL_MMR_CFG0_SERDES0_REFCLK_SEL_CLK_SEL,
0x2); /* MAIN_PLL_CLKOUT */
+ memset(&serdesLaneEnableParams, 0, sizeof(serdesLaneEnableParams));
+
+ serdesLaneEnableParams.baseAddr = baseAddr;
+ serdesLaneEnableParams.refClock = refClock;
+ serdesLaneEnableParams.linkRate = linkRate;
+ serdesLaneEnableParams.numLanes = numLanes;
+ serdesLaneEnableParams.laneMask = 0x1; /* all lanes */
+ serdesLaneEnableParams.phyType = CSL_SERDES_PHY_TYPE_USB;
+ serdesLaneEnableParams.operatingMode= CSL_SERDES_FUNCTIONAL_MODE;
+ serdesLaneEnableParams.forceAttBoost= CSL_SERDES_FORCE_ATT_BOOST_DISABLED;
+#if defined(ENABLE_SERDES_SSC_MODE)
+ serdesLaneEnableParams.sscMode = CSL_SERDES_SSC_ENABLED;
+#else
+ serdesLaneEnableParams.sscMode = CSL_SERDES_SSC_DISABLED;
+#endif
+
+ for(i=0; i< serdesLaneEnableParams.numLanes; i++)
+ {
+ serdesLaneEnableParams.laneCtrlRate[i] = CSL_SERDES_LANE_FULL_RATE;
+ serdesLaneEnableParams.loopbackMode[i] = CSL_SERDES_LOOPBACK_DISABLED;
+ serdesLaneEnableParams.rxCoeff.forceAttVal[i] = 7;
+ serdesLaneEnableParams.rxCoeff.forceBoostVal[i] = 1;
+ }
+
/* init the SERDES */
- sdrc = CSL_serdesUSBInit(baseAddr, numLanes, refClock, linkRate);
+ sdrc = CSL_serdesUSBInit(&serdesLaneEnableParams);
if (sdrc == CSL_SERDES_NO_ERR)
{
rc = 0;
if (rc == 0)
{
- memset(&serdesLaneEnableParams, 0, sizeof(serdesLaneEnableParams));
-
- serdesLaneEnableParams.baseAddr = baseAddr;
- serdesLaneEnableParams.refClock = refClock;
- serdesLaneEnableParams.linkRate = linkRate;
- serdesLaneEnableParams.numLanes = numLanes;
- serdesLaneEnableParams.laneMask = 0x1; /* all lanes */
- serdesLaneEnableParams.phyType = CSL_SERDES_PHY_TYPE_USB;
- serdesLaneEnableParams.operatingMode= CSL_SERDES_FUNCTIONAL_MODE;
- serdesLaneEnableParams.forceAttBoost= CSL_SERDES_FORCE_ATT_BOOST_DISABLED;
-
-
- for(i=0; i< serdesLaneEnableParams.numLanes; i++)
- {
- serdesLaneEnableParams.laneCtrlRate[i] = CSL_SERDES_LANE_FULL_RATE;
- serdesLaneEnableParams.loopbackMode[i] = CSL_SERDES_LOOPBACK_DISABLED;
- serdesLaneEnableParams.rxCoeff.forceAttVal[i] = 7;
- serdesLaneEnableParams.rxCoeff.forceBoostVal[i] = 1;
- }
-
/* Common Lane Enable API for lane enable, pll enable etc */
laneRetVal = CSL_serdesLaneEnable(&serdesLaneEnableParams);