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raw | patch | inline | side by side (parent: ac0e150)
author | Prasad Konnur <prasadkonnur@ti.com> | |
Mon, 31 May 2021 18:32:23 +0000 (00:02 +0530) | ||
committer | Sujith Shivalingappa <sujith.s@ti.com> | |
Tue, 1 Jun 2021 06:36:55 +0000 (01:36 -0500) |
Signed-off-by: Prasad Konnur <prasadkonnur@ti.com>
diff --git a/packages/ti/drv/mailbox/examples/mailbox_msg_testapp/main_dss.c b/packages/ti/drv/mailbox/examples/mailbox_msg_testapp/main_dss.c
index 8a361612bc8644b29b2258d49781da72944a53ed..7afce56b69510abd40eb5620593dc1701680d9ab 100644 (file)
/*Global array to keep handles of channels between mss and dss*/
Mbox_Handle handleArray[MAILBOX_CH_ID_MAX + 1];
+
+/* Select the remote Mailbox Inst based on whether the MSS binary is
+ * run on Core A or Core B */
+uint32_t gRemoteMailboxInst = MAILBOX_INST_MSS_CR5A;
+// uint32_t gRemoteMailboxInst = MAILBOX_INST_MSS_CR5B;
+
/* ========================================================================== */
/* Function Definitions */
/* ========================================================================== */
/* Setup the default Mailbox open Parameters */
Mailbox_openParams_init(&openParam);
- openParam.remoteEndpoint = MAILBOX_INST_MSS_CR5A;
+ openParam.remoteEndpoint = gRemoteMailboxInst;
openParam.cfg.readMode = MAILBOX_MODE_CALLBACK;
openParam.cfg.readCallback = Test_appCallbackFunction;
//openParam.cfg.writeTimeout = 1000U;
/****** ch 1 *********************************************/
Mailbox_openParams_init(&openParam);
- openParam.remoteEndpoint = MAILBOX_INST_MSS_CR5A;
+ openParam.remoteEndpoint = gRemoteMailboxInst;
openParam.cfg.chType = MAILBOX_CHTYPE_MULTI;
openParam.cfg.chId = MAILBOX_CH_ID_1;
openParam.cfg.readMode = MAILBOX_MODE_CALLBACK;
/****** ch 3 *********************************************/
Mailbox_openParams_init(&openParam);
- openParam.remoteEndpoint = MAILBOX_INST_MSS_CR5A;
+ openParam.remoteEndpoint = gRemoteMailboxInst;
openParam.cfg.chType = MAILBOX_CHTYPE_MULTI;
openParam.cfg.chId = MAILBOX_CH_ID_3;
openParam.cfg.readMode = MAILBOX_MODE_CALLBACK;
/****** ch 4 *********************************************/
Mailbox_openParams_init(&openParam);
- openParam.remoteEndpoint = MAILBOX_INST_MSS_CR5A;
+ openParam.remoteEndpoint = gRemoteMailboxInst;
openParam.cfg.chType = MAILBOX_CHTYPE_MULTI;
openParam.cfg.chId = MAILBOX_CH_ID_4;
openParam.cfg.readMode = MAILBOX_MODE_BLOCKING;
/****** ch 7 *********************************************/
Mailbox_openParams_init(&openParam);
- openParam.remoteEndpoint = MAILBOX_INST_MSS_CR5A;
+ openParam.remoteEndpoint = gRemoteMailboxInst;
openParam.cfg.chType = MAILBOX_CHTYPE_MULTI;
openParam.cfg.chId = MAILBOX_CH_ID_7;
openParam.cfg.readMode = MAILBOX_MODE_BLOCKING;
diff --git a/packages/ti/drv/mailbox/examples/mailbox_msg_testapp/main_mss.c b/packages/ti/drv/mailbox/examples/mailbox_msg_testapp/main_mss.c
index 58407d365d869593937df8255445a7779b095eac..e3f80c44192a992103ec0e20fe15e6f6dd457402 100644 (file)
/* Setup the default Mailbox init Parameters */
Mailbox_initParams_init(&initParam);
+#if defined (BUILD_MCU1_0)
initParam.localEndpoint = MAILBOX_INST_MSS_CR5A;
+#elif defined (BUILD_MCU1_1)
+ initParam.localEndpoint = MAILBOX_INST_MSS_CR5B;
+#endif
/* Initialize the Mailbox */
Mailbox_init(&initParam);
diff --git a/packages/ti/drv/mailbox/examples/mailbox_msg_testapp/makefile b/packages/ti/drv/mailbox/examples/mailbox_msg_testapp/makefile
index 06beb737f7c9990b69ba4c6a02e4911b879a512c..6e2e112d810c96ceaff4cdf40e5b76963a1b6b4a 100755 (executable)
# Common source files and CFLAGS across all platforms and cores
PACKAGE_SRCS_COMMON = .
SRCS_mcu1_0 += main_mss.c
+SRCS_mcu1_1 += main_mss.c
SRCS_c66xdsp_1 += main_dss.c
SRCS_COMMON += app_sync.c
diff --git a/packages/ti/drv/mailbox/mailbox_component.mk b/packages/ti/drv/mailbox/mailbox_component.mk
index 2bdd1b656a8e14c6c0b873df0275a128f657944e..5ec07a2981bac0300ef8c5de0e1aea7016230bb2 100644 (file)
drvmailbox_RTOS_LIST = $(DEFAULT_RTOS_LIST)
drvmailbox_SOCLIST = tpr12 am64x awr294x
-drvmailbox_tpr12_CORELIST = mcu1_0 c66xdsp_1
-drvmailbox_awr294x_CORELIST = mcu1_0 c66xdsp_1
+drvmailbox_tpr12_CORELIST = mcu1_0 mcu1_1 c66xdsp_1
+drvmailbox_awr294x_CORELIST = mcu1_0 mcu1_1 c66xdsp_1
drvmailbox_am64x_CORELIST = mpu1_0 mcu1_0 mcu1_1 mcu2_0 mcu2_1 m4f_0
drvmailbox_am64x_rtos_CORELIST = mpu1_0 mcu1_0 mcu1_1 mcu2_0 mcu2_1
drvmailbox_am64x_LASTCORE := $(word $(words $(drvmailbox_am64x_CORELIST)), $(drvmailbox_am64x_CORELIST))
diff --git a/packages/ti/drv/mailbox/soc/awr294x/csl_mbox.c b/packages/ti/drv/mailbox/soc/awr294x/csl_mbox.c
index 22cc7d54fb5df3c9742b3f4aa755182ba5061cc5..fb0e6566f8eff90099b2aeedbbde4a69639dc084 100644 (file)
@@ -115,7 +115,13 @@ void CSL_Mbox_clearBoxFullInterrupt (CSL_mboxRegAddr* pMboxRegAddr, uint32_t pro
void CSL_Mbox_triggerAckInterrupt (CSL_mboxRegAddr* pMboxRegAddr, uint32_t processorId)
{
/* raise interrupt to the processor */
+#if defined (BUILD_MCU1_1)
+ /* Read Done ack register for CR5A and CR5B are same.
+ CR5A is from bit 0 to 7 and CR5B is from bit 8 to 15. */
+ HW_WR_REG32(pMboxRegAddr->mboxReadDoneAck, ((1U << processorId) << 8));
+#else
HW_WR_REG32(pMboxRegAddr->mboxReadDoneAck, (1U << processorId));
+#endif
}
uint32_t CSL_Mbox_getBoxEmptyIntr (CSL_mboxRegAddr* pMboxRegAddr)
diff --git a/packages/ti/drv/mailbox/soc/awr294x/mailbox_soc.c b/packages/ti/drv/mailbox/soc/awr294x/mailbox_soc.c
index 3727aee940c6b45f5f91e4aa750f3b250a699cfb..b25cdb50fafc65152c0903e36b77c03ad8aca237 100644 (file)
@@ -153,7 +153,7 @@ static Mailbox_driverPoolElem gMailboxDriversPool[MAILBOX_DRIVER_POOL_NUM_ELEMEN
*/
extern Mailbox_MCB gMailboxMCB;
-#if defined (__TI_ARM_V7R4__)
+#if defined (BUILD_MCU1_0)
CSL_mboxRegAddr gMboxReg =
{
.memInit = (uintptr_t)(CSL_MSS_CTRL_U_BASE + CSL_MSS_CTRL_MSS_MAILBOX_MEM_INIT),
/**
* @brief This is SOC specific configuration and should *NOT* be modified by the customer.
- * Communication between MSS and DSS (MSS master).
*/
-Mailbox_HwCfg gMailboxMssDssHwCfg =
+Mailbox_HwCfg gRemoteHwCfg[] =
+{
+ /* Communication between MSS and DSS (MSS master). */
+ {
+ .mbxReg = &gMboxReg,
+ .baseLocalToRemote.data = (uint8_t *)(CR5A_TO_DSS_MBX_MEM),
+ .baseRemoteToLocal.data = (uint8_t *)(DSS_TO_CR5A_MBX_MEM),
+ .boxFullIntNum = CSL_MSS_INTR_MSS_CR5A_MBOX_READ_REQ,
+ .boxEmptyIntNum = CSL_MSS_INTR_MSS_CR5A_MBOX_READ_ACK,
+ .remoteProcNum = MAILBOX_INST_DSP
+ },
+ /* Communication between MSS and RSS (MSS master). */
+ {
+ .mbxReg = &gMboxReg,
+ .baseLocalToRemote.data = (uint8_t *)(CR5A_TO_RSS_MBX_MEM),
+ .baseRemoteToLocal.data = (uint8_t *)(RSS_TO_CR5A_MBX_MEM),
+ .boxFullIntNum = CSL_MSS_INTR_MSS_CR5A_MBOX_READ_REQ,
+ .boxEmptyIntNum = CSL_MSS_INTR_MSS_CR5A_MBOX_READ_ACK,
+ .remoteProcNum = MAILBOX_INST_RSS
+ },
+ /* Communication between CR5A and CR5B (MSS master). */
+ {
+ .mbxReg = &gMboxReg,
+ .baseLocalToRemote.data = (uint8_t *)(CR5A_TO_CR5B_MBX_MEM),
+ .baseRemoteToLocal.data = (uint8_t *)(CR5B_TO_CR5A_MBX_MEM),
+ .boxFullIntNum = CSL_MSS_INTR_MSS_CR5A_MBOX_READ_REQ,
+ .boxEmptyIntNum = CSL_MSS_INTR_MSS_CR5A_MBOX_READ_ACK,
+ .remoteProcNum = MAILBOX_INST_MSS_CR5B
+ },
+
+};
+
+#endif
+
+#if defined (BUILD_MCU1_1)
+CSL_mboxRegAddr gMboxReg =
{
- .mbxReg = &gMboxReg,
- .baseLocalToRemote.data = (uint8_t *)(CSL_DSS_MAILBOX_U_BASE),
- .baseRemoteToLocal.data = (uint8_t *)(CSL_MSS_MBOX_U_BASE),
- .boxFullIntNum = CSL_MSS_INTR_MSS_CR5A_MBOX_READ_REQ,
- .boxEmptyIntNum = CSL_MSS_INTR_MSS_CR5A_MBOX_READ_ACK,
- .remoteProcNum = MAILBOX_INST_DSP
+ .memInit = (uintptr_t)(CSL_MSS_CTRL_U_BASE + CSL_MSS_CTRL_MSS_MAILBOX_MEM_INIT),
+ .memInitDone = (uintptr_t)(CSL_MSS_CTRL_U_BASE + CSL_MSS_CTRL_MSS_MAILBOX_MEM_INIT_DONE),
+ .memInitStatus = (uintptr_t)(CSL_MSS_CTRL_U_BASE + CSL_MSS_CTRL_MSS_MAILBOX_MEM_INIT_STATUS),
+ .mboxWriteDone = (uintptr_t)(CSL_MSS_CTRL_U_BASE + CSL_MSS_CTRL_MSS_CR5B_MBOX_WRITE_DONE),
+ .mboxReadReq = (uintptr_t)(CSL_MSS_CTRL_U_BASE + CSL_MSS_CTRL_MSS_CR5B_MBOX_READ_REQ),
+ .mboxReadDone = (uintptr_t)(CSL_MSS_CTRL_U_BASE + CSL_MSS_CTRL_MSS_CR5B_MBOX_READ_DONE),
+ .mboxReadDoneAck = (uintptr_t)(CSL_MSS_CTRL_U_BASE + CSL_MSS_CTRL_MSS_CR5A_B_MBOX_READ_DONE_ACK)
};
+
/**
* @brief This is SOC specific configuration and should *NOT* be modified by the customer.
- * Communication between MSS and BSS (RSS master).
*/
-Mailbox_HwCfg gMailboxMssRcssHwCfg =
+Mailbox_HwCfg gRemoteHwCfg[] =
{
- .mbxReg = &gMboxReg,
- .baseLocalToRemote.data = (uint8_t *)(CSL_RSS_CR4_MBOX_U_BASE),
- .baseRemoteToLocal.data = (uint8_t *)(CSL_MSS_MBOX_U_BASE),
- .boxFullIntNum = CSL_MSS_INTR_MSS_CR5A_MBOX_READ_REQ,
- .boxEmptyIntNum = CSL_MSS_INTR_MSS_CR5A_MBOX_READ_ACK,
- .remoteProcNum = MAILBOX_INST_RSS
+ /* Communication between MSS and DSS (MSS master). */
+ {
+ .mbxReg = &gMboxReg,
+ .baseLocalToRemote.data = (uint8_t *)(CR5B_TO_DSS_MBX_MEM),
+ .baseRemoteToLocal.data = (uint8_t *)(DSS_TO_CR5B_MBX_MEM),
+ .boxFullIntNum = CSL_MSS_INTR_MSS_CR5B_MBOX_READ_REQ,
+ .boxEmptyIntNum = CSL_MSS_INTR_MSS_CR5B_MBOX_READ_ACK,
+ .remoteProcNum = MAILBOX_INST_DSP
+ },
+ /* Communication between CR5A and CR5B (MSS master). */
+ {
+ .mbxReg = &gMboxReg,
+ .baseLocalToRemote.data = (uint8_t *)(CR5B_TO_CR5A_MBX_MEM),
+ .baseRemoteToLocal.data = (uint8_t *)(CR5A_TO_CR5B_MBX_MEM),
+ .boxFullIntNum = CSL_MSS_INTR_MSS_CR5B_MBOX_READ_REQ,
+ .boxEmptyIntNum = CSL_MSS_INTR_MSS_CR5B_MBOX_READ_ACK,
+ .remoteProcNum = MAILBOX_INST_MSS_CR5B
+ }
};
#endif
-#if defined (_TMS320C6X)
+#if defined (BUILD_DSP_1)
CSL_mboxRegAddr gMboxReg =
{
.memInit = (uintptr_t)(CSL_DSS_CTRL_U_BASE + CSL_DSS_CTRL_DSS_MAILBOX_MEMINIT_START),
/**
* @brief This is SOC specific configuration and should *NOT* be modified by the customer.
- * Communication between MSS and DSS (MSS master).
- */
-Mailbox_HwCfg gMailboxDssMssHwCfg =
-{
- .mbxReg = &gMboxReg,
- .baseLocalToRemote.data = (uint8_t *)(CSL_MSS_MBOX_U_BASE),
- .baseRemoteToLocal.data = (uint8_t *)(CSL_DSS_MAILBOX_U_BASE),
- .boxFullIntNum = CSL_DSS_INTR_DSS_DSP_MBOX_READ_REQ,
- .boxEmptyIntNum = CSL_DSS_INTR_DSS_DSP_MBOX_READ_ACK,
- .remoteProcNum = MAILBOX_INST_MSS_CR5A
-};
-
-/**
- * @brief This is SOC specific configuration and should *NOT* be modified by the customer.
- * Communication between RSS and DSS (RSS master).
*/
-Mailbox_HwCfg gMailboxDssRcssHwCfg =
+Mailbox_HwCfg gRemoteHwCfg[] =
{
- .mbxReg = &gMboxReg,
- .baseLocalToRemote.data = (uint8_t *)(CSL_RSS_CR4_MBOX_U_BASE + CSL_RSS_MAILBOX_DSS_OFFSET),
- .baseRemoteToLocal.data = (uint8_t *)(CSL_DSS_MAILBOX_U_BASE),
- .boxFullIntNum = CSL_DSS_INTR_DSS_DSP_MBOX_READ_REQ,
- .boxEmptyIntNum = CSL_DSS_INTR_DSS_DSP_MBOX_READ_ACK,
- .remoteProcNum = MAILBOX_INST_RSS
+ /* Communication between MSS and DSS (MSS master). */
+ {
+ .mbxReg = &gMboxReg,
+ .baseLocalToRemote.data = (uint8_t *)(DSS_TO_CR5A_MBX_MEM),
+ .baseRemoteToLocal.data = (uint8_t *)(CR5A_TO_DSS_MBX_MEM),
+ .boxFullIntNum = CSL_DSS_INTR_DSS_DSP_MBOX_READ_REQ,
+ .boxEmptyIntNum = CSL_DSS_INTR_DSS_DSP_MBOX_READ_ACK,
+ .remoteProcNum = MAILBOX_INST_MSS_CR5A
+ },
+ /* Communication between RSS and DSS (RSS master). */
+ {
+ .mbxReg = &gMboxReg,
+ .baseLocalToRemote.data = (uint8_t *)(DSS_TO_RSS_MBX_MEM),
+ .baseRemoteToLocal.data = (uint8_t *)(RSS_TO_DSS_MBX_MEM),
+ .boxFullIntNum = CSL_DSS_INTR_DSS_DSP_MBOX_READ_REQ,
+ .boxEmptyIntNum = CSL_DSS_INTR_DSS_DSP_MBOX_READ_ACK,
+ .remoteProcNum = MAILBOX_INST_RSS
+ },
+ /* Communication between CR5B and DSS (MSS master). */
+ {
+ .mbxReg = &gMboxReg,
+ .baseLocalToRemote.data = (uint8_t *)(DSS_TO_CR5B_MBX_MEM),
+ .baseRemoteToLocal.data = (uint8_t *)(CR5B_TO_DSS_MBX_MEM),
+ .boxFullIntNum = CSL_DSS_INTR_DSS_DSP_MBOX_READ_REQ,
+ .boxEmptyIntNum = CSL_DSS_INTR_DSS_DSP_MBOX_READ_ACK,
+ .remoteProcNum = MAILBOX_INST_MSS_CR5B
+ }
};
#endif
{
retVal = MAILBOX_EINVAL;
}
+#elif defined (BUILD_MCU1_1)
+ if (localEndpoint != MAILBOX_INST_MSS_CR5B)
+ {
+ retVal = MAILBOX_EINVAL;
+ }
#elif defined (BUILD_DSP_1)
if (localEndpoint != MAILBOX_INST_DSP)
{
@@ -306,13 +364,22 @@ int32_t Mailbox_isMultiChannelSupported(Mailbox_Instance localEndpoint, Mailbox_
int32_t retVal = MAILBOX_EINVAL;
#if defined (BUILD_MCU1_0)
/* Multichannel supported only between DSS and MSS. */
- if ((localEndpoint == MAILBOX_INST_MSS_CR5A) && (remoteEndpoint == MAILBOX_INST_DSP))
+ if ((localEndpoint == MAILBOX_INST_MSS_CR5A) &&
+ ((remoteEndpoint == MAILBOX_INST_DSP) || (remoteEndpoint == MAILBOX_INST_MSS_CR5B)))
+ {
+ retVal = MAILBOX_SOK;
+ }
+#elif defined (BUILD_MCU1_1)
+ /* Multichannel supported only between DSS and MSS. */
+ if ((localEndpoint == MAILBOX_INST_MSS_CR5B) &&
+ ((remoteEndpoint == MAILBOX_INST_MSS_CR5A) || (remoteEndpoint == MAILBOX_INST_DSP)))
{
retVal = MAILBOX_SOK;
}
#elif defined (BUILD_DSP_1)
/* Multichannel supported only between DSS and MSS. */
- if ((localEndpoint == MAILBOX_INST_DSP) && (remoteEndpoint == MAILBOX_INST_MSS_CR5A))
+ if ((localEndpoint == MAILBOX_INST_DSP) &&
+ ((remoteEndpoint == MAILBOX_INST_MSS_CR5A) || (remoteEndpoint == MAILBOX_INST_MSS_CR5B)))
{
retVal = MAILBOX_SOK;
}
@@ -393,6 +460,9 @@ int32_t getMailboxTypeFromProcNum(uint32_t procNum, Mailbox_Instance *remoteEndp
case MAILBOX_INST_MSS_CR5A:
*remoteEndpoint = MAILBOX_INST_MSS_CR5A;
break;
+ case MAILBOX_INST_MSS_CR5B:
+ *remoteEndpoint = MAILBOX_INST_MSS_CR5B;
+ break;
case MAILBOX_INST_RSS:
*remoteEndpoint = MAILBOX_INST_RSS;
break;
void* Mailbox_getHwCfg(Mailbox_Instance remoteEndpoint)
{
Mailbox_HwCfg *hwCfg = NULL;
+ uint32_t numRemote, i;
volatile uint32_t rssCtrlBootInfoReg3 = HW_RD_REG32((CSL_RSS_PROC_CTRL_U_BASE + CSL_RSS_PROC_CTRL_RSS_CR4_BOOT_INFO_REG3));
uint32_t mssOffsetIndex = HW_GET_FIELD(rssCtrlBootInfoReg3, CSL_RSS_PROC_CTRL_RSS_CR4_BOOT_INFO_REG3_MSS_OFFSET_INDEX);
uint32_t mssBuffSize = HW_GET_FIELD(rssCtrlBootInfoReg3, CSL_RSS_PROC_CTRL_RSS_CR4_BOOT_INFO_REG3_MSS_BUFF_SIZE);
uint32_t dssSysSelect = HW_GET_FIELD(rssCtrlBootInfoReg3, CSL_RSS_PROC_CTRL_RSS_CR4_BOOT_INFO_REG3_DSS_SYS_SELECT);
uint32_t dssEnable = HW_GET_FIELD(rssCtrlBootInfoReg3, CSL_RSS_PROC_CTRL_RSS_CR4_BOOT_INFO_REG3_DSS_ENABLE);
-#if defined (__TI_ARM_V7R4__)
+ numRemote = sizeof(gRemoteHwCfg)/sizeof(Mailbox_HwCfg);
+ for (i=0; i<numRemote; i++)
+ {
+ if (gRemoteHwCfg[i].remoteProcNum == remoteEndpoint)
+ {
+ hwCfg= &gRemoteHwCfg[i];
+ }
+ }
+
+#if defined (BUILD_MCU1_0)
/*This is local endpoint MSS*/
if(remoteEndpoint == MAILBOX_INST_DSP)
{
/* If MSS memory offset is Zero. */
if(mssOffsetIndex == 0u)
{
- /* Remote to local memory starts after mss buffer size*/
- gMailboxMssDssHwCfg.baseRemoteToLocal.data += ((mssBuffSize + 1) * MAILBOX_BUFF_UNIT_SIZE);
+ /* Remote to local memory starts after mss buffer size
+ * Mailbox memory is divided statically based on the current SBL configuration
+ * of 512 Byte RSS Buffer. Validate the same if the RSS Mailbox is initialized.
+ * hwCfg->baseRemoteToLocal.data += ((mssBuffSize + 1) * MAILBOX_BUFF_UNIT_SIZE); */
+ if (mssBuffSize != 0)
+ {
+ hwCfg = NULL;
+ }
}
}
/* If DSS memory offset is Zero. */
if(dssOffsetIndex == 0u)
{
- /* Remote to local memory starts after mss buffer size*/
- gMailboxMssDssHwCfg.baseLocalToRemote.data += ((dssBuffSize + 1) * MAILBOX_BUFF_UNIT_SIZE);
+ /* Remote to local memory starts after mss buffer size
+ * Mailbox memory is divided statically based on the current SBL configuration
+ * of 512 Byte RSS Buffer. Validate the same if the RSS Mailbox is initialized.
+ * hwCfg->baseLocalToRemote.data += ((dssBuffSize + 1) * MAILBOX_BUFF_UNIT_SIZE); */
+ if (dssBuffSize != 0)
+ {
+ hwCfg = NULL;
+ }
}
}
-
- hwCfg = &gMailboxMssDssHwCfg;
}
- else
- {
- gMailboxMssRcssHwCfg.baseRemoteToLocal.data += (mssOffsetIndex * ((mssBuffSize + 1) * MAILBOX_BUFF_UNIT_SIZE));
- hwCfg = &gMailboxMssRcssHwCfg;
+ if(remoteEndpoint == MAILBOX_INST_RSS)
+ {
+ /* Mailbox memory is divided statically based on the current SBL configuration
+ * of 512 Byte RSS Buffer. Validate the same if the RSS Mailbox is initialized.
+ * hwCfg->baseRemoteToLocal.data += (mssOffsetIndex * ((mssBuffSize + 1) * MAILBOX_BUFF_UNIT_SIZE)); */
+ if ((mssOffsetIndex != 0) || (mssBuffSize != 0))
+ {
+ hwCfg = NULL;
+ }
}
#endif
-#if defined (_TMS320C6X)
+#if defined (BUILD_DSP_1)
/* This is local endpoint DSS */
if(remoteEndpoint == MAILBOX_INST_MSS_CR5A)
{
/* If MSS memory offset is Zero. */
if(mssOffsetIndex == 0u)
{
- /* Remote to local memory starts after mss buffer size*/
- gMailboxDssMssHwCfg.baseLocalToRemote.data += ((mssBuffSize + 1) * MAILBOX_BUFF_UNIT_SIZE);
+ /* Remote to local memory starts after mss buffer size
+ * Mailbox memory is divided statically based on the current SBL configuration
+ * of 512 Byte RSS Buffer. Validate the same if the RSS Mailbox is initialized.
+ * hwCfg->baseLocalToRemote.data += ((mssBuffSize + 1) * MAILBOX_BUFF_UNIT_SIZE); */
+ if (mssBuffSize != 0)
+ {
+ hwCfg = NULL;
+ }
}
}
/* If MSS memory offset is Zero. */
if(dssOffsetIndex == 0u)
{
- /* Remote to local memory starts after DSS buffer size*/
- gMailboxDssMssHwCfg.baseRemoteToLocal.data += ((dssBuffSize + 1) * MAILBOX_BUFF_UNIT_SIZE);
+ /* Remote to local memory starts after DSS buffer size
+ * Mailbox memory is divided statically based on the current SBL configuration
+ * of 512 Byte RSS Buffer. Validate the same if the RSS Mailbox is initialized.
+ * hwCfg->baseRemoteToLocal.data += ((dssBuffSize + 1) * MAILBOX_BUFF_UNIT_SIZE); */
+ if (dssBuffSize != 0)
+ {
+ hwCfg = NULL;
+ }
}
}
-
- hwCfg = &gMailboxDssMssHwCfg;
}
- else
+ if(remoteEndpoint == MAILBOX_INST_RSS)
{
- gMailboxDssRcssHwCfg.baseRemoteToLocal.data += (dssOffsetIndex * ((dssBuffSize + 1) * MAILBOX_BUFF_UNIT_SIZE));
-
- hwCfg = &gMailboxDssRcssHwCfg;
+ /* Mailbox memory is divided statically based on the current SBL configuration
+ * of 512 Byte RSS Buffer. Validate the same if the RSS Mailbox is initialized.
+ * hwCfg->baseRemoteToLocal.data += (dssOffsetIndex * ((dssBuffSize + 1) * MAILBOX_BUFF_UNIT_SIZE)); */
+ if ((mssOffsetIndex != 0) || (mssBuffSize != 0))
+ {
+ hwCfg = NULL;
+ }
}
#endif
return (void *)hwCfg;
/* Register the Interrupt Handler: Every mailbox has 2 interrupts: "mailbox full" and "mailbox empty"*/
/************** Mailbox full ***********/
-#if defined(_TMS320C6X)
+#if defined(BUILD_DSP_1)
priority = MAILBOX_OSAL_DEFAULT_PRIORITY;
#else
priority = 0x1U;
@@ -944,9 +1053,6 @@ int32_t Mailbox_write(Mbox_Handle handle, const uint8_t *buffer, uint32_t size)
memcpy((void *)(hwCfg)->baseLocalToRemote.data, (const void *)buffer, size);
}
-#if defined (__TI_ARM_V7R4__)
- //MEM_BARRIER(); //TODO
-#endif
}
else
{
static int32_t Mailbox_validateLocalEndPointRxMem()
{
int32_t retVal = MAILBOX_SOK;
+ #if defined (BUILD_MCU1_0) || defined (BUILD_DSP_1)
uint32_t endAddress = 0ul;
uint32_t startAddress = 0ul;
+ #endif
volatile uint32_t rssCtrlBootInfoReg3 = HW_RD_REG32((CSL_RSS_PROC_CTRL_U_BASE + CSL_RSS_PROC_CTRL_RSS_CR4_BOOT_INFO_REG3));
uint32_t mssOffsetIndex = HW_GET_FIELD(rssCtrlBootInfoReg3, CSL_RSS_PROC_CTRL_RSS_CR4_BOOT_INFO_REG3_MSS_OFFSET_INDEX);
uint32_t mssBuffSize = HW_GET_FIELD(rssCtrlBootInfoReg3, CSL_RSS_PROC_CTRL_RSS_CR4_BOOT_INFO_REG3_MSS_BUFF_SIZE);
diff --git a/packages/ti/drv/mailbox/soc/awr294x/mailbox_soc.h b/packages/ti/drv/mailbox/soc/awr294x/mailbox_soc.h
index 35c1a6ea0db53d9b7746536cb71d6a13134dbe87..883eed0f3fed12364ec39c83d97cb47ed80e8e84 100644 (file)
/*! \brief Mailbox Buffer Size */
#define MAILBOX_BUFF_UNIT_SIZE (512U)
+/* DSS Mailbox memory first 512 Bytes are reserved for remote core RSS.
+ Remaning memory is divided between the CR5A and CR5B cores. */
+#define DSS_MBX_RSS_OFFSET (0)
+#define DSS_MBX_RSS_SIZE (512)
+
+#define DSS_MBX_CR5A_OFFSET (DSS_MBX_RSS_SIZE)
+#define DSS_MBX_CR5B_OFFSET (DSS_MBX_RSS_SIZE + (CSL_DSS_MAILBOX_U_SIZE - DSS_MBX_RSS_SIZE)/2)
+
+/* R5 Mailbox is common betweeen CR5A and CR5B.
+ * First 512 Bytes are reserved for RSS core.
+ * Divide Remaining memory eaually between other supported remote cores. */
+#define CR5A_MBX_RSS_OFFSET (0)
+#define CR5A_MBX_RSS_SIZE (512)
+
+#define CR5A_MBX_DSS_OFFSET (CR5A_MBX_RSS_SIZE)
+#define CR5A_MBX_CR5B_OFFSET (CR5A_MBX_RSS_SIZE + (CSL_MSS_MAILBOX_U_SIZE - CR5A_MBX_RSS_SIZE)/4)
+
+#define CR5B_MBX_DSS_OFFSET (CR5A_MBX_RSS_SIZE + (CSL_MSS_MAILBOX_U_SIZE - CR5A_MBX_RSS_SIZE)/2)
+#define CR5B_MBX_CR5A_OFFSET (CR5A_MBX_RSS_SIZE + ((CSL_MSS_MAILBOX_U_SIZE - CR5A_MBX_RSS_SIZE)/4)*3)
+
+/* Mailbox addresses for writing from Core1 to Core2. */
+#define CR5A_TO_RSS_MBX_MEM (CSL_RSS_CR4_MBOX_U_BASE)
+#define CR5A_TO_DSS_MBX_MEM (CSL_DSS_MAILBOX_U_BASE + DSS_MBX_CR5A_OFFSET)
+#define CR5A_TO_CR5B_MBX_MEM (CSL_MSS_MBOX_U_BASE + CR5B_MBX_CR5A_OFFSET)
+
+#define DSS_TO_RSS_MBX_MEM (CSL_RSS_CR4_MBOX_U_BASE + CSL_RSS_MAILBOX_DSS_OFFSET)
+#define DSS_TO_CR5A_MBX_MEM (CSL_MSS_MBOX_U_BASE + CR5A_MBX_DSS_OFFSET)
+#define DSS_TO_CR5B_MBX_MEM (CSL_MSS_MBOX_U_BASE + CR5B_MBX_DSS_OFFSET)
+
+#define CR5B_TO_DSS_MBX_MEM (CSL_DSS_MAILBOX_U_BASE + DSS_MBX_CR5B_OFFSET)
+#define CR5B_TO_CR5A_MBX_MEM (CSL_MSS_MBOX_U_BASE + CR5A_MBX_CR5B_OFFSET)
+
+#define RSS_TO_CR5A_MBX_MEM (CSL_MSS_MBOX_U_BASE)
+#define RSS_TO_DSS_MBX_MEM (CSL_DSS_MAILBOX_U_BASE)
+
/** @}*/ /* end defgroup MAILBOX_INSTANCE */
/* ========================================================================== */
diff --git a/packages/ti/drv/mailbox/soc/tpr12/csl_mbox.c b/packages/ti/drv/mailbox/soc/tpr12/csl_mbox.c
index a876d2b38fac368937473922aee644c150009129..0a42517b1a04b6fc54096b1ddba532e81bd938f2 100644 (file)
@@ -116,7 +116,13 @@ void CSL_Mbox_clearBoxFullInterrupt (CSL_mboxRegAddr* pMboxRegAddr, uint32_t pro
void CSL_Mbox_triggerAckInterrupt (CSL_mboxRegAddr* pMboxRegAddr, uint32_t processorId)
{
/* raise interrupt to the processor */
+#if defined (BUILD_MCU1_1)
+ /* Read Done ack register for CR5A and CR5B are same.
+ CR5A is from bit 0 to 7 and CR5B is from bit 8 to 15. */
+ HW_WR_REG32(pMboxRegAddr->mboxReadDoneAck, ((1U << processorId) << 8));
+#else
HW_WR_REG32(pMboxRegAddr->mboxReadDoneAck, (1U << processorId));
+#endif
}
uint32_t CSL_Mbox_getBoxEmptyIntr (CSL_mboxRegAddr* pMboxRegAddr)
diff --git a/packages/ti/drv/mailbox/soc/tpr12/mailbox_soc.c b/packages/ti/drv/mailbox/soc/tpr12/mailbox_soc.c
index bf978be47547f13ed89495a506b21bf1e5bf731e..e6d6a5bc434d262241affb61a7b025c12e158a71 100644 (file)
@@ -136,7 +136,7 @@ static Mailbox_driverPoolElem gMailboxDriversPool[MAILBOX_DRIVER_POOL_NUM_ELEMEN
*/
extern Mailbox_MCB gMailboxMCB;
-#if defined (__TI_ARM_V7R4__)
+#if defined (BUILD_MCU1_0)
CSL_mboxRegAddr gMboxReg =
{
.memInit = (uintptr_t)(CSL_MSS_CTRL_U_BASE + CSL_MSS_CTRL_MSS_MAILBOX_MEM_INIT),
* @brief This is SOC specific configuration and should *NOT* be modified by the customer.
* Communication between MSS and DSS (MSS master).
*/
-Mailbox_HwCfg gMailboxMssDssHwCfg =
+Mailbox_HwCfg gRemoteHwCfg[] =
{
- .mbxReg = &gMboxReg,
- .baseLocalToRemote.data = (uint8_t *)(CSL_DSS_MAILBOX_U_BASE),
- .baseRemoteToLocal.data = (uint8_t *)(CSL_MSS_MBOX_U_BASE),
- .boxFullIntNum = CSL_MSS_INTR_MSS_CR5A_MBOX_READ_REQ,
- .boxEmptyIntNum = CSL_MSS_INTR_MSS_CR5A_MBOX_READ_ACK,
- .remoteProcNum = MAILBOX_INST_DSP
+ {
+ .mbxReg = &gMboxReg,
+ .baseLocalToRemote.data = (uint8_t *)(CR5A_TO_DSS_MBX_MEM),
+ .baseRemoteToLocal.data = (uint8_t *)(DSS_TO_CR5A_MBX_MEM),
+ .boxFullIntNum = CSL_MSS_INTR_MSS_CR5A_MBOX_READ_REQ,
+ .boxEmptyIntNum = CSL_MSS_INTR_MSS_CR5A_MBOX_READ_ACK,
+ .remoteProcNum = MAILBOX_INST_DSP
+ },
+ {
+ .mbxReg = &gMboxReg,
+ .baseLocalToRemote.data = (uint8_t *)(CR5A_TO_CR5B_MBX_MEM),
+ .baseRemoteToLocal.data = (uint8_t *)(CR5B_TO_CR5A_MBX_MEM),
+ .boxFullIntNum = CSL_MSS_INTR_MSS_CR5A_MBOX_READ_REQ,
+ .boxEmptyIntNum = CSL_MSS_INTR_MSS_CR5A_MBOX_READ_ACK,
+ .remoteProcNum = MAILBOX_INST_MSS_CR5B
+ }
};
#endif
-#if defined (_TMS320C6X)
+#if defined (BUILD_MCU1_1)
+CSL_mboxRegAddr gMboxReg =
+{
+ .memInit = (uintptr_t)(CSL_MSS_CTRL_U_BASE + CSL_MSS_CTRL_MSS_MAILBOX_MEM_INIT),
+ .memInitDone = (uintptr_t)(CSL_MSS_CTRL_U_BASE + CSL_MSS_CTRL_MSS_MAILBOX_MEM_INIT_DONE),
+ .memInitStatus = (uintptr_t)(CSL_MSS_CTRL_U_BASE + CSL_MSS_CTRL_MSS_MAILBOX_MEM_INIT_STATUS),
+ .mboxWriteDone = (uintptr_t)(CSL_MSS_CTRL_U_BASE + CSL_MSS_CTRL_MSS_CR5B_MBOX_WRITE_DONE),
+ .mboxReadReq = (uintptr_t)(CSL_MSS_CTRL_U_BASE + CSL_MSS_CTRL_MSS_CR5B_MBOX_READ_REQ),
+ .mboxReadDone = (uintptr_t)(CSL_MSS_CTRL_U_BASE + CSL_MSS_CTRL_MSS_CR5B_MBOX_READ_DONE),
+ .mboxReadDoneAck = (uintptr_t)(CSL_MSS_CTRL_U_BASE + CSL_MSS_CTRL_MSS_CR5A_B_MBOX_READ_DONE_ACK)
+};
+
+
+/**
+ * @brief This is SOC specific configuration and should *NOT* be modified by the customer.
+ * Communication between MSS and DSS (MSS master).
+ */
+Mailbox_HwCfg gRemoteHwCfg[] =
+{
+ {
+ .mbxReg = &gMboxReg,
+ .baseLocalToRemote.data = (uint8_t *)(CR5B_TO_DSS_MBX_MEM),
+ .baseRemoteToLocal.data = (uint8_t *)(DSS_TO_CR5B_MBX_MEM),
+ .boxFullIntNum = CSL_MSS_INTR_MSS_CR5B_MBOX_READ_REQ,
+ .boxEmptyIntNum = CSL_MSS_INTR_MSS_CR5B_MBOX_READ_ACK,
+ .remoteProcNum = MAILBOX_INST_DSP
+ },
+ {
+ .mbxReg = &gMboxReg,
+ .baseLocalToRemote.data = (uint8_t *)(CR5B_TO_CR5A_MBX_MEM),
+ .baseRemoteToLocal.data = (uint8_t *)(CR5A_TO_CR5B_MBX_MEM),
+ .boxFullIntNum = CSL_MSS_INTR_MSS_CR5B_MBOX_READ_REQ,
+ .boxEmptyIntNum = CSL_MSS_INTR_MSS_CR5B_MBOX_READ_ACK,
+ .remoteProcNum = MAILBOX_INST_MSS_CR5A
+ }
+};
+#endif
+
+#if defined (BUILD_DSP_1)
CSL_mboxRegAddr gMboxReg =
{
.memInit = (uintptr_t)(CSL_DSS_CTRL_U_BASE + CSL_DSS_CTRL_DSS_MAILBOX_MEMINIT_START),
* @brief This is SOC specific configuration and should *NOT* be modified by the customer.
* Communication between MSS and DSS (MSS master).
*/
-Mailbox_HwCfg gMailboxDssMssHwCfg =
+Mailbox_HwCfg gRemoteHwCfg[] =
{
- .mbxReg = &gMboxReg,
- .baseLocalToRemote.data = (uint8_t *)(CSL_MSS_MBOX_U_BASE),
- .baseRemoteToLocal.data = (uint8_t *)(CSL_DSS_MAILBOX_U_BASE),
- .boxFullIntNum = CSL_DSS_INTR_DSS_DSP_MBOX_READ_REQ,
- .boxEmptyIntNum = CSL_DSS_INTR_DSS_DSP_MBOX_READ_ACK,
- .remoteProcNum = MAILBOX_INST_MSS_CR5A
+ {
+ .mbxReg = &gMboxReg,
+ .baseLocalToRemote.data = (uint8_t *)(DSS_TO_CR5A_MBX_MEM),
+ .baseRemoteToLocal.data = (uint8_t *)(CR5A_TO_DSS_MBX_MEM),
+ .boxFullIntNum = CSL_DSS_INTR_DSS_DSP_MBOX_READ_REQ,
+ .boxEmptyIntNum = CSL_DSS_INTR_DSS_DSP_MBOX_READ_ACK,
+ .remoteProcNum = MAILBOX_INST_MSS_CR5A
+ },
+ {
+ .mbxReg = &gMboxReg,
+ .baseLocalToRemote.data = (uint8_t *)(DSS_TO_CR5B_MBX_MEM),
+ .baseRemoteToLocal.data = (uint8_t *)(CR5B_TO_DSS_MBX_MEM),
+ .boxFullIntNum = CSL_DSS_INTR_DSS_DSP_MBOX_READ_REQ,
+ .boxEmptyIntNum = CSL_DSS_INTR_DSS_DSP_MBOX_READ_ACK,
+ .remoteProcNum = MAILBOX_INST_MSS_CR5B
+ }
};
#endif
{
retVal = MAILBOX_EINVAL;
}
+#elif defined (BUILD_MCU1_1)
+ if (localEndpoint != MAILBOX_INST_MSS_CR5B)
+ {
+ retVal = MAILBOX_EINVAL;
+ }
#elif defined (BUILD_DSP_1)
if (localEndpoint != MAILBOX_INST_DSP)
{
@@ -252,13 +315,22 @@ int32_t Mailbox_isMultiChannelSupported(Mailbox_Instance localEndpoint, Mailbox_
int32_t retVal = MAILBOX_EINVAL;
#if defined (BUILD_MCU1_0)
/* Multichannel supported only between DSS and MSS. */
- if ((localEndpoint == MAILBOX_INST_MSS_CR5A) && (remoteEndpoint == MAILBOX_INST_DSP))
+ if ((localEndpoint == MAILBOX_INST_MSS_CR5A) &&
+ ((remoteEndpoint == MAILBOX_INST_DSP) || (remoteEndpoint == MAILBOX_INST_MSS_CR5B)))
+ {
+ retVal = MAILBOX_SOK;
+ }
+#elif defined (BUILD_MCU1_1)
+ /* Multichannel supported only between DSS and MSS. */
+ if ((localEndpoint == MAILBOX_INST_MSS_CR5B) &&
+ ((remoteEndpoint == MAILBOX_INST_MSS_CR5A) || (remoteEndpoint == MAILBOX_INST_DSP)))
{
retVal = MAILBOX_SOK;
}
#elif defined (BUILD_DSP_1)
/* Multichannel supported only between DSS and MSS. */
- if ((localEndpoint == MAILBOX_INST_DSP) && (remoteEndpoint == MAILBOX_INST_MSS_CR5A))
+ if ((localEndpoint == MAILBOX_INST_DSP) &&
+ ((remoteEndpoint == MAILBOX_INST_MSS_CR5A) || (remoteEndpoint == MAILBOX_INST_MSS_CR5B)))
{
retVal = MAILBOX_SOK;
}
@@ -339,6 +411,9 @@ int32_t getMailboxTypeFromProcNum(uint32_t procNum, Mailbox_Instance *remoteEndp
case MAILBOX_INST_MSS_CR5A:
*remoteEndpoint = MAILBOX_INST_MSS_CR5A;
break;
+ case MAILBOX_INST_MSS_CR5B:
+ *remoteEndpoint = MAILBOX_INST_MSS_CR5B;
+ break;
case MAILBOX_INST_DSP:
*remoteEndpoint = MAILBOX_INST_DSP;
break;
void* Mailbox_getHwCfg(Mailbox_Instance remoteEndpoint)
{
Mailbox_HwCfg *hwCfg = NULL;
-#if defined (__TI_ARM_V7R4__)
- /*This is local endpoint MSS*/
- if(remoteEndpoint == MAILBOX_INST_DSP)
- {
- hwCfg = &gMailboxMssDssHwCfg;
- }
-#endif
-
-#if defined (_TMS320C6X)
- /* This is local endpoint DSS */
- if(remoteEndpoint == MAILBOX_INST_MSS_CR5A)
+ uint32_t numRemote, i;
+ numRemote = sizeof(gRemoteHwCfg)/sizeof(Mailbox_HwCfg);
+ for (i=0; i<numRemote; i++)
{
- hwCfg = &gMailboxDssMssHwCfg;
+ if (gRemoteHwCfg[i].remoteProcNum == remoteEndpoint)
+ {
+ hwCfg= &gRemoteHwCfg[i];
+ }
}
-#endif
return (void *)hwCfg;
}
/* Register the Interrupt Handler: Every mailbox has 2 interrupts: "mailbox full" and "mailbox empty"*/
/************** Mailbox full ***********/
-#if defined(_TMS320C6X)
+#if defined(BUILD_DSP_1)
priority = MAILBOX_OSAL_DEFAULT_PRIORITY;
#else
priority = 0x1U;
memcpy((void *)(hwCfg)->baseLocalToRemote.data, (const void *)buffer, size);
}
-#if defined (__TI_ARM_V7R4__)
+#if defined (BUILD_MCU1_0)
//MEM_BARRIER(); //TODO
#endif
}
diff --git a/packages/ti/drv/mailbox/soc/tpr12/mailbox_soc.h b/packages/ti/drv/mailbox/soc/tpr12/mailbox_soc.h
index 031b792acd9a019327ed9b464e27b6dd43c89729..062ef476e63cb0e746461aa89336c1e0d3dd1739 100644 (file)
#define MAILBOX_MAX_INST (MAILBOX_INST_LAST + 1U)
#define MAILBOX_DRIVER_POOL_NUM_ELEMENTS (MAILBOX_MAX_INST * MAILBOX_CH_ID_MAX)
+
+/* Devide DSS Mailbox mem half between CR5A and CR5B. */
+#define DSS_MBX_CR5A_OFFSET (0)
+#define DSS_MBX_CR5B_OFFSET (CSL_DSS_MAILBOX_U_SIZE/2)
+
+/* R5 Mailbox is common betweeen CR5A and CR5B.
+ * Divide equally between the supported remote croes. */
+#define CR5A_MBX_DSS_OFFSET (0)
+#define CR5A_MBX_CR5B_OFFSET (CSL_MSS_MAILBOX_U_SIZE/4)
+
+#define CR5B_MBX_DSS_OFFSET (CSL_MSS_MAILBOX_U_SIZE/2)
+#define CR5B_MBX_CR5A_OFFSET ((CSL_MSS_MAILBOX_U_SIZE/4)*3)
+
+/* Mailbox addresses for writing from Core1 to Core2. */
+#define CR5A_TO_DSS_MBX_MEM (CSL_DSS_MAILBOX_U_BASE + DSS_MBX_CR5A_OFFSET)
+#define CR5A_TO_CR5B_MBX_MEM (CSL_MSS_MBOX_U_BASE + CR5B_MBX_CR5A_OFFSET)
+
+#define CR5B_TO_DSS_MBX_MEM (CSL_DSS_MAILBOX_U_BASE + DSS_MBX_CR5B_OFFSET)
+#define CR5B_TO_CR5A_MBX_MEM (CSL_MSS_MBOX_U_BASE + CR5A_MBX_CR5B_OFFSET)
+
+#define DSS_TO_CR5A_MBX_MEM (CSL_MSS_MBOX_U_BASE + CR5A_MBX_DSS_OFFSET)
+#define DSS_TO_CR5B_MBX_MEM (CSL_MSS_MBOX_U_BASE + CR5B_MBX_DSS_OFFSET)
+
/* ========================================================================== */
/* Structure Declarations */
/* ========================================================================== */