moved the starting address of DDR0 region of mpu by 0x8000000
authorPotluri Krishna <x1082264@ti.com>
Thu, 7 Oct 2021 14:43:10 +0000 (20:13 +0530)
committerAnkur <ankurbaranwal@ti.com>
Fri, 8 Oct 2021 08:15:36 +0000 (03:15 -0500)
packages/ti/drv/spi/example/mcspi_slavemode/am65xx/linker_mpu.lds

index 63c2789f20ee930d2ab9c646c42c1974eb28e5ad..a4c7b222855bc349356f13b06cf1c9dc7f788da2 100755 (executable)
@@ -12,7 +12,7 @@ MEMORY
     MSMC_SRAM_H : ORIGIN = 0x000070100000, LENGTH = 0xE2000                 /* MSMC RAM GENERAL USE - High memory */
     MSMC_DMSC   : ORIGIN = 0x0000701F0000, LENGTH = 0x10000                 /* Reserved for DMSC */
 
-    DDR_0      (RWX) : ORIGIN =  0x80000000, LENGTH = 0x10000000
+    DDR_0      (RWX) : ORIGIN =  0x88000000, LENGTH = 0x8000000
     DDR_1      (RWX) : ORIGIN =  0x90000000, LENGTH = 0x10000000
     DDR_2      (RWX) : ORIGIN =  0xA0000000, LENGTH = 0x60000000
 }