summary | shortlog | log | commit | commitdiff | tree
raw | patch | inline | side by side (parent: a3955b9)
raw | patch | inline | side by side (parent: a3955b9)
author | Don Dominic <a0486429@ti.com> | |
Fri, 30 Oct 2020 18:12:07 +0000 (23:42 +0530) | ||
committer | Sivaraj R <sivaraj@ti.com> | |
Sat, 31 Oct 2020 13:34:47 +0000 (08:34 -0500) |
- Use MCU_TIMER_2 when running on mcu1_0 with Sys BIOS
- TimerP_ANY in Sys BIOS will allocate MCU Timer 0 which was used by SBL and remains at Smart-idle wake-up-capable mod with Emulation mode set 1( The timer runs free, regardless of PINSUSPENDN value.)
- Hene TimerP_Create with default timer 0 in UT was crashing
- MCU Timer 1 is used by sysbios on mcu1_0
- UT works fine with MCU Timer 2; Added in board_clock.c to enable the timer.
Signed-off-by: Don Dominic <a0486429@ti.com>
- TimerP_ANY in Sys BIOS will allocate MCU Timer 0 which was used by SBL and remains at Smart-idle wake-up-capable mod with Emulation mode set 1( The timer runs free, regardless of PINSUSPENDN value.)
- Hene TimerP_Create with default timer 0 in UT was crashing
- MCU Timer 1 is used by sysbios on mcu1_0
- UT works fine with MCU Timer 2; Added in board_clock.c to enable the timer.
Signed-off-by: Don Dominic <a0486429@ti.com>
packages/ti/board/src/j721e_evm/board_clock.c | patch | blob | history | |
packages/ti/osal/test/src/main_osal_test.c | patch | blob | history |
diff --git a/packages/ti/board/src/j721e_evm/board_clock.c b/packages/ti/board/src/j721e_evm/board_clock.c
index a78e58ba08215b15a85f6c0309a2a034e5df16c3..2d3d5e761404cc28514ff2fefb09a73bb5f2862b 100755 (executable)
uint32_t gBoardClkModuleMcuIDInitGroupl[] = {
TISCI_DEV_MCU_TIMER0,
+ TISCI_DEV_MCU_TIMER2,
TISCI_DEV_MCU_FSS0_HYPERBUS1P0_0,
TISCI_DEV_MCU_FSS0_OSPI_0,
TISCI_DEV_MCU_FSS0_OSPI_1,
diff --git a/packages/ti/osal/test/src/main_osal_test.c b/packages/ti/osal/test/src/main_osal_test.c
index cd3451838b79b6760434cbda69a0fdc226b92832..c03f23c0547a1419808ceabe559ee3d70d246dee 100644 (file)
#define OSAL_TEST_TIMER_ID2 (5U)
#define OSAL_TEST_TIMER_PERIOD (5000U)
#endif
-#elif defined(SOC_J721E) || defined(SOC_J7200)
+#elif defined(SOC_J721E)
UT_Timer_Type_t timer_type = UT_Timer_DMTIMER;
- #if defined (__TI_ARM_V7R4__)
+ #if defined (BUILD_MCU1_0)
+ #define OSAL_TEST_TIMER_ID (2U)
+ #define OSAL_TEST_TIMER_ID2 (3U)
+ #define OSAL_TEST_TIMER_PERIOD (5000U)
+ #elif defined (__TI_ARM_V7R4__)
#define OSAL_TEST_TIMER_ID (1U)
#define OSAL_TEST_TIMER_ID2 (2U)
#define OSAL_TEST_TIMER_PERIOD (5000U)
#define OSAL_TEST_TIMER_ID2 (5U)
#define OSAL_TEST_TIMER_PERIOD (5000U)
#endif
+#elif defined(SOC_J7200)
+ UT_Timer_Type_t timer_type = UT_Timer_DMTIMER;
+ #if defined (__TI_ARM_V7R4__)
+ #define OSAL_TEST_TIMER_ID (1U)
+ #define OSAL_TEST_TIMER_ID2 (2U)
+ #define OSAL_TEST_TIMER_PERIOD (5000U)
+ #else
+ #define OSAL_TEST_TIMER_ID (2U)
+ #define OSAL_TEST_TIMER_ID2 (5U)
+ #define OSAL_TEST_TIMER_PERIOD (5000U)
+ #endif
#elif defined(SOC_AM64X)
UT_Timer_Type_t timer_type = UT_Timer_DMTIMER;
#if defined(BUILD_MCU)
id = OSAL_TEST_TIMER_ID;
#endif
-#if defined(SOC_J721E) || defined(SOC_J7200)
+#if defined(SOC_J721E)
#if !defined(BARE_METAL)
-#if defined(BUILD_C66X_1) || defined(BUILD_C66X_2) || defined(BUILD_C7X_1)
+#if defined(BUILD_C66X_1) || defined(BUILD_C66X_2) || defined(BUILD_C7X_1) || defined(BUILD_MCU1_0)
id = OSAL_TEST_TIMER_ID;
#endif
#endif