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raw | patch | inline | side by side (parent: c055f22)
| author | Don Dominic <a0486429@ti.com> | |
| Tue, 26 Jul 2022 07:28:11 +0000 (12:58 +0530) | ||
| committer | Don Dominic <a0486429@ti.com> | |
| Tue, 26 Jul 2022 09:29:45 +0000 (14:59 +0530) |
- Only 128KB from start of MSMC3 needs to be reserved for ARM Trusted Firmware
- All PDK Linker files was reserving 256KB
- Fix this in all linker files
- Also following is the size of MSMC3 RAM in various SoC's
* J721E - 8MB
* J7200 - 1MB
* J721S2 - 4MB
* J784S4 - 8MB
- Last 64KB needs to be reserved for DMSC/TIFS firmware
- Above was not reflected correctly in many PDK linker files and R5F MPU Config tables
- Fix all those PDK linker files and R5F MPU Config tables
Signed-off-by: Don Dominic <a0486429@ti.com>
- All PDK Linker files was reserving 256KB
- Fix this in all linker files
- Also following is the size of MSMC3 RAM in various SoC's
* J721E - 8MB
* J7200 - 1MB
* J721S2 - 4MB
* J784S4 - 8MB
- Last 64KB needs to be reserved for DMSC/TIFS firmware
- Above was not reflected correctly in many PDK linker files and R5F MPU Config tables
- Fix all those PDK linker files and R5F MPU Config tables
Signed-off-by: Don Dominic <a0486429@ti.com>
85 files changed:
index 9ce4f7ee4bd8570cb66575f53cfb5f265564b724..7f5908eece972a01cfa0fbce70f3b154f5e0d46b 100755 (executable)
.memAttr = 0U,
},
{
- /* Region 3 configuration: 2 MB MCMS3 RAM */
+ /* Region 3 configuration: MCMS3 RAM */
.regionId = 3U,
.enable = 1U,
.baseAddr = 0x70000000,
+#if defined (SOC_J721E) || defined (SOC_J784S4)
.size = CSL_ARM_R5_MPU_REGION_SIZE_8MB,
+#endif
+#if defined (SOC_J7200)
+ .size = CSL_ARM_R5_MPU_REGION_SIZE_1MB,
+#endif
+#if defined (SOC_J721S2)
+ .size = CSL_ARM_R5_MPU_REGION_SIZE_4MB,
+#endif
.subRegionEnable = CSL_ARM_R5_MPU_SUB_REGION_ENABLE_ALL,
.exeNeverControl = 0U,
.accessPermission = CSL_ARM_R5_ACC_PERM_PRIV_USR_RD_WR,
diff --git a/packages/ti/build/j7200/linker_a72_mpu1_0.lds b/packages/ti/build/j7200/linker_a72_mpu1_0.lds
index cc9c7ecee73313a792f9a6b8907d0ceeb7b4d58d..a8e4ed2c92edb97d1055c497eabedb05ef38c2ea 100644 (file)
/* j7200 MCMS3 locations */
/* j7200 Reserved Memory for ARM Trusted Firmware */
- MSMC3_ARM_FW (RWIX) : ORIGIN = 0x000070000000, LENGTH = 0x40000 /* 256KB */
- BOOTVECTOR : ORIGIN = 0x000070040000, LENGTH = 0x1000 /* 4KB */
- BOOTVECTOR_EL3 : ORIGIN = 0x000070041000, LENGTH = 0x1000 /* 4KB */
- MSMC_MPU1 (RWX) : ORIGIN = 0x000070042000, LENGTH = 0xAE000 /* 864KB */
+ MSMC3_ARM_FW (RWIX) : ORIGIN = 0x000070000000, LENGTH = 0x20000 /* 128KB */
+ BOOTVECTOR : ORIGIN = 0x000070020000, LENGTH = 0x1000 /* 4KB */
+ BOOTVECTOR_EL3 : ORIGIN = 0x000070021000, LENGTH = 0x1000 /* 4KB */
+ MSMC_MPU1 (RWX) : ORIGIN = 0x000070022000, LENGTH = 0xCE000 /* 824KB */
/* j7200 Reserved Memory for DMSC Firmware */
MSMC3_DMSC_FW (RWIX) : ORIGIN = 0x0000700F0000, LENGTH = 0x10000 /* 64KB */
}
index fd8f8efd64ecf7904516db0cb388f48121c5c660..ae0577da88f7a585096ae3971aaf269f73580a11 100755 (executable)
/* j7200 MCMS3 locations */
/* j7200 Reserved Memory for ARM Trusted Firmware */
- MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x40000 /* 256KB */
- MSMC3 (RWIX) : origin=0x70040000 length=0xB0000 /* 1MB - 320KB */
+ MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x20000 /* 128KB */
+ MSMC3 (RWIX) : origin=0x70020000 length=0xD0000 /* 1MB - 192KB */
/* j7200 Reserved Memory for DMSC Firmware */
MSMC3_DMSC_FW (RWIX) : origin=0x700F0000 length=0x10000 /* 64KB */
diff --git a/packages/ti/build/j7200/linker_r5_freertos.lds b/packages/ti/build/j7200/linker_r5_freertos.lds
index c1e1ec8c89b9ae60ab29cc9a38a262d8fd0ff34d..737154dbd877504e41d63cf6b1ea5d2b4f57e05f 100644 (file)
/*========================J7200 MCMS3 LOCATIONS ===================*/
/*---------- J7200 Reserved Memory for ARM Trusted Firmware -------*/
- MSMC3_ARM_FW (RWIX) : ORIGIN = 0x70000000 LENGTH = 0x00040000 /* 256KB */
- MSMC3 (RWIX) : ORIGIN = 0x70040000 LENGTH = 0x000B0000 /* 1MB - 320KB */
+ MSMC3_ARM_FW (RWIX) : ORIGIN = 0x70000000 LENGTH = 0x00020000 /* 128KB */
+ MSMC3 (RWIX) : ORIGIN = 0x70020000 LENGTH = 0x000D0000 /* 1MB - 192KB */
/*------------- J7200 Reserved Memory for DMSC Firmware -----------*/
- MSMC3_DMSC_FW (RWIX) : ORIGIN = 0x707F0000 LENGTH = 0x00010000 /* 64KB */
+ MSMC3_DMSC_FW (RWIX) : ORIGIN = 0x700F0000 LENGTH = 0x00010000 /* 64KB */
/*======================= J7200 DDR LOCATION =======================*/
DDR0 (RWIX) : ORIGIN = 0x80000000 LENGTH = 0x80000000 /* 2GB */
diff --git a/packages/ti/build/j721e/linker_a72_mpu1_0.lds b/packages/ti/build/j721e/linker_a72_mpu1_0.lds
index 63cd7092179f10a4afc55b9ede32a48514a403dc..be2a9364d53c675f161583abc2802b8b9e5eb469 100644 (file)
/* j721e MCMS3 locations */
/* j721e Reserved Memory for ARM Trusted Firmware */
- MSMC3_ARM_FW (RWIX) : ORIGIN = 0x000070000000, LENGTH = 0x40000 /* 256KB */
- BOOTVECTOR : ORIGIN = 0x000070040000, LENGTH = 0x1000 /* 4KB */
- BOOTVECTOR_EL3 : ORIGIN = 0x000070041000, LENGTH = 0x1000 /* 4KB */
- MSMC_MPU1 (RWX) : ORIGIN = 0x000070042000, LENGTH = 0x7AE000 /* 7864KB */
+ MSMC3_ARM_FW (RWIX) : ORIGIN = 0x000070000000, LENGTH = 0x20000 /* 128KB */
+ BOOTVECTOR : ORIGIN = 0x000070020000, LENGTH = 0x1000 /* 4KB */
+ BOOTVECTOR_EL3 : ORIGIN = 0x000070021000, LENGTH = 0x1000 /* 4KB */
+ MSMC_MPU1 (RWX) : ORIGIN = 0x000070022000, LENGTH = 0x7CE000 /* 7992KB */
/* j721e Reserved Memory for DMSC Firmware */
MSMC3_DMSC_FW (RWIX) : ORIGIN = 0x0000707F0000, LENGTH = 0x10000 /* 64KB */
index 285f3ad870f0013308b137f48e2d1ddd170da03c..96baed2806d2d9848c6e55d006514c19f2677449 100755 (executable)
DDR0: o = 0x80000000 l = 0x20000000 /* 512MB DDR0 NAVSS */\r
/* j721e MSMC3 Memory */\r
/* j721e Reserved Memory for ARM Trusted Firmware */\r
- MSMC3_ARM_FW (RWIX) : o = 0x70000000, l = 0x40000 /* 256KB */\r
- MSMC3 (RWIX) : o = 0x70040000 l = 0x7B0000 /* 8MB - 320KB */\r
+ MSMC3_ARM_FW (RWIX) : o = 0x70000000, l = 0x20000 /* 128KB */\r
+ MSMC3 (RWIX) : o = 0x70020000 l = 0x7D0000 /* 8MB - 192KB */\r
/* j721e Reserved Memory for DMSC Firmware */\r
MSMC3_DMSC_FW (RWIX) : o = 0x707F0000, l = 0x10000 /* 64KB */\r
}\r
diff --git a/packages/ti/build/j721e/linker_c66_freertos.cmd b/packages/ti/build/j721e/linker_c66_freertos.cmd
index 5a0ad91f1049f82ce4abb4c7848b23285e8dcc5c..56db019c717ea2ca5d5e75a3fba87dcc9b16f4e1 100644 (file)
DDR0: o = 0x80000000 l = 0x20000000 /* 512MB DDR0 NAVSS */
/* j721e MSMC3 Memory */
/* j721e Reserved Memory for ARM Trusted Firmware */
- MSMC3_ARM_FW (RWIX) : o = 0x70000000, l = 0x40000 /* 256KB */
- MSMC3 (RWIX) : o = 0x70040000 l = 0x7B0000 /* 8MB - 320KB */
+ MSMC3_ARM_FW (RWIX) : o = 0x70000000, l = 0x20000 /* 128KB */
+ MSMC3 (RWIX) : o = 0x70020000 l = 0x7D0000 /* 8MB - 192KB */
/* j721e Reserved Memory for DMSC Firmware */
MSMC3_DMSC_FW (RWIX) : o = 0x707F0000, l = 0x10000 /* 64KB */
}
diff --git a/packages/ti/build/j721e/linker_c66_safertos.cmd b/packages/ti/build/j721e/linker_c66_safertos.cmd
index 3d435323e0fc1784ef2fdce5bc9088a661485ed6..82d5606cf3da48e7ff7ef732bc4309ac18ef7d45 100755 (executable)
/*========================J721E MCMS3 LOCATIONS ===================*/
/*---------- J721E Reserved Memory for ARM Trusted Firmware -------*/
- MSMC3_ARM_FW (RWIX) : o = 0x70000000, l = 0x40000 /* 256KB */
- MSMC3 (RWIX) : o = 0x70040000 l = 0x7B0000 /* 8MB - 320KB */
+ MSMC3_ARM_FW (RWIX) : o = 0x70000000, l = 0x20000 /* 128KB */
+ MSMC3 (RWIX) : o = 0x70020000 l = 0x7D0000 /* 8MB - 192KB */
/*------------- J721E Reserved Memory for DMSC Firmware -----------*/
MSMC3_DMSC_FW (RWIX) : o = 0x707F0000, l = 0x10000 /* 64KB */
index 535ba29d45039926d06e859d63b65270bc30ecfc..4e0505d8ba007f645db5197a35144a61d8adcc71 100755 (executable)
/* j721e MCMS3 locations */
/* j721e Reserved Memory for ARM Trusted Firmware */
- MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x40000 /* 256KB */
- MSMC3 (RWIX) : origin=0x70040000 length=0x7B0000 /* 8MB - 320KB */
+ MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x20000 /* 128KB */
+ MSMC3 (RWIX) : origin=0x70020000 length=0x7D0000 /* 8MB - 192KB */
/* j721e Reserved Memory for DMSC Firmware */
MSMC3_DMSC_FW (RWIX) : origin=0x707F0000 length=0x10000 /* 64KB */
diff --git a/packages/ti/build/j721e/linker_r5_freertos.lds b/packages/ti/build/j721e/linker_r5_freertos.lds
index 882a527ec60dbb8b3883ec22f689eec92a79cf56..7ca85639d1bea0d8a82654dca6a875ed3d314173 100644 (file)
/*========================J721E MCMS3 LOCATIONS ===================*/
/*---------- J721E Reserved Memory for ARM Trusted Firmware -------*/
- MSMC3_ARM_FW (RWIX) : ORIGIN = 0x70000000 LENGTH = 0x00040000 /* 256KB */
- MSMC3 (RWIX) : ORIGIN = 0x70040000 LENGTH = 0x007B0000 /* 8MB - 320KB */
+ MSMC3_ARM_FW (RWIX) : ORIGIN = 0x70000000 LENGTH = 0x00020000 /* 128KB */
+ MSMC3 (RWIX) : ORIGIN = 0x70020000 LENGTH = 0x007D0000 /* 8MB - 192KB */
/*------------- J721E Reserved Memory for DMSC Firmware -----------*/
MSMC3_DMSC_FW (RWIX) : ORIGIN = 0x707F0000 LENGTH = 0x00010000 /* 64KB */
diff --git a/packages/ti/build/j721e/linker_r5_safertos.lds b/packages/ti/build/j721e/linker_r5_safertos.lds
index 961cb4968111c74883ba030eb547f8ab83e55eb5..0d733df3471f08b58c76265f81c2328606bb699b 100644 (file)
/*========================J721E MCMS3 LOCATIONS ===================*/
/*---------- J721E Reserved Memory for ARM Trusted Firmware -------*/
- MSMC3_ARM_FW (RWIX) : ORIGIN = 0x70000000 LENGTH = 0x00040000 /* 256KB */
- MSMC3 (RWIX) : ORIGIN = 0x70040000 LENGTH = 0x007B0000 /* 8MB - 320KB */
+ MSMC3_ARM_FW (RWIX) : ORIGIN = 0x70000000 LENGTH = 0x00020000 /* 128KB */
+ MSMC3 (RWIX) : ORIGIN = 0x70020000 LENGTH = 0x007D0000 /* 8MB - 192KB */
/*------------- J721E Reserved Memory for DMSC Firmware -----------*/
MSMC3_DMSC_FW (RWIX) : ORIGIN = 0x707F0000 LENGTH = 0x00010000 /* 64KB */
diff --git a/packages/ti/build/j721s2/linker_a72_mpu1_0.lds b/packages/ti/build/j721s2/linker_a72_mpu1_0.lds
index b747437e1b4958b0d1b2bbeaa6dde869433b5059..cfc23f4adb85fb5061f1ec6e4e034c8c81d733c9 100644 (file)
/* j721s2 MCMS3 locations */
/* j721s2 Reserved Memory for ARM Trusted Firmware */
- MSMC3_ARM_FW (RWIX) : ORIGIN = 0x000070000000, LENGTH = 0x40000 /* 256KB */
+ MSMC3_ARM_FW (RWIX) : ORIGIN = 0x000070000000, LENGTH = 0x20000 /* 128KB */
BOOTVECTOR : ORIGIN = 0x000070020000, LENGTH = 0x1000 /* 4KB */
BOOTVECTOR_EL3 : ORIGIN = 0x000070021000, LENGTH = 0x1000 /* 4KB */
- MSMC_MPU1 (RWX) : ORIGIN = 0x000070022000, LENGTH = 0x7AE000 /* 7864KB */
+ MSMC_MPU1 (RWX) : ORIGIN = 0x000070022000, LENGTH = 0x3CE000 /* 3896KB */
/* j721s2 Reserved Memory for DMSC Firmware */
MSMC3_DMSC_FW (RWIX) : ORIGIN = 0x0000703F0000, LENGTH = 0x10000 /* 64KB */
index dba57be655ce46e452f6103f8a980e7484f426ac..3c496ff44c707a9daa67f5f06ce99e2826297068 100755 (executable)
/* j721s2 MCMS3 locations */
/* j721s2 Reserved Memory for ARM Trusted Firmware */
- MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x40000 /* 256KB */
- MSMC3 (RWIX) : origin=0x70040000 length=0x3B0000 /* 4MB - 320KB */
+ MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x20000 /* 128KB */
+ MSMC3 (RWIX) : origin=0x70020000 length=0x3D0000 /* 4MB - 192KB */
/* j721s2 Reserved Memory for DMSC Firmware */
MSMC3_DMSC_FW (RWIX) : origin=0x703F0000 length=0x10000 /* 64KB */
diff --git a/packages/ti/build/j721s2/linker_r5_freertos.lds b/packages/ti/build/j721s2/linker_r5_freertos.lds
index 9756be7e734e4be079a21d38dc323110b3012202..89b71a900857ecf0dea9e3f6fc73bf85f11e4b18 100644 (file)
/*========================J721S2 MCMS3 LOCATIONS ===================*/
/*---------- J721S2 Reserved Memory for ARM Trusted Firmware -------*/
- MSMC3_ARM_FW (RWIX) : ORIGIN = 0x70000000 LENGTH = 0x00040000 /* 256KB */
- MSMC3 (RWIX) : ORIGIN = 0x70040000 LENGTH = 0x003B0000 /* 4MB - 320KB */
+ MSMC3_ARM_FW (RWIX) : ORIGIN = 0x70000000 LENGTH = 0x00020000 /* 128KB */
+ MSMC3 (RWIX) : ORIGIN = 0x70020000 LENGTH = 0x003D0000 /* 4MB - 192KB */
/*------------- J721S2 Reserved Memory for DMSC Firmware -----------*/
MSMC3_DMSC_FW (RWIX) : ORIGIN = 0x703F0000 LENGTH = 0x00010000 /* 64KB */
diff --git a/packages/ti/build/j784s4/linker_a72_mpu1_0.lds b/packages/ti/build/j784s4/linker_a72_mpu1_0.lds
index ea8cdcf3223844e3c374c28387e9c2dc573181b5..0261ada8fda48819f99ab07d090a93f05e9e9703 100644 (file)
/* J784S4 MCMS3 locations */
/* J784S4 Reserved Memory for ARM Trusted Firmware */
- MSMC3_ARM_FW (RWIX) : ORIGIN = 0x000070000000, LENGTH = 0x40000 /* 256KB */
+ MSMC3_ARM_FW (RWIX) : ORIGIN = 0x000070000000, LENGTH = 0x20000 /* 128KB */
BOOTVECTOR : ORIGIN = 0x000070020000, LENGTH = 0x1000 /* 4KB */
BOOTVECTOR_EL3 : ORIGIN = 0x000070021000, LENGTH = 0x1000 /* 4KB */
- MSMC_MPU1 (RWX) : ORIGIN = 0x000070022000, LENGTH = 0x7AE000 /* 7864KB */
+ MSMC_MPU1 (RWX) : ORIGIN = 0x000070022000, LENGTH = 0x7CE000 /* 7992KB */
/* J784S4 Reserved Memory for DMSC Firmware */
- MSMC3_DMSC_FW (RWIX) : ORIGIN = 0x0000703F0000, LENGTH = 0x10000 /* 64KB */
+ MSMC3_DMSC_FW (RWIX) : ORIGIN = 0x0000707F0000, LENGTH = 0x10000 /* 64KB */
}
REGION_ALIAS("REGION_TEXT_EL3", DDR_MPU1);
index 0576d165ff6dfa5fad14bb437005de416067e62d..fdae7f7bb206a295df7737ef3af5f87400797e70 100644 (file)
/* J784S4 MCMS3 locations */
/* J784S4 Reserved Memory for ARM Trusted Firmware */
- MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x40000 /* 256KB */
- MSMC3 (RWIX) : origin=0x70040000 length=0x3B0000 /* 4MB - 320KB */
+ MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x20000 /* 128KB */
+ MSMC3 (RWIX) : origin=0x70020000 length=0x7D0000 /* 8MB - 192KB */
/* J784S4 Reserved Memory for DMSC Firmware */
- MSMC3_DMSC_FW (RWIX) : origin=0x703F0000 length=0x10000 /* 64KB */
+ MSMC3_DMSC_FW (RWIX) : origin=0x707F0000 length=0x10000 /* 64KB */
DDR0 (RWIX) : origin=0x80000000 length=0x80000000 /* 2GB */
}
diff --git a/packages/ti/build/j784s4/linker_r5_freertos.lds b/packages/ti/build/j784s4/linker_r5_freertos.lds
index 02aa730cef85af3c8c069432e2f31545bb863ac2..4aed0822957a47e6a0aa4ebe8697ae72dd0e29c1 100644 (file)
/*========================J784S4 MCMS3 LOCATIONS ===================*/
/*---------- J784S4 Reserved Memory for ARM Trusted Firmware -------*/
- MSMC3_ARM_FW (RWIX) : ORIGIN = 0x70000000 LENGTH = 0x00040000 /* 256KB */
- MSMC3 (RWIX) : ORIGIN = 0x70040000 LENGTH = 0x003B0000 /* 4MB - 320KB */
+ MSMC3_ARM_FW (RWIX) : ORIGIN = 0x70000000 LENGTH = 0x00020000 /* 128KB */
+ MSMC3 (RWIX) : ORIGIN = 0x70020000 LENGTH = 0x007D0000 /* 8MB - 192KB */
/*------------- J784S4 Reserved Memory for DMSC Firmware -----------*/
- MSMC3_DMSC_FW (RWIX) : ORIGIN = 0x703F0000 LENGTH = 0x00010000 /* 64KB */
+ MSMC3_DMSC_FW (RWIX) : ORIGIN = 0x707F0000 LENGTH = 0x00010000 /* 64KB */
/*======================= J784S4 DDR LOCATION =======================*/
DDR0 (RWIX) : ORIGIN = 0x80000000 LENGTH = 0x80000000 /* 2GB */
diff --git a/packages/ti/drv/ipc/examples/common/j7200/freertos/linker_r5f_freertos_common.inc b/packages/ti/drv/ipc/examples/common/j7200/freertos/linker_r5f_freertos_common.inc
index 1df8c7859eaee7eb1a3a7777deded5b629a358ce..95fe3186cbba3d0f2875653288762bf15ca760fa 100644 (file)
/*=================== COMPUTE_CLUSTER0_MSMC_SRAM ==================*/
/*---------- J7200 Reserved Memory for ARM Trusted Firmware -------*/
- MSMC3_ARM_FW (RWIX) : ORIGIN = 0x70000000 LENGTH = 0x00040000 /* 256KB */
+ MSMC3_ARM_FW (RWIX) : ORIGIN = 0x70000000 LENGTH = 0x00020000 /* 128KB */
/*-----------------------------------------------------------------*/
- MSMC3 (RWIX) : ORIGIN = 0x70040000 LENGTH = 0x007B0000 /* 8MB - 320KB */
+ MSMC3 (RWIX) : ORIGIN = 0x70020000 LENGTH = 0x000D0000 /* 1MB - 192KB */
/*------------- J7200 Reserved Memory for DMSC Firmware -----------*/
- MSMC3_DMSC_FW (RWIX) : ORIGIN = 0x707F0000 LENGTH = 0x00010000 /* 64KB */
+ MSMC3_DMSC_FW (RWIX) : ORIGIN = 0x700F0000 LENGTH = 0x00010000 /* 64KB */
/*===================== J7200 DDR Locations =======================*/
/* DDR Memory Map is included from memory_map_ddr.cmd -------------*/
diff --git a/packages/ti/drv/ipc/examples/common/j7200/linker_r5f_mcu1_0.lds b/packages/ti/drv/ipc/examples/common/j7200/linker_r5f_mcu1_0.lds
index 5937d44a85ddbf10e690b91999f8c33d7198f986..39c1e8ea540ac85e11595a6ffb092839dd68add4 100644 (file)
/* j7200 MCMS3 locations */
/* j7200 Reserved Memory for ARM Trusted Firmware */
- MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x40000 /* 256KB */
- MSMC3 (RWIX) : origin=0x70040000 length=0x7B0000 /* 8MB - 320KB */
+ MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x20000 /* 128KB */
+ MSMC3 (RWIX) : origin=0x70020000 length=0xD0000 /* 1MB - 192KB */
/* j7200 Reserved Memory for DMSC Firmware */
- MSMC3_DMSC_FW (RWIX) : origin=0x707F0000 length=0x10000 /* 64KB */
+ MSMC3_DMSC_FW (RWIX) : origin=0x700F0000 length=0x10000 /* 64KB */
DDR0_RESERVED (RWIX) : origin=0x80000000 length=0x20000000 /* 512MB */
MCU1_0_IPC_DATA (RWIX) : origin=DDR0_ALLOCATED_START length=0x00100000 /* 1MB */
diff --git a/packages/ti/drv/ipc/examples/common/j7200/linker_r5f_mcu1_0_btcm.lds b/packages/ti/drv/ipc/examples/common/j7200/linker_r5f_mcu1_0_btcm.lds
index 80c2848ea885491bcb1016d333daf563396e22a7..ac991cd98ffe84798844a0ff828d96ff06e4ebfb 100644 (file)
/* j7200 MCMS3 locations */
/* j7200 Reserved Memory for ARM Trusted Firmware */
- MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x40000 /* 256KB */
- MSMC3 (RWIX) : origin=0x70040000 length=0x7B0000 /* 8MB - 320KB */
+ MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x20000 /* 128KB */
+ MSMC3 (RWIX) : origin=0x70020000 length=0xD0000 /* 1MB - 192KB */
/* j7200 Reserved Memory for DMSC Firmware */
- MSMC3_DMSC_FW (RWIX) : origin=0x707F0000 length=0x10000 /* 64KB */
+ MSMC3_DMSC_FW (RWIX) : origin=0x700F0000 length=0x10000 /* 64KB */
DDR0_RESERVED (RWIX) : origin=0x80000000 length=0x20000000 /* 512MB */
MCU1_0_IPC_DATA (RWIX) : origin=DDR0_ALLOCATED_START length=0x00100000 /* 1MB */
diff --git a/packages/ti/drv/ipc/examples/common/j7200/linker_r5f_mcu1_1.lds b/packages/ti/drv/ipc/examples/common/j7200/linker_r5f_mcu1_1.lds
index e649784c8607ba90dc88e5ded8dbc9a3df5eb6e6..084f282f05e07a36377b415de0fd9079b878e125 100644 (file)
/* j7200 MCMS3 locations */
/* j7200 Reserved Memory for ARM Trusted Firmware */
- MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x40000 /* 256KB */
- MSMC3 (RWIX) : origin=0x70040000 length=0x7B0000 /* 8MB - 320KB */
+ MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x20000 /* 128KB */
+ MSMC3 (RWIX) : origin=0x70020000 length=0xD0000 /* 1MB - 192KB */
/* j7200 Reserved Memory for DMSC Firmware */
- MSMC3_DMSC_FW (RWIX) : origin=0x707F0000 length=0x10000 /* 64KB */
+ MSMC3_DMSC_FW (RWIX) : origin=0x700F0000 length=0x10000 /* 64KB */
DDR0_RESERVED (RWIX) : origin=0x80000000 length=0x20000000 /* 512MB */
MCU1_0_IPC_DATA (RWIX) : origin=DDR0_ALLOCATED_START length=0x00100000 /* 1MB */
diff --git a/packages/ti/drv/ipc/examples/common/j7200/linker_r5f_mcu2_0.lds b/packages/ti/drv/ipc/examples/common/j7200/linker_r5f_mcu2_0.lds
index 36230ddcee084b51a2401e9a375b6fdbf98fc2c0..b7fcc4bd881dfa4a96b1febb3d8c8c3156e8681d 100644 (file)
/* j7200 MCMS3 locations */
/* j7200 Reserved Memory for ARM Trusted Firmware */
- MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x40000 /* 256KB */
- MSMC3 (RWIX) : origin=0x70040000 length=0x7B0000 /* 8MB - 320KB */
+ MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x20000 /* 128KB */
+ MSMC3 (RWIX) : origin=0x70020000 length=0xD0000 /* 1MB - 192KB */
/* j7200 Reserved Memory for DMSC Firmware */
- MSMC3_DMSC_FW (RWIX) : origin=0x707F0000 length=0x10000 /* 64KB */
+ MSMC3_DMSC_FW (RWIX) : origin=0x700F0000 length=0x10000 /* 64KB */
DDR0_RESERVED (RWIX) : origin=0x80000000 length=0x20000000 /* 512MB */
MCU1_0_IPC_DATA (RWIX) : origin=DDR0_ALLOCATED_START length=0x00100000 /* 1MB */
diff --git a/packages/ti/drv/ipc/examples/common/j7200/linker_r5f_mcu2_1.lds b/packages/ti/drv/ipc/examples/common/j7200/linker_r5f_mcu2_1.lds
index f7801fa6252562bed16ef9e4786115e502a52856..a6f0825d0aab29ece81df57fb3966124177a5b13 100644 (file)
/* j7200 MCMS3 locations */
/* j7200 Reserved Memory for ARM Trusted Firmware */
- MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x40000 /* 256KB */
- MSMC3 (RWIX) : origin=0x70040000 length=0x7B0000 /* 8MB - 320KB */
+ MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x20000 /* 128KB */
+ MSMC3 (RWIX) : origin=0x70020000 length=0xD0000 /* 1MB - 192KB */
/* j7200 Reserved Memory for DMSC Firmware */
- MSMC3_DMSC_FW (RWIX) : origin=0x707F0000 length=0x10000 /* 64KB */
+ MSMC3_DMSC_FW (RWIX) : origin=0x700F0000 length=0x10000 /* 64KB */
DDR0_RESERVED (RWIX) : origin=0x80000000 length=0x20000000 /* 512MB */
MCU1_0_IPC_DATA (RWIX) : origin=DDR0_ALLOCATED_START length=0x00100000 /* 1MB */
diff --git a/packages/ti/drv/ipc/examples/common/j721e/freertos/linker_c66_freertos_common.inc b/packages/ti/drv/ipc/examples/common/j721e/freertos/linker_c66_freertos_common.inc
index 2c104523c80c8c88536191e10321dccc1301edfe..75292f651fd15c2b48be17a9eda5e916f4c2d406 100644 (file)
/*=================== COMPUTE_CLUSTER0_MSMC_SRAM ==================*/
/*---------- J721E Reserved Memory for ARM Trusted Firmware -------*/
- MSMC3_ARM_FW (RWIX) : ORIGIN = 0x70000000 LENGTH = 0x00040000 /* 256KB */
+ MSMC3_ARM_FW (RWIX) : ORIGIN = 0x70000000 LENGTH = 0x00020000 /* 128KB */
/*-----------------------------------------------------------------*/
- MSMC3 (RWIX) : ORIGIN = 0x70040000 LENGTH = 0x007B0000 /* 8MB - 320KB */
+ MSMC3 (RWIX) : ORIGIN = 0x70020000 LENGTH = 0x007D0000 /* 8MB - 192KB */
/*------------- J721E Reserved Memory for DMSC Firmware -----------*/
MSMC3_DMSC_FW (RWIX) : ORIGIN = 0x707F0000 LENGTH = 0x00010000 /* 64KB */
diff --git a/packages/ti/drv/ipc/examples/common/j721e/freertos/linker_r5f_freertos_common.inc b/packages/ti/drv/ipc/examples/common/j721e/freertos/linker_r5f_freertos_common.inc
index 376b279eedd7c3d0cc451622a65ae6af7cb39543..2dd2955d9d257229f384e06d06557e745160c2a8 100644 (file)
/*=================== COMPUTE_CLUSTER0_MSMC_SRAM ==================*/
/*---------- J721E Reserved Memory for ARM Trusted Firmware -------*/
- MSMC3_ARM_FW (RWIX) : ORIGIN = 0x70000000 LENGTH = 0x00040000 /* 256KB */
+ MSMC3_ARM_FW (RWIX) : ORIGIN = 0x70000000 LENGTH = 0x00020000 /* 128KB */
/*-----------------------------------------------------------------*/
- MSMC3 (RWIX) : ORIGIN = 0x70040000 LENGTH = 0x007B0000 /* 8MB - 320KB */
+ MSMC3 (RWIX) : ORIGIN = 0x70020000 LENGTH = 0x007D0000 /* 8MB - 192KB */
/*------------- J721E Reserved Memory for DMSC Firmware -----------*/
MSMC3_DMSC_FW (RWIX) : ORIGIN = 0x707F0000 LENGTH = 0x00010000 /* 64KB */
diff --git a/packages/ti/drv/ipc/examples/common/j721e/linker_r5f_mcu1_0.lds b/packages/ti/drv/ipc/examples/common/j721e/linker_r5f_mcu1_0.lds
index 5937d44a85ddbf10e690b91999f8c33d7198f986..0ac5777f804dc839ba0b01a5d420ad16e1f9807b 100644 (file)
OCMC_RAM (RWIX) : origin=0x41c82000 length=0x7DB00
OCMC_RAM_X509_HEADER (RWIX) : origin=0x41cffb00 length=0x500
- /* j7200 MCMS3 locations */
- /* j7200 Reserved Memory for ARM Trusted Firmware */
- MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x40000 /* 256KB */
- MSMC3 (RWIX) : origin=0x70040000 length=0x7B0000 /* 8MB - 320KB */
- /* j7200 Reserved Memory for DMSC Firmware */
+ /* j721e MCMS3 locations */
+ /* j721e Reserved Memory for ARM Trusted Firmware */
+ MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x20000 /* 128KB */
+ MSMC3 (RWIX) : origin=0x70020000 length=0x7D0000 /* 8MB - 192KB */
+ /* j721e Reserved Memory for DMSC Firmware */
MSMC3_DMSC_FW (RWIX) : origin=0x707F0000 length=0x10000 /* 64KB */
DDR0_RESERVED (RWIX) : origin=0x80000000 length=0x20000000 /* 512MB */
diff --git a/packages/ti/drv/ipc/examples/common/j721e/linker_r5f_mcu1_0_btcm.lds b/packages/ti/drv/ipc/examples/common/j721e/linker_r5f_mcu1_0_btcm.lds
index 80c2848ea885491bcb1016d333daf563396e22a7..129f0e4cb8301ac9f9b67a49233d7ac92ee2cdb7 100644 (file)
OCMC_RAM (RWIX) : origin=0x41c82000 length=0x7DB00
OCMC_RAM_X509_HEADER (RWIX) : origin=0x41cffb00 length=0x500
- /* j7200 MCMS3 locations */
- /* j7200 Reserved Memory for ARM Trusted Firmware */
- MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x40000 /* 256KB */
- MSMC3 (RWIX) : origin=0x70040000 length=0x7B0000 /* 8MB - 320KB */
- /* j7200 Reserved Memory for DMSC Firmware */
+ /* j721e MCMS3 locations */
+ /* j721e Reserved Memory for ARM Trusted Firmware */
+ MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x20000 /* 128KB */
+ MSMC3 (RWIX) : origin=0x70020000 length=0x7D0000 /* 8MB - 192KB */
+ /* j721e Reserved Memory for DMSC Firmware */
MSMC3_DMSC_FW (RWIX) : origin=0x707F0000 length=0x10000 /* 64KB */
DDR0_RESERVED (RWIX) : origin=0x80000000 length=0x20000000 /* 512MB */
diff --git a/packages/ti/drv/ipc/examples/common/j721e/linker_r5f_mcu1_1.lds b/packages/ti/drv/ipc/examples/common/j721e/linker_r5f_mcu1_1.lds
index e649784c8607ba90dc88e5ded8dbc9a3df5eb6e6..f8765b28928ea3565a1c4c52b8527f285db63a9b 100644 (file)
/* MCU0 share locations */
OCMRAM (RWIX) : origin=0x41C00100 length=0x80000 - 0x1100 /* ~510KB */
- /* j7200 MCMS3 locations */
- /* j7200 Reserved Memory for ARM Trusted Firmware */
- MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x40000 /* 256KB */
- MSMC3 (RWIX) : origin=0x70040000 length=0x7B0000 /* 8MB - 320KB */
- /* j7200 Reserved Memory for DMSC Firmware */
+ /* j721e MCMS3 locations */
+ /* j721e Reserved Memory for ARM Trusted Firmware */
+ MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x20000 /* 128KB */
+ MSMC3 (RWIX) : origin=0x70020000 length=0x7D0000 /* 8MB - 192KB */
+ /* j721e Reserved Memory for DMSC Firmware */
MSMC3_DMSC_FW (RWIX) : origin=0x707F0000 length=0x10000 /* 64KB */
DDR0_RESERVED (RWIX) : origin=0x80000000 length=0x20000000 /* 512MB */
diff --git a/packages/ti/drv/ipc/examples/common/j721e/linker_r5f_mcu2_0.lds b/packages/ti/drv/ipc/examples/common/j721e/linker_r5f_mcu2_0.lds
index dec899871dba1507e38bdd7fb9583bc01893be06..aaf8b465f6e8b28351ced9d9f4bc7503d153d60d 100644 (file)
/* MCU0 share locations */
OCMRAM (RWIX) : origin=0x41C00100 length=0x80000 - 0x1100 /* ~510KB */
- /* j7200 MCMS3 locations */
- /* j7200 Reserved Memory for ARM Trusted Firmware */
- MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x40000 /* 256KB */
- MSMC3 (RWIX) : origin=0x70040000 length=0x7B0000 /* 8MB - 320KB */
- /* j7200 Reserved Memory for DMSC Firmware */
+ /* j721e MCMS3 locations */
+ /* j721e Reserved Memory for ARM Trusted Firmware */
+ MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x20000 /* 128KB */
+ MSMC3 (RWIX) : origin=0x70020000 length=0x7D0000 /* 8MB - 192KB */
+ /* j721e Reserved Memory for DMSC Firmware */
MSMC3_DMSC_FW (RWIX) : origin=0x707F0000 length=0x10000 /* 64KB */
DDR0_RESERVED (RWIX) : origin=0x80000000 length=0x20000000 /* 512MB */
diff --git a/packages/ti/drv/ipc/examples/common/j721e/linker_r5f_mcu2_1.lds b/packages/ti/drv/ipc/examples/common/j721e/linker_r5f_mcu2_1.lds
index f7801fa6252562bed16ef9e4786115e502a52856..612258b110a607c131b4fa906d033521f2307ad5 100644 (file)
/* MCU0 share locations */
OCMRAM (RWIX) : origin=0x41C00100 length=0x80000 - 0x1100 /* ~510KB */
- /* j7200 MCMS3 locations */
- /* j7200 Reserved Memory for ARM Trusted Firmware */
- MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x40000 /* 256KB */
- MSMC3 (RWIX) : origin=0x70040000 length=0x7B0000 /* 8MB - 320KB */
- /* j7200 Reserved Memory for DMSC Firmware */
+ /* j721e MCMS3 locations */
+ /* j721e Reserved Memory for ARM Trusted Firmware */
+ MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x20000 /* 128KB */
+ MSMC3 (RWIX) : origin=0x70020000 length=0x7D0000 /* 8MB - 192KB */
+ /* j721e Reserved Memory for DMSC Firmware */
MSMC3_DMSC_FW (RWIX) : origin=0x707F0000 length=0x10000 /* 64KB */
DDR0_RESERVED (RWIX) : origin=0x80000000 length=0x20000000 /* 512MB */
diff --git a/packages/ti/drv/ipc/examples/common/j721e/linker_r5f_mcu3_0.lds b/packages/ti/drv/ipc/examples/common/j721e/linker_r5f_mcu3_0.lds
index ddb9bad824718196b62439776ffa57174d7bd079..ef4248e888134a1dfa2914ee0fa5163957b2a7be 100644 (file)
/* MCU0 share locations */
OCMRAM (RWIX) : origin=0x41C00100 length=0x80000 - 0x1100 /* ~510KB */
- /* j7200 MCMS3 locations */
- /* j7200 Reserved Memory for ARM Trusted Firmware */
- MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x40000 /* 256KB */
- MSMC3 (RWIX) : origin=0x70040000 length=0x7B0000 /* 8MB - 320KB */
- /* j7200 Reserved Memory for DMSC Firmware */
+ /* j721e MCMS3 locations */
+ /* j721e Reserved Memory for ARM Trusted Firmware */
+ MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x20000 /* 128KB */
+ MSMC3 (RWIX) : origin=0x70020000 length=0x7D0000 /* 8MB - 192KB */
+ /* j721e Reserved Memory for DMSC Firmware */
MSMC3_DMSC_FW (RWIX) : origin=0x707F0000 length=0x10000 /* 64KB */
DDR0_RESERVED (RWIX) : origin=0x80000000 length=0x20000000 /* 512MB */
diff --git a/packages/ti/drv/ipc/examples/common/j721e/linker_r5f_mcu3_1.lds b/packages/ti/drv/ipc/examples/common/j721e/linker_r5f_mcu3_1.lds
index cb52bc53bea1dbce98d660593d178e1c156259c2..5664c2a198568c5b9f7a2f5e23a6e9f582f4717c 100644 (file)
/* MCU0 share locations */
OCMRAM (RWIX) : origin=0x41C00100 length=0x80000 - 0x1100 /* ~510KB */
- /* j7200 MCMS3 locations */
- /* j7200 Reserved Memory for ARM Trusted Firmware */
- MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x40000 /* 256KB */
- MSMC3 (RWIX) : origin=0x70040000 length=0x7B0000 /* 8MB - 320KB */
- /* j7200 Reserved Memory for DMSC Firmware */
+ /* j721e MCMS3 locations */
+ /* j721e Reserved Memory for ARM Trusted Firmware */
+ MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x20000 /* 128KB */
+ MSMC3 (RWIX) : origin=0x70020000 length=0x7D0000 /* 8MB - 192KB */
+ /* j721e Reserved Memory for DMSC Firmware */
MSMC3_DMSC_FW (RWIX) : origin=0x707F0000 length=0x10000 /* 64KB */
DDR0_RESERVED (RWIX) : origin=0x80000000 length=0x20000000 /* 512MB */
diff --git a/packages/ti/drv/ipc/examples/common/j721e/safertos/linker_c66_safertos_common.inc b/packages/ti/drv/ipc/examples/common/j721e/safertos/linker_c66_safertos_common.inc
index fbbd7d3085ca41acab2d5c89fbe701bedb356bc5..03312d86f4fd86952c39f110642a7a76d6e3d738 100755 (executable)
/*=================== COMPUTE_CLUSTER0_MSMC_SRAM ==================*/
/*---------- J721E Reserved Memory for ARM Trusted Firmware -------*/
- MSMC3_ARM_FW (RWIX) : ORIGIN = 0x70000000 LENGTH = 0x00040000 /* 256KB */
+ MSMC3_ARM_FW (RWIX) : ORIGIN = 0x70000000 LENGTH = 0x00020000 /* 128KB */
/*-----------------------------------------------------------------*/
- MSMC3 (RWIX) : ORIGIN = 0x70040000 LENGTH = 0x007B0000 /* 8MB - 320KB */
+ MSMC3 (RWIX) : ORIGIN = 0x70020000 LENGTH = 0x007D0000 /* 8MB - 192KB */
/*------------- J721E Reserved Memory for DMSC Firmware -----------*/
MSMC3_DMSC_FW (RWIX) : ORIGIN = 0x707F0000 LENGTH = 0x00010000 /* 64KB */
diff --git a/packages/ti/drv/ipc/examples/common/j721e/safertos/linker_r5f_safertos_common.inc b/packages/ti/drv/ipc/examples/common/j721e/safertos/linker_r5f_safertos_common.inc
index ef74b236d175fa365fe94f729f71bf54c3a83998..41a57410c024b91c043b43008df796327d0ca680 100644 (file)
/*=================== COMPUTE_CLUSTER0_MSMC_SRAM ==================*/
/*---------- J721E Reserved Memory for ARM Trusted Firmware -------*/
- MSMC3_ARM_FW (RWIX) : ORIGIN = 0x70000000 LENGTH = 0x00040000 /* 256KB */
+ MSMC3_ARM_FW (RWIX) : ORIGIN = 0x70000000 LENGTH = 0x00020000 /* 128KB */
/*-----------------------------------------------------------------*/
- MSMC3 (RWIX) : ORIGIN = 0x70040000 LENGTH = 0x007B0000 /* 8MB - 320KB */
+ MSMC3 (RWIX) : ORIGIN = 0x70020000 LENGTH = 0x007D0000 /* 8MB - 192KB */
/*------------- J721E Reserved Memory for DMSC Firmware -----------*/
MSMC3_DMSC_FW (RWIX) : ORIGIN = 0x707F0000 LENGTH = 0x00010000 /* 64KB */
diff --git a/packages/ti/drv/ipc/examples/common/j721s2/freertos/linker_r5f_freertos_common.inc b/packages/ti/drv/ipc/examples/common/j721s2/freertos/linker_r5f_freertos_common.inc
index 48effc72850007c148929b668d7915916abf8784..13dc17c816dba86ecb69b42d927df6d2ddfaf94a 100755 (executable)
/*=================== COMPUTE_CLUSTER0_MSMC_SRAM ==================*/
/*---------- J721S2 Reserved Memory for ARM Trusted Firmware -------*/
- MSMC3_ARM_FW (RWIX) : ORIGIN = 0x70000000 LENGTH = 0x00040000 /* 256KB */
+ MSMC3_ARM_FW (RWIX) : ORIGIN = 0x70000000 LENGTH = 0x00020000 /* 128KB */
/*-----------------------------------------------------------------*/
- MSMC3 (RWIX) : ORIGIN = 0x70040000 LENGTH = 0x003B0000 /* 4MB - 320KB */
+ MSMC3 (RWIX) : ORIGIN = 0x70020000 LENGTH = 0x003D0000 /* 4MB - 192KB */
/*------------- J721S2 Reserved Memory for DMSC Firmware -----------*/
MSMC3_DMSC_FW (RWIX) : ORIGIN = 0x703F0000 LENGTH = 0x00010000 /* 64KB */
diff --git a/packages/ti/drv/ipc/examples/common/j721s2/linker_r5f_mcu1_0.lds b/packages/ti/drv/ipc/examples/common/j721s2/linker_r5f_mcu1_0.lds
index 3ff9830c037283410fb57a7879655dda93fdfe75..da60b9ea0a4b890f54472d5369306202c5d4713a 100644 (file)
/* j721s2 MSMC3 locations */
/* j721s2 Reserved Memory for ARM Trusted Firmware */
- MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x40000 /* 256KB */
- MSMC3 (RWIX) : origin=0x70040000 length=0x3B0000 /* 4MB - 320KB */
+ MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x20000 /* 128KB */
+ MSMC3 (RWIX) : origin=0x70020000 length=0x3D0000 /* 4MB - 192KB */
/* j721s2 Reserved Memory for DMSC Firmware */
MSMC3_DMSC_FW (RWIX) : origin=0x703F0000 length=0x10000 /* 64KB */
diff --git a/packages/ti/drv/ipc/examples/common/j721s2/linker_r5f_mcu1_0_btcm.lds b/packages/ti/drv/ipc/examples/common/j721s2/linker_r5f_mcu1_0_btcm.lds
index 5d82b23a5ec7b4ed4db302ceac5a2233f006a669..bb60d0bee2b21b09d834836e820716a66a9b3bf6 100644 (file)
/* j721s2 MSMC3 locations */
/* j721s2 Reserved Memory for ARM Trusted Firmware */
- MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x40000 /* 256KB */
- MSMC3 (RWIX) : origin=0x70040000 length=0x3B0000 /* 4MB - 320KB */
+ MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x20000 /* 128KB */
+ MSMC3 (RWIX) : origin=0x70020000 length=0x3D0000 /* 4MB - 192KB */
/* j721s2 Reserved Memory for DMSC Firmware */
MSMC3_DMSC_FW (RWIX) : origin=0x703F0000 length=0x10000 /* 64KB */
diff --git a/packages/ti/drv/ipc/examples/common/j721s2/linker_r5f_mcu1_1.lds b/packages/ti/drv/ipc/examples/common/j721s2/linker_r5f_mcu1_1.lds
index 8ecdd50ece6a24f4a5447716cf487f6f543a6761..09c5e1fc34eab2c7578c8703a11c0cdb6c2aa627 100644 (file)
/* j721s2 MSMC3 locations */
/* j721s2 Reserved Memory for ARM Trusted Firmware */
- MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x40000 /* 256KB */
- MSMC3 (RWIX) : origin=0x70040000 length=0x3B0000 /* 4MB - 320KB */
+ MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x20000 /* 128KB */
+ MSMC3 (RWIX) : origin=0x70020000 length=0x3D0000 /* 4MB - 192KB */
/* j721s2 Reserved Memory for DMSC Firmware */
MSMC3_DMSC_FW (RWIX) : origin=0x703F0000 length=0x10000 /* 64KB */
diff --git a/packages/ti/drv/ipc/examples/common/j721s2/linker_r5f_mcu2_0.lds b/packages/ti/drv/ipc/examples/common/j721s2/linker_r5f_mcu2_0.lds
index 3484fe911f79eda72707dbc2315087161d5b6cea..154327f56e0dd11e0d7798be2d8c9d95a1a29160 100644 (file)
/* j721s2 MSMC3 locations */
/* j721s2 Reserved Memory for ARM Trusted Firmware */
- MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x40000 /* 256KB */
- MSMC3 (RWIX) : origin=0x70040000 length=0x3B0000 /* 4MB - 320KB */
+ MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x20000 /* 128KB */
+ MSMC3 (RWIX) : origin=0x70020000 length=0x3D0000 /* 4MB - 192KB */
/* j721s2 Reserved Memory for DMSC Firmware */
MSMC3_DMSC_FW (RWIX) : origin=0x703F0000 length=0x10000 /* 64KB */
diff --git a/packages/ti/drv/ipc/examples/common/j721s2/linker_r5f_mcu2_1.lds b/packages/ti/drv/ipc/examples/common/j721s2/linker_r5f_mcu2_1.lds
index 0116f467f6885fdde33898a5c32621be8f564ff5..bff8326e504d9b18ba66f5c3dd6d448fc6939bb2 100644 (file)
/* j721s2 MSMC3 locations */
/* j721s2 Reserved Memory for ARM Trusted Firmware */
- MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x40000 /* 256KB */
- MSMC3 (RWIX) : origin=0x70040000 length=0x3B0000 /* 4MB - 320KB */
+ MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x20000 /* 128KB */
+ MSMC3 (RWIX) : origin=0x70020000 length=0x3D0000 /* 4MB - 192KB */
/* j721s2 Reserved Memory for DMSC Firmware */
MSMC3_DMSC_FW (RWIX) : origin=0x703F0000 length=0x10000 /* 64KB */
diff --git a/packages/ti/drv/ipc/examples/common/j721s2/linker_r5f_mcu3_0.lds b/packages/ti/drv/ipc/examples/common/j721s2/linker_r5f_mcu3_0.lds
index f36a4cb888f4b9f89d0055ead7d2e23e45b597d6..07d1384d73dcf5b247849fc6d9bf8d8dd5e73ba6 100644 (file)
/* j721s2 MSMC3 locations */
/* j721s2 Reserved Memory for ARM Trusted Firmware */
- MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x40000 /* 256KB */
- MSMC3 (RWIX) : origin=0x70040000 length=0x3B0000 /* 4MB - 320KB */
+ MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x20000 /* 128KB */
+ MSMC3 (RWIX) : origin=0x70020000 length=0x3D0000 /* 4MB - 192KB */
/* j721s2 Reserved Memory for DMSC Firmware */
MSMC3_DMSC_FW (RWIX) : origin=0x703F0000 length=0x10000 /* 64KB */
diff --git a/packages/ti/drv/ipc/examples/common/j721s2/linker_r5f_mcu3_1.lds b/packages/ti/drv/ipc/examples/common/j721s2/linker_r5f_mcu3_1.lds
index ec9d718fb71c270a35d66ed70aee0dee17fa3c13..bdbfe3fc02dc28db2f6ef45bc2c96de358ecd4d4 100644 (file)
/* j721s2 MSMC3 locations */
/* j721s2 Reserved Memory for ARM Trusted Firmware */
- MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x40000 /* 256KB */
- MSMC3 (RWIX) : origin=0x70040000 length=0x3B0000 /* 4MB - 320KB */
+ MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x20000 /* 128KB */
+ MSMC3 (RWIX) : origin=0x70020000 length=0x3D0000 /* 4MB - 192KB */
/* j721s2 Reserved Memory for DMSC Firmware */
MSMC3_DMSC_FW (RWIX) : origin=0x703F0000 length=0x10000 /* 64KB */
diff --git a/packages/ti/drv/ipc/examples/common/j784s4/freertos/linker_r5f_freertos_common.inc b/packages/ti/drv/ipc/examples/common/j784s4/freertos/linker_r5f_freertos_common.inc
index 00643ec14ea5769322da89344ec3dd6620cfe624..39b9f986a88c4b3d2ae95ceeb16f98c2e78a73c1 100755 (executable)
/*=================== COMPUTE_CLUSTER0_MSMC_SRAM ==================*/
/*---------- J784S4 Reserved Memory for ARM Trusted Firmware -------*/
- MSMC3_ARM_FW (RWIX) : ORIGIN = 0x70000000 LENGTH = 0x00040000 /* 256KB */
+ MSMC3_ARM_FW (RWIX) : ORIGIN = 0x70000000 LENGTH = 0x00020000 /* 128KB */
/*-----------------------------------------------------------------*/
- MSMC3 (RWIX) : ORIGIN = 0x70040000 LENGTH = 0x007B0000 /* 8MB - 320KB */
+ MSMC3 (RWIX) : ORIGIN = 0x70020000 LENGTH = 0x007D0000 /* 8MB - 192KB */
/*------------- J784S4 Reserved Memory for DMSC Firmware -----------*/
MSMC3_DMSC_FW (RWIX) : ORIGIN = 0x707F0000 LENGTH = 0x00010000 /* 64KB */
diff --git a/packages/ti/drv/ipc/examples/common/j784s4/linker_r5f_mcu1_0.lds b/packages/ti/drv/ipc/examples/common/j784s4/linker_r5f_mcu1_0.lds
index 88d2cd6972106db8b36d67a90ec8409267838135..c903a8a60788020465251fa5f2b1b2bfed8efdd3 100755 (executable)
/* J784S4 MSMC3 locations */
/* J784S4 Reserved Memory for ARM Trusted Firmware */
- MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x40000 /* 256KB */
- MSMC3 (RWIX) : origin=0x70040000 length=0x3B0000 /* 4MB - 320KB */
+ MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x20000 /* 128KB */
+ MSMC3 (RWIX) : origin=0x70020000 length=0x7D0000 /* 8MB - 192KB */
/* J784S4 Reserved Memory for DMSC Firmware */
- MSMC3_DMSC_FW (RWIX) : origin=0x703F0000 length=0x10000 /* 64KB */
+ MSMC3_DMSC_FW (RWIX) : origin=0x707F0000 length=0x10000 /* 64KB */
DDR0_RESERVED (RWIX) : origin=0x80000000 length=0x20000000 /* 512MB */
MCU1_0_IPC_DATA (RWIX) : origin=DDR0_ALLOCATED_START length=0x00100000 /* 1MB */
diff --git a/packages/ti/drv/ipc/examples/common/j784s4/linker_r5f_mcu1_0_btcm.lds b/packages/ti/drv/ipc/examples/common/j784s4/linker_r5f_mcu1_0_btcm.lds
index 839116424d2c6ed5b5c1371d2f8e5e746fca26fa..f8ba7fb167e84ae512fee576ed62f70f8853f349 100755 (executable)
/* J784S4 MSMC3 locations */
/* J784S4 Reserved Memory for ARM Trusted Firmware */
- MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x40000 /* 256KB */
- MSMC3 (RWIX) : origin=0x70040000 length=0x3B0000 /* 4MB - 320KB */
+ MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x20000 /* 128KB */
+ MSMC3 (RWIX) : origin=0x70020000 length=0x7D0000 /* 8MB - 192KB */
/* J784S4 Reserved Memory for DMSC Firmware */
- MSMC3_DMSC_FW (RWIX) : origin=0x703F0000 length=0x10000 /* 64KB */
+ MSMC3_DMSC_FW (RWIX) : origin=0x707F0000 length=0x10000 /* 64KB */
DDR0_RESERVED (RWIX) : origin=0x80000000 length=0x20000000 /* 512MB */
MCU1_0_IPC_DATA (RWIX) : origin=DDR0_ALLOCATED_START length=0x00100000 /* 1MB */
diff --git a/packages/ti/drv/ipc/examples/common/j784s4/linker_r5f_mcu1_1.lds b/packages/ti/drv/ipc/examples/common/j784s4/linker_r5f_mcu1_1.lds
index 9f52a0a8d27cb729a680a856e3957b8845c35ba5..80f7fcfd994b178a1ff5d6267366e45bfc6876fc 100755 (executable)
/* J784S4 MSMC3 locations */
/* J784S4 Reserved Memory for ARM Trusted Firmware */
- MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x40000 /* 256KB */
- MSMC3 (RWIX) : origin=0x70040000 length=0x3B0000 /* 4MB - 320KB */
+ MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x20000 /* 128KB */
+ MSMC3 (RWIX) : origin=0x70020000 length=0x7D0000 /* 8MB - 192KB */
/* J784S4 Reserved Memory for DMSC Firmware */
- MSMC3_DMSC_FW (RWIX) : origin=0x703F0000 length=0x10000 /* 64KB */
+ MSMC3_DMSC_FW (RWIX) : origin=0x707F0000 length=0x10000 /* 64KB */
DDR0_RESERVED (RWIX) : origin=0x80000000 length=0x20000000 /* 512MB */
MCU1_0_IPC_DATA (RWIX) : origin=DDR0_ALLOCATED_START length=0x00100000 /* 1MB */
diff --git a/packages/ti/drv/ipc/examples/common/j784s4/linker_r5f_mcu2_0.lds b/packages/ti/drv/ipc/examples/common/j784s4/linker_r5f_mcu2_0.lds
index 1a6b2d1562c8674966dfa5d32ab3a2fabca4c87a..cd4707f4aa661d7c691ca70d496aba8c4f68e8dd 100755 (executable)
/* J784S4 MSMC3 locations */
/* J784S4 Reserved Memory for ARM Trusted Firmware */
- MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x40000 /* 256KB */
- MSMC3 (RWIX) : origin=0x70040000 length=0x3B0000 /* 4MB - 320KB */
+ MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x20000 /* 128KB */
+ MSMC3 (RWIX) : origin=0x70020000 length=0x7D0000 /* 8MB - 192KB */
/* J784S4 Reserved Memory for DMSC Firmware */
- MSMC3_DMSC_FW (RWIX) : origin=0x703F0000 length=0x10000 /* 64KB */
+ MSMC3_DMSC_FW (RWIX) : origin=0x707F0000 length=0x10000 /* 64KB */
DDR0_RESERVED (RWIX) : origin=0x80000000 length=0x20000000 /* 512MB */
MCU1_0_IPC_DATA (RWIX) : origin=DDR0_ALLOCATED_START length=0x00100000 /* 1MB */
diff --git a/packages/ti/drv/ipc/examples/common/j784s4/linker_r5f_mcu2_1.lds b/packages/ti/drv/ipc/examples/common/j784s4/linker_r5f_mcu2_1.lds
index 2176961bd89386b31ee63883e0b37ecd2a9f989f..180791c9148786b9551b584a8e19e21fa7b120bf 100755 (executable)
/* J784S4 MSMC3 locations */
/* J784S4 Reserved Memory for ARM Trusted Firmware */
- MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x40000 /* 256KB */
- MSMC3 (RWIX) : origin=0x70040000 length=0x3B0000 /* 4MB - 320KB */
+ MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x20000 /* 128KB */
+ MSMC3 (RWIX) : origin=0x70020000 length=0x7D0000 /* 8MB - 192KB */
/* J784S4 Reserved Memory for DMSC Firmware */
- MSMC3_DMSC_FW (RWIX) : origin=0x703F0000 length=0x10000 /* 64KB */
+ MSMC3_DMSC_FW (RWIX) : origin=0x707F0000 length=0x10000 /* 64KB */
DDR0_RESERVED (RWIX) : origin=0x80000000 length=0x20000000 /* 512MB */
MCU1_0_IPC_DATA (RWIX) : origin=DDR0_ALLOCATED_START length=0x00100000 /* 1MB */
diff --git a/packages/ti/drv/ipc/examples/common/j784s4/linker_r5f_mcu3_0.lds b/packages/ti/drv/ipc/examples/common/j784s4/linker_r5f_mcu3_0.lds
index a5a2878ea34bcafff1ea0cad6a5fd2ebe8d8fa3d..b8aa8365c7b21beac1a23396aee6baae62f6d7e2 100755 (executable)
/* J784S4 MSMC3 locations */
/* J784S4 Reserved Memory for ARM Trusted Firmware */
- MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x40000 /* 256KB */
- MSMC3 (RWIX) : origin=0x70040000 length=0x3B0000 /* 4MB - 320KB */
+ MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x20000 /* 128KB */
+ MSMC3 (RWIX) : origin=0x70020000 length=0x7D0000 /* 8MB - 192KB */
/* J784S4 Reserved Memory for DMSC Firmware */
- MSMC3_DMSC_FW (RWIX) : origin=0x703F0000 length=0x10000 /* 64KB */
+ MSMC3_DMSC_FW (RWIX) : origin=0x707F0000 length=0x10000 /* 64KB */
DDR0_RESERVED (RWIX) : origin=0x80000000 length=0x20000000 /* 512MB */
MCU1_0_IPC_DATA (RWIX) : origin=DDR0_ALLOCATED_START length=0x00100000 /* 1MB */
diff --git a/packages/ti/drv/ipc/examples/common/j784s4/linker_r5f_mcu3_1.lds b/packages/ti/drv/ipc/examples/common/j784s4/linker_r5f_mcu3_1.lds
index e66dfad952fd99352c3d9b1cb3f846a2eb862387..6d19a3d6b9b45bf8bd9d561f84c53e0cfcb9fe90 100755 (executable)
/* J784S4 MSMC3 locations */
/* J784S4 Reserved Memory for ARM Trusted Firmware */
- MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x40000 /* 256KB */
- MSMC3 (RWIX) : origin=0x70040000 length=0x3B0000 /* 4MB - 320KB */
+ MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x20000 /* 128KB */
+ MSMC3 (RWIX) : origin=0x70020000 length=0x7D0000 /* 8MB - 192KB */
/* J784S4 Reserved Memory for DMSC Firmware */
- MSMC3_DMSC_FW (RWIX) : origin=0x703F0000 length=0x10000 /* 64KB */
+ MSMC3_DMSC_FW (RWIX) : origin=0x707F0000 length=0x10000 /* 64KB */
DDR0_RESERVED (RWIX) : origin=0x80000000 length=0x20000000 /* 512MB */
MCU1_0_IPC_DATA (RWIX) : origin=DDR0_ALLOCATED_START length=0x00100000 /* 1MB */
diff --git a/packages/ti/drv/ipc/examples/common/j784s4/linker_r5f_mcu4_0.lds b/packages/ti/drv/ipc/examples/common/j784s4/linker_r5f_mcu4_0.lds
index f1f8bb6cb9d1fde36f75fe6ab00101a8299c0c80..44d455ab512978d81a932e74a5b993e0f1279694 100755 (executable)
/* J784S4 MSMC3 locations */
/* J784S4 Reserved Memory for ARM Trusted Firmware */
- MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x40000 /* 256KB */
- MSMC3 (RWIX) : origin=0x70040000 length=0x3B0000 /* 4MB - 320KB */
+ MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x20000 /* 128KB */
+ MSMC3 (RWIX) : origin=0x70020000 length=0x7D0000 /* 8MB - 192KB */
/* J784S4 Reserved Memory for DMSC Firmware */
- MSMC3_DMSC_FW (RWIX) : origin=0x703F0000 length=0x10000 /* 64KB */
+ MSMC3_DMSC_FW (RWIX) : origin=0x707F0000 length=0x10000 /* 64KB */
DDR0_RESERVED (RWIX) : origin=0x80000000 length=0x20000000 /* 512MB */
MCU1_0_IPC_DATA (RWIX) : origin=DDR0_ALLOCATED_START length=0x00100000 /* 1MB */
diff --git a/packages/ti/drv/ipc/examples/common/j784s4/linker_r5f_mcu4_1.lds b/packages/ti/drv/ipc/examples/common/j784s4/linker_r5f_mcu4_1.lds
index e5f504cb2865dbd698b596b2db423593e8300cc6..84f49134afe283c5f1fca5de307e502630bf4c2e 100755 (executable)
/* J784S4 MSMC3 locations */
/* J784S4 Reserved Memory for ARM Trusted Firmware */
- MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x40000 /* 256KB */
- MSMC3 (RWIX) : origin=0x70040000 length=0x3B0000 /* 4MB - 320KB */
+ MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x20000 /* 128KB */
+ MSMC3 (RWIX) : origin=0x70020000 length=0x7D0000 /* 8MB - 192KB */
/* J784S4 Reserved Memory for DMSC Firmware */
- MSMC3_DMSC_FW (RWIX) : origin=0x703F0000 length=0x10000 /* 64KB */
+ MSMC3_DMSC_FW (RWIX) : origin=0x707F0000 length=0x10000 /* 64KB */
DDR0_RESERVED (RWIX) : origin=0x80000000 length=0x20000000 /* 512MB */
MCU1_0_IPC_DATA (RWIX) : origin=DDR0_ALLOCATED_START length=0x00100000 /* 1MB */
diff --git a/packages/ti/drv/ipc/examples/common/src/r5f_mpu_j7200_default.c b/packages/ti/drv/ipc/examples/common/src/r5f_mpu_j7200_default.c
index 01184eb09eeb8ad89a37a27ff7486295d3aeaa20..94fa964126c334d09f6def887ecd64a6f605625d 100644 (file)
.regionId = 3U,
.enable = 1U,
.baseAddr = 0x70000000,
-#if defined (SOC_J721E)
- .size = CSL_ARM_R5_MPU_REGION_SIZE_8MB,
-#else
- .size = CSL_ARM_R5_MPU_REGION_SIZE_2MB,
-#endif
+ .size = CSL_ARM_R5_MPU_REGION_SIZE_1MB,
.subRegionEnable = CSL_ARM_R5_MPU_SUB_REGION_ENABLE_ALL,
.exeNeverControl = 0U,
.accessPermission = CSL_ARM_R5_ACC_PERM_PRIV_USR_RD_WR,
diff --git a/packages/ti/drv/ipc/examples/common/src/r5f_mpu_j721e_default.c b/packages/ti/drv/ipc/examples/common/src/r5f_mpu_j721e_default.c
index 2344191de0185221d86f1e4109162b8c33f334df..48432e01b56ade6774992248b512fb41b89ca420 100644 (file)
.regionId = 3U,
.enable = 1U,
.baseAddr = 0x70000000,
-#if defined (SOC_J721E)
.size = CSL_ARM_R5_MPU_REGION_SIZE_8MB,
-#else
- .size = CSL_ARM_R5_MPU_REGION_SIZE_2MB,
-#endif
.subRegionEnable = CSL_ARM_R5_MPU_SUB_REGION_ENABLE_ALL,
.exeNeverControl = 0U,
.accessPermission = CSL_ARM_R5_ACC_PERM_PRIV_USR_RD_WR,
diff --git a/packages/ti/drv/ipc/examples/common/src/r5f_mpu_j721e_safertos.c b/packages/ti/drv/ipc/examples/common/src/r5f_mpu_j721e_safertos.c
index c9bb15b91c5ca99581968af1a71602f4751c6483..bc1e7e5ed916a79cdbf0469f24c731c79d25574c 100644 (file)
.ulSubRegionDisable = mpuREGION_ALL_SUB_REGIONS_ENABLED,
},
{
- /* Region 3 configuration: 2 MB MCMS3 RAM */
+ /* Region 3 configuration: 8 MB MCMS3 RAM */
/* ulRegionNumber */
.ulRegionNumber = 4U,
/* Starting address */
.ulcachePolicy = CSL_ARM_R5_CACHE_POLICY_WB_WA,
.ulmemAttr = 0U,
},
- /* Size is 2MB */
- .ulRegionSize = (2U * 1024U * 1024U),
-#if defined (SOC_J721E)
/* Size is 8MB */
.ulRegionSize = (8U * 1024U * 1024U),
-#else
- /* Size is 2MB */
- .ulRegionSize = (2U * 1024U * 1024U),
-#endif
/* ulSubRegionDisable */
.ulSubRegionDisable = mpuREGION_ALL_SUB_REGIONS_ENABLED,
},
diff --git a/packages/ti/drv/lpm/examples/lpm_example/overrides/j7200/mcu1_0/linker_r5_freertos.lds b/packages/ti/drv/lpm/examples/lpm_example/overrides/j7200/mcu1_0/linker_r5_freertos.lds
index 5f326b2a9459e3c817e393c63ee6b72ce23353e1..407e10e689b8dfae53ff252949bb2e653032e2b3 100644 (file)
*
*/
-/*----------------------------------------------------------------------------*/
-/* File: k3m4_r5f_linker.cmd */
-/* Description: */
-/* Link command file for j721e M4 MCU 0 view */
-/* TI ARM Compiler version 15.12.3 LTS or later */
-/* */
-/* Platform: QT */
-/* (c) Texas Instruments 2021, All rights reserved. */
-/*----------------------------------------------------------------------------*/
/* Linker Settings */
/* Standard linker options */
--retain="*(.bootCode)"
MCU0_R5F1_ATCM (RWIX) : origin=0x41400000 length=0x8000
MCU0_R5F1_BTCM (RWIX) : origin=0x41410000 length=0x8000
- /* j721e MCMS3 locations */
- /* j721e Reserved Memory for ARM Trusted Firmware */
- MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x40000 /* 256KB */
- MSMC3 (RWIX) : origin=0x70040000 length=0x7B0000 /* 8MB - 320KB */
- /* j721e Reserved Memory for DMSC Firmware */
- MSMC3_DMSC_FW (RWIX) : origin=0x707F0000 length=0x10000 /* 64KB */
+ /* j7200 MCMS3 locations */
+ /* j7200 Reserved Memory for ARM Trusted Firmware */
+ MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x20000 /* 128KB */
+ MSMC3 (RWIX) : origin=0x70020000 length=0xD0000 /* 1MB - 192KB */
+ /* j7200 Reserved Memory for DMSC Firmware */
+ MSMC3_DMSC_FW (RWIX) : origin=0x700F0000 length=0x10000 /* 64KB */
DDR0 (RWIX) : origin=0x80000000 length=0x8000000 /* 128MB */
diff --git a/packages/ti/drv/lpm/examples/lpm_example/overrides/j7200/mcu1_0/r5_mpu_freertos.c b/packages/ti/drv/lpm/examples/lpm_example/overrides/j7200/mcu1_0/r5_mpu_freertos.c
index 8c6829979adc819d1d818b5a700ec63286c9918f..17bcf08d4460ea7c0fe67f54bbdf017eb639f415 100644 (file)
.memAttr = 0U,
},
{
- /* Region 3 configuration: 8 MB MCMS3 RAM */
+ /* Region 3 configuration: 1 MB OCMC RAM */
.regionId = 4U,
.enable = 1U,
.baseAddr = 0x41C00000,
.memAttr = 0U,
},
{
- /* Region 3 configuration: 8 MB MCMS3 RAM */
+ /* Region 3 configuration: 1 MB MCMS3 RAM */
.regionId = 5U,
.enable = 1U,
.baseAddr = 0x70000000,
- .size = CSL_ARM_R5_MPU_REGION_SIZE_8MB,
+ .size = CSL_ARM_R5_MPU_REGION_SIZE_1MB,
.subRegionEnable = CSL_ARM_R5_MPU_SUB_REGION_ENABLE_ALL,
.exeNeverControl = 0U,
.accessPermission = CSL_ARM_R5_ACC_PERM_PRIV_USR_RD_WR,
/* Region 7 configuration: Ring Buffer uncached.... */
.regionId = 7U,
.enable = 1U,
- .baseAddr = 0xAA000000,
- .size = CSL_ARM_R5_MPU_REGION_SIZE_32MB,
+ .baseAddr = 0xA4000000,
+ .size = CSL_ARM_R5_MPU_REGION_SIZE_8MB,
.subRegionEnable = CSL_ARM_R5_MPU_SUB_REGION_ENABLE_ALL,
.exeNeverControl = 1U,
.accessPermission = CSL_ARM_R5_ACC_PERM_PRIV_USR_RD_WR,
.memAttr = 0U,
},
{
- //Region 8 configuration: Covers first 64MB of EVM Flash (FSS DAT0) *
+ /* Region 8 configuration: Covers first 64MB of EVM Flash (FSS DAT0) */
.regionId = 8U,
.enable = 1U,
.baseAddr = 0x50000000,
.memAttr = 0U,
},
{
- //Region 9 configuration: Covers last 128KB of EVM Flash (FSS DAT0) *
+ /* Region 9 configuration: Covers last 128KB of EVM Flash (FSS DAT0) */
/* OSPI PHY tuning algorithm which runs in DAC mode needs
* cache to be disabled for this section of FSS data region.
*/
diff --git a/packages/ti/drv/lpm/examples/lpm_example/overrides/j721e/mcu1_0/linker_r5_freertos.lds b/packages/ti/drv/lpm/examples/lpm_example/overrides/j721e/mcu1_0/linker_r5_freertos.lds
index 6b405e4c788d794ef64db83a0a94a2a85833fe95..c3f6cff373e4c51299d1068e12a142b3b667d084 100644 (file)
/* j721e MCMS3 locations */
/* j721e Reserved Memory for ARM Trusted Firmware */
- MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x40000 /* 256KB */
- MSMC3 (RWIX) : origin=0x70040000 length=0x7B0000 /* 8MB - 320KB */
+ MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x20000 /* 128KB */
+ MSMC3 (RWIX) : origin=0x70020000 length=0x7D0000 /* 8MB - 192KB */
/* j721e Reserved Memory for DMSC Firmware */
MSMC3_DMSC_FW (RWIX) : origin=0x707F0000 length=0x10000 /* 64KB */
diff --git a/packages/ti/drv/lpm/examples/lpm_example/overrides/j721e/mcu1_0/r5_mpu_freertos.c b/packages/ti/drv/lpm/examples/lpm_example/overrides/j721e/mcu1_0/r5_mpu_freertos.c
index 9bbb86d20ff80a4ec07578a0bce0355947d2fbeb..c8355cf519e0174439b2721e051560e6ae4757ea 100644 (file)
.memAttr = 0U,
},
{
- /* Region 3 configuration: 8 MB MCMS3 RAM */
+ /* Region 3 configuration: 1 MB OCMC RAM */
.regionId = 4U,
.enable = 1U,
.baseAddr = 0x41C00000,
.memAttr = 0U,
},
{
- //Region 8 configuration: Covers first 64MB of EVM Flash (FSS DAT0) *
+ /* Region 8 configuration: Covers first 64MB of EVM Flash (FSS DAT0) */
.regionId = 8U,
.enable = 1U,
.baseAddr = 0x50000000,
.memAttr = 0U,
},
{
- //Region 9 configuration: Covers last 128KB of EVM Flash (FSS DAT0) *
+ /* Region 9 configuration: Covers last 128KB of EVM Flash (FSS DAT0) */
/* OSPI PHY tuning algorithm which runs in DAC mode needs
* cache to be disabled for this section of FSS data region.
*/
diff --git a/packages/ti/drv/lpm/examples/lpm_io_retention/overrides/j7200/mcu1_0/linker_r5_freertos.lds b/packages/ti/drv/lpm/examples/lpm_io_retention/overrides/j7200/mcu1_0/linker_r5_freertos.lds
index bab0c5bfb4beca680e18ab2f046f8afdc19bc3ef..0197c1ae47ef69434b104a813a3600a43108a1fd 100755 (executable)
MCU0_R5F1_ATCM (RWIX) : origin=0x41400000 length=0x8000
MCU0_R5F1_BTCM (RWIX) : origin=0x41410000 length=0x8000
- /* j721e MCMS3 locations */
- /* j721e Reserved Memory for ARM Trusted Firmware */
- MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x40000 /* 256KB */
- MSMC3 (RWIX) : origin=0x70040000 length=0x7B0000 /* 8MB - 320KB */
- /* j721e Reserved Memory for DMSC Firmware */
- MSMC3_DMSC_FW (RWIX) : origin=0x707F0000 length=0x10000 /* 64KB */
+ /* j7200 MCMS3 locations */
+ /* j7200 Reserved Memory for ARM Trusted Firmware */
+ MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x20000 /* 128KB */
+ MSMC3 (RWIX) : origin=0x70020000 length=0xD0000 /* 1MB - 192KB */
+ /* j7200 Reserved Memory for DMSC Firmware */
+ MSMC3_DMSC_FW (RWIX) : origin=0x700F0000 length=0x10000 /* 64KB */
DDR0 (RWIX) : origin=0x80000000 length=0x8000000 /* 128MB */
diff --git a/packages/ti/drv/lpm/examples/lpm_io_retention/overrides/j7200/mcu1_0/r5_mpu_freertos.c b/packages/ti/drv/lpm/examples/lpm_io_retention/overrides/j7200/mcu1_0/r5_mpu_freertos.c
index 9bbb86d20ff80a4ec07578a0bce0355947d2fbeb..c6fbf73924332355386e554eb6d51f91b9c8d15b 100644 (file)
.memAttr = 0U,
},
{
- /* Region 3 configuration: 8 MB MCMS3 RAM */
+ /* Region 3 configuration: 1 MB OCMC RAM */
.regionId = 4U,
.enable = 1U,
.baseAddr = 0x41C00000,
.memAttr = 0U,
},
{
- /* Region 3 configuration: 8 MB MCMS3 RAM */
+ /* Region 3 configuration: 1 MB MCMS3 RAM */
.regionId = 5U,
.enable = 1U,
.baseAddr = 0x70000000,
- .size = CSL_ARM_R5_MPU_REGION_SIZE_8MB,
+ .size = CSL_ARM_R5_MPU_REGION_SIZE_1MB,
.subRegionEnable = CSL_ARM_R5_MPU_SUB_REGION_ENABLE_ALL,
.exeNeverControl = 0U,
.accessPermission = CSL_ARM_R5_ACC_PERM_PRIV_USR_RD_WR,
/* Region 7 configuration: Ring Buffer uncached.... */
.regionId = 7U,
.enable = 1U,
- .baseAddr = 0xAA000000,
- .size = CSL_ARM_R5_MPU_REGION_SIZE_32MB,
+ .baseAddr = 0xA4000000,
+ .size = CSL_ARM_R5_MPU_REGION_SIZE_8MB,
.subRegionEnable = CSL_ARM_R5_MPU_SUB_REGION_ENABLE_ALL,
.exeNeverControl = 1U,
.accessPermission = CSL_ARM_R5_ACC_PERM_PRIV_USR_RD_WR,
.memAttr = 0U,
},
{
- //Region 8 configuration: Covers first 64MB of EVM Flash (FSS DAT0) *
+ /* Region 8 configuration: Covers first 64MB of EVM Flash (FSS DAT0) */
.regionId = 8U,
.enable = 1U,
.baseAddr = 0x50000000,
.memAttr = 0U,
},
{
- //Region 9 configuration: Covers last 128KB of EVM Flash (FSS DAT0) *
+ /* Region 9 configuration: Covers last 128KB of EVM Flash (FSS DAT0) */
/* OSPI PHY tuning algorithm which runs in DAC mode needs
* cache to be disabled for this section of FSS data region.
*/
diff --git a/packages/ti/drv/spi/example/mcspi_slavemode/j7200/linker_mcu.lds b/packages/ti/drv/spi/example/mcspi_slavemode/j7200/linker_mcu.lds
index b5309c745d446ac236d649faa9029c977ed7b0ba..c5d4780a3c4e3e42ca15dfd2c3ab8a093f24cee5 100755 (executable)
/* j7200 MCMS3 locations */
/* j7200 Reserved Memory for ARM Trusted Firmware */
- MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x40000 /* 256KB */
- MSMC3 (RWIX) : origin=0x70040000 length=0xB0000 /* 1MB - 320KB */
+ MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x20000 /* 128KB */
+ MSMC3 (RWIX) : origin=0x70020000 length=0xD0000 /* 1MB - 192KB */
/* j7200 Reserved Memory for DMSC Firmware */
MSMC3_DMSC_FW (RWIX) : origin=0x700F0000 length=0x10000 /* 64KB */
diff --git a/packages/ti/drv/spi/example/mcspi_slavemode/j7200/linker_mcu_freertos.lds b/packages/ti/drv/spi/example/mcspi_slavemode/j7200/linker_mcu_freertos.lds
index 2de4adbbf16fc32055dbe1aa547dcb95d49e3322..0a0c40eae053c610baeffd8af60ddb900ecfd4a5 100644 (file)
/*========================J7200 MCMS3 LOCATIONS ===================*/
/*---------- J7200 Reserved Memory for ARM Trusted Firmware -------*/
- MSMC3_ARM_FW (RWIX) : ORIGIN = 0x70000000 LENGTH = 0x00040000 /* 256KB */
- MSMC3 (RWIX) : ORIGIN = 0x70040000 LENGTH = 0x000B0000 /* 1MB - 320KB */
+ MSMC3_ARM_FW (RWIX) : ORIGIN = 0x70000000 LENGTH = 0x00020000 /* 128KB */
+ MSMC3 (RWIX) : ORIGIN = 0x70020000 LENGTH = 0x000D0000 /* 1MB - 192KB */
/*------------- J7200 Reserved Memory for DMSC Firmware -----------*/
- MSMC3_DMSC_FW (RWIX) : ORIGIN = 0x707F0000 LENGTH = 0x00010000 /* 64KB */
+ MSMC3_DMSC_FW (RWIX) : ORIGIN = 0x700F0000 LENGTH = 0x00010000 /* 64KB */
/*======================= J7200 DDR LOCATION =======================*/
DDR0 (RWIX) : ORIGIN = 0x88000000 LENGTH = 0x8000000 /* 128 MB */
diff --git a/packages/ti/drv/spi/example/mcspi_slavemode/j721e/linker_mcu.lds b/packages/ti/drv/spi/example/mcspi_slavemode/j721e/linker_mcu.lds
index 32b38593e5a9dc946cdc2f803ec4819c3082c5fc..4764c5dd09d4a80db89d50f7a0d71b712490f02e 100755 (executable)
/* j721e MCMS3 locations */
/* j721e Reserved Memory for ARM Trusted Firmware */
- MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x40000 /* 256KB */
- MSMC3 (RWIX) : origin=0x70080000 length=0x770000
+ MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x20000 /* 128KB */
+ MSMC3 (RWIX) : origin=0x70020000 length=0x7D0000 /* 8MB - 192KB */
/* j721e Reserved Memory for DMSC Firmware */
MSMC3_DMSC_FW (RWIX) : origin=0x707F0000 length=0x10000 /* 64KB */
diff --git a/packages/ti/drv/spi/example/mcspi_slavemode/j721e/linker_mcu_freertos.lds b/packages/ti/drv/spi/example/mcspi_slavemode/j721e/linker_mcu_freertos.lds
index d109b8395c3c4470ff4bd03a4dcbd11cd3e59bfd..c899cfa7cc4379a5073301eb6e6948f925138792 100644 (file)
/*========================J721E MCMS3 LOCATIONS ===================*/
/*---------- J721E Reserved Memory for ARM Trusted Firmware -------*/
- MSMC3_ARM_FW (RWIX) : ORIGIN = 0x70000000 LENGTH = 0x00040000 /* 256KB */
- MSMC3 (RWIX) : ORIGIN = 0x70040000 LENGTH = 0x007B0000 /* 8MB - 320KB */
+ MSMC3_ARM_FW (RWIX) : ORIGIN = 0x70000000 LENGTH = 0x00020000 /* 128KB */
+ MSMC3 (RWIX) : ORIGIN = 0x70020000 LENGTH = 0x007D0000 /* 8MB - 192KB */
/*------------- J721E Reserved Memory for DMSC Firmware -----------*/
MSMC3_DMSC_FW (RWIX) : ORIGIN = 0x707F0000 LENGTH = 0x00010000 /* 64KB */
diff --git a/packages/ti/drv/spi/example/mcspi_slavemode/j721s2/linker_mcu.lds b/packages/ti/drv/spi/example/mcspi_slavemode/j721s2/linker_mcu.lds
index ed2dbffd9843b5822b348b7e03b33b8964075d32..a6ccc5a38d7ccb5d66595ea8282976a4aacaee48 100644 (file)
/* j721s2 MCMS3 locations */
/* j721s2 Reserved Memory for ARM Trusted Firmware */
- MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x40000 /* 256KB */
- MSMC3 (RWIX) : origin=0x70040000 length=0x3B0000 /* 4MB - 320KB */
+ MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x20000 /* 128KB */
+ MSMC3 (RWIX) : origin=0x70020000 length=0x3D0000 /* 4MB - 192KB */
/* j721s2 Reserved Memory for DMSC Firmware */
MSMC3_DMSC_FW (RWIX) : origin=0x703F0000 length=0x10000 /* 64KB */
diff --git a/packages/ti/drv/spi/example/mcspi_slavemode/j721s2/linker_mcu_freertos.lds b/packages/ti/drv/spi/example/mcspi_slavemode/j721s2/linker_mcu_freertos.lds
index 4cf7c19a859801c8f7772612da1ef8d9d69bb384..5138f5870f83cd6f080e15d0fd6bbbbdd6666377 100644 (file)
/*========================J721S2 MCMS3 LOCATIONS ===================*/
/*---------- J721S2 Reserved Memory for ARM Trusted Firmware -------*/
- MSMC3_ARM_FW (RWIX) : ORIGIN = 0x70000000 LENGTH = 0x00040000 /* 256KB */
- MSMC3 (RWIX) : ORIGIN=0x70040000 LENGTH=0x3B0000 /* 4MB - 320KB */
+ MSMC3_ARM_FW (RWIX) : ORIGIN = 0x70000000 LENGTH = 0x00020000 /* 128KB */
+ MSMC3 (RWIX) : ORIGIN=0x70020000 LENGTH=0x3D0000 /* 4MB - 192KB */
/* j721s2 Reserved Memory for DMSC Firmware */
MSMC3_DMSC_FW (RWIX) : ORIGIN=0x703F0000 LENGTH=0x10000 /* 64KB */
diff --git a/packages/ti/drv/spi/example/mcspi_slavemode/j784s4/linker_mcu.lds b/packages/ti/drv/spi/example/mcspi_slavemode/j784s4/linker_mcu.lds
index 2b70e38049436659067ce13711e80a1f765c43ec..cfcb59c274d9a131a233d7d0e7d1ffbb0d26997d 100644 (file)
/* j784s4 MCMS3 locations */
/* j784s4 Reserved Memory for ARM Trusted Firmware */
- MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x40000 /* 256KB */
- MSMC3 (RWIX) : origin=0x70040000 length=0x3B0000 /* 4MB - 320KB */
+ MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x20000 /* 128KB */
+ MSMC3 (RWIX) : origin=0x70020000 length=0x7D0000 /* 8MB - 192KB */
/* j784s4 Reserved Memory for DMSC Firmware */
- MSMC3_DMSC_FW (RWIX) : origin=0x703F0000 length=0x10000 /* 64KB */
+ MSMC3_DMSC_FW (RWIX) : origin=0x707F0000 length=0x10000 /* 64KB */
DDR1 (RWIX) : origin=0x90000000 length=0x100 /* first 4 bytes will hold sync word */
DDR0 (RWIX) : origin=0x90000100 length=0x02000000 - 0x100
diff --git a/packages/ti/drv/spi/example/mcspi_slavemode/j784s4/linker_mcu_freertos.lds b/packages/ti/drv/spi/example/mcspi_slavemode/j784s4/linker_mcu_freertos.lds
index e3c382b414e787082548592f2376630b29648842..381919621923c1990791634c091e223df2340189 100644 (file)
/*========================J784S4 MCMS3 LOCATIONS ===================*/
/*---------- J784S4 Reserved Memory for ARM Trusted Firmware -------*/
- MSMC3_ARM_FW (RWIX) : ORIGIN = 0x70000000 LENGTH = 0x00040000 /* 256KB */
- MSMC3 (RWIX) : ORIGIN=0x70040000 LENGTH=0x3B0000 /* 4MB - 320KB */
+ MSMC3_ARM_FW (RWIX) : ORIGIN = 0x70000000 LENGTH = 0x00020000 /* 128KB */
+ MSMC3 (RWIX) : ORIGIN=0x70020000 LENGTH=0x7D0000 /* 8MB - 192KB */
/* j784s4 Reserved Memory for DMSC Firmware */
- MSMC3_DMSC_FW (RWIX) : ORIGIN=0x703F0000 LENGTH=0x10000 /* 64KB */
+ MSMC3_DMSC_FW (RWIX) : ORIGIN=0x707F0000 LENGTH=0x10000 /* 64KB */
/*======================= J784S4 DDR LOCATION =======================*/
DDR0 (RWIX) : ORIGIN = 0x88000000 LENGTH = 0x8000000 /* 128 MB */
diff --git a/packages/ti/drv/spi/test/ospi_flash/j7200/cached/mpu_config.c b/packages/ti/drv/spi/test/ospi_flash/j7200/cached/mpu_config.c
index 95688d031f9ed9ed9afda001d05f0cf875bd914b..fe569f57beb7214ae5c5232af66309af0fc79ba0 100755 (executable)
.memAttr = 0U,\r
},\r
{\r
- /* Region 2 configuration: 1MB KB MCU MSRAM */\r
+ /* Region 2 configuration: 1MB MCU MSRAM */\r
.regionId = 2U,\r
.enable = 1U,\r
.baseAddr = 0x41C00000,\r
.memAttr = 0U,\r
},\r
{\r
- //Region 7 configuration: Covers first 64MB of EVM Flash (FSS DAT0) *\r
+ /* Region 7 configuration: Covers first 64MB of EVM Flash (FSS DAT0) */\r
.regionId = 7U,\r
.enable = 1U,\r
.baseAddr = 0x50000000,\r
.memAttr = 0U,\r
},\r
{\r
- //Region 8 configuration (Cahched or Non-cached for PHY tuning data based on macro): Covers last 256KB of EVM Flash (FSS DAT0) *\r
+ /* Region 8 configuration (Cached or Non-cached for PHY tuning data based on macro): \r
+ * Covers last 256KB of EVM Flash (FSS DAT0) */\r
.regionId = 8U,\r
.enable = 1U,\r
.baseAddr = 0x53FC0000,\r
diff --git a/packages/ti/drv/spi/test/ospi_flash/j7200/non_cached/mpu_config.c b/packages/ti/drv/spi/test/ospi_flash/j7200/non_cached/mpu_config.c
index dc764fea78c6a139f121d49457b74c42a1c46788..dbe4d2278ad9444b101a98024fc69735aa0d9bb7 100755 (executable)
.memAttr = 0U,\r
},\r
{\r
- /* Region 2 configuration: 1MB KB MCU MSRAM */\r
+ /* Region 2 configuration: 1MB MCU MSRAM */\r
.regionId = 2U,\r
.enable = 1U,\r
.baseAddr = 0x41C00000,\r
diff --git a/packages/ti/drv/spi/test/ospi_flash/j721e/cached/mpu_config.c b/packages/ti/drv/spi/test/ospi_flash/j721e/cached/mpu_config.c
index 927405daf48a5871951675e88afd089d59e902ae..24b69aed06058d79715ec9da5cdff6ffb12f7ce0 100755 (executable)
.memAttr = 0U,\r
},\r
{\r
- /* Region 2 configuration: 1MB KB MCU MSRAM */\r
+ /* Region 2 configuration: 1MB MCU MSRAM */\r
.regionId = 2U,\r
.enable = 1U,\r
.baseAddr = 0x41C00000,\r
.memAttr = 0U,\r
},\r
{\r
- //Region 7 configuration: Covers first 64MB of EVM Flash (FSS DAT0) *\r
+ /* Region 7 configuration: Covers first 64MB of EVM Flash (FSS DAT0) */\r
.regionId = 7U,\r
.enable = 1U,\r
.baseAddr = 0x50000000,\r
.memAttr = 0U,\r
},\r
{\r
- //Region 8 configuration: Covers last 128KB of EVM Flash (FSS DAT0) *\r
+ /* Region 8 configuration: Covers last 128KB of EVM Flash (FSS DAT0) */\r
/* OSPI PHY tuning algorithm which runs in DAC mode needs\r
* cache to be disabled for this section of FSS data region.\r
*/\r
diff --git a/packages/ti/drv/spi/test/ospi_flash/j721e/cached/mpu_safertos_config.c b/packages/ti/drv/spi/test/ospi_flash/j721e/cached/mpu_safertos_config.c
index 7041c53e26a3e97aa3c6ed2de0d540424d8a504a..f8fb8381eea8dcbe794d5dc382adc1a4b7d79b60 100644 (file)
.ulSubRegionDisable = mpuREGION_ALL_SUB_REGIONS_ENABLED,
},
{
- /* Region 2 configuration: 1MB KB MCU MSRAM */
+ /* Region 2 configuration: 1MB MCU MSRAM */
/* ulRegionNumber */
.ulRegionNumber = 3U,
/* Starting address */
diff --git a/packages/ti/drv/spi/test/ospi_flash/j721e/non_cached/mpu_config.c b/packages/ti/drv/spi/test/ospi_flash/j721e/non_cached/mpu_config.c
index df35e1aa247007ea135f8b44353f89c08c0d3084..09342dfc5e10eb020d004b914bfe783e89da9481 100755 (executable)
.memAttr = 0U,\r
},\r
{\r
- /* Region 2 configuration: 1MB KB MCU MSRAM */\r
+ /* Region 2 configuration: 1MB MCU MSRAM */\r
.regionId = 2U,\r
.enable = 1U,\r
.baseAddr = 0x41C00000,\r
diff --git a/packages/ti/drv/spi/test/ospi_flash/j721e/non_cached/mpu_safertos_config.c b/packages/ti/drv/spi/test/ospi_flash/j721e/non_cached/mpu_safertos_config.c
index d9afa5b05ec095e6240aaf6fcfb6932bafecd35e..d0b1698d3777e4825836cdbad51b63ac20029329 100644 (file)
.ulSubRegionDisable = mpuREGION_ALL_SUB_REGIONS_ENABLED,
},
{
- /* Region 2 configuration: 1MB KB MCU MSRAM */
+ /* Region 2 configuration: 1MB MCU MSRAM */
/* ulRegionNumber */
.ulRegionNumber = 4U,
/* Starting address */
diff --git a/packages/ti/drv/spi/test/ospi_flash/j721s2/cached/mpu_config.c b/packages/ti/drv/spi/test/ospi_flash/j721s2/cached/mpu_config.c
index 5cfd92076e40dda2ed15d15a936f8578d5c9f250..9561040dc90a9eefef7f8547ddebf67b3c17fc0e 100644 (file)
.memAttr = 0U,\r
},\r
{\r
- /* Region 2 configuration: 1MB KB MCU MSRAM */\r
+ /* Region 2 configuration: 1MB MCU MSRAM */\r
.regionId = 2U,\r
.enable = 1U,\r
.baseAddr = 0x41C00000,\r
.memAttr = 0U,\r
},\r
{\r
- //Region 7 configuration: Covers first 32MB of EVM Flash (FSS DAT0) *\r
+ /* Region 7 configuration: Covers first 64MB of EVM Flash (FSS DAT0) */\r
.regionId = 7U,\r
.enable = 1U,\r
.baseAddr = 0x50000000,\r
.memAttr = 0U,\r
},\r
{\r
- //Region 8 configuration (Cahched or Non-cached for PHY tuning data based on macro): Covers last 256KB of EVM Flash (FSS DAT0) *\r
+ /* Region 8 configuration (Cached or Non-cached for PHY tuning data based on macro): \r
+ * Covers last 256KB of EVM Flash (FSS DAT0) */\r
.regionId = 8U,\r
.enable = 1U,\r
.baseAddr = 0x53FC0000,\r
diff --git a/packages/ti/drv/spi/test/ospi_flash/j721s2/non_cached/mpu_config.c b/packages/ti/drv/spi/test/ospi_flash/j721s2/non_cached/mpu_config.c
index ef5ac8882160f1a1911d7f0b4d33702ad037e797..ac00624d4abb19d2bd2e4d14c797a9ec4260d99e 100644 (file)
.memAttr = 0U,\r
},\r
{\r
- /* Region 2 configuration: 1MB KB MCU MSRAM */\r
+ /* Region 2 configuration: 1MB MCU MSRAM */\r
.regionId = 2U,\r
.enable = 1U,\r
.baseAddr = 0x41C00000,\r
diff --git a/packages/ti/drv/spi/test/ospi_flash/j784s4/cached/mpu_config.c b/packages/ti/drv/spi/test/ospi_flash/j784s4/cached/mpu_config.c
index 787a543091e09f2a053b86ce075d3d8ec32b27e9..d92c505623ca1c8dd3c5033cd845335de4b40722 100644 (file)
.memAttr = 0U,\r
},\r
{\r
- /* Region 2 configuration: 1MB KB MCU MSRAM */\r
+ /* Region 2 configuration: 1MB MCU MSRAM */\r
.regionId = 2U,\r
.enable = 1U,\r
.baseAddr = 0x41C00000,\r
.memAttr = 0U,\r
},\r
{\r
- /* Region 3 configuration: 4 MB MCMS3 RAM */\r
+ /* Region 3 configuration: 8 MB MCMS3 RAM */\r
.regionId = 3U,\r
.enable = 1U,\r
.baseAddr = 0x70000000,\r
- .size = CSL_ARM_R5_MPU_REGION_SIZE_4MB,\r
+ .size = CSL_ARM_R5_MPU_REGION_SIZE_8MB,\r
.subRegionEnable = CSL_ARM_R5_MPU_SUB_REGION_ENABLE_ALL,\r
.exeNeverControl = 0U,\r
.accessPermission = CSL_ARM_R5_ACC_PERM_PRIV_USR_RD_WR,\r
.memAttr = 0U,\r
},\r
{\r
- //Region 7 configuration: Covers first 32MB of EVM Flash (FSS DAT0) *\r
+ /* Region 7 configuration: Covers first 64MB of EVM Flash (FSS DAT0) */\r
.regionId = 7U,\r
.enable = 1U,\r
.baseAddr = 0x50000000,\r
.memAttr = 0U,\r
},\r
{\r
- //Region 8 configuration (Cahched or Non-cached for PHY tuning data based on macro): Covers last 256KB of EVM Flash (FSS DAT0) *\r
+ /* Region 8 configuration (Cached or Non-cached for PHY tuning data based on macro): \r
+ * Covers last 256KB of EVM Flash (FSS DAT0) */\r
.regionId = 8U,\r
.enable = 1U,\r
.baseAddr = 0x53FC0000,\r
diff --git a/packages/ti/drv/spi/test/ospi_flash/j784s4/non_cached/mpu_config.c b/packages/ti/drv/spi/test/ospi_flash/j784s4/non_cached/mpu_config.c
index f48fe8bb3de1c79f3168c7564f8557cbf67df6f5..da277655d946927eb8e7faa74e6edd98ae91c81e 100644 (file)
.memAttr = 0U,\r
},\r
{\r
- /* Region 2 configuration: 1MB KB MCU MSRAM */\r
+ /* Region 2 configuration: 1MB MCU MSRAM */\r
.regionId = 2U,\r
.enable = 1U,\r
.baseAddr = 0x41C00000,\r
.memAttr = 0U,\r
},\r
{\r
- /* Region 3 configuration: 4 MB MCMS3 RAM */\r
+ /* Region 3 configuration: 8 MB MCMS3 RAM */\r
.regionId = 3U,\r
.enable = 1U,\r
.baseAddr = 0x70000000,\r
- .size = CSL_ARM_R5_MPU_REGION_SIZE_4MB,\r
+ .size = CSL_ARM_R5_MPU_REGION_SIZE_8MB,\r
.subRegionEnable = CSL_ARM_R5_MPU_SUB_REGION_ENABLE_ALL,\r
.exeNeverControl = 0U,\r
.accessPermission = CSL_ARM_R5_ACC_PERM_PRIV_USR_RD_WR,\r
diff --git a/packages/ti/drv/udma/examples/udma_ospi_flash_test/baremetal/j7200/linker_r5.lds b/packages/ti/drv/udma/examples/udma_ospi_flash_test/baremetal/j7200/linker_r5.lds
index ac50f6aac7efc99a7d93feb660ece222b6c7e96d..5f7337ac65601517f29a9b5227e7cb292737548a 100755 (executable)
/* j7200 MCMS3 locations */
/* j7200 Reserved Memory for ARM Trusted Firmware */
- MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x40000 /* 256KB */
- MSMC3 (RWIX) : origin=0x70040000 length=0xB0000 /* 1MB - 320KB */
+ MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x20000 /* 128KB */
+ MSMC3 (RWIX) : origin=0x70020000 length=0xD0000 /* 1MB - 192KB */
/* j7200 Reserved Memory for DMSC Firmware */
MSMC3_DMSC_FW (RWIX) : origin=0x700F0000 length=0x10000 /* 64KB */
diff --git a/packages/ti/drv/udma/examples/udma_ospi_flash_test/baremetal/j721e/linker_r5.lds b/packages/ti/drv/udma/examples/udma_ospi_flash_test/baremetal/j721e/linker_r5.lds
index 9652e92041f816f3786edc39aee7d1749b3fbe09..3dab2a10b2ced7633a50e0f7a1bc14552d88c61b 100755 (executable)
/* j721e MCMS3 locations */
/* j721e Reserved Memory for ARM Trusted Firmware */
- MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x40000 /* 256KB */
- MSMC3 (RWIX) : origin=0x70040000 length=0x7B0000 /* 8MB - 320KB */
+ MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x20000 /* 128KB */
+ MSMC3 (RWIX) : origin=0x70020000 length=0x7D0000 /* 8MB - 192KB */
/* j721e Reserved Memory for DMSC Firmware */
MSMC3_DMSC_FW (RWIX) : origin=0x707F0000 length=0x10000 /* 64KB */
diff --git a/packages/ti/drv/udma/examples/udma_ospi_flash_test/baremetal/j721s2/linker_r5.lds b/packages/ti/drv/udma/examples/udma_ospi_flash_test/baremetal/j721s2/linker_r5.lds
index 1c23ea8cb55e40adf844c02950510470db968027..674d1dcd3113c3e268426375f6f38f186a93501c 100755 (executable)
/* j721s2 MCMS3 locations */
/* j721s2 Reserved Memory for ARM Trusted Firmware */
- MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x40000 /* 256KB */
- MSMC3 (RWIX) : origin=0x70040000 length=0x3B0000 /* 4MB - 320KB */
+ MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x20000 /* 128KB */
+ MSMC3 (RWIX) : origin=0x70020000 length=0x3D0000 /* 4MB - 192KB */
/* j721s2 Reserved Memory for DMSC Firmware */
MSMC3_DMSC_FW (RWIX) : origin=0x703F0000 length=0x10000 /* 64KB */
diff --git a/packages/ti/drv/udma/examples/udma_ospi_flash_test/baremetal/j784s4/linker_r5.lds b/packages/ti/drv/udma/examples/udma_ospi_flash_test/baremetal/j784s4/linker_r5.lds
index 5dc46bb81ea3e3d7bf2beb48cb3bbf0ccd168fd7..3f74bb6140126e84e6f3c31cf1ed1000a2b8ead3 100755 (executable)
/* j784s4 MCMS3 locations */
/* j784s4 Reserved Memory for ARM Trusted Firmware */
- MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x40000 /* 256KB */
- MSMC3 (RWIX) : origin=0x70040000 length=0x3B0000 /* 4MB - 320KB */
+ MSMC3_ARM_FW (RWIX) : origin=0x70000000 length=0x20000 /* 128KB */
+ MSMC3 (RWIX) : origin=0x70020000 length=0x7D0000 /* 8MB - 192KB */
/* j784s4 Reserved Memory for DMSC Firmware */
- MSMC3_DMSC_FW (RWIX) : origin=0x703F0000 length=0x10000 /* 64KB */
+ MSMC3_DMSC_FW (RWIX) : origin=0x707F0000 length=0x10000 /* 64KB */
DDR0 (RWIX) : origin=0x80000000 length=0x80000000 /* 2GB */
}
diff --git a/packages/ti/drv/usb/example/build/j721e/linker_a72.lds b/packages/ti/drv/usb/example/build/j721e/linker_a72.lds
index 67c9cf9bd4298246ad77aff46949003543a29992..9066ed744c60e142c8accadd33a35f2f625d992e 100755 (executable)
/* j721e MCMS3 locations */
/* j721e Reserved Memory for ARM Trusted Firmware */
- MSMC3_ARM_FW (RWIX) : ORIGIN = 0x000070000000, LENGTH = 0x40000 /* 256KB */
- BOOTVECTOR : ORIGIN = 0x000070040000, LENGTH = 0x1000 /* 4KB */
- BOOTVECTOR_EL3 : ORIGIN = 0x000070041000, LENGTH = 0x1000 /* 4KB */
- MSMC_MPU1 (RWX) : ORIGIN = 0x000070042000, LENGTH = 0x78E000 /* 7736 KB */
+ MSMC3_ARM_FW (RWIX) : ORIGIN = 0x000070000000, LENGTH = 0x20000 /* 128KB */
+ BOOTVECTOR : ORIGIN = 0x000070020000, LENGTH = 0x1000 /* 4KB */
+ BOOTVECTOR_EL3 : ORIGIN = 0x000070021000, LENGTH = 0x1000 /* 4KB */
+ MSMC_MPU1 (RWX) : ORIGIN = 0x000070022000, LENGTH = 0x7AE000 /* 7864 KB */
MSMC_NOCACHE (RWX) : ORIGIN = 0x0000707D0000, LENGTH = 0x20000 /* 128 KB */
/* j721e Reserved Memory for DMSC Firmware */
diff --git a/packages/ti/osal/src/safertos/SafeRTOS_mpu_r5f.c b/packages/ti/osal/src/safertos/SafeRTOS_mpu_r5f.c
index 567b16724e094ef60b69715ff17b4d26caaaec58..59d124f6eabcb1d571e595d57f46ec6e3ac445c6 100644 (file)
.ulSubRegionDisable = mpuREGION_ALL_SUB_REGIONS_ENABLED,
},
{
- /* Region 2 configuration: 1MB KB MCU MSRAM */
+ /* Region 2 configuration: 1MB MCU MSRAM */
/* ulRegionNumber */
.ulRegionNumber = 4U,
/* Starting address */
.ulSubRegionDisable = mpuREGION_ALL_SUB_REGIONS_ENABLED,
},
{
- /* Region 3 configuration: 2 MB MCMS3 RAM */
+ /* Region 3 configuration: MCMS3 RAM */
/* ulRegionNumber */
.ulRegionNumber = 5U,
/* Starting address */
.ulcachePolicy = CSL_ARM_R5_CACHE_POLICY_WB_WA,
.ulmemAttr = 0U,
},
- /* Size is 2MB */
- .ulRegionSize = (2U * 1024U * 1024U),
-#if defined (SOC_J721E)
+#if defined (SOC_J721E) || defined (SOC_J784S4)
/* Size is 8MB */
.ulRegionSize = (8U * 1024U * 1024U),
#endif
-
#if defined (SOC_J7200)
/* Size is 1MB */
.ulRegionSize = (1U * 1024U * 1024U),
#endif
-
-#if defined (SOC_J721S2) || defined (SOC_J784S4)
+#if defined (SOC_J721S2)
/* Size is 4MB */
.ulRegionSize = (4U * 1024U * 1024U),
#endif