[DSS App/Test][Bug Fix][PDK-6703][DSS Test]DSS Display RTOS Overlay4 and VP4 test is failing
- Issue:
- Re-compile and run the code for 'dss_display_testapp', change following parameters set 'DISP_APP_TEST_OVERLAY_VP_4' to '1'
- Root-Cause:
- Display was not support and reported FPS were 4x then expected
- This was happening due to wrong configuration of dpi3_clk_2x for VP4
- This should be 148.5 MHz for given fps and resolution, this was 600 MHz earlier
- Resolution:
- Configure clock for VP4 to required rate which is 148.5 MHz
Signed-off-by: Vivek Dhande <a0132295@ti.com>
- Issue:
- Re-compile and run the code for 'dss_display_testapp', change following parameters set 'DISP_APP_TEST_OVERLAY_VP_4' to '1'
- Root-Cause:
- Display was not support and reported FPS were 4x then expected
- This was happening due to wrong configuration of dpi3_clk_2x for VP4
- This should be 148.5 MHz for given fps and resolution, this was 600 MHz earlier
- Resolution:
- Configure clock for VP4 to required rate which is 148.5 MHz
Signed-off-by: Vivek Dhande <a0132295@ti.com>
PDK-6957: Board: Disabled app image generation for tpr12 Uniflash to avoid
build errors
build errors
PDK-6957: Board: Removed the delays added for debug in tpr12 board flash library
- Fix for C++ build errors
- Fix for C++ build errors
PDK-6938: Board: Updated buffer allocations for tpr12 uart diag stress test
PDK-6957: Board: Uniflash flash programmer validated on tpr12 evm
- Uniflash flash programmer is validated on tpr12 evm through jtag
to flash the images. RoM boot flow need to be verified with updated
flash device.
- Uniflash flash programmer is validated on tpr12 evm through jtag
to flash the images. RoM boot flow need to be verified with updated
flash device.
PDK-6963: Board: Update tpr12 evm board flash library
- Enabled support for both mmap and config mode transfers
- Moved the trp12 source to nor_qspi_v1.c to avoid multiple compiler flags
- Enabled support for both mmap and config mode transfers
- Moved the trp12 source to nor_qspi_v1.c to avoid multiple compiler flags
SBL: Version: version number update for PDK 7.1
Bumped up SBL version number to 01.00.10.00.
Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>
Bumped up SBL version number to 01.00.10.00.
Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>
PDK-8280: Add ipc_echo_testb to SBL combined.appimage
With HSM rearch, we require the "ipc_echo_testb" to be running
on MCU1_0, when booting the HLOS (Linux). It hosts the
sciserver on MCU1_0 as well as sets up for IPC communication
with Linux.
Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>
With HSM rearch, we require the "ipc_echo_testb" to be running
on MCU1_0, when booting the HLOS (Linux). It hosts the
sciserver on MCU1_0 as well as sets up for IPC communication
with Linux.
Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>
ti/drv/uart: SCI bug fixes and UART test enhancements
tpr12/soc: MSS domain: add DSS SCI instance
uartsci.c: fix the following two bugs
- UartSci_write: need to wait for TxFree prior to the first ch write
- UartSci_close: Wait for Tx empty to ensure all pending transmission
are completed
Uart test: TPR12: UART_RX_LOOPBAK_ONLY valid for SIM_BUILD only
TPR12: Verify DSS UART instance at R5F
Increase UART_TEST_TIMEOUT to 10 seconds to be consistent
with test description
Replace sizeof(const string array) to strlen(const string array)
to provide the accurate length for UART_write()
Add cache alignments to all output buffers
restrict the Tx profile test for QT only because the test requires
CCS console output and the baudrate does not match th eone at the terminal
UART build: add tpr12_qt
Signed-off-by: Eric Ruei <e-ruei1@ti.com>
tpr12/soc: MSS domain: add DSS SCI instance
uartsci.c: fix the following two bugs
- UartSci_write: need to wait for TxFree prior to the first ch write
- UartSci_close: Wait for Tx empty to ensure all pending transmission
are completed
Uart test: TPR12: UART_RX_LOOPBAK_ONLY valid for SIM_BUILD only
TPR12: Verify DSS UART instance at R5F
Increase UART_TEST_TIMEOUT to 10 seconds to be consistent
with test description
Replace sizeof(const string array) to strlen(const string array)
to provide the accurate length for UART_write()
Add cache alignments to all output buffers
restrict the Tx profile test for QT only because the test requires
CCS console output and the baudrate does not match th eone at the terminal
UART build: add tpr12_qt
Signed-off-by: Eric Ruei <e-ruei1@ti.com>
j721e: Include Header changes for consistency to SYSFW headers
Fixes to make the header macros the same as what SYSFW is generating
Fixes: PDK-6980
Signed-off-by: Piyali Goswami <piyali_g@ti.com>
Fixes to make the header macros the same as what SYSFW is generating
Fixes: PDK-6980
Signed-off-by: Piyali Goswami <piyali_g@ti.com>
J7200: Updates to the macro names
Updates to the macro names for J7200 device
Fixes: PDK-6980
Signed-off-by: Piyali Goswami <piyali_g@ti.com>
Updates to the macro names for J7200 device
Fixes: PDK-6980
Signed-off-by: Piyali Goswami <piyali_g@ti.com>
sciserver_testapp: Update to prebuilt applications
Updates to the prebuilt applications for sciserver.
Signed-off-by: Piyali Goswami <piyali_g@ti.com>
Updates to the prebuilt applications for sciserver.
Signed-off-by: Piyali Goswami <piyali_g@ti.com>
PDK-8280: Board/SBL: Fix board_diag_framework build issues
Added proper dependencies for board_diag_framework builds
after updates to sbl_rprc.c were done.
Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>
Added proper dependencies for board_diag_framework builds
after updates to sbl_rprc.c were done.
Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>
firmwareHeaderGen.sh: Update to the firmware gen to generate the correct size of enc images
Fixes to the firmwareHeaderGen.sh to have correct size of enc images
Signed-off-by: Piyali Goswami <piyali_g@ti.com>
Fixes to the firmwareHeaderGen.sh to have correct size of enc images
Signed-off-by: Piyali Goswami <piyali_g@ti.com>
sciclient_ut_main.c: Update to the unit test to make the UT pass
Updates to the Sciclient_ut_main.c for the unit test to pass
Signed-off-by: Piyali Goswami <piyali_g@ti.com>
Updates to the Sciclient_ut_main.c for the unit test to pass
Signed-off-by: Piyali Goswami <piyali_g@ti.com>
PDK-8311: Revert "[PDK-8145] Board: J721E DDR: Check-in Latest DDR Configuration Revision: 0.5.0"
This reverts commit a99fc8cf56cdacea573cd97268175179095676e8.
This DDR config change was causing multiple DDR memory access failures
on the J721E EVM. Reverting this to go back to the original working
DDR config.
Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>
This reverts commit a99fc8cf56cdacea573cd97268175179095676e8.
This DDR config change was causing multiple DDR memory access failures
on the J721E EVM. Reverting this to go back to the original working
DDR config.
Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>
PDK-6815 : Updated icss examples not use ocmc thats reserved
Signed-off-by: sujith <sujith.s@ti.com>
Signed-off-by: sujith <sujith.s@ti.com>
PDK-6815 : Board Diagnositc : Updated to not use reserved space in OCMC
Signed-off-by: sujith <sujith.s@ti.com>
Signed-off-by: sujith <sujith.s@ti.com>
PDK-8280: Remove extra SBL prints causing boot problems
For LOG_LEVEL=3, too many prints were causing boot problems
when coordinating sciserver loading on MCU1_0.
Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>
For LOG_LEVEL=3, too many prints were causing boot problems
when coordinating sciserver loading on MCU1_0.
Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>
PDK-8280: SBL: Add cache flushing to boot Linux images
Added cache flushing to ensure larger images like ATF &
Linux are getting pushed all the way out to memory.
Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>
Added cache flushing to ensure larger images like ATF &
Linux are getting pushed all the way out to memory.
Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>
PDK-7640: SBL: J7200: Give back OSPI_0 clock for booting HLOS
Enables release of TISCI_DEV_MCU_FSS0_OSPI_0 clock/device
for J7200, similar to J721E.
Allows HLOS in MAIN domain to take control of the OSPI flash
interface.
Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>
Enables release of TISCI_DEV_MCU_FSS0_OSPI_0 clock/device
for J7200, similar to J721E.
Allows HLOS in MAIN domain to take control of the OSPI flash
interface.
Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>
PDK-6815 : Updated SDR test to not load anything into ATCM
Signed-off-by: sujith <sujith.s@ti.com>
Signed-off-by: sujith <sujith.s@ti.com>
PDK-6815: IPC: Update AM65xx Linker Files
Updated the linker files for SBL booting to not use
ATCM.
Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
Updated the linker files for SBL booting to not use
ATCM.
Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
PDK-6815 : Updated UDMA Ut linker
Tested udma_unit_testapp on mcu 10 with SBL from 21Oct2020
Signed-off-by: sujith <sujith.s@ti.com>
Tested udma_unit_testapp on mcu 10 with SBL from 21Oct2020
Signed-off-by: sujith <sujith.s@ti.com>
PDK-6815 : AM65xx Linker command file update
Signed-off-by: sujith <sujith.s@ti.com>
Signed-off-by: sujith <sujith.s@ti.com>
Sciclient_rtos_app: Updated the last prints so that automation can check pass or fail
Fixes: PDK-7944 Updates to the last printf. Automation will use this for checking pass or fail.
Signed-off-by: Piyali Goswami <piyali_g@ti.com>
Fixes: PDK-7944 Updates to the last printf. Automation will use this for checking pass or fail.
Signed-off-by: Piyali Goswami <piyali_g@ti.com>
Board: Updated tpr12 evm Ethernet configurations
enet lld porting - Updates for mac port macros
Signed-off-by: Prasad Jondhale <prasad.jondhale@ti.com>
Signed-off-by: Prasad Jondhale <prasad.jondhale@ti.com>
Fix SBL build fix for J721E
- Reduce abort handler stack sizes
Signed-off-by: Sivaraj R <sivaraj@ti.com>
- Reduce abort handler stack sizes
Signed-off-by: Sivaraj R <sivaraj@ti.com>
[PDK-8301] UDMA Examples :Update UDMA OSPI Example to use TR Reload Feature
- Use TR Reolad feature with SW Trigger to repeat the transfer from the origin
- TR Reload Count set to 0x1FFU for perpetual lool
- Teardown channel after UDMA_TEST_XFER_REPEAT_CNT no.of transfers to exit from the loop
- Along with minor update to make UDMA_TEST_WRITE_CHUNK_SIZE logic generic
Signed-off-by: Don Dominic <a0486429@ti.com>
- Use TR Reolad feature with SW Trigger to repeat the transfer from the origin
- TR Reload Count set to 0x1FFU for perpetual lool
- Teardown channel after UDMA_TEST_XFER_REPEAT_CNT no.of transfers to exit from the loop
- Along with minor update to make UDMA_TEST_WRITE_CHUNK_SIZE logic generic
Signed-off-by: Don Dominic <a0486429@ti.com>
sciserver: forward non-rm/pm message to TIFS
If the message type is not RM/PM, then it needs to be forwarded to TIFS.
The full message size is sent/received from TIFS because we do not parse
the message type to identify the actual message size.
This should resolve the issue where Processor Control messages are
dropped.
Fixes: PDK-8299 #integrate-and-build
Signed-off-by: Sheng Zhao <shengzhao@ti.com>
If the message type is not RM/PM, then it needs to be forwarded to TIFS.
The full message size is sent/received from TIFS because we do not parse
the message type to identify the actual message size.
This should resolve the issue where Processor Control messages are
dropped.
Fixes: PDK-8299 #integrate-and-build
Signed-off-by: Sheng Zhao <shengzhao@ti.com>
PDK-8302: IPC: Test: Update Sciserver task priorities
The Sciserver has a low priority and a high priority task
for handling messages. Linux uses the low priority queue
for its requests. After booting, the IPC ping/pong
messaging in this test can delay processing
of low priority queue messages if the IPC tasks are
running at a higher priority than the Sciserver's low
priority queue.
To fix the issue in the test, even the Sciserver low
priority task should be of higher priority than the
IPC ping/pong tasks.
Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
The Sciserver has a low priority and a high priority task
for handling messages. Linux uses the low priority queue
for its requests. After booting, the IPC ping/pong
messaging in this test can delay processing
of low priority queue messages if the IPC tasks are
running at a higher priority than the Sciserver's low
priority queue.
To fix the issue in the test, even the Sciserver low
priority task should be of higher priority than the
IPC ping/pong tasks.
Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
[K3_OPEN_SI-214] Work around for DRU hang issue
Signed-off-by: Anshu Jain <anshu.jain@ti.com>
Signed-off-by: Anshu Jain <anshu.jain@ti.com>
enable appimage generation for mcspi testcases
- Enable appimage generation even if they are multi core testcases
- TODO: Add another target to create the combined appimage using the
generated rprc file.
Signed-off-by: Prasad Konnur <prasadkonnur@ti.com>
- Enable appimage generation even if they are multi core testcases
- TODO: Add another target to create the combined appimage using the
generated rprc file.
Signed-off-by: Prasad Konnur <prasadkonnur@ti.com>
[PDK-8298] J721E RM : Update MCU NAVSS Channel/Ring Resources Range
- UDMA memcpy on mcu1_0 with TX/RX Ch 5 is not functional in SBL mode.
- Transfer happens but TR Response doesn't get updated, CQ Ring OCC remains 0 and nothing is returned back to Completion Queue Ring Mem.
- This workaround/update is start the reservation of Block Copy Channels for mcu1_0 from 6 (instead of 5)
- For this, the no.of block copy channels for mpu1_0 is increased by 1
- As a result of this the start of Channels/rings for all other cores gets added by 1 and no. of resources with HOST_ID_ALL get reduced by 1
- Rebuilt sciclient_boardCfg, sciclient_boardCfg for HS, sciclient_ccs_init
Signed-off-by: Don Dominic <a0486429@ti.com>
- UDMA memcpy on mcu1_0 with TX/RX Ch 5 is not functional in SBL mode.
- Transfer happens but TR Response doesn't get updated, CQ Ring OCC remains 0 and nothing is returned back to Completion Queue Ring Mem.
- This workaround/update is start the reservation of Block Copy Channels for mcu1_0 from 6 (instead of 5)
- For this, the no.of block copy channels for mpu1_0 is increased by 1
- As a result of this the start of Channels/rings for all other cores gets added by 1 and no. of resources with HOST_ID_ALL get reduced by 1
- Rebuilt sciclient_boardCfg, sciclient_boardCfg for HS, sciclient_ccs_init
Signed-off-by: Don Dominic <a0486429@ti.com>
Revert "sciclient: Send RM boardcfg to TIFS prior to handling locally"
This reverts commit 9016912d9385979d20d6a79cab9ec346cd324a49.
This reverts commit 9016912d9385979d20d6a79cab9ec346cd324a49.
sysfw_migrate.sh: Added an option to skip reset
Added an option to skip reset and rebase of the PDK during sysfw_migrate.sh
Fixes: PDK-8108
Signed-off-by: Piyali Goswami <piyali_g@ti.com>
Added an option to skip reset and rebase of the PDK during sysfw_migrate.sh
Fixes: PDK-8108
Signed-off-by: Piyali Goswami <piyali_g@ti.com>
Make separate top level file for ECC AGGR SOC File
Signed-off-by: Sivaraj R <sivaraj@ti.com>
Signed-off-by: Sivaraj R <sivaraj@ti.com>
[SCISERVER] Updated with deinit functino prototype
Signed-off-by: Shyam Jagannathan <a0393891@ti.com>
Signed-off-by: Shyam Jagannathan <a0393891@ti.com>
Add serdes diag to git ignore
Signed-off-by: Sivaraj R <sivaraj@ti.com>
Signed-off-by: Sivaraj R <sivaraj@ti.com>
sciclient: Send RM boardcfg to TIFS prior to handling locally
For HSM case, the RM board configuration must be sent
to TIFS on the M3 then to DM running locally on the
MCU R5F. Update sciclient_direct.c to route the RM
board configuration properly.
Signed-off-by: Justin Sobota <jsobota@ti.com>
For HSM case, the RM board configuration must be sent
to TIFS on the M3 then to DM running locally on the
MCU R5F. Update sciclient_direct.c to route the RM
board configuration properly.
Signed-off-by: Justin Sobota <jsobota@ti.com>
sciclient: Add abi check as part of the sciclient_init
Added ABI check as part of Sciclient_init
Fixes: PRSDK-8404
Signed-off-by: Piyali Goswami <piyali_g@ti.com>
Added ABI check as part of Sciclient_init
Fixes: PRSDK-8404
Signed-off-by: Piyali Goswami <piyali_g@ti.com>
PDK-8280: J7200/J721E: Undo SBL interleaved boot for HLOS boot
Give more time for sciserver app to start on mcu1_0 by
reverting back to booting cores towards the end of the SBL,
only when enabling HLOS boot.
Ensures that HLOS will not be started much before the
sciserver app (on Cortex-A cores).
Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>
Give more time for sciserver app to start on mcu1_0 by
reverting back to booting cores towards the end of the SBL,
only when enabling HLOS boot.
Ensures that HLOS will not be started much before the
sciserver app (on Cortex-A cores).
Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>
J721E: sciclient/sbl: BoardCfg_RM cleanup
Go back to single BoardCfg_RM for J721E, since the "default" and
"linux" versions are now the same.
Reduces confusion with BoardCfg_RM handling code in the SBL.
Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>
Go back to single BoardCfg_RM for J721E, since the "default" and
"linux" versions are now the same.
Reduces confusion with BoardCfg_RM handling code in the SBL.
Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>
sciserver: add TISCI_MSG_SYS_RESET to forward message
Add TISCI_MSG_SYS_RESET to the sciserver's list of forward messages and
sciclient's list of pm messages
Signed-off-by: Sheng Zhao <shengzhao@ti.com>
Add TISCI_MSG_SYS_RESET to the sciserver's list of forward messages and
sciclient's list of pm messages
Signed-off-by: Sheng Zhao <shengzhao@ti.com>
sciclient: bin2c.exe: Fix for pre-build bin2c.exe for windows build
Fix the pre-built bin2c.exe to work on windows.
Fixes: PRSDK-8736
Signed-off-by: Piyali Goswami <piyali_g@ti.com>
Fix the pre-built bin2c.exe to work on windows.
Fixes: PRSDK-8736
Signed-off-by: Piyali Goswami <piyali_g@ti.com>
PDK-8189: Updated SBL CUST build to enable full MAIN domain
No longer using 'sbl_cust_img' builds for J721E/J7200 for
just MCU domain only startup. Need full MAIN domain startup as
well for some apps that use the CUST build (e.g., MCUSW Boot App)
and need MSMC and/or DDR memory to be available for appimage
loading.
Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>
No longer using 'sbl_cust_img' builds for J721E/J7200 for
just MCU domain only startup. Need full MAIN domain startup as
well for some apps that use the CUST build (e.g., MCUSW Boot App)
and need MSMC and/or DDR memory to be available for appimage
loading.
Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>
am64x: update BIOS and XDC version
Update BIOS and XDC version to for am64x.
+BIOS_VERSION=6_82_01_19
+XDC_VERSION=3_61_00_16_core
Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
Update BIOS and XDC version to for am64x.
+BIOS_VERSION=6_82_01_19
+XDC_VERSION=3_61_00_16_core
Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
enet lld porting - Updates for path and name fixes
Signed-off-by: Prasad Jondhale <prasad.jondhale@ti.com>
Signed-off-by: Prasad Jondhale <prasad.jondhale@ti.com>
Board: Fix am64x evm oled diagnostic build error
[PDK-8259] UDMA : Use Sciclient_rmRingCfg to reset ring in Udma_ringFlushRawLcdma
- Udma_ringFlushRawLcdma was using calling CSL API CSL_lcdma_ringaccResetRing which writes to Ring CFG's SIZE register to reset the ring.
- Since Ring CFG register is firewalled this was causing issues
- Therfore, use Sciclient_rmRingCfg to write to Ring CFG's BA_LO Register to reset a ring.
- This fixes issue in running UDMA examples on AM64x
Signed-off-by: Don Dominic <a0486429@ti.com>
- Udma_ringFlushRawLcdma was using calling CSL API CSL_lcdma_ringaccResetRing which writes to Ring CFG's SIZE register to reset the ring.
- Since Ring CFG register is firewalled this was causing issues
- Therfore, use Sciclient_rmRingCfg to write to Ring CFG's BA_LO Register to reset a ring.
- This fixes issue in running UDMA examples on AM64x
Signed-off-by: Don Dominic <a0486429@ti.com>
3 years agoPDK-8110: Board: Fix for sbl hang on j7200 evm while opening ospi flash in REL.CORESDK.07.01.00.24
PDK-8110: Board: Fix for sbl hang on j7200 evm while opening ospi flash in
single spi mode
single spi mode
PDK-8189: revert OSPI DMA usage, just for SBL CUST build
For J721E/J7200 SBL CUST build, keep the OSPI PHY disabled
and also the related DMA as well, using "SBL_USE_DMA=0".
NOTE: This is to allow all XIP testing to go through w/
minimal interference from PHY pipelining on the "CUST"
SBL builds.
Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>
For J721E/J7200 SBL CUST build, keep the OSPI PHY disabled
and also the related DMA as well, using "SBL_USE_DMA=0".
NOTE: This is to allow all XIP testing to go through w/
minimal interference from PHY pipelining on the "CUST"
SBL builds.
Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>
OSAL: nonos: rti timer: replace direct register accesses with CSL-FL functions
Signed-off-by: Eric Ruei <e-ruei1@ti.com>
Signed-off-by: Eric Ruei <e-ruei1@ti.com>
PDK-8215: SBL: Remove restriction to use Single SPI config
Allows compiling with OSPI "single SPI" mode for both
J7200 & J721E.
Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>
Allows compiling with OSPI "single SPI" mode for both
J7200 & J721E.
Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>
SBL: Linux boot: Updated Device-tree blob files
Updated DTB files for Linux boot, for J721E & J7200.
Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>
Updated DTB files for Linux boot, for J721E & J7200.
Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>
PDK-5107: Board: Enabled ADC diagnostic test for am64x evm
PDK-5152: Board: Enabled push button diagnostic test support for am64x evm
PDK-5151: Board: Enabled oled diagnostic test for am64x evm
PDK-5113: Board: Enabled boot switch diagnostic test for am64x evm
mibspi: Fix for tpr12 mibspi test build failure
Board: Fix for tpr12 board flash library c++ build errors
UDMA/Sciclient : Host Emulation Build Fix
- Add dummy API for Sciclient_rmGetResourceRange in host emulation mode.
- In Host Emulation mode, it is sufficent that we give some range.
So we are passing 0-4 as primary range and 5-9 as secondary range
which will work for most of the cases.
Signed-off-by: Don Dominic <a0486429@ti.com>
- Add dummy API for Sciclient_rmGetResourceRange in host emulation mode.
- In Host Emulation mode, it is sufficent that we give some range.
So we are passing 0-4 as primary range and 5-9 as secondary range
which will work for most of the cases.
Signed-off-by: Don Dominic <a0486429@ti.com>
Revert "PDK-6815 Move the reset vector to OCMC"
This reverts commit e2391766ca962fb174b9a27d155755fa6f4fa81f.
This reverts commit e2391766ca962fb174b9a27d155755fa6f4fa81f.
Revert "PDK-6815 : AM65xx Linker command file update"
This reverts commit 8348f3921f90e39d5ab0c9895dfe5d3d22c4f60c.
This reverts commit 8348f3921f90e39d5ab0c9895dfe5d3d22c4f60c.
PDK-8242: IPC: Tests: Add Second Test Endpoint for testing rpmsg_chrdev
Add a second endpoint named "rpmsg_chrdev" for testing the userspace
rpmsg_char library. This endpoint is used by the Linux userspace
test application. The behavior is the same as the existing "ping.pong"
endpoint. It will echo back the message that is received to the
sender.
Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
Add a second endpoint named "rpmsg_chrdev" for testing the userspace
rpmsg_char library. This endpoint is used by the Linux userspace
test application. The behavior is the same as the existing "ping.pong"
endpoint. It will echo back the message that is received to the
sender.
Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
makerules/component.mk : Updates in PDK_COMMON_COMP declaration
- Update the declration of PDK_COMMON_COMP based on platform
Signed-off-by: Don Dominic <a0486429@ti.com>
- Update the declration of PDK_COMMON_COMP based on platform
Signed-off-by: Don Dominic <a0486429@ti.com>
[PDK-8033] Revert UDMA Ch FIFO depth workaround for Bug SYSFW-4176/SYSFW-4180
- Revert the workaorund since SYSFW-4176/SYSFW-4180 is fixed on sysfw 2020.08
- This reverts commit 4516cd209cfb0d42531e80465559af3b2a0a9f56.
"[PRSDK-7872] UDMA: Leave TX CH FIFO Depth Reg with default reset value"
- Revert the workaorund since SYSFW-4176/SYSFW-4180 is fixed on sysfw 2020.08
- This reverts commit 4516cd209cfb0d42531e80465559af3b2a0a9f56.
"[PRSDK-7872] UDMA: Leave TX CH FIFO Depth Reg with default reset value"
pruss: Use a valid interrupt priority for hwi initialized from pruss
- Setting to 1 as R5F VIM support only 16 priority levels (0-15)
and SYSBIOS-1422 workaroundHwi priority is 0
Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>
- Setting to 1 as R5F VIM support only 16 priority levels (0-15)
and SYSBIOS-1422 workaroundHwi priority is 0
Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>
Disable multicore image gen for Diag example
- Multicore is not really generating multicore
images. Not sure why this was required
Signed-off-by: Sivaraj R <sivaraj@ti.com>
- Multicore is not really generating multicore
images. Not sure why this was required
Signed-off-by: Sivaraj R <sivaraj@ti.com>
PDK-8215: SBL: Update OSPI/Hyperflash layout of images
Bootloader image sizes are larger now, with the added code
for sciclient and rm_pm_hal, due to required HSM rearch.
SBL image size was going beyond its original allotted space
in the flash, so we have to update the flash locations to
the following now:
Location Image
-------- ------------------------
00_0000 SBL (tiboot3.bin)
08_0000 SYSFW (sysfw.bin)
10_0000 APP (*.appimage)
1C_0000 (optional) XIP boot test
This also allows us to align image locations with multiples
of 256KB sections in the flash for better flash arrangement.
Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>
Bootloader image sizes are larger now, with the added code
for sciclient and rm_pm_hal, due to required HSM rearch.
SBL image size was going beyond its original allotted space
in the flash, so we have to update the flash locations to
the following now:
Location Image
-------- ------------------------
00_0000 SBL (tiboot3.bin)
08_0000 SYSFW (sysfw.bin)
10_0000 APP (*.appimage)
1C_0000 (optional) XIP boot test
This also allows us to align image locations with multiples
of 256KB sections in the flash for better flash arrangement.
Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>
PDK-6815 : AM65xx Linker command file update
Aligned the memory segments with memory map
Minor clean up
Tested with sysbios udma memcopy example on mcu 10
Signed-off-by: sujith <sujith.s@ti.com>
Aligned the memory segments with memory map
Minor clean up
Tested with sysbios udma memcopy example on mcu 10
Signed-off-by: sujith <sujith.s@ti.com>
PDK-6815 Move the reset vector to OCMC
By default the sysbios entry point was set to ATCM, since the SBL
disables the ATCM now, moved the sysbios entry point to OCMC
Tested with udma memcopy example on AM65xx evm
Signed-off-by: sujith <sujith.s@ti.com>
By default the sysbios entry point was set to ATCM, since the SBL
disables the ATCM now, moved the sysbios entry point to OCMC
Tested with udma memcopy example on AM65xx evm
Signed-off-by: sujith <sujith.s@ti.com>
icss_emac: Make icss_emac initialization for AM64x uniform with AM65xx
- For some of the register initizlizations, (icss_version >= 0x201) is
being checked. For AM64x, the portion inside if condition is needed,
but icss_version is equal to 0x103. So adding one more condition in if
to handle this
Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>
- For some of the register initizlizations, (icss_version >= 0x201) is
being checked. For AM64x, the portion inside if condition is needed,
but icss_version is equal to 0x103. So adding one more condition in if
to handle this
Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>
PDK-6936: Board: Fix for pmic spi access failure on tpr12 evm
PDK-5044: Board: Updated push button diagnostic test to align with gpio lld implementation on tpr12
PDK-6960: Board: Updated calibration values for tpr12 evm current monitor test
PDK-6962: Board: Updated LED diagnostic test to align with gpio lld implementation on tpr12
PDK-5015: Board: Fix for tpr12 evm expansion header diagnostic test failure
- Updated the SPI transactions for proper communication with slave devices.
- Updated the SPI transactions for proper communication with slave devices.
PDK-6956: Board: Fix for qspi flash last sector access failure on tpr12 evm
PDK-6963: Board: Updated tpr12 evm board flash library
- This version of board flash library supports config mode operations
on tpr12.
- This version of board flash library supports config mode operations
on tpr12.
PDK-5419: Board: Enabled dsitx diagnostic test for j721e evm
AM64X Build Fix
PDK_COMMON_COMP for AM64X is needed for mcu2_0 and mcu2_1 as well.
Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
PDK_COMMON_COMP for AM64X is needed for mcu2_0 and mcu2_1 as well.
Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
3 years ago[PDK-8109] Board: AM64x DDR: Check-in Latest Stable DDR Configuration Revision: 0... REL.CORESDK.07.01.00.21
[PDK-8109] Board: AM64x DDR: Check-in Latest Stable DDR Configuration Revision: 0.5.0 (10_06_20)
- Update configuration to output from EMIF tool output
- DDR4 Frequency = 800MHz (1600MTs)
Signed-off-by: Don Dominic <a0486429@ti.com>
- Update configuration to output from EMIF tool output
- DDR4 Frequency = 800MHz (1600MTs)
Signed-off-by: Don Dominic <a0486429@ti.com>
sciclient: Remove ti-sci-firmware-j721e-hs-no-pm-rm.bin
This was erroneously committed by the migrate script
Signed-off-by: Stephen Molfetta <sjmolfetta@ti.com>
This was erroneously committed by the migrate script
Signed-off-by: Stephen Molfetta <sjmolfetta@ti.com>
Migrating to SYSFW version v2020.08-RC3
sciclient: update scripts for j721e-no-pm-rm-hs
Signed-off-by: Stephen Molfetta <sjmolfetta@ti.com>
Signed-off-by: Stephen Molfetta <sjmolfetta@ti.com>
PDK-8110: Board: Enabled single SPI mode support for j7200 ospi flash open
- Sbl leaves the OSPI flash in single SPI mode while switching to Linux
boot. Single SPI mode transition is failing on j7200 which is resolved by
this update.
- Sbl leaves the OSPI flash in single SPI mode while switching to Linux
boot. Single SPI mode transition is failing on j7200 which is resolved by
this update.
J7200 Build Fix
Signed-off-by: Sivaraj R <sivaraj@ti.com>
Signed-off-by: Sivaraj R <sivaraj@ti.com>
sbl_sci_client.c: Build Fix for AM64x
Build fix for AM64x for SBL
Signed-off-by: Piyali Goswami <piyali_g@ti.com>
Build fix for AM64x for SBL
Signed-off-by: Piyali Goswami <piyali_g@ti.com>
sciclient: the sciserver forwards on DM2DMSC_NOTIFY_RESP
To prevent deadlock between DM and TIFS, the TIFS now pends on an
interrupt from DM2DMSC queue. The DM2DMSC_NOTIFY_RESP queue is hijackedi
for the transmission from DM to TIFS. The return path from TIFS to DM
remains the same DM2DMSC response queue.
Signed-off-by: Sheng Zhao <shengzhao@ti.com>
To prevent deadlock between DM and TIFS, the TIFS now pends on an
interrupt from DM2DMSC queue. The DM2DMSC_NOTIFY_RESP queue is hijackedi
for the transmission from DM to TIFS. The return path from TIFS to DM
remains the same DM2DMSC response queue.
Signed-off-by: Sheng Zhao <shengzhao@ti.com>
UDMA Docs : Doxygen Build Fix
Signed-off-by: Don Dominic <a0486429@ti.com>
Signed-off-by: Don Dominic <a0486429@ti.com>
[PDK-6463][PDK-6796][PDK-5071] RM : BoardCfg for J721E and J7200 with multiple entries of same reource for Block Copy channels/rings
- Updated Sciclient_defaultBoardCfg for J721E and J7200 from latest of SysConfig Tool
- Multiple entry of same resource for Block Copy and Tx_only/Rx_only channels and rings
- First Entry is for Block Copy, and Second Entry is for Tx_onlt/Rx_only
- To maintin this order, Dummy entry with count=0 when no resource neeeded for Block Copy
- Along with minor updates in other resources related to latest sysfw
- Rebuilt sciclient_boardCfg, sciclient_boardCfg for HS, sciclient_ccs_init
Signed-off-by: Don Dominic <a0486429@ti.com>
- Updated Sciclient_defaultBoardCfg for J721E and J7200 from latest of SysConfig Tool
- Multiple entry of same resource for Block Copy and Tx_only/Rx_only channels and rings
- First Entry is for Block Copy, and Second Entry is for Tx_onlt/Rx_only
- To maintin this order, Dummy entry with count=0 when no resource neeeded for Block Copy
- Along with minor updates in other resources related to latest sysfw
- Rebuilt sciclient_boardCfg, sciclient_boardCfg for HS, sciclient_ccs_init
Signed-off-by: Don Dominic <a0486429@ti.com>
[PDK-5692] UDMA : Renamed /soc folders to SOC name instead of V0 V1 V2 V3
Signed-off-by: Don Dominic <a0486429@ti.com>
Signed-off-by: Don Dominic <a0486429@ti.com>
[PDK-7934] UDMA Example: Added example code block for overriding default UDMA RM Shared Resource params
- In udma_memcpy_testapp added example code block
for overriding default UDMA RM Shared Resource params
Signed-off-by: Don Dominic <a0486429@ti.com>
- In udma_memcpy_testapp added example code block
for overriding default UDMA RM Shared Resource params
Signed-off-by: Don Dominic <a0486429@ti.com>
[PDK-6463][PDK-6796][PDK-5071] UDMA: Simplify UDMA RM Configuration
* Implemented for J721E and J7200
* AM65XX and AM64X will be included later after aligning the defaultBoardCfg (This SOC's will continue using old approach of udma_rmcfg)
- Simplify RM Configuration by querying from defaultBoardCfg
- Using #Sciclient_rmGetResourceRange to populate #Udma_RmInitPrms
- Removes all hard-codings in udma_rmcfg.c
- Splits shared resources like GlobalEvents/VINTR/IR_INTR across MCU/MAIN NAVSS Instances (OR)
Splits MAIN NAVSS RX Free Flows assigned to #TISCI_HOST_ID_ALL across various cores
based on the prms in #Udma_RmSharedResPrms (UDMA RM Shared Resource parameters)
- User can override default UDMA RM Shared Resource parameters, using Udma_rmGetSharedResPrms API
- Moved UdmaRmInitPrms_init to 'udma_rmcfg_common.c' in 'soc' folder.
This API will return error, if it fails to init #Udma_RmInitPrms
Signed-off-by: Don Dominic <a0486429@ti.com>
* Implemented for J721E and J7200
* AM65XX and AM64X will be included later after aligning the defaultBoardCfg (This SOC's will continue using old approach of udma_rmcfg)
- Simplify RM Configuration by querying from defaultBoardCfg
- Using #Sciclient_rmGetResourceRange to populate #Udma_RmInitPrms
- Removes all hard-codings in udma_rmcfg.c
- Splits shared resources like GlobalEvents/VINTR/IR_INTR across MCU/MAIN NAVSS Instances (OR)
Splits MAIN NAVSS RX Free Flows assigned to #TISCI_HOST_ID_ALL across various cores
based on the prms in #Udma_RmSharedResPrms (UDMA RM Shared Resource parameters)
- User can override default UDMA RM Shared Resource parameters, using Udma_rmGetSharedResPrms API
- Moved UdmaRmInitPrms_init to 'udma_rmcfg_common.c' in 'soc' folder.
This API will return error, if it fails to init #Udma_RmInitPrms
Signed-off-by: Don Dominic <a0486429@ti.com>
Fix J721E SDR linker errors
Signed-off-by: Sivaraj R <sivaraj@ti.com>
Signed-off-by: Sivaraj R <sivaraj@ti.com>
Fix SCICLIENT package issue for AM64x
Signed-off-by: Sivaraj R <sivaraj@ti.com>
Signed-off-by: Sivaraj R <sivaraj@ti.com>
PDK-8180: IPC: AM64X: Use Mailbox_enableInterrupts to defer Interrupt Enablement
Currently, interrupts are enabled as soon as the Mailbox_open call
happens, before IPC LLD can set up all the needed callbacks for
the control endpoint. This can result in delayed messages as the
interrupt is needed to notify the IPC LLD to check the shared memory
for new messages.
Mailbox LLD provides an open-time option to request that interrupts
be enabled during open. IPC LLD now sets this to false in order
to be able to enable the interrupts at a later time. The ipc layer
which handles the support for Mailbox LLD is also updated to add
the interrupt enable/disable support which is already being called
from the IPC virtio layer.
Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
Currently, interrupts are enabled as soon as the Mailbox_open call
happens, before IPC LLD can set up all the needed callbacks for
the control endpoint. This can result in delayed messages as the
interrupt is needed to notify the IPC LLD to check the shared memory
for new messages.
Mailbox LLD provides an open-time option to request that interrupts
be enabled during open. IPC LLD now sets this to false in order
to be able to enable the interrupts at a later time. The ipc layer
which handles the support for Mailbox LLD is also updated to add
the interrupt enable/disable support which is already being called
from the IPC virtio layer.
Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
PDK-8180: Mailbox: Add new API for Enable/Disable Interrupts
In some use cases it is required for the application to be able
to delay enabling of the mailbox interrupts so that further
setup can be done before it starts handling the interrupts.
One such example is when IPC LLD uses Mailbox LLD, which needs
to perform some setup after opening the Mailbox handle.
To support this use case, the following APIs are added:
Mailbox_enableInterrupts
Mailbox_disableInterrupts
Also, the following new open-time param is added:
enableInterrupts
The value of enableInterrupts defaults to true so backward
compatibility is maintined.
Currently only AM64X is supporting this feature and new
APIs.
Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
In some use cases it is required for the application to be able
to delay enabling of the mailbox interrupts so that further
setup can be done before it starts handling the interrupts.
One such example is when IPC LLD uses Mailbox LLD, which needs
to perform some setup after opening the Mailbox handle.
To support this use case, the following APIs are added:
Mailbox_enableInterrupts
Mailbox_disableInterrupts
Also, the following new open-time param is added:
enableInterrupts
The value of enableInterrupts defaults to true so backward
compatibility is maintined.
Currently only AM64X is supporting this feature and new
APIs.
Signed-off-by: Angela Stegmaier <angelabaker@ti.com>