processor-sdk/pdk.git
6 months agofreertos: fix r5f pmu counter overflow
Badri S [Wed, 3 Mar 2021 09:01:24 +0000 (14:31 +0530)]
freertos: fix r5f pmu counter overflow

ensure we periodically check for PMU cycle
counter overflow so that we dont miss incrementing
overflow counter.

Signed-off-by: Badri S <badri@ti.com>
6 months agofreertos: disable interrupt preemption for r5
Badri S [Tue, 2 Mar 2021 11:50:19 +0000 (17:20 +0530)]
freertos: disable interrupt preemption for r5

Disable interrupt preemption for r5 until correct
interrupt preemption support

Signed-off-by: Badri S <badri@ti.com>
6 months agofreertos:c66x fixes to ensure csl_vect is not linked in
Badri S [Sun, 28 Feb 2021 03:37:51 +0000 (09:07 +0530)]
freertos:c66x fixes to ensure csl_vect is not linked in

ensure csl_vect is not wrongly linked in resulting in
interrupts not being serviced by freertos vecs

Signed-off-by: Badri S <badri@ti.com>
6 months agofreertos: remove dpl folder and move to port folder
Badri S [Sat, 27 Feb 2021 14:31:09 +0000 (20:01 +0530)]
freertos: remove dpl folder and move to port folder

remove dpl folder and move files under port folder
also make test folder freertos specific

Signed-off-by: Badri S <badri@ti.com>
6 months agofreertos: support for j721e,j7200,am65xx SoCs
Badri S [Sat, 27 Feb 2021 07:37:16 +0000 (13:07 +0530)]
freertos: support for j721e,j7200,am65xx SoCs

Support added for am65xx,j721e,am65xx SoCs
freertos lib made core specific instead of isa
so that freeRTOS config can include core specific
header file

Signed-off-by: Badri S <badri@ti.com>
6 months agofreertos: support for r5f core
Badri S [Sat, 27 Feb 2021 02:50:09 +0000 (08:20 +0530)]
freertos: support for r5f core

freertos support for r5f core ported from mcu_plus_sdk

Signed-off-by: Badri S <badri@ti.com>
6 months agofreertos: support for c66x core for freertos
Badri S [Tue, 16 Feb 2021 07:31:34 +0000 (13:01 +0530)]
freertos: support for c66x core for freertos

freertos c66x port support

Signed-off-by: Badri S <badri@ti.com>
6 months agoPDK-7013: Removes VTM workaround for J7ES PG1.1
Erick Narvaez [Tue, 23 Feb 2021 03:04:31 +0000 (21:04 -0600)]
PDK-7013: Removes VTM workaround for J7ES PG1.1

Removes default workaround flag for J7ES VTM.

Signed-off-by: Erick Narvaez <e-narvaez@ti.com>
6 months agoadded adcbuf driver for AWR294x SOC
KALYAN VAGVALA [Thu, 11 Feb 2021 16:48:42 +0000 (22:18 +0530)]
added adcbuf driver for AWR294x SOC

6 months agoOSPI: PHY tuning benchmarking
Aditya Wadhwa [Tue, 2 Mar 2021 19:13:40 +0000 (00:43 +0530)]
OSPI: PHY tuning benchmarking

- added a macro which can be enabled to get the logs of how much time the PHY tuning elapsed
- switched to UART prints

Signed-off-by: Aditya Wadhwa <a0485151@ti.com>
6 months agotimeSync: v2: Explicitly set no traffic class
Misael Lopez Cruz [Wed, 3 Mar 2021 08:21:51 +0000 (02:21 -0600)]
timeSync: v2: Explicitly set no traffic class

The newly added txPktTc field of the Enet DMA packet structure is used
for ICSSG but it's not applicable for CPSW.  Hence, it's explicitly set
to indicate that no traffic class is to be used.

Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
6 months agoPDK-9240:Board: Fix for DDR init hang issue on j721e evm during warm reset
M V Pratap Reddy [Thu, 4 Mar 2021 14:53:30 +0000 (20:23 +0530)]
PDK-9240:Board: Fix for DDR init hang issue on j721e evm during warm reset

 - DDR initialization is hanging during the warm reset which is caused
   by PLL bypass function. Need to unlock the PLL registers for access
   during the warm reset.

6 months agoPRSDK-8813: Board/USB: Updated AM65xx SerDes configurations
M V Pratap Reddy [Wed, 3 Mar 2021 05:15:30 +0000 (10:45 +0530)]
PRSDK-8813: Board/USB: Updated AM65xx SerDes configurations

 - CSL SerDes USB configurations are updated to fix enumeration failures.
   Updated the board library and USB driver to align with updated SerDes
   configurations.

6 months agoboard - Missing enum and fix include path
Prasad Jondhale [Sat, 27 Feb 2021 16:43:57 +0000 (22:13 +0530)]
board - Missing enum and fix include path

Signed-off-by: Prasad Jondhale <prasad.jondhale@ti.com>
6 months ago[PDK-9404] OSAL: Fix TIMERP_TIMER_FREQ_LO for J7200
Don Dominic [Tue, 2 Mar 2021 17:53:32 +0000 (23:23 +0530)]
[PDK-9404] OSAL: Fix TIMERP_TIMER_FREQ_LO  for J7200

- TIMERP_TIMER_FREQ_LO defined in osal_soc.h for J7200 is wrong.(25MHz)
- Input Crystal Frequency for j7200 is 19.2MHz and default Timer clk_sel 0(HFOSC0_CLKOUT) will be 19.2MHz

Signed-off-by: Don Dominic <a0486429@ti.com>
7 months ago[PDK-9315] Updating BIOS and XDC REL.CORESDK.07.03.00.13 REL.CORESDK.07.03.00.14 REL.CORESDK.07.03.00.15 REL.CORESDK.07.03.00.16 REL.CORESDK.07.03.01.03 REL.CORESDK.07.03.01.04 REL.CORESDK.07.03.01.05 REL.CORESDK.07.03.01.06
Ankur [Tue, 23 Feb 2021 17:58:13 +0000 (23:28 +0530)]
[PDK-9315] Updating BIOS and XDC

Signed-off-by: Ankur <a0132173@ti.com>
7 months ago[BugFix] PDK-8886: pdk_examples build fails on Windows
Prasad Konnur [Fri, 19 Feb 2021 13:45:02 +0000 (19:15 +0530)]
[BugFix] PDK-8886: pdk_examples build fails on Windows

 - armstrip or strip6x on windows is not able to delete the strip file
 if it already present.
 - $(RM) is set to rm -f so will not generate error if the file is not
 present.

Signed-off-by: Prasad Konnur <prasadkonnur@ti.com>
7 months agoadded build support for awr294x
Prasad Konnur [Thu, 18 Feb 2021 13:25:51 +0000 (18:55 +0530)]
added build support for awr294x

Signed-off-by: Prasad Konnur <prasadkonnur@ti.com>
7 months agoPDK-9337: Fix for Clocking on J7VCL to use fracf pll calibration REL.CORESDK.07.03.00.10 REL.CORESDK.07.03.00.11 REL.CORESDK.07.03.00.12 REL.CORESDK.07.03.01.02
Piyali Goswami [Thu, 18 Feb 2021 13:14:11 +0000 (18:44 +0530)]
PDK-9337: Fix for Clocking on J7VCL to use fracf pll calibration

Fix for clocking on J7VCL to use fracf pll calibration

Signed-off-by: Piyali Goswami <piyali_g@ti.com>
7 months agoosal: baremetal build fix for mcu1_1
Piyali Goswami [Thu, 18 Feb 2021 10:28:08 +0000 (15:58 +0530)]
osal: baremetal build fix for mcu1_1

OSAL baremetal build fix for mcu1_1

Signed-off-by: Piyali Goswami <piyali_g@ti.com>
7 months agoBuild Fix REL.CORESDK.07.03.00.09 REL.CORESDK.07.03.01.01
Ankur [Thu, 18 Feb 2021 09:01:14 +0000 (14:31 +0530)]
Build Fix

Signed-off-by: Ankur <a0132173@ti.com>
7 months ago[PDK-9328] OSPI: Binary search instead of linear search for PHY tuning window REL.CORESDK.07.03.00.08
Aditya Wadhwa [Mon, 15 Feb 2021 19:28:34 +0000 (00:58 +0530)]
[PDK-9328] OSPI: Binary search instead of linear search for PHY tuning window

- Previous implementation was a linear search algorithm
- Occassional failures observed
- Replaced by a binary search algorithm

Signed-off-by: Aditya Wadhwa <a0485151@ti.com>
7 months agoSPI packaging error fix REL.CORESDK.07.03.00.06 REL.CORESDK.07.03.00.07
Ankur [Tue, 16 Feb 2021 19:54:21 +0000 (01:24 +0530)]
SPI packaging error fix

Signed-off-by: Ankur <a0132173@ti.com>
7 months agoCGT update for C7x REL.CORESDK.07.03.00.05
Ankur [Tue, 16 Feb 2021 15:19:19 +0000 (20:49 +0530)]
CGT update for C7x

Signed-off-by: Ankur <a0132173@ti.com>
7 months agoRevert "[PDK-9315] Updating the BIOS version to 06.83.02.07"
Ankur [Tue, 16 Feb 2021 15:16:51 +0000 (20:46 +0530)]
Revert "[PDK-9315] Updating the BIOS version to 06.83.02.07"

This reverts commit dca947d3294daa19d842386afa038ef797e35e1b.

7 months agoRevert "updating XDC and C7x CGT tool version"
Ankur [Tue, 16 Feb 2021 15:16:45 +0000 (20:46 +0530)]
Revert "updating XDC and C7x CGT tool version"

This reverts commit e738709d0f9e45ac20b3092009ed41a49c2b2aea.

7 months agosciclient: docs: design: Update to add Domain reset information REL.CORESDK.07.03.00.02 REL.CORESDK.07.03.00.03 REL.CORESDK.07.03.00.04
Piyali Goswami [Fri, 12 Feb 2021 04:01:46 +0000 (09:31 +0530)]
sciclient: docs: design: Update to add Domain reset information

Doc update to add domain groups reset API information

Signed-off-by: Piyali Goswami <piyali_g@ti.com>
7 months agoSupport for Domain resets in Sciclient PM
Piyali Goswami [Thu, 11 Feb 2021 06:22:41 +0000 (11:52 +0530)]
Support for Domain resets in Sciclient PM

Support for Domain Resets in Sciclient PM

Fixes: PDK-9326

Signed-off-by: Piyali Goswami <piyali_g@ti.com>
7 months agoupdating XDC and C7x CGT tool version
ankur [Mon, 15 Feb 2021 09:20:19 +0000 (14:50 +0530)]
updating XDC and C7x CGT tool version

Signed-off-by: ankur <ankurbaranwal@ti.com>
7 months ago[PDK-9315] Updating the BIOS version to 06.83.02.07
Ankur [Sun, 14 Feb 2021 06:05:01 +0000 (11:35 +0530)]
[PDK-9315] Updating the BIOS version to 06.83.02.07

Signed-off-by: Ankur <a0132173@ti.com>
7 months agoMigrating to SYSFW version v2021.01
Piyali Goswami [Sun, 14 Feb 2021 15:11:31 +0000 (20:41 +0530)]
Migrating to SYSFW version v2021.01

v2021.01 migration

7 months agoETHFW-607: j7200_evm: Bypass SerDes config for Eth if already configured
Misael Lopez Cruz [Fri, 12 Feb 2021 03:14:33 +0000 (21:14 -0600)]
ETHFW-607: j7200_evm: Bypass SerDes config for Eth if already configured

Don't configure SerDes if it has already been configured, i.e. by
u-boot. This enables EthFw to transparently work in Linux boot and
CCS boot.

In Linux boot, u-boot will configure SerDes (i.e. for PCIe and Ethernet
sharing) and at a later point load EthFw, EthFw will not attempt to
reconfigure SerDes.

In CCS boot, EthFw will configure SerDes.

Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
7 months agoPDK-9050: Board: Fix for board PLL clock configuration failure on j721e REL.CORESDK.07.03.00.01
M V Pratap Reddy [Thu, 4 Feb 2021 07:52:44 +0000 (13:22 +0530)]
PDK-9050: Board: Fix for board PLL clock configuration failure on j721e

 - Removed the redundant clock configurations for McASP & ADC
 - Removed the core PLL configurations as they are done by default
 - Updated the clock IDs for some of the modules to fix the errors

7 months agoMigrating to SYSFW version v2020.08d
Piyali Goswami [Tue, 2 Feb 2021 05:23:48 +0000 (10:53 +0530)]
Migrating to SYSFW version v2020.08d

Migrating to SYSFW v2020.08d

7 months agosysfw_migrate.sh: Update to have support for generation of ES1.1 images
Piyali Goswami [Tue, 2 Feb 2021 04:55:28 +0000 (10:25 +0530)]
sysfw_migrate.sh: Update to have support for generation of ES1.1 images

Support for generation of ES1.1 HS tifs images

Signed-off-by: Piyali Goswami <piyali_g@ti.com>
7 months agoFirmware Header Gen updates for ES1.1
Piyali Goswami [Tue, 2 Feb 2021 04:54:36 +0000 (10:24 +0530)]
Firmware Header Gen updates for ES1.1

Support for ES1.1 hs binary generation

Signed-off-by: Piyali Goswami <piyali_g@ti.com>
7 months agoPDK-9050 : Compute core clock config is removed
sujith [Mon, 1 Feb 2021 13:07:07 +0000 (18:37 +0530)]
PDK-9050 : Compute core clock config is removed

The A72, R5F, functional clock should not be reconfigured
disabled the same.

Skipped clock config for McASP and Adc
Will be addressed in subsequent commits

Signed-off-by: sujith <sujith.s@ti.com>
7 months agoAdd build support for awr294x
Prasad Konnur [Sun, 7 Feb 2021 10:40:50 +0000 (16:10 +0530)]
Add build support for awr294x

 - Added basic build support
 - build for csl added with tpr12 soc files
 - build enabled for board lib with tpr12 files. build not enabled for
board Examples / utils.
 - build for few drivers enabled like edma, uart which are used by
common examples

Signed-off-by: Prasad Konnur <prasadkonnur@ti.com>
7 months agoUDMA: OSPI Example: Fix Porting for Cypress Flash(J7200/AM64x)
Don Dominic [Tue, 9 Feb 2021 09:41:48 +0000 (15:11 +0530)]
UDMA: OSPI Example: Fix Porting for Cypress Flash(J7200/AM64x)

- Added new test to write PHY tuning data to flash memory
    - Writes phy tuning data to last 128B of Flash memory
    - This region should be made non-cacheable
- Include new phy tuning algo source file from CSL OSPI Common
- Support for new phy tuning(phyConfig) for devices with Cypress flash(AM64x/J7200)
    - Enable phyPiplene mode for DAC DMA Read
- Proper switching from INDAC to DAC mode, after Write operation
    - For devices with Cypress Flash in which DAC write is not supported
      The test writes in INDAC mode and reads in DAC DMA mode
      Here the switch to DAC mode was not Proper.
    - Just calling CSL_ospiDacEnable was not enough
- Added flag to Disable CacheOps in Real-time loop
    - To enable performance measurement without including CacheInv
    - Disabled by default
- Clear the interrupt after breaking from the TR Reload Perpetual loop.
    - During channel forced tear-down to break from the TR Reload Perpetual loop,
      DMA will complete the already reloaded TR.
    - This results in setting the interrupt status register after this transfer completion.
    - Hence clear the interrupt after this.
    - Else it will result in odd behavior with successive UDMA transfers

Signed-off-by: Don Dominic <a0486429@ti.com>
Signed-off-by: Aditya Wadhwa <a0485151@ti.com>
7 months ago[DSS APP][PDK-9214]DSS Display Examples is not working on eDP
Vivek Dhande [Wed, 3 Feb 2021 12:47:14 +0000 (18:17 +0530)]
[DSS APP][PDK-9214]DSS Display Examples is not working on eDP

- Issue:
    - Display does not recognize the incoming stream and fps seems to be too high ~200

- Root Cause:
    - DSS clock selection was wrong along with wrong frequency
    - Earlier default clock selection was working for DSS which got changed over time, making EDP TC to fail
    - DSS application shall do this configuration rather than relying on default configuration

- Resolution:
    - Select proper clock for DPI
    - Configure following clocks
        - TISCI_DEV_DSS0_DSS_INST0_DPI_0_IN_2X_CLK to 148.5 MHz
        - TISCI_DEV_DSS0_DSS_INST0_DPI_1_IN_2X_CLK to 148.5 MHz

Signed-off-by: Vivek Dhande <a0132295@ti.com>
7 months ago[PDK-9074]OSPI: Adding a summary of OSPI modes supported by each EVM
Aditya Wadhwa [Mon, 1 Feb 2021 13:04:32 +0000 (18:34 +0530)]
[PDK-9074]OSPI: Adding a summary of OSPI modes supported by each EVM

Signed-off-by: Aditya Wadhwa <a0485151@ti.com>
7 months agoOSPI: J721e: Fix for large appimage size
Aditya Wadhwa [Fri, 5 Feb 2021 11:41:33 +0000 (17:11 +0530)]
OSPI: J721e: Fix for large appimage size

- marked the txBuf and rxBuf as a benchmark buffer section

Signed-off-by: Aditya Wadhwa <a0485151@ti.com>
7 months agoRevert "Revert "[PDK-8607] Fix for interrupt hang on MCU cores in MAIN domain""
Aditya Wadhwa [Fri, 5 Feb 2021 14:30:29 +0000 (20:00 +0530)]
Revert "Revert "[PDK-8607] Fix for interrupt hang on MCU cores in MAIN domain""

This reverts commit 9ac60cdd6d46fd7162a07f1f3a3351884eb9439f.

The fix was reverted due to code freeze. Applying the fix now that the release tag has been created.

7 months agoMailbox: Example: Fix debug build failure in daily build
Angela Stegmaier [Fri, 5 Feb 2021 19:38:30 +0000 (13:38 -0600)]
Mailbox: Example: Fix debug build failure in daily build

Increase the section size in liner file.

Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
7 months agoFix for UDMA tests failing after fix for PDK-9013
Piyali Goswami [Sun, 31 Jan 2021 03:21:07 +0000 (08:51 +0530)]
Fix for UDMA tests failing after fix for PDK-9013

Fixes in Sciclient.c where the respHdr is not populated in the respPayload.
The Sciserver logic looks for the payload to have the flags set correctly and because the flags were never copied in the case when the message was forwarded to the TIFS, the response is falsely reported to the calling function.

Signed-off-by: Piyali Goswami <piyali_g@ti.com>
7 months agoRevert "[PDK-8607] Fix for interrupt hang on MCU cores in MAIN domain" REL.CORESDK.07.02.01.11
Vishal Mahaveer [Wed, 27 Jan 2021 19:33:03 +0000 (13:33 -0600)]
Revert "[PDK-8607] Fix for interrupt hang on MCU cores in MAIN domain"

This reverts commit 9540772ac3c2b1ff082447675b23c4bfe75842e7.

Temporarily reverting it as this patch came in middle of AM64x RC.

Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
7 months ago[PDK-8607] Fix for interrupt hang on MCU cores in MAIN domain
Aditya Wadhwa [Wed, 23 Dec 2020 16:40:12 +0000 (22:10 +0530)]
[PDK-8607] Fix for interrupt hang on MCU cores in MAIN domain

- added a soc init function to update interrupt number at run time
- added a config soc interrupt path function to set interrupt path
- fixes interrupt hang issue on j721e and j7200
- removed WA of using polling mode in UT

Signed-off-by: Aditya Wadhwa <a0485151@ti.com>
7 months agoBoard: Added GTC frequency ID config in am64x board library REL.CORESDK.07.02.01.09 REL.CORESDK.07.02.01.10
M V Pratap Reddy [Sat, 23 Jan 2021 07:00:01 +0000 (12:30 +0530)]
Board: Added GTC frequency ID config in am64x board library

8 months agoBoard: AM64x: Update GTC clk freq to 200 MHz REL.CORESDK.07.02.01.08
Jonathan Bergsagel [Sat, 23 Jan 2021 02:40:04 +0000 (20:40 -0600)]
Board: AM64x: Update GTC clk freq to 200 MHz

Changes GTC input functional clock from the default freq,
of 225 MHz, to the HLOS expected value of 200 MHz.
Solves an issue with SBL booting Linux on AM64x.

Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>
8 months agoBoard: Removed unused code in am64x board library
M V Pratap Reddy [Fri, 22 Jan 2021 20:41:26 +0000 (02:11 +0530)]
Board: Removed unused code in am64x board library

 - Updated copyright banners

8 months agoSBL: AM64x: Change sbl_ospi_img_hlos to use Non-DMA option
Jonathan Bergsagel [Fri, 22 Jan 2021 21:46:55 +0000 (15:46 -0600)]
SBL: AM64x: Change sbl_ospi_img_hlos to use Non-DMA option

Builds the HLOS variant of SBL for OSPI boot mode to use
memcpy for OSPI transfers, instead of using BCDMA. This also
causes OSPI interface to be used without PHY pipelining.

Workaround for possible resource contention with Linux.

Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>
8 months agoPDK-9257: SBL: AM64x: Fix M4F mem section loading for OSPI boot
Jonathan Bergsagel [Fri, 22 Jan 2021 08:12:48 +0000 (02:12 -0600)]
PDK-9257: SBL: AM64x: Fix M4F mem section loading for OSPI boot

Fixes a problem with using the BCDMA (in OSPI boot mode) to load
memory sections of the Cortex-M4F.
Works around this issue by checking for M4F memory section addresses
and using memcpy (from OSPI flash to M4 mem), instead of doing DMA.

Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>
8 months agoPDK-9257: SBL: AM64x: Fix OSPI boot w/ DMA when using MCU1_0 TCMs
Jonathan Bergsagel [Fri, 22 Jan 2021 00:42:08 +0000 (18:42 -0600)]
PDK-9257: SBL: AM64x: Fix OSPI boot w/ DMA when using MCU1_0 TCMs

Need to use SoC-level addresses for R5F0_0 local TCM memories
as well on OSPI boot mode with DMA.
Changes SBL to use SoC-level address for all loading to local
TCM memories of MCU1_0.

Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>
8 months agoPDK-8885: Board: Created different init/deinit clock groups for am64x evm board library
M V Pratap Reddy [Thu, 14 Jan 2021 12:22:40 +0000 (17:52 +0530)]
PDK-8885: Board: Created different init/deinit clock groups for am64x evm board library

 - Board library for am64x evm is updated to provide the flexibility of
   choosing clock modules which will be enabled/disabled during the boot process.
   Two different clock groups are created to choose between RTOS normal boot flow
   and RTOS+HLOS boot flow.
   Clock resources which are used during RTOS boot can be released using
   Board_releaseResource function before switching to HLOS

8 months agoBoard: Fix for am64x evm stress test build errors
M V Pratap Reddy [Fri, 22 Jan 2021 11:44:36 +0000 (17:14 +0530)]
Board: Fix for am64x evm stress test build errors

8 months agoAM64x: launch.js update for latest CSP REL.CORESDK.07.02.01.07
Sheng Zhao [Wed, 20 Jan 2021 20:45:37 +0000 (14:45 -0600)]
AM64x: launch.js update for latest CSP

Updates to launch.js based on latest CSP package made for public consumption.

When R5 is connected, the DDR will not be configured automatically.
After the sciclient_ccs_init runs, the launch.js explicitly calls
AM64_DDR_Initialization_ECC_Disabled() to configure the DDR.

CSP commit:
https://bitbucket.itg.ti.com/projects/CPHWA/repos/k3_ccs/commits/662bc078f8ccee26024a80bd648803872a31b5e6

Signed-off-by: Sheng Zhao <shengzhao@ti.com>
8 months agoAM64x Build Fix: Use CORELISTARM for UART baremetal app
Don Dominic [Wed, 20 Jan 2021 04:16:26 +0000 (09:46 +0530)]
AM64x Build Fix: Use CORELISTARM for UART baremetal app

- Use drvuart_am64x_CORELISTARM for UART_Baremetal_TestApp
- All other UART apps for am64x was already using drvuart_am64x_CORELISTARM

Signed-off-by: Don Dominic <a0486429@ti.com>
8 months agoBUILD: AM64x: Add missing mpu1_1 in the am64x core list
Jonathan Bergsagel [Tue, 19 Jan 2021 22:06:31 +0000 (16:06 -0600)]
BUILD: AM64x: Add missing mpu1_1 in the am64x core list

Update core lists in both BUILD and SBL to match the cores
that are used for building various test cases.

Fixes build issue for the sbl_multicore_amp boot test case
for am64x_evm by including the last "mpu1_1" core that was
previously missing.

Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>
8 months ago[PDK-9033] UDMA Example : Fix UDMA ADC example on AM64x mpu1_0
Don Dominic [Tue, 19 Jan 2021 15:21:02 +0000 (20:51 +0530)]
[PDK-9033] UDMA Example : Fix UDMA ADC example on AM64x mpu1_0

- Clear destination buffer and cache writeback

Signed-off-by: Don Dominic <a0486429@ti.com>
8 months agoam64x: Enable appimage generation for mcspi tests
Vishal Mahaveer [Tue, 19 Jan 2021 04:54:51 +0000 (22:54 -0600)]
am64x: Enable appimage generation for mcspi tests

Enable appimage generation for test cases that apply to am64x.

Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
8 months agoPDK-9175: SBL: AM64x: Fix MMCSD boot when using MCU1_0 TCMs
Jonathan Bergsagel [Mon, 18 Jan 2021 19:43:53 +0000 (13:43 -0600)]
PDK-9175: SBL: AM64x: Fix MMCSD boot when using MCU1_0 TCMs

Adds address translation to SoC level addresses of MCU1_0
local TCMs when using MMCSD ADMA to copy appimage sections
to MCU1_0 ATCM / BTCM.

Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>
8 months ago[PDK-9033] UDMA Example : Fix UDMA ADC example on AM64x
Don Dominic [Mon, 18 Jan 2021 14:52:55 +0000 (20:22 +0530)]
[PDK-9033] UDMA Example : Fix UDMA ADC example on AM64x

- Moved PDMA Config and chEnable to App_create
- Moved chDiable to App_delete
- Added VirtToPhy/PhyToVirt conversion before submitting to/after receiving from DMA Controller
- Basic Porting for LCDMA
  - Added RA Type macro for Teardown Completion Queue, Teardown Event and Completion Ring Mem

Signed-off-by: Don Dominic <a0486429@ti.com>
8 months ago[PDK-7995] UDMA: Simplify UDMA RM Configuration for AM64x
Don Dominic [Wed, 13 Jan 2021 13:49:36 +0000 (19:19 +0530)]
[PDK-7995] UDMA: Simplify UDMA RM Configuration for AM64x

- Simplify RM Configuration by querying from defaultBoardCfg
- Using #Sciclient_rmGetResourceRange to populate #Udma_RmInitPrms
- Removes all hard-codings in udma_rmcfg.c

- Splits shared resources like GlobalEvents/VINTR across BCDMA/PKTDMA Instances
  based on the prms in #Udma_RmSharedResPrms (UDMA RM Shared Resource parameters)

- User can override default UDMA RM Shared Resource parameters, using Udma_rmGetSharedResPrms API

- Moved UdmaRmInitPrms_init to 'udma_rmcfg_common.c' in 'soc' folder.
  This API will return error, if it fails to init #Udma_RmInitPrms

- New API to to retun TISCI Core Dev ID 'Udma_getCoreSciDevId'
  - To be reused in 'UdmaRmInitPrms_init'

- For devices like AM64x (LCDMA), One to one mapping exists from Virtual Interrupts to Core Interrupts
  So translate to corresponding range using 'Sciclient_rmIrqTranslateIaOutput'.
  Since there are no Interrupt Routers, startIrIntr/numIrIntr refers to core interrupt itslef.

Signed-off-by: Don Dominic <a0486429@ti.com>
8 months agoPDK-5153: Board: Updated stress tests for am64x evm to fix the failures
M V Pratap Reddy [Sat, 16 Jan 2021 10:38:10 +0000 (16:08 +0530)]
PDK-5153: Board: Updated stress tests for am64x evm to fix the failures

8 months agoPDK-8367: Board: Updated SPI EEPROM diag test for AM64x EVM
M V Pratap Reddy [Sat, 16 Jan 2021 10:36:52 +0000 (16:06 +0530)]
PDK-8367: Board: Updated SPI EEPROM diag test for AM64x EVM

8 months agoPDK-5115: Board: Corrected gpio pin mapping for am64x evm exp header test
M V Pratap Reddy [Sat, 16 Jan 2021 10:35:25 +0000 (16:05 +0530)]
PDK-5115: Board: Corrected gpio pin mapping for am64x evm exp header test

8 months ago[dmautils] Update hostemu to support 8 to 16 bit conversion
Anshu Jain [Tue, 5 Jan 2021 15:49:35 +0000 (21:19 +0530)]
[dmautils] Update hostemu to support 8 to 16 bit conversion

Signed-off-by: Anshu Jain <anshu.jain@ti.com>
8 months agoPDK-9013: Fixes for Sciserver logic
Piyali Goswami [Sat, 2 Jan 2021 03:40:22 +0000 (09:10 +0530)]
PDK-9013: Fixes for Sciserver logic

Sciserver_UserProcessMsg has 2 flows:

1. Non-secure host --> Sciserver_UserProcessMsg (MCU1_0)
                            RM Process / PM Process
                            [RM forward to DMSC]

2. Secure Host --> DMSC --> Sciserver_UserProcessMsg (MCU1_0)
                            RM Process/ PM Process

Earlier logic was performing the following steps:

1. Check message type - based on that set RM, PM or forward flag.
2. If RM flag and forward flag is set the Process RM is called and the Forward message is called.
3. The effect is the local RM is called 2 times
4. If the local RM fails, we still end up calling the API 2 times.
5. If there is a fail in the Forward response function, the response is not sent back to the non-secure host.

So the logic has to be corrected to have only local RM processing when getting forwarded from a secure host and have non-secure processing call the Sciclient_service function which identifies the forward or non-forward message calls.

The earlier logic also has another issue where the value of return is checked for the setting of the ACK and NACK flag after the override finished for the ret value based on the fact that the ACK and NACK flag is already set in the response. So the net effect is the ACK / NACK flag is falsely set to ACK based on the ret value giving an incorrect response to the user.

The current logic does the following:

1. Checks if the message is from DMSC (forwarded) or not. Based on this it calls the full message processing or only the local to MCU1_0 RM message processing.
2. The Sciserver and the local RM message processing sets the ACK/NACK flag and the API does not overwrite this after the processing is complete.

Signed-off-by: Piyali Goswami <piyali_g@ti.com>
8 months agoBoard: Fix for am64x evm ospi diagnostic test build error REL.CORESDK.07.02.00.10 REL.CORESDK.07.02.01.06
M V Pratap Reddy [Fri, 15 Jan 2021 10:38:05 +0000 (16:08 +0530)]
Board: Fix for am64x evm ospi diagnostic test build error

 - Disabled sbl cust image build for am64x svb

8 months agoPDK-8969: Board: Fix for am64x svb ospi diagnostic test build failure
M V Pratap Reddy [Fri, 15 Jan 2021 07:58:50 +0000 (13:28 +0530)]
PDK-8969: Board: Fix for am64x svb ospi diagnostic test build failure

8 months agoPDK-8977: Board: Enabled temperature sensor diagnostic test for am64x svb
M V Pratap Reddy [Tue, 5 Jan 2021 13:08:45 +0000 (18:38 +0530)]
PDK-8977: Board: Enabled temperature sensor diagnostic test for am64x svb

8 months agoPDK-8978: Board: Enabled current monitor diagnostic test for am64x svb
M V Pratap Reddy [Tue, 5 Jan 2021 13:06:00 +0000 (18:36 +0530)]
PDK-8978: Board: Enabled current monitor diagnostic test for am64x svb

8 months agoPDK-8981: Board: Enabled MCAN diagnostic test for am64x svb
M V Pratap Reddy [Tue, 5 Jan 2021 13:04:12 +0000 (18:34 +0530)]
PDK-8981: Board: Enabled MCAN diagnostic test for am64x svb

8 months agoBoard: Enabled memory diagnostic tests for am64x svb
M V Pratap Reddy [Tue, 5 Jan 2021 12:55:11 +0000 (18:25 +0530)]
Board: Enabled memory diagnostic tests for am64x svb

 - PDK-8985: Enabled I2C Board ID EEPROM test
 - PDK-8983: Enabled DDR memory diagnostic test
 - PDK-8984: Enabled SD card diagnostic test
 - PDK-8982: Enabled eMMC diagnostic test
 - PDK-8969: Enabled OSPI diagnostic test
 - PDK-8988: Enabled QSPI flash diagnostic test

8 months agoPDK-8968: Board: Added gpmc diagnostic test
M V Pratap Reddy [Tue, 5 Jan 2021 12:01:27 +0000 (17:31 +0530)]
PDK-8968: Board: Added gpmc diagnostic test

8 months agoPDK-8967: Board: Updated board flash library for am64x svb
M V Pratap Reddy [Tue, 5 Jan 2021 11:54:58 +0000 (17:24 +0530)]
PDK-8967: Board: Updated board flash library for am64x svb

8 months agoPDK-8967: Board: Updated am64x svb board library for SVB HW
M V Pratap Reddy [Tue, 5 Jan 2021 07:37:55 +0000 (13:07 +0530)]
PDK-8967: Board: Updated am64x svb board library for SVB HW

8 months agoam64x main pll 0 HSDIV setting for 200 MHz for ICSS
Piyali Goswami [Tue, 12 Jan 2021 07:52:22 +0000 (13:22 +0530)]
am64x main pll 0 HSDIV setting for 200 MHz for ICSS

Signed-off-by: Piyali Goswami <piyali_g@ti.com>
8 months agoMigrating to SYSFW version v2020.12a
Piyali Goswami [Fri, 15 Jan 2021 18:00:14 +0000 (23:30 +0530)]
Migrating to SYSFW version v2020.12a

Migrating to SYSFW version v2020.12a

8 months agoBoard: Uniflash host tool update for Uniflash release 6.2
M V Pratap Reddy [Fri, 15 Jan 2021 12:38:11 +0000 (18:08 +0530)]
Board: Uniflash host tool update for Uniflash release 6.2

 - PDK-9019: Enabled flow control to support higher baudrate on AM64 EVM
 - PDK-9179: Added support for auto-detecting tifs.bin
 - PDK-9180: Added raw mode support to fix Linux failure with TPR12 EVM

8 months ago[PDK-8573] UDMA: Expose Udma_chGetTriggerEvent API
Don Dominic [Fri, 15 Jan 2021 14:45:35 +0000 (20:15 +0530)]
[PDK-8573] UDMA: Expose Udma_chGetTriggerEvent API

- Expose Udma_chGetTriggerEvent API
  - Added Error Checks
  - Removed i/p param 'drvHandle' (Derive from passed 'chHandle')

- API will return the global 0/1  trigger event for the channel
  - Trigger is not supported for external channels and the function will return #UDMA_EVENT_INVALID.

Signed-off-by: Don Dominic <a0486429@ti.com>
8 months agoMailbox: Test: Update mailbox_perf_test for automation
Angela Stegmaier [Wed, 13 Jan 2021 05:01:14 +0000 (23:01 -0600)]
Mailbox: Test: Update mailbox_perf_test for automation

Update the mailbox_perf_test for baremetal and rtos to
print to UART and to print the correct pass string for
test automation.
Also update the linker files to be compatible with SBL
loading and create the multicore appimage.

Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
8 months agoMailbox: Add missing documentation
Angela Stegmaier [Thu, 3 Sep 2020 21:37:12 +0000 (16:37 -0500)]
Mailbox: Add missing documentation

Add the missing documentation for the read modes and
update documentation for functions that are not supported for
every device to indicate the support.

Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
8 months agommcsd: v2: fix build with logs enabled REL.CORESDK.07.02.00.08
Vishal Mahaveer [Thu, 14 Jan 2021 13:57:16 +0000 (07:57 -0600)]
mmcsd: v2: fix build with logs enabled

Fix build errors seen when trying to enable LOG_EN flag. Also add missing
new lines in log statements to make the log easier to read.

Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
8 months agoPDK-9098: Board: am64x_evm add ICSSG0 IEP SYNC/LATCH pins and GPIO outputs for sitara...
Ahmad Rashed [Thu, 14 Jan 2021 16:36:15 +0000 (10:36 -0600)]
PDK-9098: Board: am64x_evm add ICSSG0 IEP SYNC/LATCH pins and GPIO outputs for sitara-apps/timesync_example

8 months agoPDK-9098: Board: am64x_evm add MCU GPIO for sitara-apps/servo_drive_demo
Ahmad Rashed [Thu, 14 Jan 2021 16:01:04 +0000 (10:01 -0600)]
PDK-9098: Board: am64x_evm add MCU GPIO for sitara-apps/servo_drive_demo

8 months agoSBL: AM64x: Fix example XIP flash boot test REL.CORESDK.07.02.00.06 REL.CORESDK.07.02.00.07
Jonathan Bergsagel [Wed, 13 Jan 2021 04:45:42 +0000 (22:45 -0600)]
SBL: AM64x: Fix example XIP flash boot test

Fixes SBL XIP boot test for AM64x by using the latest aligned
flash address offset for the XIP test binary (0x1c0000).

Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>
8 months agoCorrect portNum parameter used by emac_poll_pkt and emac_poll_ctrl for ICSSG switch
Pratheesh Gangadhar [Mon, 11 Jan 2021 05:28:28 +0000 (10:58 +0530)]
Correct portNum parameter used by emac_poll_pkt and emac_poll_ctrl for ICSSG switch

Signed-off-by: Pratheesh Gangadhar <pratheesh@ti.com>
8 months agoFix for issues seen with port call backs
Pratheesh Gangadhar [Mon, 11 Jan 2021 05:21:06 +0000 (10:51 +0530)]
Fix for issues seen with port call backs

EMAC_FREE_PKT needs to be invoked on Port/Slice used to transmit the packet as packet will be scheduled by ICSSG firmware irrespective of the port in which application is polling for TX completion

Signed-off-by: Pratheesh Gangadhar <pratheesh@ti.com>
8 months agoAdd ingress rate limiter support in emac lld
Pratheesh Gangadhar [Sun, 10 Jan 2021 05:39:34 +0000 (11:09 +0530)]
Add ingress rate limiter support in emac lld

Signed-off-by: Pratheesh Gangadhar <pratheesh@ti.com>
8 months agoSBL: AM64x: Enable OSPI PHY with DMA for OSPI build
Jonathan Bergsagel [Wed, 13 Jan 2021 01:18:45 +0000 (19:18 -0600)]
SBL: AM64x: Enable OSPI PHY with DMA for OSPI build

Enables the OSPI PHY (using PHY tuning) and DMA transfers
for faster application booting, when using "sbl_ospi_img".

Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>
8 months agoSBL: AM64x: Enable CUST build for OSPI boot with custom flags
Jonathan Bergsagel [Tue, 12 Jan 2021 20:26:14 +0000 (14:26 -0600)]
SBL: AM64x: Enable CUST build for OSPI boot with custom flags

Enables building "sbl_cust_img" for an alternate OSPI boot method
where special SBL "CUST" build flags can be used (sbl_component.mk)

Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>
8 months agoSBL: AM64x: Add OSPI 166 MHz operation and update caching for xSPI REL.CORESDK.07.02.01.05
Jonathan Bergsagel [Sat, 9 Jan 2021 00:31:28 +0000 (18:31 -0600)]
SBL: AM64x: Add OSPI 166 MHz operation and update caching for xSPI

OSPI parameter updates in the SBL to support using OSPI interface
at 166 MHz for booting images.

Added R5 cache exclusion region for the xSPI flash PHY tuning data
area.

Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>
8 months ago[PDK-9060] UDMA: Apputils: Add support of AM64x TCMA Address Translations REL.CORESDK.07.02.00.04 REL.CORESDK.07.02.00.05
Don Dominic [Fri, 8 Jan 2021 14:46:46 +0000 (20:16 +0530)]
[PDK-9060] UDMA: Apputils: Add support of AM64x TCMA Address Translations

- Convert local R5 TCMA address to global space in Udma_appVirtToPhyFxn
- Convert global R5 TCMA address to local space in Udma_appPhyToVirtFxn

- Fix typo for macro in udma_ospi_flash example

- This fixes PDK-9060 : UDMA OSPI example not working on AM64x

Signed-off-by: Don Dominic <a0486429@ti.com>
8 months agoKEYWRITER: fixes main.c build issue
Anuraag Tummanapally [Fri, 8 Jan 2021 13:53:32 +0000 (19:23 +0530)]
KEYWRITER: fixes main.c build issue

8 months ago[Bug Fix] PDK-8849: UART UT: few unit tests are failing on M4F core
Prasad Konnur [Fri, 8 Jan 2021 12:23:05 +0000 (17:53 +0530)]
[Bug Fix] PDK-8849: UART UT: few unit tests are failing on M4F core

 - Interrupts are enabled for mcu uart instances on M4f core

Signed-off-by: Prasad Konnur <prasadkonnur@ti.com>
8 months agoAM64x RM: Update defaulBoardCfg_rm to assign CMPEVNT INTR outputs for local events... REL.CORESDK.07.02.00.01 REL.CORESDK.07.02.00.02 REL.CORESDK.07.02.00.03
Don Dominic [Thu, 7 Jan 2021 08:59:01 +0000 (14:29 +0530)]
AM64x RM: Update defaulBoardCfg_rm to assign CMPEVNT INTR outputs for local events to HOST_ID_ALL

- Updates in allignment with https://bitbucket.itg.ti.com/projects/PSDKLA/repos/k3-resource-partitioning/pull-requests/13/overview
- Regenrate scilcient_boardcfg and sciclient_ccs_init

Signed-off-by: Don Dominic <a0486429@ti.com>
8 months ago[PDK-8918] udma ospi example for j7200/am64x
Aditya Wadhwa [Fri, 18 Dec 2020 16:59:19 +0000 (22:29 +0530)]
[PDK-8918] udma ospi example for j7200/am64x

- perform writes in INDAC mode and reads in DAC DMA mode
- moved the OSPI INDAC Write API to common csl file

Signed-off-by: Aditya Wadhwa <a0485151@ti.com>
8 months ago[Bug Fix] PDK-8761: UART UT Dma tests hangs after timeout
Prasad Konnur [Wed, 6 Jan 2021 14:00:21 +0000 (19:30 +0530)]
[Bug Fix] PDK-8761: UART UT Dma tests hangs after timeout

 - After timeout Flush any pending request from the free queue

Signed-off-by: Prasad Konnur <prasadkonnur@ti.com>
8 months agoSBL: AM64x: Change SCRATCH RAM location to DDR memory
Jonathan Bergsagel [Wed, 6 Jan 2021 01:50:20 +0000 (19:50 -0600)]
SBL: AM64x: Change SCRATCH RAM location to DDR memory

Moves the SCRATCH RAM for the SBL (used for temp location
for appimage loads) back to the same DDR address & size
as used for other similar SoCs.

Enables loading larger appimages via UART boot mode (and
larger signed appimages via any boot mode). Also avoids
conflicts with other possible usage of the OC SRAM.

Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>