[OSAL]: Removing Assert by adding Null checks in the below mentioned sub-modules
- MutexP nonos
- Semaphore nonos and safertos
- EventP Safertos
Signed-off-by: Asha <x1101668@ti.com>
- MutexP nonos
- Semaphore nonos and safertos
- EventP Safertos
Signed-off-by: Asha <x1101668@ti.com>
[PDK-11875] J784S4 DDR Config Optimiztion Update
Signed-off-by: Sai Ramakurthi <s-ramakurthi@ti.com>
Signed-off-by: Sai Ramakurthi <s-ramakurthi@ti.com>
[PDK-12198] Fix MMCSD/eMMC Performance numbers
- Used GTC timer instead of PMU counter to profile. Since PMU counter
halts during idle task.
- During a performance test, data is being copied to an SD/eMMC device
in interrupt mode using DMA. While the copy is in progress, the processor’s R5 core
is idle and the PMU counter is not running. As a result, the PMU counter may return inaccurate timings
- Enabled HS400 test on eMMC regression test
- Removed unused functions/macros/variables, used camel casing for variable/function declaration
Signed-off-by: Sai Ramakurthi <s-ramakurthi@ti.com>
- Used GTC timer instead of PMU counter to profile. Since PMU counter
halts during idle task.
- During a performance test, data is being copied to an SD/eMMC device
in interrupt mode using DMA. While the copy is in progress, the processor’s R5 core
is idle and the PMU counter is not running. As a result, the PMU counter may return inaccurate timings
- Enabled HS400 test on eMMC regression test
- Removed unused functions/macros/variables, used camel casing for variable/function declaration
Signed-off-by: Sai Ramakurthi <s-ramakurthi@ti.com>
[OSAL] Added new testcases for the Sub-Modules
Restructuring extended testcases into module specific files for the mentioned Sub Modules :
1. HwiP Sub module
2. CacheP Sub module
3. MailboxP Sub module
4. TaskP Sub module
5. MutexP Sub module
3. QueueP Sub module
4. HeapP Sub module
Disabling C66 core for extended testApp
Signed-off-by: Asha <x1101668@ti.com>
Restructuring extended testcases into module specific files for the mentioned Sub Modules :
1. HwiP Sub module
2. CacheP Sub module
3. MailboxP Sub module
4. TaskP Sub module
5. MutexP Sub module
3. QueueP Sub module
4. HeapP Sub module
Disabling C66 core for extended testApp
Signed-off-by: Asha <x1101668@ti.com>
2 months ago[PDK-13500][Sciclient]: Resolve incorrect disable of write protection in Sciclient_se...
[PDK-13500][Sciclient]: Resolve incorrect disable of write protection in Sciclient_serviceSecureProxy API
gSciclient_writeInProgress is a binary semaphore which is used to control the access
of critical section in Sciclient_serviceSecureProxy(). Currently even after this
semaphore variable is disabled, the global variables such as pSciclient_secProxyCfg
in Sciclient_readThread32(), gSciclientHandle are accessed by the threads.
As the threads share the global variables, this makes the code thread unsafe.
Hence shifted the disabling of gSciclient_writeInProgress variable to a correct
position in the Sciclient_serviceSecureProxy().
Signed-off-by: Thejasvi Konduru <t-konduru@ti.com>
gSciclient_writeInProgress is a binary semaphore which is used to control the access
of critical section in Sciclient_serviceSecureProxy(). Currently even after this
semaphore variable is disabled, the global variables such as pSciclient_secProxyCfg
in Sciclient_readThread32(), gSciclientHandle are accessed by the threads.
As the threads share the global variables, this makes the code thread unsafe.
Hence shifted the disabling of gSciclient_writeInProgress variable to a correct
position in the Sciclient_serviceSecureProxy().
Signed-off-by: Thejasvi Konduru <t-konduru@ti.com>
[Sciclient]: Fix MISRAC issues
- 2 MISRAC issues fixed for checker code MISRA.ETYPE.CATEGORY.DIFFERENT.2012
Signed-off-by: ChandrakantB <x1109162@ti.com>
- 2 MISRAC issues fixed for checker code MISRA.ETYPE.CATEGORY.DIFFERENT.2012
Signed-off-by: ChandrakantB <x1109162@ti.com>
Fixed platform.mk to remove dead code left in makerules
- XDC cleanup had this code blob left which was changing lib extension for host emulation
- There was dead code left in previous commit
- Removed the dead code to ensure build
Signed-off-by: Rishabh Garg <rishabh@ti.com>
- XDC cleanup had this code blob left which was changing lib extension for host emulation
- There was dead code left in previous commit
- Removed the dead code to ensure build
Signed-off-by: Rishabh Garg <rishabh@ti.com>
Added safety_checkers to gitignore
Signed-off-by: Rishabh Garg <rishabh@ti.com>
Signed-off-by: Rishabh Garg <rishabh@ti.com>
[I2C]: i2c_extended_testapp: added test cases:
- i2c_bitrate_test: for the frequency 100k,400k,1M, 3.4M.
- i2c_bitrate_test: by passing invalid arguments. readcount= 0, and timeout = 0.
- i2c_bitrate_test: by passing invalid arguments. writecount=0, and validparams= 0.
- i2c_bitrate_test: by passing invalid slave address.
- i2c_bitrate_test_polling mode.
- i2c_bitrate_test_polling mode: by passing invalid arguments. readcount= 0.
- i2c_bitrate_test_polling mode: by passing invalid salve address.
- i2c_Probe_BusFrequency_test: 1Mhz.
- i2c test bus recovery functionality: 1Mhz
- i2c control: by passing invalid command code.
- i2c NULL check: by passing null pointer.
Signed-off-by: Pradeepa Chandrashekar x1074845@ti.com
- i2c_bitrate_test: for the frequency 100k,400k,1M, 3.4M.
- i2c_bitrate_test: by passing invalid arguments. readcount= 0, and timeout = 0.
- i2c_bitrate_test: by passing invalid arguments. writecount=0, and validparams= 0.
- i2c_bitrate_test: by passing invalid slave address.
- i2c_bitrate_test_polling mode.
- i2c_bitrate_test_polling mode: by passing invalid arguments. readcount= 0.
- i2c_bitrate_test_polling mode: by passing invalid salve address.
- i2c_Probe_BusFrequency_test: 1Mhz.
- i2c test bus recovery functionality: 1Mhz
- i2c control: by passing invalid command code.
- i2c NULL check: by passing null pointer.
Signed-off-by: Pradeepa Chandrashekar x1074845@ti.com
[PDK-12619][Boot App] Make DDR non-shareable in MPU configurations
- If DDR is shareable, cache is disabled which impacts performance
Signed-off-by: Archisha Sharma <archisha.sharma@ti.com>
- If DDR is shareable, cache is disabled which impacts performance
Signed-off-by: Archisha Sharma <archisha.sharma@ti.com>
>Removed XDC,BIOS files from PDK makerules
-Removed XDC, BIOS related paths from PDK makerules for cleanup
Signed-off-by: Likhitha <x1097556@ti.com>
-Removed XDC, BIOS related paths from PDK makerules for cleanup
Signed-off-by: Likhitha <x1097556@ti.com>
[PDK-12878][Sciclient]: Capture the failure of Sciclient_rmIrqReleaseRaw()
Sciclient_rmIrqReleaseRaw() releases the connection between two nodes.
Sciclient_rmIrqDeleteRoute() uses multiple calls of this API to teardown
a complete interrupt connection between source and destination which
contains multiple hops.
Current implementation of Sciclient_rmIrqDeleteRoute() does not capture
the failure of Sciclient_rmIrqReleaseRaw().
Changes are made in Sciclient_rmIrqDeleteRoute() inorder to
capture the failure of Sciclient_rmIrqReleaseRaw() and accordingly
return success or failure.
Signed-off-by: Thejasvi Konduru <t-konduru@ti.com>
Sciclient_rmIrqReleaseRaw() releases the connection between two nodes.
Sciclient_rmIrqDeleteRoute() uses multiple calls of this API to teardown
a complete interrupt connection between source and destination which
contains multiple hops.
Current implementation of Sciclient_rmIrqDeleteRoute() does not capture
the failure of Sciclient_rmIrqReleaseRaw().
Changes are made in Sciclient_rmIrqDeleteRoute() inorder to
capture the failure of Sciclient_rmIrqReleaseRaw() and accordingly
return success or failure.
Signed-off-by: Thejasvi Konduru <t-konduru@ti.com>
tsn: uniconf: tsn: TSN: Fix build error for packaging build errors in uniconf
Missing makerules for tsn_uniconf and tsn_buildconf have been added
Signed-off-by: Meghana Malladi <m-malladi@ti.com>
Missing makerules for tsn_uniconf and tsn_buildconf have been added
Signed-off-by: Meghana Malladi <m-malladi@ti.com>
tsn: TSN: Fix build error due to mising UB_LOGCAT and lack file
- fix packaging error caused due to wrong makefile rule in gptp_lldp
Signed-off-by: Loc Hoang <hoang.loc@excelfore.com>
- fix packaging error caused due to wrong makefile rule in gptp_lldp
Signed-off-by: Loc Hoang <hoang.loc@excelfore.com>
tsn: TSN: Added more modules for all the Jacinto devices
Added uniconf, lldp
Fixes: ETHFW-2168,MCUSDK-10856
Signed-off-by: Nam Nguyen Van <nam.nguyen@excelfore.com>
Added uniconf, lldp
Fixes: ETHFW-2168,MCUSDK-10856
Signed-off-by: Nam Nguyen Van <nam.nguyen@excelfore.com>
UDMA_UT : UDMA PROXY Negative TestCases
- Implemented negative test cases in UDMA_UT test app for UDMA Proxy API's
1.UdmaTest_proxyFreeNeg - PDK-13682
2.UdmaTest_proxyAllocNeg - PDK-13681
3.UdmaTest_proxyConfigNeg - PDK-13683
Signed-off-by: swetha <x1081792@ti.com>
- Implemented negative test cases in UDMA_UT test app for UDMA Proxy API's
1.UdmaTest_proxyFreeNeg - PDK-13682
2.UdmaTest_proxyAllocNeg - PDK-13681
3.UdmaTest_proxyConfigNeg - PDK-13683
Signed-off-by: swetha <x1081792@ti.com>
Updated the MACRO name as defined in the CSL i2c.h file.
Signed-off-by: Pradeepa Chandrashekar x1074845@ti.com
Signed-off-by: Pradeepa Chandrashekar x1074845@ti.com
[PDK-13731] Migrate ti-arm clang compiler from 3.2.0.LTS to 3.2.1.LTS
Signed-off-by: Sai Ramakurthi <s-ramakurthi@ti.com>
Signed-off-by: Sai Ramakurthi <s-ramakurthi@ti.com>
[OSAL]Removing double Null check in Sub-modules
1. EventP freertos
2. SemaphoreP nonos
3. HwiP safertos
Signed-off-by: Asha <x1101668@ti.com>
1. EventP freertos
2. SemaphoreP nonos
3. HwiP safertos
Signed-off-by: Asha <x1101668@ti.com>
[MAKEFILE] Add build support for PM safety checker library and examples
- Updated Root path for PM safety checker
- Enabled lib and example build in the mk files
Signed-off-by: Jayanth BR <x1080850@ti.com>
- Updated Root path for PM safety checker
- Enabled lib and example build in the mk files
Signed-off-by: Jayanth BR <x1080850@ti.com>
[OSAL]: Added test cases for OSAL Submodules.
- Added test cases for below mentioned osal submodules :
- TaskP_safertos
- ClockP_freertos
- SemaphoreP_freertos
- SemaphoreP_nonos
- CacheP_nonos testcases moved to Baremetal
Added different sections in test.c file
- Added test cases for below mentioned osal submodules :
- TaskP_safertos
- ClockP_freertos
- SemaphoreP_freertos
- SemaphoreP_nonos
- CacheP_nonos testcases moved to Baremetal
Added different sections in test.c file
These test cases cover IPC API failures for invalid configuration or parameters. Tests return error code and message upon failure.
-Test cases and the corresponding failure modes covered in this commit are as below,
1. Tested IpcUtils_getMemoryAddress to get the address for given base address.
2. Tested IpcUtils API's to get Data contained in the head node,Data in the
next to the specified node,Remove the given node from the queue and
Delete the queue with invalid parameters.
3. Tested Allocated memory while creating the heap, DeAllocate memory
of the size specified while creating the heap, to delete previously
created heap with Null and invalid size parameters.
4. Moved IpcUtils_Qenqueue and IpcUtils_Qdequeue to ipc_utils.h to avoid -werrors.
5. Removed if condition for checking numProc in Ipc_mpSetConfig as the check is already
done and returned IPC_EINVALID_PARAMS in the same function
Signed-off-by: Likhitha <x1097556@ti.com>
-Test cases and the corresponding failure modes covered in this commit are as below,
1. Tested IpcUtils_getMemoryAddress to get the address for given base address.
2. Tested IpcUtils API's to get Data contained in the head node,Data in the
next to the specified node,Remove the given node from the queue and
Delete the queue with invalid parameters.
3. Tested Allocated memory while creating the heap, DeAllocate memory
of the size specified while creating the heap, to delete previously
created heap with Null and invalid size parameters.
4. Moved IpcUtils_Qenqueue and IpcUtils_Qdequeue to ipc_utils.h to avoid -werrors.
5. Removed if condition for checking numProc in Ipc_mpSetConfig as the check is already
done and returned IPC_EINVALID_PARAMS in the same function
Signed-off-by: Likhitha <x1097556@ti.com>
These test cases cover IPC API failures for invalid configuration or
parameters. Tests return error code and message upon failure.
-Tested IPC API's with invalid osal parameters
Signed-off-by: Likhitha <x1097556@ti.com>
parameters. Tests return error code and message upon failure.
-Tested IPC API's with invalid osal parameters
Signed-off-by: Likhitha <x1097556@ti.com>
Migrating to TIFS version v09.01.09
Signed-off-by: Chandru Dhavamani <chandru@ti.com>
Signed-off-by: Chandru Dhavamani <chandru@ti.com>
[PDK-13705][Sciclient]: Update Security boardcfg to fix tisci_boardcfg_sa2ul_cfg
-In v09.01.09 release, tisci_boardcfg_sa2ul_cfg structure is modified.
-Due to misalignment in structure in tisci and PDK, security boardcfg results in build failure.
-Update the sciclient_defaultBoardcfg_security.c file to include the new changes
in tisci_boardcfg_sa2ul_cfg structure for all J7 devices to fix the issue.
Signed-off-by: Chandru Dhavamani <chandru@ti.com>
-In v09.01.09 release, tisci_boardcfg_sa2ul_cfg structure is modified.
-Due to misalignment in structure in tisci and PDK, security boardcfg results in build failure.
-Update the sciclient_defaultBoardcfg_security.c file to include the new changes
in tisci_boardcfg_sa2ul_cfg structure for all J7 devices to fix the issue.
Signed-off-by: Chandru Dhavamani <chandru@ti.com>
[script]: Update sysfw migration script
-Update sysfw_migrate.sh to build DM and IPC binaries to
sent to linux.
-Also, create MD5 Checksums for the same.
Signed-off-by: Chandru Dhavamani <chandru@ti.com>
-Update sysfw_migrate.sh to build DM and IPC binaries to
sent to linux.
-Also, create MD5 Checksums for the same.
Signed-off-by: Chandru Dhavamani <chandru@ti.com>
-These test cases cover IPC API failures for invalid configuration
or parameters. Tests return error code and message upon failure.
Test cases and the corresponding failure modes covered in this commit are as below,
1.Tested Ipc_getMailboxInfoRx,Ipc_getMailboxInfoTx for invalid
selfId and remoteId.
2.Tested Ipc_getCoreName for invalid procId.
3.Tested Ipc_getNavss512MailboxInputIntr with invalid mailbox cluster
and userId.
- moved function definations of Ipc_getNavss512MailboxInputIntr and
Ipc_setCoreEventId to ipc.h to avoid -werrors.
Signed-off-by: Likhitha <x1097556@ti.com>
or parameters. Tests return error code and message upon failure.
Test cases and the corresponding failure modes covered in this commit are as below,
1.Tested Ipc_getMailboxInfoRx,Ipc_getMailboxInfoTx for invalid
selfId and remoteId.
2.Tested Ipc_getCoreName for invalid procId.
3.Tested Ipc_getNavss512MailboxInputIntr with invalid mailbox cluster
and userId.
- moved function definations of Ipc_getNavss512MailboxInputIntr and
Ipc_setCoreEventId to ipc.h to avoid -werrors.
Signed-off-by: Likhitha <x1097556@ti.com>
Revert bool/Bool implementation for the below mentioned Modules:
[KERNEL] 168a794f16611ed035572a5f762eed4682de5bbc.
[LPM] b0b358e538cb5f4ca789811104f30c860b34ba71.
[MCASP] 45ab3cde1d55d53fe485232b6da61e480166aa47.
[DSS] 12834e4c8356ba4e5def1ca0bd1162eaa21f253f.
[FATFS] 4ffe346cbaac27889735c06a394b4192de5fdb34.
[PCIE] 9f050385cca0190fd62072ed9f055a35e3283b77.
[MMCSD] 24d7fb2f0ed97548232bd5d9851862ad00fda3a1.
[OSPI] 48d37a010a7d9bd10a58666d96620c010092afa8.
[BOOT] 9ead181e998c40022c278e3d35bf8fbf4fa5cca6.
[UART] a8f8d2c5bf89a43d68ea6cdd303afeee4c558f3d.
[GPIO] 0cbf515ffe5cd03a773246aad9c2f1e2df6b1dad.
[SCICLIENT] f03d71041062bc1eface645578dc0c78549da64d.
[SCICLIENT] d16aa73f2c5ca5d5cccc04af156a4df9a722d254.
[UDMA] 52a05193ea58876972841210cafdf20efb0808f3.
[UDMA_UTILS] 33c50581ba869ef93e1c6346c97c82cd2888f34d.
[BOARD] b080da2ff6810fdff885b3cdcaac00c6c2ebcc3b.
[BOARD] 5fb6d7b418b17c47714e1fa0311af2b27b7641e9.
[BOARD] 691f99e27ed48234092937baeaee8e780b10e2d0.
[OSAL] fbe051cd3323133274a989018655ddb0b1f3b06c.
[I2C] 6e8661d9de64f2cf00095b2219ba9a7d2780f136.
[IPC] b0e2470359a073ff2f4aa98e34f453000a9fde2c.
[FVID2] 075b6d9268fa3790aa1b73779bc4349e99c40dd0.
[KERNEL] 168a794f16611ed035572a5f762eed4682de5bbc.
[LPM] b0b358e538cb5f4ca789811104f30c860b34ba71.
[MCASP] 45ab3cde1d55d53fe485232b6da61e480166aa47.
[DSS] 12834e4c8356ba4e5def1ca0bd1162eaa21f253f.
[FATFS] 4ffe346cbaac27889735c06a394b4192de5fdb34.
[PCIE] 9f050385cca0190fd62072ed9f055a35e3283b77.
[MMCSD] 24d7fb2f0ed97548232bd5d9851862ad00fda3a1.
[OSPI] 48d37a010a7d9bd10a58666d96620c010092afa8.
[BOOT] 9ead181e998c40022c278e3d35bf8fbf4fa5cca6.
[UART] a8f8d2c5bf89a43d68ea6cdd303afeee4c558f3d.
[GPIO] 0cbf515ffe5cd03a773246aad9c2f1e2df6b1dad.
[SCICLIENT] f03d71041062bc1eface645578dc0c78549da64d.
[SCICLIENT] d16aa73f2c5ca5d5cccc04af156a4df9a722d254.
[UDMA] 52a05193ea58876972841210cafdf20efb0808f3.
[UDMA_UTILS] 33c50581ba869ef93e1c6346c97c82cd2888f34d.
[BOARD] b080da2ff6810fdff885b3cdcaac00c6c2ebcc3b.
[BOARD] 5fb6d7b418b17c47714e1fa0311af2b27b7641e9.
[BOARD] 691f99e27ed48234092937baeaee8e780b10e2d0.
[OSAL] fbe051cd3323133274a989018655ddb0b1f3b06c.
[I2C] 6e8661d9de64f2cf00095b2219ba9a7d2780f136.
[IPC] b0e2470359a073ff2f4aa98e34f453000a9fde2c.
[FVID2] 075b6d9268fa3790aa1b73779bc4349e99c40dd0.
[PDK-11022][J721E]: Fix C66x Clock Id in SBL
-Sciclient_pmSetModuleClkFreq Fails to set 1.35GHz for C66 core due to wrong Clock ID.
-Update the clock ID to 6 to fix this issue.
-This Sciclient falure didn't affect the performance of C66 core because
default frequency set by DM is also 1.35GHz.
-Since c66 core already running at desired frequency, failure in set frequency back to
same value ( 1.35GHz ) doesn't affect the performance.
Signed-off-by: Chandru Dhavamani <chandru@ti.com>
-Sciclient_pmSetModuleClkFreq Fails to set 1.35GHz for C66 core due to wrong Clock ID.
-Update the clock ID to 6 to fix this issue.
-This Sciclient falure didn't affect the performance of C66 core because
default frequency set by DM is also 1.35GHz.
-Since c66 core already running at desired frequency, failure in set frequency back to
same value ( 1.35GHz ) doesn't affect the performance.
Signed-off-by: Chandru Dhavamani <chandru@ti.com>
Fixing I2C baremetal testapp by comparing the ret flag with BFALSE.
Signed-off-by: Asha <x1101668@ti.com>
Signed-off-by: Asha <x1101668@ti.com>
TRUE and FALSE macros are categorised into BTRUE and BFALSE and UTRUE and UFALSE for boolean and unsigned int usecases.
Hence fixing the conflict by updating the boolean macros for Sciclient_unit testcase.
Signed-off-by: Asha <x1101668@ti.com>
Hence fixing the conflict by updating the boolean macros for Sciclient_unit testcase.
Signed-off-by: Asha <x1101668@ti.com>
[PDK-13565][Sciclient]: Enable Query_Fw_Caps
-TISCI_MSG_QUERY_FW_CAPS api is used by linux to get status
of low power mode supported by the SoC.
-Currently, this is enabled in rm_pm_hal and TIFS drivers.
-Inorder to use this feature from linux, this needs to enabled in
sciserver also.
-Add a separate switch case in sciclient_service for TISCI_MSG_QUERY_FW_CAPS
to send the request to query_fw_caps_handler function.
Signed-off-by: Chandru Dhavamani <chandru@ti.com>
-TISCI_MSG_QUERY_FW_CAPS api is used by linux to get status
of low power mode supported by the SoC.
-Currently, this is enabled in rm_pm_hal and TIFS drivers.
-Inorder to use this feature from linux, this needs to enabled in
sciserver also.
-Add a separate switch case in sciclient_service for TISCI_MSG_QUERY_FW_CAPS
to send the request to query_fw_caps_handler function.
Signed-off-by: Chandru Dhavamani <chandru@ti.com>
[FVID2] bool and unsigned macros implementation
previously we have used TRUE/FALSE macros both as boolean and unsigned int
Now BTRUE/BFALSE macros gets used for boolean implementation and UTRUE/UFALSE macros for the unsigned int implementation
Signed-off-by: Asha <x1101668@ti.com>
previously we have used TRUE/FALSE macros both as boolean and unsigned int
Now BTRUE/BFALSE macros gets used for boolean implementation and UTRUE/UFALSE macros for the unsigned int implementation
Signed-off-by: Asha <x1101668@ti.com>
[IPC]bool and unsigned macros implementation
previously we have used TRUE/FALSE macros both as boolean and unsigned int
Now BTRUE/BFALSE macros gets used for boolean implementation and UTRUE/UFALSE macros for the unsigned int implementation
Signed-off-by: Asha <x1101668@ti.com>
previously we have used TRUE/FALSE macros both as boolean and unsigned int
Now BTRUE/BFALSE macros gets used for boolean implementation and UTRUE/UFALSE macros for the unsigned int implementation
Signed-off-by: Asha <x1101668@ti.com>
[I2C] bool and unsigned macro implementation
previously we have used TRUE/FALSE macros both as boolean and unsigned int
Now BTRUE/BFALSE macros gets used for boolean implementation and UTRUE/UFALSE macros for the unsigned int implementation
Swap the constant operands to the right of the comparison operators to aviod miss assignment of values
Signed-off-by: Asha <x1101668@ti.com>
previously we have used TRUE/FALSE macros both as boolean and unsigned int
Now BTRUE/BFALSE macros gets used for boolean implementation and UTRUE/UFALSE macros for the unsigned int implementation
Swap the constant operands to the right of the comparison operators to aviod miss assignment of values
Signed-off-by: Asha <x1101668@ti.com>
[OSAL] bool and unsigned macros implementation for OSAL module
previously we have used TRUE/FALSE macros both as boolean and unsigned int
Now BTRUE/BFALSE macros gets used for boolean implementation and UTRUE/UFALSE macros for the unsigned int implementation
Signed-off-by: Asha <x1101668@ti.com>
previously we have used TRUE/FALSE macros both as boolean and unsigned int
Now BTRUE/BFALSE macros gets used for boolean implementation and UTRUE/UFALSE macros for the unsigned int implementation
Signed-off-by: Asha <x1101668@ti.com>
bool/Bool implemetation in the following path
ti/board/diag/
board/src/devices/
ti/board/src/flash
ti/board/src/j784s4_evm/
ti/board/src/j721s2_evm/
ti/board/src/j7200_evm/
ti/board/src/j721e_evm/
Signed-off-by: Asha <x1101668@ti.com>
ti/board/diag/
board/src/devices/
ti/board/src/flash
ti/board/src/j784s4_evm/
ti/board/src/j721s2_evm/
ti/board/src/j7200_evm/
ti/board/src/j721e_evm/
Signed-off-by: Asha <x1101668@ti.com>
changes in board/utils/
Signed-off-by: Asha <x1101668@ti.com>
Signed-off-by: Asha <x1101668@ti.com>
Including the CSL header file
Signed-off-by: Asha <x1101668@ti.com>
Signed-off-by: Asha <x1101668@ti.com>
[UDMA_UTILS]bool and unsigned macro implementation
previously we have used TRUE/FALSE macros both as boolean and unsigned int
Now BTRUE/BFALSE macros gets used for boolean implementation and UTRUE/UFALSE macros for the unsigned int implementation
Signed-off-by: Asha <x1101668@ti.com>
previously we have used TRUE/FALSE macros both as boolean and unsigned int
Now BTRUE/BFALSE macros gets used for boolean implementation and UTRUE/UFALSE macros for the unsigned int implementation
Signed-off-by: Asha <x1101668@ti.com>
[UDMA] bool and unsigned macro implementation
previously we have used TRUE/FALSE macros both as boolean and unsigned int
Now BTRUE/BFALSE macros gets used for boolean implementation and UTRUE/UFALSE macros for the unsigned int implementation
Signed-off-by: Asha <x1101668@ti.com>
previously we have used TRUE/FALSE macros both as boolean and unsigned int
Now BTRUE/BFALSE macros gets used for boolean implementation and UTRUE/UFALSE macros for the unsigned int implementation
Signed-off-by: Asha <x1101668@ti.com>
[SCICLIENT]bool and unsigned macros implementation
previously we have used TRUE/FALSE macros both as boolean and unsigned int
Now BTRUE/BFALSE macros gets used for boolean implementation and UTRUE/UFALSE macros for the unsigned int implementation
Signed-off-by: Asha <x1101668@ti.com>
previously we have used TRUE/FALSE macros both as boolean and unsigned int
Now BTRUE/BFALSE macros gets used for boolean implementation and UTRUE/UFALSE macros for the unsigned int implementation
Signed-off-by: Asha <x1101668@ti.com>
[GPIO] bool and unsigned macros implementation
previously we have used TRUE/FALSE macros both as boolean and unsigned int
Now BTRUE/BFALSE macros gets used for boolean implementation and UTRUE/UFALSE macros for the unsigned int implementation
Signed-off-by: Asha <x1101668@ti.com>
previously we have used TRUE/FALSE macros both as boolean and unsigned int
Now BTRUE/BFALSE macros gets used for boolean implementation and UTRUE/UFALSE macros for the unsigned int implementation
Signed-off-by: Asha <x1101668@ti.com>
[UART] bool and unsigned macros implementation
previously we have used TRUE/FALSE macros both as boolean and unsigned int
Now BTRUE/BFALSE macros gets used for boolean implementation and UTRUE/UFALSE macros for the unsigned int implementation
Signed-off-by: Asha <x1101668@ti.com>
previously we have used TRUE/FALSE macros both as boolean and unsigned int
Now BTRUE/BFALSE macros gets used for boolean implementation and UTRUE/UFALSE macros for the unsigned int implementation
Signed-off-by: Asha <x1101668@ti.com>
[BOOT] bool and unsigned macros implementation
previously we have used TRUE/FALSE macros both as boolean and unsigned int
Now BTRUE/BFALSE macros gets used for boolean implementation and UTRUE/UFALSE macros for the unsigned int implementation
Signed-off-by: Asha <x1101668@ti.com>
previously we have used TRUE/FALSE macros both as boolean and unsigned int
Now BTRUE/BFALSE macros gets used for boolean implementation and UTRUE/UFALSE macros for the unsigned int implementation
Signed-off-by: Asha <x1101668@ti.com>
[OSPI] bool and unsigned macros implementation
previously we have used TRUE/FALSE macros both as boolean and unsigned int
Now BTRUE/BFALSE macros gets used for boolean implementation and UTRUE/UFALSE macros for the unsigned int implementation
Swap the constant operands to the right of the comparison operators to avoid miss assignment of values
Signed-off-by: Asha <x1101668@ti.com>
previously we have used TRUE/FALSE macros both as boolean and unsigned int
Now BTRUE/BFALSE macros gets used for boolean implementation and UTRUE/UFALSE macros for the unsigned int implementation
Swap the constant operands to the right of the comparison operators to avoid miss assignment of values
Signed-off-by: Asha <x1101668@ti.com>
[MMCSD] bool and unsigned macros implementation
previously we have used TRUE/FALSE macros both as boolean and unsigned int
Now BTRUE/BFALSE macros gets used for boolean implementation and UTRUE/UFALSE macros for the unsigned int implementation
Signed-off-by: Asha <x1101668@ti.com>
previously we have used TRUE/FALSE macros both as boolean and unsigned int
Now BTRUE/BFALSE macros gets used for boolean implementation and UTRUE/UFALSE macros for the unsigned int implementation
Signed-off-by: Asha <x1101668@ti.com>
[PCIE] bool and unsigned macros implementation
previously we have used TRUE/FALSE macros both as boolean and unsigned int
Now BTRUE/BFALSE macros gets used for boolean implementation and UTRUE/UFALSE macros for the unsigned int implementation
Signed-off-by: Asha <x1101668@ti.com>
previously we have used TRUE/FALSE macros both as boolean and unsigned int
Now BTRUE/BFALSE macros gets used for boolean implementation and UTRUE/UFALSE macros for the unsigned int implementation
Signed-off-by: Asha <x1101668@ti.com>
[FATFS] bool and unsigned macros implementation
previously we have used TRUE/FALSE macros both as boolean and unsigned int
Now BTRUE/BFALSE macros gets used for boolean implementation and UTRUE/UFALSE macros for the unsigned int implementation
Signed-off-by: Asha <x1101668@ti.com>
previously we have used TRUE/FALSE macros both as boolean and unsigned int
Now BTRUE/BFALSE macros gets used for boolean implementation and UTRUE/UFALSE macros for the unsigned int implementation
Signed-off-by: Asha <x1101668@ti.com>
[DSS] bool and unsigned macros implementation
previously we have used TRUE/FALSE macros both as boolean and unsigned int
Now BTRUE/BFALSE macros gets used for boolean implementation and UTRUE/UFALSE macros for the unsigned int implementation
Swap the constant operands to the right of the comparison operators to aviod miss assignment of values
Signed-off-by: Asha <x1101668@ti.com>
previously we have used TRUE/FALSE macros both as boolean and unsigned int
Now BTRUE/BFALSE macros gets used for boolean implementation and UTRUE/UFALSE macros for the unsigned int implementation
Swap the constant operands to the right of the comparison operators to aviod miss assignment of values
Signed-off-by: Asha <x1101668@ti.com>
[MCASP] bool and unsigned macros implementation
previously we have used TRUE/FALSE macros both as boolean and unsigned int
Now BTRUE/BFALSE macros gets used for boolean implementation and UTRUE/UFALSE macros for the unsigned int implementation
Swap the constant operands to the right of the comparison operators to aviod miss assignment of values
Signed-off-by: Asha <x1101668@ti.com>
previously we have used TRUE/FALSE macros both as boolean and unsigned int
Now BTRUE/BFALSE macros gets used for boolean implementation and UTRUE/UFALSE macros for the unsigned int implementation
Swap the constant operands to the right of the comparison operators to aviod miss assignment of values
Signed-off-by: Asha <x1101668@ti.com>
[LPM] bool and unsigned macros implementation
previously we have used TRUE/FALSE macros both as boolean and unsigned int
Now BTRUE/BFALSE macros gets used for boolean implementation and UTRUE/UFALSE macros for the unsigned int implementation
Signed-off-by: Asha <x1101668@ti.com>
previously we have used TRUE/FALSE macros both as boolean and unsigned int
Now BTRUE/BFALSE macros gets used for boolean implementation and UTRUE/UFALSE macros for the unsigned int implementation
Signed-off-by: Asha <x1101668@ti.com>
[KERNEL] bool and unsigned macros implementation
previously we have used TRUE/FALSE macros both as boolean and unsigned int
Now BTRUE/BFALSE macros gets used for boolean implementation and UTRUE/UFALSE macros for the unsigned int implementation
Signed-off-by: Asha <x1101668@ti.com>
previously we have used TRUE/FALSE macros both as boolean and unsigned int
Now BTRUE/BFALSE macros gets used for boolean implementation and UTRUE/UFALSE macros for the unsigned int implementation
Signed-off-by: Asha <x1101668@ti.com>
Removed validation of input parameters that was already present in the i2c_drv.c file.
Signed-off-by: Pradeepa Chandrashekar x1074845@ti.com
Signed-off-by: Pradeepa Chandrashekar x1074845@ti.com
OSAL: Driver update for code coverage
- Removed the Debug_assert check as most of instances/handles are double checked for NULL
- Hence removed duplicated NULL checks for few osal sub modules
Signed-off-by: Asha <x1101668@ti.com>
- Removed the Debug_assert check as most of instances/handles are double checked for NULL
- Hence removed duplicated NULL checks for few osal sub modules
Signed-off-by: Asha <x1101668@ti.com>
OSAL: Added new testcases for the below mentioned Sub-Modules
1. HwiP_create Null check
2. HwiP_delete Allocation count check
3. LoadP_freertos Null check
4. Utils_nonos Null check
Signed-off-by: Asha <x1101668@ti.com>
1. HwiP_create Null check
2. HwiP_delete Allocation count check
3. LoadP_freertos Null check
4. Utils_nonos Null check
Signed-off-by: Asha <x1101668@ti.com>
UDMA-UT : Testcases for Udma Ring Common
- Implemented test cases in UDMA_UT test app for UDMA Ring Common
1.UdmaTestRingAttach - PDK-13424
2.UdmaTestRingDetach - PDK-13425
3.UdmaTestRingDequeueRaw - PDK-13427
4.UdmaTestRingQueueRaw - PDK-13428
5.udmaTestRingFree - PDK-13393
6.UdmaTestRingFlushRaw - PDK-13553
7.udmaTestRingAlloc - PDK-13554
Signed-off-by: swetha <x1081792@ti.com>
- Implemented test cases in UDMA_UT test app for UDMA Ring Common
1.UdmaTestRingAttach - PDK-13424
2.UdmaTestRingDetach - PDK-13425
3.UdmaTestRingDequeueRaw - PDK-13427
4.UdmaTestRingQueueRaw - PDK-13428
5.udmaTestRingFree - PDK-13393
6.UdmaTestRingFlushRaw - PDK-13553
7.udmaTestRingAlloc - PDK-13554
Signed-off-by: swetha <x1081792@ti.com>
[Sciclient]: Fix MISRAC issues
-9 MISRA issues fixed for checker code MISRA.ETYPE.CATEGORY.DIFFERENT.2012
-4 MISRA issues fixed for checker code MISRA.BREAK_OR_GOTO.MULTIPLE.2012
-1 MISRA issue fixed for checker code MISRA.ETYPE.COMP.ASSIGN.2012
-1 MISRA issue fix with checker code MISRA.LITERAL.UNSIGNED.SUFFIX
-2 MISRA issues fix with checker code MISRA.ASM.ENCAPS
-1 MISRA issue fixed with checker code MISRA.FUNC.NOPROT.DEF.2012
-2 MISRA issues fixed with checker code MISRA.EXPR.PARENS.2012
-2 MISRA issues fixed with checker code MISRA.IF.NO_COMPOUND
-1 MISRA issue fixed with checker code MISRA.CAST.OBJ_PTR_TO_INT.2012
-1 MISRA issue fixed with checker code MISRA.FUNC.UNUSEDRET.2012
-1 MISRA issue fixed with checker code MISRA.CAST.VOID_PTR_TO_INT.2012
-9 MISRA issues fixed for checker code MISRA.ETYPE.CATEGORY.DIFFERENT.2012
-4 MISRA issues fixed for checker code MISRA.BREAK_OR_GOTO.MULTIPLE.2012
-1 MISRA issue fixed for checker code MISRA.ETYPE.COMP.ASSIGN.2012
-1 MISRA issue fix with checker code MISRA.LITERAL.UNSIGNED.SUFFIX
-2 MISRA issues fix with checker code MISRA.ASM.ENCAPS
-1 MISRA issue fixed with checker code MISRA.FUNC.NOPROT.DEF.2012
-2 MISRA issues fixed with checker code MISRA.EXPR.PARENS.2012
-2 MISRA issues fixed with checker code MISRA.IF.NO_COMPOUND
-1 MISRA issue fixed with checker code MISRA.CAST.OBJ_PTR_TO_INT.2012
-1 MISRA issue fixed with checker code MISRA.FUNC.UNUSEDRET.2012
-1 MISRA issue fixed with checker code MISRA.CAST.VOID_PTR_TO_INT.2012
UDMA_UT : Negative testcases for ring and flow params init
- Implemented negative test cases in UDMA_UT test app for UDMA Ring Common and UDMA Flow API's
1.UdmaTest_RingPrms_init - PDK-13547
2.UdmaTest_RingMonPrms_init - PDK-13548
3.UdmaTest_FlowPrms_init - PDK-13549
Signed-off-by: swetha <x1081792@ti.com>
- Implemented negative test cases in UDMA_UT test app for UDMA Ring Common and UDMA Flow API's
1.UdmaTest_RingPrms_init - PDK-13547
2.UdmaTest_RingMonPrms_init - PDK-13548
3.UdmaTest_FlowPrms_init - PDK-13549
Signed-off-by: swetha <x1081792@ti.com>
Dynamic Coverage improvement for sciclient_dkek.c file
- Added negative testcase for dkek functions
Signed-off-by: ChandrakantB <x1109162@ti.com>
- Added negative testcase for dkek functions
Signed-off-by: ChandrakantB <x1109162@ti.com>
Dynamic Coverage improvement for sciclient_keywriter.c file
- Added negative testcase for keywriter function
Signed-off-by: ChandrakantB <x1109162@ti.com>
- Added negative testcase for keywriter function
Signed-off-by: ChandrakantB <x1109162@ti.com>
Dynamic coverage improvement for sciclient_genericMsgs.c
- Added a negative test case for Sciclient_msmcQuery() function by passing the request parameter as NULL
Signed-off-by: ChandrakantB <x1109162@ti.com>
- Added a negative test case for Sciclient_msmcQuery() function by passing the request parameter as NULL
Signed-off-by: ChandrakantB <x1109162@ti.com>
Dynamic Coverage improvement for sciclient_direct.c and sciclient_pm.c
- Added testcase to cover PM related functions
- Improvement in the statement coverage is as follows
- 56% to 99% in sciclient_direct.c
- 11% to 96% in sciclient_pm.c
Signed-off-by: ChandrakantB <x1109162@ti.com>
- Added testcase to cover PM related functions
- Improvement in the statement coverage is as follows
- 56% to 99% in sciclient_direct.c
- 11% to 96% in sciclient_pm.c
Signed-off-by: ChandrakantB <x1109162@ti.com>
OSAL: Enabling Extended Block Memory Test to cover dynamic coverage for Utils_nonos.c
Signed-off-by: Asha <x1101668@ti.com>
Signed-off-by: Asha <x1101668@ti.com>
[OSAL] Added negative testcases for the below mentioned Sub-modules :
1. EventP_freertos.c
2. EventP_safertos.c
3. HwiP_freertos.c
4. HwiP_safertos.c
5. RegisterIntr_nonos.c
Signed-off-by: Asha <x1101668@ti.com>
1. EventP_freertos.c
2. EventP_safertos.c
3. HwiP_freertos.c
4. HwiP_safertos.c
5. RegisterIntr_nonos.c
Signed-off-by: Asha <x1101668@ti.com>
IPC:Added Negative test cases
-These test cases cover IPC API failures for invalid configuration
or parameters. Tests return error code and message upon failure.
- Test cases and the corresponding failure modes covered in this commit are as below,
1.Tested IPC initialization APIs with nUll checks.
2.Tested ipc_utils APIs for heapcreate, qcreate and qremove with null
parameters.
3.Tested Ipc_getNavss512MailboxInputIntr with invalid configurations.
Signed-off-by: Likhitha <x1097556@ti.com>
-These test cases cover IPC API failures for invalid configuration
or parameters. Tests return error code and message upon failure.
- Test cases and the corresponding failure modes covered in this commit are as below,
1.Tested IPC initialization APIs with nUll checks.
2.Tested ipc_utils APIs for heapcreate, qcreate and qremove with null
parameters.
3.Tested Ipc_getNavss512MailboxInputIntr with invalid configurations.
Signed-off-by: Likhitha <x1097556@ti.com>
[Trace Callbacks] Adding trace callback support to Fvid2
- This enables support for the application to use trace
logging functions at the application level within the fvid2 driver.
- This enables support for the application to use trace
logging functions at the application level within the fvid2 driver.
4 months agoFix: j7200: BootApp: Issue loading app images PSDKQNX_09_01_00_RC4 PSDKQNX_09_01_00_RC5 REL.PSDK.09.01.00.19 REL.PSDK.09.01.00.20 REL.PSDK.09.01.00.21 REL.PSDK.09.01.00.22
Fix: j7200: BootApp: Issue loading app images
While BootApp trying to load app, there is 1-bit mismatch at location
0x70014020. Increase CS delay timings to make sure flash gets enough
time to get data ready before controller tries to sample the data.
Signed-off-by: Lohith Kumar <l-kumar@ti.com>
While BootApp trying to load app, there is 1-bit mismatch at location
0x70014020. Increase CS delay timings to make sure flash gets enough
time to get data ready before controller tries to sample the data.
Signed-off-by: Lohith Kumar <l-kumar@ti.com>
4 months agoFix: SafeRTOS: UDMA UT: C7x: Fail to create task REL.PSDK.09.01.00.17 REL.PSDK.09.01.00.18
Fix: SafeRTOS: UDMA UT: C7x: Fail to create task
- SafeRTOS requires stack memory to be aligned with 32* 1024 for C7x,
where as udma ut was aligning stack size with 64 B, which is causing
issue creating task. Updating stack size to be aligned with 32 KB.
Signed-off-by: swetha <x1081792@ti.com>
- SafeRTOS requires stack memory to be aligned with 32* 1024 for C7x,
where as udma ut was aligning stack size with 64 B, which is causing
issue creating task. Updating stack size to be aligned with 32 KB.
Signed-off-by: swetha <x1081792@ti.com>
UDMA UT: Additional test case support
- Added Seperate Testcase ID's for Negative testcases of UDMA Utility Functions in file
udma_testcases.h
- udmaTestUdmaPrinfNegTc - PDK-13370
- udmaTestUdmaGetTrSizeNegTc - PDK-13515
- udmaTestUdmaPhyToVirtNegTc - PDK-13516
- udmaTestUdmaVirtToPhyNegTc - PDK-13518
- udmaTestUdmaPrinftMutexNegTc - PDK-13517
- Added Seperate Testcase ID's for Negative testcases of UDMA Utility Functions in file
udma_testcases.h
- udmaTestUdmaPrinfNegTc - PDK-13370
- udmaTestUdmaGetTrSizeNegTc - PDK-13515
- udmaTestUdmaPhyToVirtNegTc - PDK-13516
- udmaTestUdmaVirtToPhyNegTc - PDK-13518
- udmaTestUdmaPrinftMutexNegTc - PDK-13517
[MAKERULE] Fixing spacing error in makerules
[PDK-13525] Configure OSPI before loading hsm.bin in combined boot
- In legacy boot, SBL configure OSPI to load tifs, and the same OSPI
configurations are used to load hsm.bin
- In combined boot, Since RBL loads tifs, SBL doesn't configure OSPI so
We need to configure OSPI before loading hsm.bin
Signed-off-by: Sai Ramakurthi <s-ramakurthi@ti.com>
- In legacy boot, SBL configure OSPI to load tifs, and the same OSPI
configurations are used to load hsm.bin
- In combined boot, Since RBL loads tifs, SBL doesn't configure OSPI so
We need to configure OSPI before loading hsm.bin
Signed-off-by: Sai Ramakurthi <s-ramakurthi@ti.com>
Update QNX binaries for J784S4 HS
- Existing qnx binaries for j784s4 hs are of size 0, so regenerated the
binaries and updated again
Signed-off-by: Sai Ramakurthi <s-ramakurthi@ti.com>
- Existing qnx binaries for j784s4 hs are of size 0, so regenerated the
binaries and updated again
Signed-off-by: Sai Ramakurthi <s-ramakurthi@ti.com>
Fix OSPI data mismatch issue
Work around to fix xip disable for nor write/erase and nand page load.
Signed-off-by: Lohith Kumar <l-kumar@ti.com>
Work around to fix xip disable for nor write/erase and nand page load.
Signed-off-by: Lohith Kumar <l-kumar@ti.com>
[SBL] Configure OSPI baudDivRate to 8
- BaudRateDiv was hardcoded to 6 in OSPI driver in xSPI
flash. Due to change in OSPI driver, now BaudRateDiv is set to 32 by
default
- Since SBL doesn't set BaudRateDiv explicitly, BaudRateDiv is set to 32
and results in high Boot Time
- Set BaudRateDiv to 8 in SBL while copying appimage as well as while
copying tifs.
- For J721E, BaudRateDiv is not hardcoded to 6 by OSPI driver, therefore
we are setting the best possible baudRateDiv (8)
- All tests have passed string should be printed based on the
CanResptime and not based on the pmuCntrVal
Signed-off-by: Sai Ramakurthi <s-ramakurthi@ti.com>
- BaudRateDiv was hardcoded to 6 in OSPI driver in xSPI
flash. Due to change in OSPI driver, now BaudRateDiv is set to 32 by
default
- Since SBL doesn't set BaudRateDiv explicitly, BaudRateDiv is set to 32
and results in high Boot Time
- Set BaudRateDiv to 8 in SBL while copying appimage as well as while
copying tifs.
- For J721E, BaudRateDiv is not hardcoded to 6 by OSPI driver, therefore
we are setting the best possible baudRateDiv (8)
- All tests have passed string should be printed based on the
CanResptime and not based on the pmuCntrVal
Signed-off-by: Sai Ramakurthi <s-ramakurthi@ti.com>
[PDK-13121] Add support for SBL combined boot on HS-FS devices
- Added two SBL variants i.e sbl_mmcsd_img_combined_hs_fs,
sbl_ospi_img_combined_hs_fs which were used to boot an application in
combined image format
- Space allocated for tifs+tifs_data is 160 KB in DMSC IRAM, so if
default_boardCfg_rm.c is used then tifs+tifs_data is exceeding 160 KB
and therefore RBL boot failed.
- So used default_boardCfg_tifs_rm.c instead of default_boardCfg_rm.c
inorder to fit in tifs+tifs_data in DMSC IRAM
Signed-off-by: Sai Ramakurthi <s-ramakurthi@ti.com>
- Added two SBL variants i.e sbl_mmcsd_img_combined_hs_fs,
sbl_ospi_img_combined_hs_fs which were used to boot an application in
combined image format
- Space allocated for tifs+tifs_data is 160 KB in DMSC IRAM, so if
default_boardCfg_rm.c is used then tifs+tifs_data is exceeding 160 KB
and therefore RBL boot failed.
- So used default_boardCfg_tifs_rm.c instead of default_boardCfg_rm.c
inorder to fit in tifs+tifs_data in DMSC IRAM
Signed-off-by: Sai Ramakurthi <s-ramakurthi@ti.com>
Update Board Cfg Binaries
- Updated the board cfg binaries after this PR: https://bitbucket.itg.ti.com/projects/PSDKLA/repos/k3-resource-partitioning/pull-requests/104/overview
- Template of sciclient_tifsBoardCfg_rm is updated in k3 Resource
Partitioning tool, so updated the board cfg binaries with that change
Signed-off-by: Sai Ramakurthi <s-ramakurthi@ti.com>
- Updated the board cfg binaries after this PR: https://bitbucket.itg.ti.com/projects/PSDKLA/repos/k3-resource-partitioning/pull-requests/104/overview
- Template of sciclient_tifsBoardCfg_rm is updated in k3 Resource
Partitioning tool, so updated the board cfg binaries with that change
Signed-off-by: Sai Ramakurthi <s-ramakurthi@ti.com>
[OSAL_CACHE_TESTAPP]: Add signed appimages for osal_multicore_cache_testapp.
Signed-off-by: Mriganka Chakravarty <m-chakravarty@ti.com>
Signed-off-by: Mriganka Chakravarty <m-chakravarty@ti.com>
OSPI: Enable XIP prefetch for OSPI reads
XIP prefetch will prefetch 32 bytes of data from controller in advance.
Problem:
The prefetched data needs to be flushed if the data gets updated in
flash. Inorder to flush the prefetched data we need to disable and
re-enable XIP prefetch. The prefetched data will cause data integrity
issues in following scenarios:
a. NOR flash: Programing/Erasing new page whose data has already been
prefetched.
b. NAND flash: Loading a new page, where the previous page has been
partially Read.
Currently we are disabling XIP prefetch while performing dac reads to
maintain data integrity, due to this sbl app load time increased
significantly while loading app, because sbl copies various sections to
different memories, and these sections are significantly smaller and
prefetching 32 bytes helping them to reduce copy time.
Solution:
1. Support new command to enable/disable XIP prefetch in OSPI driver.
2. Send command to flush the prefetched data while programming/erasing
NOR flash memory.
3. Send command to flush the prefetched data while loading new page in
NAND flash memory.
Fixes: PDK-13513
Signed-off-by: Lohith Kumar <l-kumar@ti.com>
XIP prefetch will prefetch 32 bytes of data from controller in advance.
Problem:
The prefetched data needs to be flushed if the data gets updated in
flash. Inorder to flush the prefetched data we need to disable and
re-enable XIP prefetch. The prefetched data will cause data integrity
issues in following scenarios:
a. NOR flash: Programing/Erasing new page whose data has already been
prefetched.
b. NAND flash: Loading a new page, where the previous page has been
partially Read.
Currently we are disabling XIP prefetch while performing dac reads to
maintain data integrity, due to this sbl app load time increased
significantly while loading app, because sbl copies various sections to
different memories, and these sections are significantly smaller and
prefetching 32 bytes helping them to reduce copy time.
Solution:
1. Support new command to enable/disable XIP prefetch in OSPI driver.
2. Send command to flush the prefetched data while programming/erasing
NOR flash memory.
3. Send command to flush the prefetched data while loading new page in
NAND flash memory.
Fixes: PDK-13513
Signed-off-by: Lohith Kumar <l-kumar@ti.com>
4 months ago[PDK-13328][Sciclient]: Resolve build warnings obtained on enabling the trace REL.PSDK.09.01.00.15
[PDK-13328][Sciclient]: Resolve build warnings obtained on enabling the trace
Datatype mismatch warnings arised on enabling the trace either
on UART or on BUFFER.
The build warnings obtained with trace enabled are resolved by
doing the required typecasting on the passed arguments.
Signed-off-by: Thejasvi Konduru <t-konduru@ti.com>
Datatype mismatch warnings arised on enabling the trace either
on UART or on BUFFER.
The build warnings obtained with trace enabled are resolved by
doing the required typecasting on the passed arguments.
Signed-off-by: Thejasvi Konduru <t-konduru@ti.com>
Fixed IPC perf test for J7 devices
Signed-off-by: Rishabh Garg <rishabh@ti.com>
Signed-off-by: Rishabh Garg <rishabh@ti.com>
[rm_pm_hal]: Enable Query firmware capability
Query Firmware Capability function is defined inside rm_pm_hal
module. Enable this feature in rm_pm_hal_build makefile.
Signed-off-by: Chandru Dhavamani <chandru@ti.com>
Query Firmware Capability function is defined inside rm_pm_hal
module. Enable this feature in rm_pm_hal_build makefile.
Signed-off-by: Chandru Dhavamani <chandru@ti.com>
[LPM]: Add lpm_s2r lib build support
Add lpm_s2r library build support for j7200 evm.
Signed-off-by: Chandru Dhavamani <chandru@ti.com>
Add lpm_s2r library build support for j7200 evm.
Signed-off-by: Chandru Dhavamani <chandru@ti.com>
Disable Sciclient Firewall Exception Notification Testcase
Sciclient Firewall Exception Notification Testcase fails in release mode on
all jacinto platforms. Hence, disabled this particular testcase in
sciclient_unit_testapp.
Signed-off-by: Thejasvi Konduru <t-konduru@ti.com>
Sciclient Firewall Exception Notification Testcase fails in release mode on
all jacinto platforms. Hence, disabled this particular testcase in
sciclient_unit_testapp.
Signed-off-by: Thejasvi Konduru <t-konduru@ti.com>
Revert "IPC:Added Negative test cases"
This reverts commit 1751364b7dcd440e3d1122534b842d5905b5cbf9.
This reverts commit 1751364b7dcd440e3d1122534b842d5905b5cbf9.
IPC:Added Negative test cases
-These test cases cover IPC API failures for invalid configuration
or parameters. Tests return error code and message upon failure.
- Test cases and the corresponding failure modes covered in this commit are as below,
1.Tested IPC initialization APIs with nUll checks.
2.Tested ipc_utils APIs for heapcreate, qcreate and qremove with null
parameters.
3.Tested Ipc_getNavss512MailboxInputIntr with invalid configurations.
Signed-off-by: Likhitha <x1097556@ti.com>
-These test cases cover IPC API failures for invalid configuration
or parameters. Tests return error code and message upon failure.
- Test cases and the corresponding failure modes covered in this commit are as below,
1.Tested IPC initialization APIs with nUll checks.
2.Tested ipc_utils APIs for heapcreate, qcreate and qremove with null
parameters.
3.Tested Ipc_getNavss512MailboxInputIntr with invalid configurations.
Signed-off-by: Likhitha <x1097556@ti.com>
4 months ago[SCISERVER]: Move exception handlers to OCMC and KERNEL_FUNCTION to TCM B. REL.PSDK.09.01.00.12 REL.PSDK.09.01.00.13
[SCISERVER]: Move exception handlers to OCMC and KERNEL_FUNCTION to TCM B.
- After removal of LTO flag, build fails due to linking issuues.
Signed-off-by: Mriganka Chakravarty <m-chakravarty@ti.com>
- After removal of LTO flag, build fails due to linking issuues.
Signed-off-by: Mriganka Chakravarty <m-chakravarty@ti.com>
[PDK-13154][Sciclient]: Fix Main UART to MCU R5 core interrupt routing testcase
In order to execute the UART testcase, sciclient_unit_testapp is run on
mcu1_0 core, the testcases previous to the UART testcase uses MCU uart
instance and the UART testcase uses MAIN uart instance.
For J7200, J721E the value of MCU uart instance and Main uart instance used
by the board is the same. Both of these instances use the same structure to
store their respective UART Hardware attributes. This structure attributes are
not set to the default values before being used by the MAIN uart instance.
This resulted in the failure for J7200, J721E.
The issue is fixed by a using a different structure to store the values
corresponding to our main uart instance instead of modifying it in the
structure used by the mcu uart instance.
Signed-off-by: Thejasvi Konduru <t-konduru@ti.com>
In order to execute the UART testcase, sciclient_unit_testapp is run on
mcu1_0 core, the testcases previous to the UART testcase uses MCU uart
instance and the UART testcase uses MAIN uart instance.
For J7200, J721E the value of MCU uart instance and Main uart instance used
by the board is the same. Both of these instances use the same structure to
store their respective UART Hardware attributes. This structure attributes are
not set to the default values before being used by the MAIN uart instance.
This resulted in the failure for J7200, J721E.
The issue is fixed by a using a different structure to store the values
corresponding to our main uart instance instead of modifying it in the
structure used by the mcu uart instance.
Signed-off-by: Thejasvi Konduru <t-konduru@ti.com>
[Compiler][PDK-13499]: Remove flto flag in rules_ti_cgt_arm.mk
With compiler migration to 3.2.0.LTS,IPC_S_FUNC_RPMSG_SAMPLE_CLIENT
test fails in linux DM for j7200 device.
The root cause of this problem is the link-time optimization during run-time.
To resolve this issue, remove the -flto flag in the rules_ti_cgt_arm makefile.
This flag should be removed for all Jacinto devices to prevent any further problems.
Signed-off-by: Chandru Dhavamani <chandru@ti.com>
With compiler migration to 3.2.0.LTS,IPC_S_FUNC_RPMSG_SAMPLE_CLIENT
test fails in linux DM for j7200 device.
The root cause of this problem is the link-time optimization during run-time.
To resolve this issue, remove the -flto flag in the rules_ti_cgt_arm makefile.
This flag should be removed for all Jacinto devices to prevent any further problems.
Signed-off-by: Chandru Dhavamani <chandru@ti.com>
[SBL] Retain sbl_profile_info section in linker file
- Linker has thrown away the sbl_profile_info section since it is not used
anywhere.
- Inorder liker to retain sbl_profile_info section, used retain in
linker files so that this section can be used in sbl_boot_perf_test to
print the profiling numbers
- Board_init API is failing if MCU_PLL is passed, As a workaround bypassing the error log for boot perf test
- By-passing error checks needs to be reverted after fixing: PDK-13497
Signed-off-by: Sai Ramakurthi <s-ramakurthi@ti.com>
- Linker has thrown away the sbl_profile_info section since it is not used
anywhere.
- Inorder liker to retain sbl_profile_info section, used retain in
linker files so that this section can be used in sbl_boot_perf_test to
print the profiling numbers
- Board_init API is failing if MCU_PLL is passed, As a workaround bypassing the error log for boot perf test
- By-passing error checks needs to be reverted after fixing: PDK-13497
Signed-off-by: Sai Ramakurthi <s-ramakurthi@ti.com>
[SBL] Update Linux/U-Boot binaries with 09.01.00.002 tag
Signed-off-by: Sai Ramakurthi <s-ramakurthi@ti.com>
Signed-off-by: Sai Ramakurthi <s-ramakurthi@ti.com>
5 months agoPDK-13455:Board: Added missing brackets in a wait loop REL.PSDK.09.01.00.09 REL.PSDK.09.01.00.10
PDK-13455:Board: Added missing brackets in a wait loop
PDK-13369: Board: Removed redundant MCAN PLL config
- MCAN PLL is configured twice with different parent.
Removed the duplicate PLL config.
- MCAN PLL is configured twice with different parent.
Removed the duplicate PLL config.
lwip: port: Add lwipopts-common.h to package file list
Added lwipopts-common.h to package file list.
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
Added lwipopts-common.h to package file list.
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
Fix OSPI Nand Write Tuning Pattern TestCase
Nand tuning pattern page offset is at cachable region. In write tuning
test we are setting cache enable to false, which causes drive to not
perform any cache operationss, which is leading to writing invalid
pattern to flash. Set cache enable to true, to make sure OSPI driver
performs cache operations.
Signed-off-by: Lohith Kumar <l-kumar@ti.com>
Nand tuning pattern page offset is at cachable region. In write tuning
test we are setting cache enable to false, which causes drive to not
perform any cache operationss, which is leading to writing invalid
pattern to flash. Set cache enable to true, to make sure OSPI driver
performs cache operations.
Signed-off-by: Lohith Kumar <l-kumar@ti.com>
lwip: Remove local thumb build flag
PDK now supports Thumb2 enabled by default, lwIP stack/port no longer needs
to enable Thumb2 locally.
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
PDK now supports Thumb2 enabled by default, lwIP stack/port no longer needs
to enable Thumb2 locally.
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
lwip: Remove TI-RTOS and AM65xx support
TI-RTOS and AM65xx have not been supported since SDK 8.2. TI-RTOS port
was not restructured in the same way FreeRTOS and SafeRTOS ports were,
so it doesn't make sense to keep it around anymore.
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
TI-RTOS and AM65xx have not been supported since SDK 8.2. TI-RTOS port
was not restructured in the same way FreeRTOS and SafeRTOS ports were,
so it doesn't make sense to keep it around anymore.
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
lwip: port: Restructure SoC and OS configs
Previously, lwIP configuration parameters were structured per OS.
So a given platform had one lwipopts.h header file for each supported
OS with the majority of the configuration parameters set to the same
values.
The right structure is to split the configuration parameters in
OS-dependent and SoC-dependent. For a given SoC, a single SoC header is
maintained, but different OS headers as needed.
The file organization in the new structure is:
- lwip-port/<OS>/include/lwipopts_os.h
- lwip-port/config/lwipopts_common.h
- lwip-port/config/<SOC>/lwipopts.h
with lwiptops.h including lwipopts_common.h and lwipopts_os.h.
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
Previously, lwIP configuration parameters were structured per OS.
So a given platform had one lwipopts.h header file for each supported
OS with the majority of the configuration parameters set to the same
values.
The right structure is to split the configuration parameters in
OS-dependent and SoC-dependent. For a given SoC, a single SoC header is
maintained, but different OS headers as needed.
The file organization in the new structure is:
- lwip-port/<OS>/include/lwipopts_os.h
- lwip-port/config/lwipopts_common.h
- lwip-port/config/<SOC>/lwipopts.h
with lwiptops.h including lwipopts_common.h and lwipopts_os.h.
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
lwip: update to version 2.2.0
lwip was updated to version 2.2.0.
There are some other commits in the repo_manifests that
are cross-dependent with this.
Signed-off-by: Xuanhao Shi <x-shi@ti.com>
lwip was updated to version 2.2.0.
There are some other commits in the repo_manifests that
are cross-dependent with this.
Signed-off-by: Xuanhao Shi <x-shi@ti.com>
[PDK-13154][Sciclient]: Add testcase for Main UART to MCU R5 core interrupt routing
Testcase is added to program the interrupt route between Main UART and R5 core
of MCU domain. It also tests the interaction between Main UART and MCU R5F core
using the UART_write function.
Signed-off-by: Thejasvi Konduru <t-konduru@ti.com>
Testcase is added to program the interrupt route between Main UART and R5 core
of MCU domain. It also tests the interaction between Main UART and MCU R5F core
using the UART_write function.
Signed-off-by: Thejasvi Konduru <t-konduru@ti.com>