processor-sdk/pdk.git
4 weeks ago[PSDKQA-302] Audit of _NTO_TCTL_IO_PRIV use in ThreadCtl calls PSDKQNX_07_03_00 PSDKQ_20210406
Praveen Rao [Tue, 30 Mar 2021 15:03:49 +0000 (10:03 -0500)]
[PSDKQA-302] Audit of _NTO_TCTL_IO_PRIV use in ThreadCtl calls

Signed-off-by: Praveen Rao <prao@ti.com>
4 weeks ago[QNX] Ipc: Update to support j7200
Praveen Rao [Wed, 24 Feb 2021 03:04:05 +0000 (21:04 -0600)]
[QNX] Ipc: Update to support j7200

Signed-off-by: Praveen Rao <prao@ti.com>
4 weeks ago[QNX] Udma: Update to support QNX resource manager
Praveen Rao [Wed, 24 Feb 2021 03:03:41 +0000 (21:03 -0600)]
[QNX] Udma: Update to support QNX resource manager

Signed-off-by: Praveen Rao <prao@ti.com>
4 weeks ago[QNX] Sciclient: Update to support QNX resource manager
Praveen Rao [Wed, 24 Feb 2021 03:03:13 +0000 (21:03 -0600)]
[QNX] Sciclient: Update to support QNX resource manager

Signed-off-by: Praveen Rao <prao@ti.com>
4 weeks ago[QNX] Osal: Update for QNX
Praveen Rao [Tue, 16 Feb 2021 23:58:26 +0000 (17:58 -0600)]
[QNX] Osal: Update for QNX

Signed-off-by: Praveen Rao <prao@ti.com>
4 weeks ago[QNX] Board: Build: Update for QNX build
Praveen Rao [Tue, 16 Feb 2021 23:44:37 +0000 (17:44 -0600)]
[QNX] Board: Build: Update for QNX build

Signed-off-by: Praveen Rao <prao@ti.com>
5 weeks ago[DSS M2M DRV]KW Fixes : Patch-2 release/CORESDK_07.03.00 REL.CORESDK.07.03.00.28 REL.CORESDK.07.03.00.29 REL.CORESDK.07.03.00.30 REL.CORESDK.07.03.00.31 REL.CORESDK.07.03.00.32 REL.CORESDK.07.03.00.33
Vivek Dhande [Wed, 31 Mar 2021 07:35:47 +0000 (13:05 +0530)]
[DSS M2M DRV]KW Fixes : Patch-2

Signed-off-by: Vivek Dhande <a0132295@ti.com>
5 weeks ago[DSS M2M DRV and APP][BUG FIX: Patch - 2]DSS M2M sample application is crashing and...
Vivek Dhande [Tue, 30 Mar 2021 08:23:47 +0000 (13:53 +0530)]
[DSS M2M DRV and APP][BUG FIX: Patch - 2]DSS M2M sample application is crashing and failing inturn

- Issue:
    - Outputting same color
    - In case of RGB format, only 720 line were outputted
    - In case of YUV format, outputted Y component is '0'
    - For YUV420, WB pipeline was hung after outputting few pixels

- Root-cause:
    - Outputted same color was from background, this was happening due to WB pipeline DMA was enabled before VID pipeline
    - In case of unsupported format, DSS WB CSL-FL does not return error and programs default value
    - CSL was not programming WB scaler unit properly, it was checking inFmt instead of outFmt

- Resolution:
    - Updated driver to enable WB Pipeline after enabling VID pipeline
    - Updated CSL-FL to use outFmt in checks and programming

- Additional Changes:
    - Updated application to for YUV422 to YUV420 CSC
Signed-off-by: Vivek Dhande <a0132295@ti.com>
6 weeks agoUDMA: AM65xx Build Fix REL.CORESDK.07.03.00.26
Don Dominic [Wed, 24 Mar 2021 14:53:48 +0000 (20:23 +0530)]
UDMA: AM65xx Build Fix

Signed-off-by: Don Dominic <a0486429@ti.com>
6 weeks agoSBL: Fix Issues with OSPI DMA boot
Don Dominic [Wed, 24 Mar 2021 12:06:04 +0000 (17:36 +0530)]
SBL: Fix Issues with OSPI DMA boot

- Init Sciclient with mcu1_0 core context as non-secure (default)
  - default board cfg is for non-secure mode
- Update in allignment with BoardCfg updates to remove shared allocation for mcu1_0
  and entries only for non-secure host
  - BoardCfg Update Commits: 770ca7fdd4d and 07897868126

- Without this update Udma_init for OSPI DMA boot would fail
  - Since,‘Sciclient_rmGetResourceRange’ is returning ‘start’ and ‘num’ as zero for all resources.

- Verified sbl_baremetal_boot_test_all_cores with OSPI DMA boot on J721E and J7200

Signed-off-by: Don Dominic <a0486429@ti.com>
6 weeks agoUpdate ESM test app to call Sciclient_init REL.CORESDK.07.03.00.25
Angela Stegmaier [Fri, 19 Mar 2021 22:01:41 +0000 (17:01 -0500)]
Update ESM test app to call Sciclient_init

ESM test app was calling Sciclient APIs without first calling
Sciclient_init. This led to a failure being returned from
Sciclient_rmGetModuleClkFreq and incorrectly calculated minimum
time interval for the error pin.

This patch fixes the error checking around the Sciclient_* calls
in the test app, and also adds the call to Sciclient_init.

Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
6 weeks agoKW Critical and Error Fix
Ankur [Sat, 20 Mar 2021 05:25:35 +0000 (10:55 +0530)]
KW Critical and Error Fix

Signed-off-by: Ankur <a0132173@ti.com>
6 weeks agoOSPI: Static analysis critical issue fix
Aditya Wadhwa [Mon, 22 Mar 2021 19:56:29 +0000 (01:26 +0530)]
OSPI: Static analysis critical issue fix

Signed-off-by: Aditya Wadhwa <a0485151@ti.com>
6 weeks agoUDMA: KW Fixes
Don Dominic [Mon, 22 Mar 2021 15:08:19 +0000 (20:38 +0530)]
UDMA: KW Fixes

Verified udma_memcpy

Signed-off-by: Don Dominic <a0486429@ti.com>
6 weeks ago[PDK-6649] OSAL: nonos: Fix issues in TimerP_delte reset mask
Don Dominic [Mon, 22 Mar 2021 16:24:26 +0000 (21:54 +0530)]
[PDK-6649] OSAL: nonos: Fix issues in TimerP_delte reset mask

- Convert/Reverse map the Timer ID to corresponding timer bit id.
- 'TimerP_mapId' was called during TimerP_create to map the id to respective ID for that core for timer
- the reverse operation is required to clear/reset the appropriate bit in the gTimerAnyMask
- Hence added 'TimerP_reverseMapId' to do the reverse translation
- The above fxn is called before clearing the mask's bit filed to find the correct bit

- Issues was observed in J721E MAIN Domain mcu cores in which the 'TimerP_mapId' translation was active

- Verified OSAL UT

Signed-off-by: Don Dominic <a0486429@ti.com>
6 weeks ago[DSS M2M DRV]KW Fixes
Vivek Dhande [Mon, 22 Mar 2021 13:09:45 +0000 (18:39 +0530)]
[DSS M2M DRV]KW Fixes

Signed-off-by: Vivek Dhande <a0132295@ti.com>
6 weeks ago[DSS M2M DRV APP][Bug Fix][PDK-9479]DSS M2M sample application is crashing and failin...
Vivek Dhande [Fri, 19 Mar 2021 13:58:52 +0000 (19:28 +0530)]
[DSS M2M DRV APP][Bug Fix][PDK-9479]DSS M2M sample application is crashing and failing inturn

- Issue:
    - On running, application crashes and fails
- Root-cause:
    - Event configuration and internal mux for pipeline input was wrongly configured
- Fix:
    - Updated mux configuration of DSS module
    - Fixed few issues with wrong assert conditions

- Additional changes in the Patch
    - Updated driver Queue handling in case of driver is stopped i.e. after calling 'FVID2_stop()'
    - Added additional check  conditions for driver robustness

Signed-off-by: Vivek Dhande <a0132295@ti.com>
7 weeks agoccs lauch script : Reset MCU 11 to ensure tcm config take effect
sujith [Fri, 19 Mar 2021 17:28:29 +0000 (22:58 +0530)]
ccs lauch script : Reset MCU 11 to ensure tcm config take effect

Tested with mcspi master/slave example application

Signed-off-by: sujith <sujith.s@ti.com>
7 weeks agoPDK-9454 : McSPI : Baremetal master slave not functional
sujith [Fri, 19 Mar 2021 11:31:50 +0000 (17:01 +0530)]
PDK-9454 : McSPI : Baremetal master slave not functional

Root Cause : The slave on MPU 10, relies on SCI client APIs
to route interrupts. But MCU 10 hosts baremetal master
and cannot hosrt sci server

Fix : Moved the master to MCU 11 and hosted sci server on mcu 10

Test : Tested on j7200 and j721e
Works as expected on j7200 but DMA fails on j721e

Signed-off-by: sujith <sujith.s@ti.com>
7 weeks ago[PDK-9471] J7ES SBL: Fix Issues with sending and parsing of RM board config on HS...
Don Dominic [Fri, 19 Mar 2021 07:42:55 +0000 (13:12 +0530)]
[PDK-9471] J7ES SBL: Fix Issues with sending and parsing of RM board config on HS device

- BUILD_HS flag was missing in SBL IMG build for HS devices
  - only SBL_BUILD_HS was passed, which will include correct headers for SBL library build
- But others will include wrong sciclient header files (defaultBoardCfg for GP)
- Hence, SCICLIENT_BOARDCFG_RM_SIZE_IN_BYTES macro for GP was getting passed (instead of that defined for HS)
- And this corrupts/truncates the actual BoardCfg

- Fix by including BUILD_HS flag

Signed-off-by: Don Dominic <a0486429@ti.com>
7 weeks agoOSAL: C++ Build Fix: Resolve J7200 TimerP_getPreferredDefInst Build Errors
Don Dominic [Thu, 18 Mar 2021 06:51:51 +0000 (12:21 +0530)]
OSAL: C++ Build Fix: Resolve J7200 TimerP_getPreferredDefInst Build Errors

- Move extern inline Fxn definition of 'TimerP_getPreferredDefInst'
  from 'osal/soc/j7200/TimerP_default_r5f.c' to header file 'osal/soc/j7200/osal_soc.h'
- Fxn is refernced in Arch_utils.c,
  which will break C++ build if extern "inline" fxn defined in different source file
- Issue introduced by "b431aefd763ff2f15468e87f67038ed5db55f50f#packages/ti/osal/soc/j7200/osal_soc.h"

Signed-off-by: Don Dominic <a0486429@ti.com>
7 weeks agoC++ Build fix
Ankur [Thu, 18 Mar 2021 06:23:22 +0000 (11:53 +0530)]
C++ Build fix

Signed-off-by: Ankur <a0132173@ti.com>
7 weeks agoSciclient UT: Fix app failure for C7x/C66x cores REL.CORESDK.07.03.00.23 REL.CORESDK.07.03.00.24
Don Dominic [Wed, 17 Mar 2021 10:57:06 +0000 (16:27 +0530)]
Sciclient UT: Fix app failure for C7x/C66x cores

- Board_unlockMMR() was failing from C7x/C66x
- hence UART_STUDIO , PINMUX was not getting initialized
- This results in UART print issues in the app

- BOARD_INIT_UNLOCK_MMR was added for AM64x
  Ref: https://bitbucket.itg.ti.com/projects/PROCESSOR-SDK/repos/pdk/commits/924bc3e7347515cf69ef89ac71845942ef9576f7#packages/ti/drv/sciclient/examples/common/sciclient_appCommon.c
- Hence protect with #ifdef for AM64x to unblock issues on C66x/C7x on J7

- Verified UT on C7x/C66x/R5/A72 on J7

Signed-off-by: Don Dominic <a0486429@ti.com>
7 weeks agoOSPI: Build fixes for cached applications
Aditya Wadhwa [Wed, 17 Mar 2021 09:38:47 +0000 (15:08 +0530)]
OSPI: Build fixes for cached applications

Signed-off-by: Aditya Wadhwa <a0485151@ti.com>
7 weeks agoPDK-9464 : J7200 : I2C Demo not functional on mcu 21
sujith [Tue, 16 Mar 2021 18:58:05 +0000 (00:28 +0530)]
PDK-9464 : J7200 : I2C Demo not functional on mcu 21

Root cause : Wrong interrupt number is used for mcu 21.
The commit 0d59f6540b introduced this issue

Fix : Limited the interrupt offset to j721e alone

Test : tested on j7200 mcu 21

Signed-off-by: sujith <sujith.s@ti.com>
7 weeks agoUpdating C7x CGT to 1.4.2
Ankur [Wed, 17 Mar 2021 06:29:35 +0000 (11:59 +0530)]
Updating C7x CGT to 1.4.2

Signed-off-by: Ankur <a0132173@ti.com>
7 weeks agoPTEST-2548: Add SBL combined.appimage build for AM65xx
Jonathan Bergsagel [Wed, 10 Mar 2021 22:30:15 +0000 (16:30 -0600)]
PTEST-2548: Add SBL combined.appimage build for AM65xx

Adds base-board.dtb file for AM65xx combined.appimage
builds.

Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>
7 weeks ago[PDK-6649] OSAL: nonos: Fix TimerP_delete to update gTimerAnyMask
Don Dominic [Tue, 16 Mar 2021 10:31:07 +0000 (16:01 +0530)]
[PDK-6649] OSAL: nonos: Fix TimerP_delete to update gTimerAnyMask

- TimerP_delete was not resetting the the timer's bit field in the gTimerAnyMask
  - Hence the mask was getting exhausted after log2(TIMERP_AVAILABLE_MASK+1) no.of TimerP_create
  - This resulted in TimerP_create failures even when there are unused timers
- Update the timer's bit field in the mask while deleting the timer to resolve this
- For v0/v1, Global Timer Structure's used flag was cleared only when Timer ISR is non-NULL
  - Fixed this to clear irrespective of Timer ISR

- Also updated the UT with a test to catch this failure
 - This tests TimerP_create and TimerP_delete repeatedly for more no.of times than that in the mask,
   to make sure freeing up of resources was successful
 - The test which was failing earlier, now works fine with the updates in source

Signed-off-by: Don Dominic <a0486429@ti.com>
7 weeks ago[PDK-8586] SBL: OSPI: Early CAN response optimization
Aditya Wadhwa [Thu, 4 Mar 2021 18:51:55 +0000 (00:21 +0530)]
[PDK-8586] SBL: OSPI: Early CAN response optimization

Signed-off-by: Aditya Wadhwa <a0485151@ti.com>
7 weeks ago[PDK-6848] OSAL: SYSBIOS: TaskP_delete to delete task only when deleteTerminatedTasks...
Don Dominic [Mon, 15 Mar 2021 15:34:44 +0000 (21:04 +0530)]
[PDK-6848] OSAL: SYSBIOS: TaskP_delete to delete task only when deleteTerminatedTasks flag is disabled

- In case of apps with the BIOS cfg 'Task.deleteTerminatedTasks' enabled,
  cleanup happens in BIOS idle task.
- Deleting terminated task will results in BIOS error.
- Hence to make BIOS config independent, TaskP_delete will check for the flag before deleting any task.

Signed-off-by: Don Dominic <a0486429@ti.com>
7 weeks ago[DSS DRV][Bug Fix][PDK-5040]Display stops working if two pipelines are started back... REL.CORESDK.07.03.00.22
Vivek Dhande [Sun, 14 Mar 2021 14:00:01 +0000 (19:30 +0530)]
[DSS DRV][Bug Fix][PDK-5040]Display stops working if two pipelines are started back to back

- Issue:
    - When two display pipelines (connected to the same overlay) are started back to back by calling FVID2_Start() twice, pipelines do not start and does not display anything.
    - Same is observed for 2 LCDs
- Resolution:
    - Second start has to wait for a VSYNC to come from first pipeline before starting
- Fix:
    - We should not allow pipelines to be started back to back until the first vsync callback of pipeline comes.
    - Wait for semaphore before starting second pipeline

Signed-off-by: Vivek Dhande <a0132295@ti.com>
7 weeks ago[DSS M2M DRV]Doxygen build fix
Vivek Dhande [Mon, 15 Mar 2021 06:53:10 +0000 (12:23 +0530)]
[DSS M2M DRV]Doxygen build fix

- This patch also contains small driver and app update

Signed-off-by: Vivek Dhande <a0132295@ti.com>
8 weeks agoOSPI: Build Fix REL.CORESDK.07.03.00.21
Aditya Wadhwa [Fri, 12 Mar 2021 09:24:39 +0000 (14:54 +0530)]
OSPI: Build Fix

Signed-off-by: Aditya Wadhwa <a0485151@ti.com>
8 weeks agoMigrating to SYSFW version v2021.01a
Piyali Goswami [Fri, 12 Mar 2021 05:43:01 +0000 (11:13 +0530)]
Migrating to SYSFW version v2021.01a

Migrating to v2021.01a

8 weeks agoFixes for Sciclient to not globally disable interrupts
Piyali Goswami [Fri, 12 Mar 2021 05:00:33 +0000 (10:30 +0530)]
Fixes for Sciclient to not globally disable interrupts

Added a software mechanism to not have to disable interrupts when trying polling mode of operation and still allow secure proxy to not be overwritten by multiple threads.

Fixes: PDK-8945

Signed-off-by: Piyali Goswami <piyali_g@ti.com>
8 weeks ago[PDK-9436] UDMA : Update offset of C7x events associated to CLEC
Don Dominic [Thu, 11 Mar 2021 18:27:56 +0000 (23:57 +0530)]
[PDK-9436] UDMA : Update offset of C7x events associated to CLEC

Update offset of C7x events associated to CLEC
which will be used for various UDMA events
such that it won't overlap with that for
DRU Local Events(configured by vision apps/TIDL usecases)
or other drivers.

- Currently vision apps configures CLEC DRU Local events to C7x events starting from 32.
  - Configures for 16 DRU channels allocated for C7x
- Hence to avoid resource conflict UDMA driver will manage C7x events starting from an offset

- Statically partition 64 C7x events into different sets.
  - 0 -31 left for other driver
  - 32-47 for routing DRU Local events
  - 48-63 to be managed by UDMA for various udma events

- This fixes ADASVISION-2344

Signed-off-by: Don Dominic <a0486429@ti.com>
8 weeks ago[WIP][PDK-8726]OSPI: Separate OSPI tests keeping memory cached/non-cached
Aditya Wadhwa [Thu, 11 Mar 2021 12:09:30 +0000 (17:39 +0530)]
[WIP][PDK-8726]OSPI: Separate OSPI tests keeping memory cached/non-cached

- added a cacheEnable field to the hwAttrs

Signed-off-by: Aditya Wadhwa <a0485151@ti.com>
8 weeks ago[WIP][PDK-8726]OSPI: Separate OSPI tests keeping memory cached/non-cached
Aditya Wadhwa [Thu, 11 Mar 2021 07:44:31 +0000 (13:14 +0530)]
[WIP][PDK-8726]OSPI: Separate OSPI tests keeping memory cached/non-cached

- added copyright comments
- deleted extra file

Signed-off-by: Aditya Wadhwa <a0485151@ti.com>
8 weeks ago[WIP][PDK-8726]OSPI: Separate OSPI tests keeping memory cached/non-cached
Aditya Wadhwa [Wed, 10 Mar 2021 17:59:57 +0000 (23:29 +0530)]
[WIP][PDK-8726]OSPI: Separate OSPI tests keeping memory cached/non-cached

- switched to macro instead of hard-coded values
- flag not working

Signed-off-by: Aditya Wadhwa <a0485151@ti.com>
8 weeks ago[PDK-8726]OSPI: Separate OSPI tests keeping memory cached/non-cached
Aditya Wadhwa [Fri, 26 Feb 2021 14:15:02 +0000 (19:45 +0530)]
[PDK-8726]OSPI: Separate OSPI tests keeping memory cached/non-cached

- enabled interrupt for INDAC tests

Signed-off-by: Aditya Wadhwa <a0485151@ti.com>
8 weeks ago[PDK-8726]OSPI: Separate OSPI tests keeping memory cached/non-cached
Aditya Wadhwa [Fri, 26 Feb 2021 14:00:12 +0000 (19:30 +0530)]
[PDK-8726]OSPI: Separate OSPI tests keeping memory cached/non-cached

- all tests passing

Signed-off-by: Aditya Wadhwa <a0485151@ti.com>
8 weeks ago[WIP][PDK-8726]OSPI: Separate OSPI tests keeping memory cached/non-cached
Aditya Wadhwa [Thu, 25 Feb 2021 18:17:23 +0000 (23:47 +0530)]
[WIP][PDK-8726]OSPI: Separate OSPI tests keeping memory cached/non-cached

- DAC+DMA, Legacy SPI working
- DAC has data mismatch
- INDAC failure

Signed-off-by: Aditya Wadhwa <a0485151@ti.com>
8 weeks ago[WIP][PDK-8726]OSPI: Separate OSPI tests keeping memory cached/non-cached
Aditya Wadhwa [Fri, 15 Jan 2021 18:56:29 +0000 (00:26 +0530)]
[WIP][PDK-8726]OSPI: Separate OSPI tests keeping memory cached/non-cached

- OPSI FSS DAT0 memory cached/non-cached
- PHY memory always non-cached
- Build failures

Signed-off-by: Aditya Wadhwa <a0485151@ti.com>
8 weeks ago[WIP][PDK-8726] OSPI: Separate OPSI tests keeping memory cached/non-cached
Aditya Wadhwa [Wed, 13 Jan 2021 10:36:01 +0000 (16:06 +0530)]
[WIP][PDK-8726] OSPI: Separate OPSI tests keeping memory cached/non-cached

- Added support for baremetal apps

Signed-off-by: Aditya Wadhwa <a0485151@ti.com>
8 weeks ago[WIP][PDK-8726] Separate OSPI tests keeping memory cached/non-cached
Aditya Wadhwa [Wed, 6 Jan 2021 18:28:07 +0000 (23:58 +0530)]
[WIP][PDK-8726] Separate OSPI tests keeping memory cached/non-cached

- added new tests that export cache as enabled
- separate mpu.xs files for cache enabled/disabled
- RTOS implemented, baremetal pending

Signed-off-by: Aditya Wadhwa <a0485151@ti.com>
8 weeks agoHyperflash : Tested with board diag on j721e es 1.1 REL.CORESDK.07.03.00.20
sujith [Tue, 12 Jan 2021 10:17:35 +0000 (15:47 +0530)]
Hyperflash : Tested with board diag on j721e es 1.1

Works fine in 166 MHz (333 MHz device clock)

Require to clean up code

Signed-off-by: sujith <sujith.s@ti.com>
8 weeks agoPDK-6706 : SPI Master example is not functional
sujith [Thu, 11 Mar 2021 16:10:42 +0000 (21:40 +0530)]
PDK-6706 : SPI Master example is not functional

The Master example would perform, couple of transactions with
slave app and stall/timeout with an error.

The "loopback" tests would always fail

Root Cause : The driver do not support operating McSPI in
digital loopback mode. As the IP did not support the same.

Fix: Disabled the loopback mode of operation for j721e & j7200

Test : Tested on j721e evm

Signed-off-by: sujith <sujith.s@ti.com>
8 weeks ago[PDK-9435] Board: DDR: Enable DDR Thermal Testapp for J7200
Don Dominic [Thu, 11 Mar 2021 14:45:36 +0000 (20:15 +0530)]
[PDK-9435] Board: DDR: Enable DDR Thermal Testapp for J7200

- enabled board_ddr_thermal_test_app for j7200 mcu1_0/mcu1_1/mcu2_0/mcu2_1
- Updates in board lib 'board/src/j7200_evm/board_ddrtempmonitor.c'
  - to enable all r5 cores
  - no interrupt routers b/w DDR controller and Main Domain R5
- so skip Sciclient IRQ Routing
  - for MCU Domain R5 cores
- query the IR Range from BoardCfg
  - translate to Core Interrupt Idx and configure path

Signed-off-by: Don Dominic <a0486429@ti.com>
8 weeks agoFirmware gen.sh update for ES1.1 HS testing
Piyali Goswami [Thu, 11 Mar 2021 10:26:37 +0000 (15:56 +0530)]
Firmware gen.sh update for ES1.1 HS testing

Firmware Gen.sh update for ES1.1 HS testing

Signed-off-by: Piyali Goswami <piyali_g@ti.com>
8 weeks agoFix for proper sending and parsing of RM board config in HS
Piyali Goswami [Thu, 11 Mar 2021 05:59:57 +0000 (11:29 +0530)]
Fix for proper sending and parsing of RM board config in HS

Ignoring of the certificate is handled correctly by adjusting the size at source when the certificate is not passed and at sink when the certificate is passed.

Fixes: PDK-9427

Signed-off-by: Piyali Goswami <piyali_g@ti.com>
8 weeks ago[DSS M2M APP]Added sample application for DSS M2M Driver
Vivek Dhande [Wed, 10 Mar 2021 13:26:23 +0000 (18:56 +0530)]
[DSS M2M APP]Added sample application for DSS M2M Driver

Signed-off-by: Vivek Dhande <a0132295@ti.com>
8 weeks agofreertos: Add FreeRTOS kernel folders to gitignore
Don Dominic [Mon, 8 Mar 2021 04:26:45 +0000 (09:56 +0530)]
freertos: Add FreeRTOS kernel folders to gitignore

- Add the following folders in ti/kernel/freertos to gitignore
  - FreeRTOS-Labs/
  - FreeRTOS-LTS/
- These are cloned from https://github.com/FreeRTOS/ as defined in psdk.xml

Signed-off-by: Don Dominic <a0486429@ti.com>
8 weeks agoPDK-9285: IPC: Fix KW issues
Angela Stegmaier [Fri, 29 Jan 2021 23:52:34 +0000 (17:52 -0600)]
PDK-9285: IPC: Fix KW issues

Fix KW issues for AM64X IPC and MB build.

Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
8 weeks ago[DSS M2M Driver]Addressed review comments
Vivek Dhande [Tue, 9 Mar 2021 18:48:01 +0000 (00:18 +0530)]
[DSS M2M Driver]Addressed review comments

Signed-off-by: Vivek Dhande <a0132295@ti.com>
8 weeks ago[DSS M2M Driver]Fixed Doxygen API Guide Warnings
Vivek Dhande [Tue, 9 Mar 2021 09:55:11 +0000 (15:25 +0530)]
[DSS M2M Driver]Fixed Doxygen API Guide Warnings

Signed-off-by: Vivek Dhande <a0132295@ti.com>
8 weeks ago[DSS M2M Driver]Driver implementation: Patch-2
Vivek Dhande [Fri, 5 Mar 2021 10:02:23 +0000 (15:32 +0530)]
[DSS M2M Driver]Driver implementation: Patch-2

- Added implementation for 'Fvid2_processRequest()' and 'Fvid2_getProcessedRequest()'
- Implemented 'IOCTL_DSS_DCTRL_SET_PATH' and 'IOCTL_DSS_DCTRL_CLEAR_PATH' IOCTLs
- Implemented DMA completion Events
- Implemented internal functions needed for above

Signed-off-by: Vivek Dhande <a0132295@ti.com>
8 weeks ago[DSS M2M Driver]Driver implementation: Patch-1
Vivek Dhande [Sat, 27 Feb 2021 07:40:51 +0000 (13:10 +0530)]
[DSS M2M Driver]Driver implementation: Patch-1

- Added 'dss_m2mPriv.h'
- This files contains following
    - internal structures required for maintaining driver and HW Module states
    - Added support for multiple open/create to support multiple channel support

Signed-off-by: Vivek Dhande <a0132295@ti.com>
8 weeks ago[DSS M2M DRV][PDK-5179]DSS FVID2 Writeback M2M Driver
Vivek Dhande [Fri, 19 Feb 2021 17:12:18 +0000 (22:42 +0530)]
[DSS M2M DRV][PDK-5179]DSS FVID2 Writeback M2M Driver

- [PDK-5184]DSS Writeback Pipeline Support
- Added interface for DSS M2M driver
- Added nodes & edges for WB pipeline

Signed-off-by: Vivek Dhande <a0132295@ti.com>
8 weeks ago[PDK-9432] Sciclient : Rebased and Regenerated Sciclient Binaries
Don Dominic [Wed, 10 Mar 2021 18:30:18 +0000 (00:00 +0530)]
[PDK-9432] Sciclient : Rebased and Regenerated Sciclient Binaries

- Regenerated sclient binaries after rebasing
- Validated memcpy with latest binaries on j721e/j7200 mcu1_0 and mcu2_0 with noboot and uart boot.

Signed-off-by: Don Dominic <a0486429@ti.com>
8 weeks ago[PDK-9432] J7200 BoardCfg: Update to the latest auto-generated from SysConfig/k3...
Don Dominic [Wed, 10 Mar 2021 17:24:58 +0000 (22:54 +0530)]
[PDK-9432] J7200 BoardCfg: Update to the latest auto-generated from SysConfig/k3-resource-partitioning

- This includes the updates in the following:
   - Remove shared allocation for MCU R5
       https://bitbucket.itg.ti.com/projects/PSDKLA/repos/k3-resource-partitioning/pull-requests/10/overview

- Rebuilt sciclient_boardcfg; sciclient_boardcfg for HS; sciclient_ccs_init; sciserver_testapp and copied to tools/ccsLoadDmsc

8 weeks ago[PDK-9432] J721E BoardCfg: Update to the latest auto-generated from SysConfig/k3...
Don Dominic [Wed, 10 Mar 2021 16:03:33 +0000 (21:33 +0530)]
[PDK-9432] J721E BoardCfg: Update to the latest auto-generated from SysConfig/k3-resource-partitioning

- This includes the updates in the following:
   - Remove shared allocation for MCU R5
       https://bitbucket.itg.ti.com/projects/PSDKLA/repos/k3-resource-partitioning/pull-requests/10/overview
   - Increase virt id range for A72_2
       https://bitbucket.itg.ti.com/projects/PSDKLA/repos/k3-resource-partitioning/pull-requests/12/overview

- Rebuilt sciclient_boardcfg; sciclient_boardcfg for HS; sciclient_ccs_init; sciserver_testapp and copied to tools/ccsLoadDmsc

8 weeks ago[PDK-9432] Sciclient : Updates to support BoardCfg with mcu1_0 non-secure host id...
Don Dominic [Wed, 10 Mar 2021 14:49:36 +0000 (20:19 +0530)]
[PDK-9432] Sciclient : Updates to support BoardCfg with mcu1_0 non-secure host id entries

-  Do not force mcu1_0 to be in secure mode for all cases
-  Set to secure mode in case the message is to be forwarded
-  Also The MCU1_0 will always be secure when trying to send the message to the TIFS directly to avoid self blocking.

Signed-off-by: Don Dominic <a0486429@ti.com>
8 weeks agoudma_event.c: Do not pass a NULL resp payload for the Sciclient_rmUdmapGcfgCfg function
Piyali Goswami [Thu, 11 Mar 2021 03:04:13 +0000 (08:34 +0530)]
udma_event.c: Do not pass a NULL resp payload for the Sciclient_rmUdmapGcfgCfg function

Response payload should not be NULL. The API fails in that case

Fixes: PDK-9431

Signed-off-by: Piyali Goswami <piyali_g@ti.com>
8 weeks agocopied binary and built firmware header .h file
Anuraag Tummanapally [Wed, 10 Mar 2021 15:55:49 +0000 (15:55 +0000)]
copied binary and built firmware header .h file

8 weeks agoPDK-6534 : un-expected ISR if the timer were running, before creation
Sujith S [Wed, 10 Mar 2021 09:00:27 +0000 (14:30 +0530)]
PDK-6534 : un-expected ISR if the timer were running, before creation

If the timer was running before the timer was created, on creation
especially in user start mode, an ISR would be triggered before
the timer was started.

Root cause : The timer module is not reset before the ISR registration
so, if the timer count lapses after creation but before starting the
the timer, an FALSE isr would be triggered.

Fix: Reset the timer peripheral at create time. This ensures that
counter is disabled and interrupt notification is disabled

Testing: Tested both baremetal & ti rtos unit test of the timer, it
works as expected. OSAL_Baremetal_TestApp and OSAL_TestApp works as
expected

Signed-off-by: Sujith S <sujith.s@ti.com>
2 months agoMMC: Build break fix REL.CORESDK.07.01.06.03 REL.CORESDK.07.01.06.04 REL.CORESDK.07.03.00.18 REL.CORESDK.07.03.00.19
Sujith S [Sat, 6 Mar 2021 16:28:48 +0000 (21:58 +0530)]
MMC: Build break fix

Signed-off-by: Sujith S <sujith.s@ti.com>
2 months agofreertos: posix support only in git and not in rel pkg REL.CORESDK.07.03.00.17
Badri S [Sat, 6 Mar 2021 04:07:00 +0000 (09:37 +0530)]
freertos: posix support only in git and not in rel pkg

remove support for freertos posix in release package
support only in development git folder

Signed-off-by: Badri S <badri@ti.com>
2 months agoPDK-7484 : Disabled HS400 from the supported modes list
Sujith S [Fri, 5 Mar 2021 20:38:47 +0000 (02:08 +0530)]
PDK-7484 : Disabled HS400 from the supported modes list

As per j721e errata (i2024) HS 400 is not supported
on mmc-sd instance 0

Tested MMCSD Regressions on j721e ES 1.0 EVM

ü01000000011a00006a3765730000000000000000475020200200010002000100CCSBL Revision: 01.00.10.00 (Mar  6 2021 - 01:34:19)
Waiting for tifs.bin ...
CCTIFS  ver: 21.1.0--v2021.01 (Terrific Llam
Waiting for multicore app ...
CCCCalibration Start
Calibration: Ticks per ms is 999994
Calibration Completed
:
:
MMCSD Regression Test Menu
--------------------------
 Test ID:   Description    Powercycle Required?
    0          DS Mode 1-bit Test            No
    1          DS Mode Test                  No
    2          HS Mode Test                  No
    8          SDR12 Mode Test               Yes
    9          SDR25 Mode Test               Yes
   10          SDR50 Mode Test               Yes
   11          DDR50 Mode Test               Yes
   13         Default Unit Test (Max speed)           Yes
   -1          All non powercycle tests           No
   -2          Exit the regression test           No

Please enter a test ID from the above list: -2
 Test ID Entered = -2

Exiting the regression test

All tests have PASSED
3/3 tests passed

Signed-off-by: Sujith S <sujith.s@ti.com>
2 months agoBuild Fix: Fix build issues with Board DDR Temp Monitor
Don Dominic [Fri, 5 Mar 2021 15:29:56 +0000 (20:59 +0530)]
Build Fix: Fix build issues with Board DDR Temp Monitor

- Not applicable for mpu1_0
- Removed #ifdef for BUILD_MCU1_0 when added support for main R5 cores
https://bitbucket.itg.ti.com/projects/PROCESSOR-SDK/repos/pdk/commits/8e4f1ae9e303b3627fbe71b81bde75b6dd601a07#packages/ti/board/src/j721e_evm/board_ddrtempmonitor.c
- But should have protected with MCU ifdef
- Fixed by adding #ifdef for BUILD_MCU

Signed-off-by: Don Dominic <a0486429@ti.com>
2 months ago[PDK-9317][PDK-9316] Board: DDR: Updates in Board DDR thermal monitoring REL.CORESDK.07.01.06.02
Don Dominic [Mon, 8 Feb 2021 16:00:09 +0000 (21:30 +0530)]
[PDK-9317][PDK-9316] Board: DDR: Updates in Board DDR thermal monitoring

- Query from BoardCfg to get the  allowed core interrupt IRQ idx
- Add support for other R5F cores

Signed-off-by: Don Dominic <a0486429@ti.com>
2 months ago[PDK-9312] FreeeRTOS: Addressed review comments
Don Dominic [Fri, 5 Mar 2021 09:24:52 +0000 (14:54 +0530)]
[PDK-9312] FreeeRTOS: Addressed review comments

- Updated linker file to use OCMC/DDR instead of MSMC
- Many times apps/customer copy our linker and struggled due to use of MSMC for MCU R5 apps

Signed-off-by: Don Dominic <a0486429@ti.com>
2 months agoBuild Fix: sciclient_firmware_boot_TestApp linker updates to enable debug build
Don Dominic [Fri, 5 Mar 2021 05:42:50 +0000 (11:12 +0530)]
Build Fix: sciclient_firmware_boot_TestApp linker updates to enable debug build

- '.cinit' program will not fit into available memory in OCMRAM
- Moved bss to TCMB from OCMRAM

Signed-off-by: Don Dominic <a0486429@ti.com>
2 months agoFreeRTOS: UT Build Fix
Don Dominic [Fri, 5 Mar 2021 04:03:02 +0000 (09:33 +0530)]
FreeRTOS: UT Build Fix

Signed-off-by: Don Dominic <a0486429@ti.com>
2 months agofreertos: jenkins build fixes
Badri S [Thu, 4 Mar 2021 10:51:13 +0000 (16:21 +0530)]
freertos: jenkins build fixes

jenkins build fixes

Signed-off-by: Badri S <badri@ti.com>
2 months ago[PDK-9312] OSAL: FreeRTOS: Added osal_freertos support for J7ES/J7VCL/AM65xx
Don Dominic [Wed, 3 Mar 2021 19:46:19 +0000 (01:16 +0530)]
[PDK-9312] OSAL: FreeRTOS: Added osal_freertos support for J7ES/J7VCL/AM65xx

- osal_freertos library added for j721e/j7200/am65xx

Signed-off-by: Don Dominic <a0486429@ti.com>
2 months ago[PDK-9312] FreeeRTOS: Added support for freertos on all R5F cores in J7ES/J7VCL/AM65xx
Don Dominic [Wed, 3 Mar 2021 14:49:18 +0000 (20:19 +0530)]
[PDK-9312] FreeeRTOS: Added support for freertos on all R5F cores in J7ES/J7VCL/AM65xx

- Enable all R5F cores in am65xx/j7200/j721e
  - Added config files for each core with unique DMTimer id
- Add support to copy freertos reset vectors to atcm
  - implemented inside 'xPortStartScheduler' before calling 'vPortRestoreTaskContext()'
- Update config file to add define to enable/disable copy of freertos reset vectors to atcm
  - By default Enabled for AM65xx since vectors are placed in OCMRAM in the linker file since core reset will clear the atcm
- Updated freertos kernel paths
- Minor cleanups

Signed-off-by: Don Dominic <a0486429@ti.com>
2 months agoadded osal lib for free rtos
Prasad Konnur [Tue, 23 Feb 2021 14:20:11 +0000 (19:50 +0530)]
added osal lib for free rtos

 - added osal lib
 - added semephore osal implementation
 - other components of osal use the nonos implementation
 - added taskp in freertos
 - added memoryP in freertos
 - added memoryP test in osal testapp
 - added delay implementation using TaskP_sleep

Signed-off-by: Prasad Konnur <prasadkonnur@ti.com>
2 months agofreertos: fix r5f pmu counter overflow
Badri S [Wed, 3 Mar 2021 09:01:24 +0000 (14:31 +0530)]
freertos: fix r5f pmu counter overflow

ensure we periodically check for PMU cycle
counter overflow so that we dont miss incrementing
overflow counter.

Signed-off-by: Badri S <badri@ti.com>
2 months agofreertos: disable interrupt preemption for r5
Badri S [Tue, 2 Mar 2021 11:50:19 +0000 (17:20 +0530)]
freertos: disable interrupt preemption for r5

Disable interrupt preemption for r5 until correct
interrupt preemption support

Signed-off-by: Badri S <badri@ti.com>
2 months agofreertos:c66x fixes to ensure csl_vect is not linked in
Badri S [Sun, 28 Feb 2021 03:37:51 +0000 (09:07 +0530)]
freertos:c66x fixes to ensure csl_vect is not linked in

ensure csl_vect is not wrongly linked in resulting in
interrupts not being serviced by freertos vecs

Signed-off-by: Badri S <badri@ti.com>
2 months agofreertos: remove dpl folder and move to port folder
Badri S [Sat, 27 Feb 2021 14:31:09 +0000 (20:01 +0530)]
freertos: remove dpl folder and move to port folder

remove dpl folder and move files under port folder
also make test folder freertos specific

Signed-off-by: Badri S <badri@ti.com>
2 months agofreertos: support for j721e,j7200,am65xx SoCs
Badri S [Sat, 27 Feb 2021 07:37:16 +0000 (13:07 +0530)]
freertos: support for j721e,j7200,am65xx SoCs

Support added for am65xx,j721e,am65xx SoCs
freertos lib made core specific instead of isa
so that freeRTOS config can include core specific
header file

Signed-off-by: Badri S <badri@ti.com>
2 months agofreertos: support for r5f core
Badri S [Sat, 27 Feb 2021 02:50:09 +0000 (08:20 +0530)]
freertos: support for r5f core

freertos support for r5f core ported from mcu_plus_sdk

Signed-off-by: Badri S <badri@ti.com>
2 months agofreertos: support for c66x core for freertos
Badri S [Tue, 16 Feb 2021 07:31:34 +0000 (13:01 +0530)]
freertos: support for c66x core for freertos

freertos c66x port support

Signed-off-by: Badri S <badri@ti.com>
2 months agoPDK-7013: Removes VTM workaround for J7ES PG1.1
Erick Narvaez [Tue, 23 Feb 2021 03:04:31 +0000 (21:04 -0600)]
PDK-7013: Removes VTM workaround for J7ES PG1.1

Removes default workaround flag for J7ES VTM.

Signed-off-by: Erick Narvaez <e-narvaez@ti.com>
2 months agoadded adcbuf driver for AWR294x SOC
KALYAN VAGVALA [Thu, 11 Feb 2021 16:48:42 +0000 (22:18 +0530)]
added adcbuf driver for AWR294x SOC

2 months agoOSPI: PHY tuning benchmarking
Aditya Wadhwa [Tue, 2 Mar 2021 19:13:40 +0000 (00:43 +0530)]
OSPI: PHY tuning benchmarking

- added a macro which can be enabled to get the logs of how much time the PHY tuning elapsed
- switched to UART prints

Signed-off-by: Aditya Wadhwa <a0485151@ti.com>
2 months agotimeSync: v2: Explicitly set no traffic class
Misael Lopez Cruz [Wed, 3 Mar 2021 08:21:51 +0000 (02:21 -0600)]
timeSync: v2: Explicitly set no traffic class

The newly added txPktTc field of the Enet DMA packet structure is used
for ICSSG but it's not applicable for CPSW.  Hence, it's explicitly set
to indicate that no traffic class is to be used.

Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
2 months agoPDK-9240:Board: Fix for DDR init hang issue on j721e evm during warm reset
M V Pratap Reddy [Thu, 4 Mar 2021 14:53:30 +0000 (20:23 +0530)]
PDK-9240:Board: Fix for DDR init hang issue on j721e evm during warm reset

 - DDR initialization is hanging during the warm reset which is caused
   by PLL bypass function. Need to unlock the PLL registers for access
   during the warm reset.

2 months agoPRSDK-8813: Board/USB: Updated AM65xx SerDes configurations
M V Pratap Reddy [Wed, 3 Mar 2021 05:15:30 +0000 (10:45 +0530)]
PRSDK-8813: Board/USB: Updated AM65xx SerDes configurations

 - CSL SerDes USB configurations are updated to fix enumeration failures.
   Updated the board library and USB driver to align with updated SerDes
   configurations.

2 months agoboard - Missing enum and fix include path
Prasad Jondhale [Sat, 27 Feb 2021 16:43:57 +0000 (22:13 +0530)]
board - Missing enum and fix include path

Signed-off-by: Prasad Jondhale <prasad.jondhale@ti.com>
2 months ago[PDK-9404] OSAL: Fix TIMERP_TIMER_FREQ_LO for J7200
Don Dominic [Tue, 2 Mar 2021 17:53:32 +0000 (23:23 +0530)]
[PDK-9404] OSAL: Fix TIMERP_TIMER_FREQ_LO  for J7200

- TIMERP_TIMER_FREQ_LO defined in osal_soc.h for J7200 is wrong.(25MHz)
- Input Crystal Frequency for j7200 is 19.2MHz and default Timer clk_sel 0(HFOSC0_CLKOUT) will be 19.2MHz

Signed-off-by: Don Dominic <a0486429@ti.com>
2 months ago[PDK-9315] Updating BIOS and XDC REL.CORESDK.07.03.00.13 REL.CORESDK.07.03.00.14 REL.CORESDK.07.03.00.15 REL.CORESDK.07.03.00.16 REL.CORESDK.07.03.01.03 REL.CORESDK.07.03.01.04 REL.CORESDK.07.03.01.05 REL.CORESDK.07.03.01.06
Ankur [Tue, 23 Feb 2021 17:58:13 +0000 (23:28 +0530)]
[PDK-9315] Updating BIOS and XDC

Signed-off-by: Ankur <a0132173@ti.com>
2 months ago[BugFix] PDK-8886: pdk_examples build fails on Windows
Prasad Konnur [Fri, 19 Feb 2021 13:45:02 +0000 (19:15 +0530)]
[BugFix] PDK-8886: pdk_examples build fails on Windows

 - armstrip or strip6x on windows is not able to delete the strip file
 if it already present.
 - $(RM) is set to rm -f so will not generate error if the file is not
 present.

Signed-off-by: Prasad Konnur <prasadkonnur@ti.com>
2 months agoadded build support for awr294x
Prasad Konnur [Thu, 18 Feb 2021 13:25:51 +0000 (18:55 +0530)]
added build support for awr294x

Signed-off-by: Prasad Konnur <prasadkonnur@ti.com>
2 months agoPDK-9337: Fix for Clocking on J7VCL to use fracf pll calibration REL.CORESDK.07.03.00.10 REL.CORESDK.07.03.00.11 REL.CORESDK.07.03.00.12 REL.CORESDK.07.03.01.02
Piyali Goswami [Thu, 18 Feb 2021 13:14:11 +0000 (18:44 +0530)]
PDK-9337: Fix for Clocking on J7VCL to use fracf pll calibration

Fix for clocking on J7VCL to use fracf pll calibration

Signed-off-by: Piyali Goswami <piyali_g@ti.com>
2 months agoosal: baremetal build fix for mcu1_1
Piyali Goswami [Thu, 18 Feb 2021 10:28:08 +0000 (15:58 +0530)]
osal: baremetal build fix for mcu1_1

OSAL baremetal build fix for mcu1_1

Signed-off-by: Piyali Goswami <piyali_g@ti.com>
2 months agoBuild Fix REL.CORESDK.07.03.00.09 REL.CORESDK.07.03.01.01
Ankur [Thu, 18 Feb 2021 09:01:14 +0000 (14:31 +0530)]
Build Fix

Signed-off-by: Ankur <a0132173@ti.com>
2 months ago[PDK-9328] OSPI: Binary search instead of linear search for PHY tuning window REL.CORESDK.07.03.00.08
Aditya Wadhwa [Mon, 15 Feb 2021 19:28:34 +0000 (00:58 +0530)]
[PDK-9328] OSPI: Binary search instead of linear search for PHY tuning window

- Previous implementation was a linear search algorithm
- Occassional failures observed
- Replaced by a binary search algorithm

Signed-off-by: Aditya Wadhwa <a0485151@ti.com>
2 months agoSPI packaging error fix REL.CORESDK.07.03.00.06 REL.CORESDK.07.03.00.07
Ankur [Tue, 16 Feb 2021 19:54:21 +0000 (01:24 +0530)]
SPI packaging error fix

Signed-off-by: Ankur <a0132173@ti.com>