3 years ago[PDK-7089] UDMA : Updates in udma_rmcfg for J7VCL to align with latest RM Config REL.CORESDK.07.00.03.04
[PDK-7089] UDMA : Updates in udma_rmcfg for J7VCL to align with latest RM Config
- Updates in allignment witht the latest RM Config as per https://bitbucket.itg.ti.com/projects/PSDKLA/repos/k3-resource-partitioning/pull-requests/1/diff
Signed-off-by: Don Dominic <a0486429@ti.com>
- Updates in allignment witht the latest RM Config as per https://bitbucket.itg.ti.com/projects/PSDKLA/repos/k3-resource-partitioning/pull-requests/1/diff
Signed-off-by: Don Dominic <a0486429@ti.com>
PDK-5086: Board: Fix for J7200 OSPI flash programmer UART load failure
PDK-5104: Board: Moved J7200 EVM mcu diagnostic tests memory allocation to MSMC
PDK-5037: Board: Fix for J7200 EVM PLL config failures
PDK-5095: Board: Updated automation header test for J7200 EVM
Merge pull request #986 in PROCESSOR-SDK/pdk from PDK-6470-finish-unaddressed-comments to master
Squashed commit of the following:
commit 3288a65347a9afcc17fb90f1e2fa6b9d7a900b7e
Author: Jennifer Huang <a0270948@ti.com>
Date: Mon Jul 27 10:47:14 2020 -0400
PDK-6470: fix based on review comments
commit 98794b3a4303a98f35f2bb1e16ab5a4f2f61a6f5
Author: Jennifer Huang <a0270948@ti.com>
Date: Wed Jul 22 15:02:47 2020 -0400
PDK-6470: change HWA_open to same API for both DSP and ARM build
commit 5cf1c3eafcd491de55cba04799727f8521cf6552
Author: Jennifer Huang <a0270948@ti.com>
Date: Tue Jul 21 12:09:02 2020 -0400
PDK-6470: address review comments
commit a7767c126abfb9dd0989253badc979f922a61b8a
Author: Jennifer Huang <a0270948@ti.com>
Date: Fri Jul 17 09:59:44 2020 -0400
PDK-6470:fix some unaddressed comments, and changed the hardcoded interrupt priority to configurable in mss
Squashed commit of the following:
commit 3288a65347a9afcc17fb90f1e2fa6b9d7a900b7e
Author: Jennifer Huang <a0270948@ti.com>
Date: Mon Jul 27 10:47:14 2020 -0400
PDK-6470: fix based on review comments
commit 98794b3a4303a98f35f2bb1e16ab5a4f2f61a6f5
Author: Jennifer Huang <a0270948@ti.com>
Date: Wed Jul 22 15:02:47 2020 -0400
PDK-6470: change HWA_open to same API for both DSP and ARM build
commit 5cf1c3eafcd491de55cba04799727f8521cf6552
Author: Jennifer Huang <a0270948@ti.com>
Date: Tue Jul 21 12:09:02 2020 -0400
PDK-6470: address review comments
commit a7767c126abfb9dd0989253badc979f922a61b8a
Author: Jennifer Huang <a0270948@ti.com>
Date: Fri Jul 17 09:59:44 2020 -0400
PDK-6470:fix some unaddressed comments, and changed the hardcoded interrupt priority to configurable in mss
Board: Fix for K3 diag framework build errors
PDK-5038: Board: Enabled board flash library for TPR12 QT
PDK-5038: Board: Fix for TPR12 EVM board build issues
PDK-5038: Board: Fix for TPR12 EVM flash library src package issue
PDK-5009: Board: Enabled UART diagnostic test for TPR12 EVM
PDK-5038: Board: Updated TPR12 EVM board library
- Added I2C and UART init functions
- Added board info APIs
- Added Ethernet configurations
- Corrected pinmux file names
- Updated utils and mmr functions
- Added I2C and UART init functions
- Added board info APIs
- Added Ethernet configurations
- Corrected pinmux file names
- Updated utils and mmr functions
PDK-5004: Board: Enabled QSPI flash diagnostic test for TPR12 EVM
- PDK-5038: Added flash API support for board library
- PDK-5038: Added flash API support for board library
PDK-5611: SBL: Switch OSPI flash to SPI mode at the end
Adds support for re-opening the OSPI flash in SPI mode
and leaving it in that mode when the SBL exits.
This supports U-boot or HLOS boot on the Cortex-A cores
of the SoC. It allows the SPL/U-boot to take over the
flash, reset it, and reconfigure it for Octal-mode again.
Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>
Adds support for re-opening the OSPI flash in SPI mode
and leaving it in that mode when the SBL exits.
This supports U-boot or HLOS boot on the Cortex-A cores
of the SoC. It allows the SPL/U-boot to take over the
flash, reset it, and reconfigure it for Octal-mode again.
Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>
CPSW5G J7VCL changes to support QSGMII 4 ports
With J7200, GESI board + QSGMII board not possible due to shared MAC port; only below
combinations are possible –
1. 1 port RGMII via GESI DB
2. 4 port QSGMII via QSGMII DB
In board config we configure only QSGMII by default.
Signed-off-by: a0132233 <prasad.jondhale@ti.com>
With J7200, GESI board + QSGMII board not possible due to shared MAC port; only below
combinations are possible –
1. 1 port RGMII via GESI DB
2. 4 port QSGMII via QSGMII DB
In board config we configure only QSGMII by default.
Signed-off-by: a0132233 <prasad.jondhale@ti.com>
PDK-5375: Board/Sbl: OSPI configurations update for sbl boot
- Board flash library is updated to allow applications to DAC mode configurations
- SBL is update to disable PHY and PLL clock configurations which are taken care by board
- Board flash library is updated to allow applications to DAC mode configurations
- SBL is update to disable PHY and PLL clock configurations which are taken care by board
hyperbus : bringup
Works most of the times, ensured 5 consecutive run works
Removed the mem-reset after determining ID, as we don't check
if device is active before subsequent command.
Additional checks to ensure device is indeed free, before
initiating next command
Signed-off-by: sujith <sujith.s@ti.com>
Works most of the times, ensured 5 consecutive run works
Removed the mem-reset after determining ID, as we don't check
if device is active before subsequent command.
Additional checks to ensure device is indeed free, before
initiating next command
Signed-off-by: sujith <sujith.s@ti.com>
PDK-7061: Mailbox LLD: Single Lib for RTOS and Baremetal
Update the mailbox lld to remove the separate mailbox and mailbox_baremetal
libraries. Instead, have a single library, that can be linked with either
tirtos osal or nonos osal by application.
In order to do this, the mailbox library uses a new OSAL API that is used
for am64x R5F direct VIM interrupt registration (new API is used in certain
readMode by am64x mailbox implementation only).
Additionally, add a new open param "enableVIMDirectInterrupt", which can
be used to enable/disable this feature. By default, it is set to false,
but can be enabled by the application.
Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
Update the mailbox lld to remove the separate mailbox and mailbox_baremetal
libraries. Instead, have a single library, that can be linked with either
tirtos osal or nonos osal by application.
In order to do this, the mailbox library uses a new OSAL API that is used
for am64x R5F direct VIM interrupt registration (new API is used in certain
readMode by am64x mailbox implementation only).
Additionally, add a new open param "enableVIMDirectInterrupt", which can
be used to enable/disable this feature. By default, it is set to false,
but can be enabled by the application.
Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
PDK-7062: OSAL: Add API for Direct VIM Registration for R5
Add the API for supporting direct VIM registration for R5
for baremetal. All other cores and TIRTOS are not
supported.
Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
Add the API for supporting direct VIM registration for R5
for baremetal. All other cores and TIRTOS are not
supported.
Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
PDK-6820: Fix "isUsed" bookkeeping in TPR12 EDMA driver: patch 2
This was fixed partly in
https://bitbucket.itg.ti.com/projects/PROCESSOR-SDK/repos/pdk/pull-requests/894/overview
Fixed the unregister interrupt only for the registered interrupts
Signed-off-by: Prasad Konnur <prasadkonnur@ti.com>
This was fixed partly in
https://bitbucket.itg.ti.com/projects/PROCESSOR-SDK/repos/pdk/pull-requests/894/overview
Fixed the unregister interrupt only for the registered interrupts
Signed-off-by: Prasad Konnur <prasadkonnur@ti.com>
PDK-4989: edma driver clean up for tpr12
Signed-off-by: Prasad Konnur <prasadkonnur@ti.com>
Signed-off-by: Prasad Konnur <prasadkonnur@ti.com>
PDK-5375: J7200: Board: Add in GTC clock cfg
Adds PLL & clock config for proper GTC clock
frequency (200 MHz) for the GTC provided to
the Cortex-A72 cores (similar to J721E).
Necessary, now that the GTC is enabled by
default in the SBL. Also matches up with ATF/
Linux expectations for the proper GTC clock
base.
Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>
Adds PLL & clock config for proper GTC clock
frequency (200 MHz) for the GTC provided to
the Cortex-A72 cores (similar to J721E).
Necessary, now that the GTC is enabled by
default in the SBL. Also matches up with ATF/
Linux expectations for the proper GTC clock
base.
Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>
PDK-5778: Interleaved boot support for SBL
For all non-SBL cores, SBL shall immediately reset/release a core after loading an image. The core ordering is based on the RPRC ordering within the combined appimage.
For all non-SBL cores, SBL shall immediately reset/release a core after loading an image. The core ordering is based on the RPRC ordering within the combined appimage.
Enable GTC in SBL
GTC must be enabled for SBL to boot Linux
GTC must be enabled for SBL to boot Linux
3 years agoPDK-7091: PRUSS: move init of function handler before interrupt registration REL.CORESDK.07.00.02.03
PDK-7091: PRUSS: move init of function handler before interrupt registration
Signed-off-by: Tinku Mannan <tmannan@ti.com>
Signed-off-by: Tinku Mannan <tmannan@ti.com>
TPR12: fix build failure per EDMA_init()
Fix TPR12 build failure due to EDMA_init() prototype change
Signed-off-by: Eric Ruei <e-ruei1@ti.com>
Fix TPR12 build failure due to EDMA_init() prototype change
Signed-off-by: Eric Ruei <e-ruei1@ti.com>
sciclient: j7200: Sync RM boardcfg entries with SYSFW
Sync the j7200 RM boardcfg entries with the latest
entry definitions within SYSFW.
Signed-off-by: Justin Sobota <jsobota@ti.com>
Sync the j7200 RM boardcfg entries with the latest
entry definitions within SYSFW.
Signed-off-by: Justin Sobota <jsobota@ti.com>
sciclient: Delete commented j7200 RM data from j721e data
The j7200 data was initially added as part of the j721e
data in sciclient. The j7200 data was commented out until
V2 was added. Delete the commented data now that j7200
formally exists.
Signed-off-by: Justin Sobota <jsobota@ti.com>
The j7200 data was initially added as part of the j721e
data in sciclient. The j7200 data was commented out until
V2 was added. Delete the commented data now that j7200
formally exists.
Signed-off-by: Justin Sobota <jsobota@ti.com>
am64x_svb: Update to use SIM_BUILD similar to am64x_evm
Signed-off-by: Sam Nelson <sam.nelson@ti.com>
Signed-off-by: Sam Nelson <sam.nelson@ti.com>
am64x_svb: update to match with am64x_evm
Signed-off-by: Sam Nelson <sam.nelson@ti.com>
Signed-off-by: Sam Nelson <sam.nelson@ti.com>
PRSDK-8372: board: Update configuration to output from EMIF tool output
Updated on 21 July2020
Signed-off-by: Sam Nelson <sam.nelson@ti.com>
Updated on 21 July2020
Signed-off-by: Sam Nelson <sam.nelson@ti.com>
Incorporating review comments
Fixing potential bug in firmware
R2-R9 will be overwritten for case where packet is both forwarded and received in host
R2-R9 will be overwritten for case where packet is both forwarded and received in host
Final driver and firmware changes for Rx TS append
1. Tested with timesync application on port 1
2. Requires inputs from BMCA algorithm
1. Tested with timesync application on port 1
2. Requires inputs from BMCA algorithm
Adding features for Rx TS append feature
1. Timestamp flag in descriptor is set for driver
2. CRC length is not subtracted for timestamped packets as timestmap comes after CRC
1. Timestamp flag in descriptor is set for driver
2. CRC length is not subtracted for timestamped packets as timestmap comes after CRC
Draft changes in FW to append TS to Rx packet
1. Draft firmware changes to append Timestamp to PTP packets
2. 10 bytes of timestamp are appended to frame
3. Only appended for PTP frames in this commit
1. Draft firmware changes to append Timestamp to PTP packets
2. 10 bytes of timestamp are appended to frame
3. Only appended for PTP frames in this commit
PDK-7142: IPC: Update J7VCL Shared Memory Address
For J7VCL, move the location of the shared memory buffer
closer to the carveouts used for loading the firmwares.
This reduces the gap between the regions used for firmware
loading and shared memory for the R5F cores.
New location is at 0xA4000000 for J7VCL.
J721E remains at 0xAA000000.
Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
For J7VCL, move the location of the shared memory buffer
closer to the carveouts used for loading the firmwares.
This reduces the gap between the regions used for firmware
loading and shared memory for the R5F cores.
New location is at 0xA4000000 for J7VCL.
J721E remains at 0xAA000000.
Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
PDK-5375: sbl: Updated xspi flash device ID for J7200 EVM
Fix AM64x build errors
Signed-off-by: Sivaraj R <sivaraj@ti.com>
Signed-off-by: Sivaraj R <sivaraj@ti.com>
[Bug Fix] EDMA CSL driver
- PDK-7043: edma csl driver initializes all channels in EDMA3Init
Updated edma driver and example to use this
- PDK-7069: edma csl driver fails to support multiple instances with
different region id
Updated edma driver to use new CSL APIs with region id
Signed-off-by: Prasad Konnur <prasadkonnur@ti.com>
- PDK-7043: edma csl driver initializes all channels in EDMA3Init
Updated edma driver and example to use this
- PDK-7069: edma csl driver fails to support multiple instances with
different region id
Updated edma driver to use new CSL APIs with region id
Signed-off-by: Prasad Konnur <prasadkonnur@ti.com>
Hyperbus : write functions : fixed minor issue
When built in release mode first 2 bytes of data
was always corrupted. It seemed like the lack of
prcedence of operator, was causing malfunctions.
e.g. when we step through the operation, the write and
subsequent read was successful. However, on a
free run, data was corrupted
Added explicit precedence. MISRA C check would have
caught this
Minor optimization in read, limiting the number of reads
1
Tested with CSL example application on J7VCL
Signed-off-by: sujith <sujith.s@ti.com>
When built in release mode first 2 bytes of data
was always corrupted. It seemed like the lack of
prcedence of operator, was causing malfunctions.
e.g. when we step through the operation, the write and
subsequent read was successful. However, on a
free run, data was corrupted
Added explicit precedence. MISRA C check would have
caught this
Minor optimization in read, limiting the number of reads
1
Tested with CSL example application on J7VCL
Signed-off-by: sujith <sujith.s@ti.com>
fixing the port check in emac ioctls
PINDSW-4498
PINDSW-4498
SBL: Enabling sbl_lib_cust for AM64x
MMCSD: Using initMMu() for AM64x EMMC example
FATFS: Fix for inclusion of wrong csl files during AM64x builds
Enable I2C appimage gen for test automation
Signed-off-by: Sivaraj R <sivaraj@ti.com>
Signed-off-by: Sivaraj R <sivaraj@ti.com>
FATFS: Enabling packaging & example for AM64x
MMCSD: Cleanup of usage of csl_chip.h
MMCSD: Adding AM64x to examples
updated pass string as expected by test automation
Signed-off-by: Prasad Konnur <prasadkonnur@ti.com>
Signed-off-by: Prasad Konnur <prasadkonnur@ti.com>
Revert "Revert "PDK-4989: edma driver clean up for tpr12""
This reverts commit 2fae8f408563111e72fd756f064eae8c5895fdb6.
This reverts commit 2fae8f408563111e72fd756f064eae8c5895fdb6.
watchdog: enable the switch between printf and UART_printf
Signed-off-by: Hongmei Gou <hgou@ti.com>
Signed-off-by: Hongmei Gou <hgou@ti.com>
watchdog: print the message of test passed in watchdog callback
* DSP Watchdog timeout triggers an ESM high priority error, which is an NMI
first captured by the NMI exception handler. Since there is no returning
from NMI/Exceptions, print the message of "All Tests PASSED" in the
watchdog callback function to facilitate the test automation.
Signed-off-by: Hongmei Gou <hgou@ti.com>
* DSP Watchdog timeout triggers an ESM high priority error, which is an NMI
first captured by the NMI exception handler. Since there is no returning
from NMI/Exceptions, print the message of "All Tests PASSED" in the
watchdog callback function to facilitate the test automation.
Signed-off-by: Hongmei Gou <hgou@ti.com>
J7200 : OSPI : works in IN DAC mode
Pending fixes identified in PDK-7115
Signed-off-by: sujith <sujith.s@ti.com>
Pending fixes identified in PDK-7115
Signed-off-by: sujith <sujith.s@ti.com>
GPIO : update
Signed-off-by: sujith <sujith.s@ti.com>
Signed-off-by: sujith <sujith.s@ti.com>
v2020.06 Migrate to v2020.06 SYSFW
Migrate to v2020.06 release
Signed-off-by: Piyali Goswami <piyali_g@ti.com>
Migrate to v2020.06 release
Signed-off-by: Piyali Goswami <piyali_g@ti.com>
PRSDK-8644: Board: Restored MCU timer0 FCLK setting changed by ROM
- RoM bootloader changes the defaul timer clock configurations which causes
timer to run at different frequency. This impacts the OS clock tick function.
Updated board library to restore the timer clock settings to default.
- RoM bootloader changes the defaul timer clock configurations which causes
timer to run at different frequency. This impacts the OS clock tick function.
Updated board library to restore the timer clock settings to default.
MMCSD: Nightly fixes for AM64x
ospi: PDK-5464: am64x: add driver/example support for M4F core
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Hao Zhang <hzhang@ti.com>
SBL: Fix compilation issue for sbl_boot_perf_test (AM64x)
SBL:Adding option to skip OSPI driver for sysfw download for K3
Signed-off-by: uda0875154local <uda0875154local@UDA0875154>
Signed-off-by: uda0875154local <uda0875154local@UDA0875154>
Update EMAC FW headers
Signed-off-by: Pratheesh Gangadhar <pratheesh@ti.com>
Signed-off-by: Pratheesh Gangadhar <pratheesh@ti.com>
Fix for PINDSW-4470 - incorrect HW stats extraction in Switch mode
Use the correct offsets for Port1 and Port2
Signed-off-by: Pratheesh Gangadhar <pratheesh@ti.com>
Use the correct offsets for Port1 and Port2
Signed-off-by: Pratheesh Gangadhar <pratheesh@ti.com>
3 years agogpmc: PDK-5436: am64x: fix package build issues REL.CORESDK.07.00.01.05 REL.CORESDK.07.00.01.06
gpmc: PDK-5436: am64x: fix package build issues
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Hao Zhang <hzhang@ti.com>
gpmc: PDK-5436: am64x: add performance measurement support
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Hao Zhang <hzhang@ti.com>
gpmc: PDK-5436: am64x: add gpmc dma driver support
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Hao Zhang <hzhang@ti.com>
gpmc: PDK-5436: am64x: add gpmc sram LLD support
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Hao Zhang <hzhang@ti.com>
[PDK-7099][PDK-6923] Update usage of PDK_COMMON_*_COMP
-remove(filter out) addition of lib's if any alternate version of the lib is used
-csl removed when csl2 is included
-sciclient removed when sciclient_hs is included
Signed-off-by: Don Dominic <a0486429@ti.com>
-remove(filter out) addition of lib's if any alternate version of the lib is used
-csl removed when csl2 is included
-sciclient removed when sciclient_hs is included
Signed-off-by: Don Dominic <a0486429@ti.com>
PDK-5086: Board: Disabled OSPI DMA mode for J7200 flash programmer
- OSPI is not functional in DMA mode on J7200 platform. Disabled DMA
mode for Uniflash flash programmer till the DMA mode issue is
resolved.
- OSPI is not functional in DMA mode on J7200 platform. Disabled DMA
mode for Uniflash flash programmer till the DMA mode issue is
resolved.
PDK-5037: Board: Fix for J7200 OSPI erase failures
- OSPI erase is failing during flash programming due to 4KB sectors
in hybrid configuration. Updated the board library to disable
hybrid sector configuration and keep the sector size uniform
- OSPI erase is failing during flash programming due to 4KB sectors
in hybrid configuration. Updated the board library to disable
hybrid sector configuration and keep the sector size uniform
PDK-5102: Spi: J7200 OSPI dtr mode is enabled by default
- OSPI driver enables dtr mode by default for all the platforms.
It was disabled for J7200 due to failures in dtr mode. Enabling
the dtr mode as the board APIs are now functioning in dtr mode.
- OSPI driver enables dtr mode by default for all the platforms.
It was disabled for J7200 due to failures in dtr mode. Enabling
the dtr mode as the board APIs are now functioning in dtr mode.
PDK-5003: Board: Fix for nor flash diagnostic test on J7200 EVM
DMA Utils: Fix warning
Signed-off-by: Sivaraj R <sivaraj@ti.com>
Signed-off-by: Sivaraj R <sivaraj@ti.com>
3 years agoPDK-5102: Spi: Updated OSPI clock configurations REL.CORESDK.07.00.01.04 REL.CORESDK.07.00.03.02
PDK-5102: Spi: Updated OSPI clock configurations
- Updated OSPI clock configurations for higher frequency when
PHY is disabled.
- Updated OSPI clock configurations for higher frequency when
PHY is disabled.
[PDK-5687] Dmautils support for Vitrual to Physical addr translation
Signed-off-by: Anshu Jain <anshu.jain@ti.com>
Signed-off-by: Anshu Jain <anshu.jain@ti.com>
PDK-7082: Disabling HwiP_disable interrupts for AM64x timer interrupts
drv/uart/test/makefile: remove uart when uart_dma is used
remove uart from COMP_LIST_COMMON when DMA is enabled.
Without this change, uart_dma library will not be used as desired.
Signed-off-by: Eric Ruei <e-ruei1@ti.com>
remove uart from COMP_LIST_COMMON when DMA is enabled.
Without this change, uart_dma library will not be used as desired.
Signed-off-by: Eric Ruei <e-ruei1@ti.com>
PDK-5375: J7200 SBL: Add DDR usage and include OSPI driver
Adds back the DDR support for J7200 SBL. Confirmed DDR usage
is working now with multiple test cases.
Also, adds capability to build & test with the OSPI driver.
SBL xSPI boot testing is still pending.
Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>
Adds back the DDR support for J7200 SBL. Confirmed DDR usage
is working now with multiple test cases.
Also, adds capability to build & test with the OSPI driver.
SBL xSPI boot testing is still pending.
Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>
MMCSD: Added AM64x support
mibspi: disable slave mode test which blocks without testbench
Slave mode test requires peer master which is currently not
available .Disable the test so that other tests run to
completion in loopback mode without need for testbench
Signed-off-by: Badri S <badri@ti.com>
Slave mode test requires peer master which is currently not
available .Disable the test so that other tests run to
completion in loopback mode without need for testbench
Signed-off-by: Badri S <badri@ti.com>
PDK-5037: Board: Updated J7200 EVM DDR configurations (1600 MTs)
PDK-5037: Board: Fix for J7200 OSPI failure while writing multiple pages
mailbox: Bug fix for PDK-7090
Fix for Mailbox_close crashing on TPR12
Mailbox_freeDriver is invoked with &handle but function
Mailbox_freeDriver argument is expected to be handle and not &handle
Signed-off-by: Badri S <badri@ti.com>
Fix for Mailbox_close crashing on TPR12
Mailbox_freeDriver is invoked with &handle but function
Mailbox_freeDriver argument is expected to be handle and not &handle
Signed-off-by: Badri S <badri@ti.com>
Revert "PDK-4989: edma driver clean up for tpr12"
This reverts commit 370c178cbf1b2c09765ddcba45bb01183f0b1367.
This reverts commit 370c178cbf1b2c09765ddcba45bb01183f0b1367.
sciclient: Revert to 2020.05 binaries for AM65 and J7.
Revert to v2020.05 binaries for AM65 and J7.
Fixes: PDK-7067
Signed-off-by: Piyali Goswami <piyali_g@ti.com>
Revert to v2020.05 binaries for AM65 and J7.
Fixes: PDK-7067
Signed-off-by: Piyali Goswami <piyali_g@ti.com>
PINDSW-4484:Providing information about version, type and features runtime
PDK-6648: Combined RTOS/Baremetal + Linux Boot Appiamge Creation
Makefile to create combined RTOS/Baremetal + Linux appimages. Makefile parses a specific configuration format defined in config.mk, and creates the necessary ELF/RPRC files needed for creating a multicore appimage.
The goal here is confine all configuration to config.mk or to set the variables in config.mk from the CLI
Makefile to create combined RTOS/Baremetal + Linux appimages. Makefile parses a specific configuration format defined in config.mk, and creates the necessary ELF/RPRC files needed for creating a multicore appimage.
The goal here is confine all configuration to config.mk or to set the variables in config.mk from the CLI
watchdog: test makefile fix to use XDC_CFG_UPDATE
Signed-off-by: Hongmei Gou <hgou@ti.com>
Signed-off-by: Hongmei Gou <hgou@ti.com>
[PDK-4856] [SBL][TPR12] UART Boot Media Support
SBL UART mode support for TPR12. Additionally
implements requirements:
[PDK-5989] [SBL] Program TRIM values for DSP PLL and PER PLL
[PDK-4898] [SBL] Selective Logging to reduce UART prints
[PDK-4896] [SBL] MCU0 Boot Support in Lock-step Mode
[PDK-4865] [SBL] Boot profiling hooks
[PDK-4854] [SBL] SBL Example
Signed-off-by: Badri S <badri@ti.com>
SBL UART mode support for TPR12. Additionally
implements requirements:
[PDK-5989] [SBL] Program TRIM values for DSP PLL and PER PLL
[PDK-4898] [SBL] Selective Logging to reduce UART prints
[PDK-4896] [SBL] MCU0 Boot Support in Lock-step Mode
[PDK-4865] [SBL] Boot profiling hooks
[PDK-4854] [SBL] SBL Example
Signed-off-by: Badri S <badri@ti.com>
[mibspi][tpr12] KW fixes and pin mux config
KW fixes and fixes for register config and pinmux
picked from AVV TPR12 MIBSPI testcase
Signed-off-by: Badri S <badri@ti.com>
KW fixes and fixes for register config and pinmux
picked from AVV TPR12 MIBSPI testcase
Signed-off-by: Badri S <badri@ti.com>
[edma][tpr12] Restore edma asserts in edmaIsr
Asserts in edmaIsr were removed when porting
from mmWaveSDK as DebugP module was unavailable
in PDK. As DebugP support is not added restore
the assert which can important error conditions
Signed-off-by: Badri S <badri@ti.com>
Asserts in edmaIsr were removed when porting
from mmWaveSDK as DebugP module was unavailable
in PDK. As DebugP support is not added restore
the assert which can important error conditions
Signed-off-by: Badri S <badri@ti.com>
[PDK-5796] DSP compiler options updated for release mode
As per Compiler user guide optimize_with_debug option is
deprecated and should not be used.Further including -g
flag does not affect performance so can be enabled for
release build as well. As per input from mmWaveSDK team
compiler option -mf3 is selected to balance performance
vs codesize tradeoff
Signed-off-by: Badri S <badri@ti.com>
As per Compiler user guide optimize_with_debug option is
deprecated and should not be used.Further including -g
flag does not affect performance so can be enabled for
release build as well. As per input from mmWaveSDK team
compiler option -mf3 is selected to balance performance
vs codesize tradeoff
Signed-off-by: Badri S <badri@ti.com>
[PDK-5675] UDMA UT : Ring TC's Basic Porting
- Port existing testcases for LCDMA Normal Rings (BCDMA Rings and PKTDMA Unmapped Rings)
TODO:
-New TC's for Mapped Rings
-New TC for LCDMA Ring Prime
Signed-off-by: Don Dominic <a0486429@ti.com>
- Port existing testcases for LCDMA Normal Rings (BCDMA Rings and PKTDMA Unmapped Rings)
TODO:
-New TC's for Mapped Rings
-New TC for LCDMA Ring Prime
Signed-off-by: Don Dominic <a0486429@ti.com>
PDK-5037: Board: Fix for J7200 OSPI DTR mode failure
PDK-5037: Board: Updated J7200 EVM SD voltage control board API
- Update the J7200 board SD voltage control function to use GPIO for
switching the PMIC voltage output.
- Updated input parameter expected value of Board_pmSdVoltageCtrl
functoion to match with logical state of the HW IO controlling the SD voltage.
Made similar change in J721E board lib as well to be consistent.
No impact on applications since this is a board internal function.
- Update the J7200 board SD voltage control function to use GPIO for
switching the PMIC voltage output.
- Updated input parameter expected value of Board_pmSdVoltageCtrl
functoion to match with logical state of the HW IO controlling the SD voltage.
Made similar change in J721E board lib as well to be consistent.
No impact on applications since this is a board internal function.
J7200 : McSPI : Post bringup : McSPI functional now
Signed-off-by: sujith <sujith.s@ti.com>
Signed-off-by: sujith <sujith.s@ti.com>
J7200 : I2C test functional
Multiple gaps identified, tracking via
https://jira.itg.ti.com/browse/PDK-7046
Signed-off-by: sujith <sujith.s@ti.com>
Multiple gaps identified, tracking via
https://jira.itg.ti.com/browse/PDK-7046
Signed-off-by: sujith <sujith.s@ti.com>
Flash : J7200 updated to use S28HS512T also disabled DTR mode
Signed-off-by: sujith <sujith.s@ti.com>
Signed-off-by: sujith <sujith.s@ti.com>
Fix script copy error for the ccs_init
Fixed the copy error of the sciclient_ccs_init
Signed-off-by: Piyali Goswami <piyali_g@ti.com>
Fixed the copy error of the sciclient_ccs_init
Signed-off-by: Piyali Goswami <piyali_g@ti.com>
PDK-5375: J7200 SBL: Fix for booting lock-step R5s
Adds support for booting lock-step R5s, in addition
to split-mode R5s.
Enables switching to larger size TCMs for J7VCL R5
pairs when lockstep apps are detected.
Requires use of MCU "SMP" IDs for .appimage creation
in order to indicate lockstep operation to the SBL.
Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>
Adds support for booting lock-step R5s, in addition
to split-mode R5s.
Enables switching to larger size TCMs for J7VCL R5
pairs when lockstep apps are detected.
Requires use of MCU "SMP" IDs for .appimage creation
in order to indicate lockstep operation to the SBL.
Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>