Fix for RGMII configuration in 100M mode
3 years agoUpdated Ageing offset with latest tsn firmware REL.PRU-ICSS-PROFINET-SWITCH_02.02.03.02_RC1
Updated Ageing offset with latest tsn firmware
Remove padding from emac_send API
Updating FW headers
Build fix
Signed-off-by: Pratheesh Gangadhar <pratheesh@ti.com>
Signed-off-by: Pratheesh Gangadhar <pratheesh@ti.com>
Added workaround to configure TXIPG0 after configuring TXIPG1
Removed duplication of packets on both slices for undirected locall injection
Update FW memory map
Merge remote-tracking branch 'remotes/origin/HEAD' into dev_pn_tsn_inc2_am65xx_pg2.0_release
[UDMA] Initalize Board moduleClock in memcpy_baremetal_testapp for profiling support
Signed-off-by: Don Dominic <a0486429@ti.com>
Signed-off-by: Don Dominic <a0486429@ti.com>
PDK-4946 : emac c++ build issue fixes
Signed-off-by: sujith <sujith.s@ti.com>
Signed-off-by: sujith <sujith.s@ti.com>
[UDMA][PDK-4954][PDK-4955][PDK-5615][PDK-5363][PDK-5618] AM64x Port - BCDMA Support added
BCDMA verified : udma_memcpy_test on mcu1_0 working fine on VLAB and Zebu
Note: BCDMA is only enabled for mcu1_0 since resource partition in AM64x UDMA is still pending and needs alignment based on usecase.
Major Highlights:
1) Added SOC Specific Files and Top Level Changes
2) Added new macros for:
a) UDMA & LCDMA presence
b) UDMAP/LCDMA_BCDMA/LCDMA_PKTDMA instance Types
c) PROXY presence
d) CLEC presence
e) TX_Channels FDEPTH bi-direction
3) Added support for LCDMA Ring Accelerator
4) Added Support for BCDMA/PKTDMA
5) Workaround for channel Offsets, to handle different DMSC & CSL channel index ranges
6) Updates of BCDMA Block Copy
7) Handling Completion Queue and Bypassing TEARDOWN event
9) Handling DMA Completion event
10) Updates for enabling udma_memcpy_test_app for AM64x and Added benchmark profiling support
11) Support Dual Ring Mode in AM64x
Squashed Commits:
Added Blk Copy Channel Offset and max Count
-Added Block Copy Offset of 32 since BlkCpy channel starts from 32
Updated udma_soc.c for AM64x(V3)
-Bcdma/Pktdma instead of Udmap
-lcdma_RA instead of RA
-clecRtMap disabled by default , since no separate MCU domain
-removed proxy related codes, since no proxy related defines found in cslr_dmss_defines.h & cslr_soc_baseaddress.h
Updated udma_rmcfg.c for AM64x(V3)
-UdmaRmDefCfg defined only for BCDMA instance of Core - MPU1_0
-Removed maxProxy param from Udma_RmInstCheckPrms , since no proxy related defines found in cslr_dmss_defines.h
-Hence also removed the check for proxy
-Also removed the params numCores & startCoreId , which was used in Udma_rmCheckInstOverlap for Events and Vintr
-Since in AM64x the Events and Vintr are common for all cores(bcdma/pktdma instance independent)
Updated udma_soc.h for AM64x(V3)
Top level changes
-Inital commit for adding support for am64x SOC and am64x_evm
Handling CSL_NAVSS_UDMAP_TX_*_CHANS_FDEPTH in udma_ch.c
-Added the CSL macros to soc.h file and defined the macro as UDMA_TX_*_CHANS_FDEPTH
-CHANS_FDEPTH value was found same for BCDMA & PKTDMA; so using the same macro.
-Also updated devIdRing for BCDMA & PKTDMA
Added Ifdef's for Proxy and Clec related codes
Handling CSL_RINGACC_MEM_OPS_TYPE_WR & CSL_RINGACC_MEM_OPS_TYPE_RD in udma_osal.c
Added Instance Type and LCDMA_PRESENT Macro
- Also updated Udma_DrvObj by adding LCDMA DMSS specific instance parameters
-Added new macros for: LCMDA RA / Normal RA presence
-Split ring.c source files into common and lcdma/normal RA specific
-Other related changes
Handling Proxy and ringFlushRaw
Updates in ring src file(s) for Normal & Lcdma RA types
-Modified the src file ring.c to ring_common.c
-Added new src file ring_normal.c for Normal RA specific APIs
-Added new src file ring_lcdma.c for LCDMA RA specific APIs
-Added the function declarations to udam_priv.h
-Updated make file to build ring_normal.c / ring_lcdma.c depending on SOC
Handling LCDMA RingAcc and added ifdef's for Ring Monitor
-Forward and Reverse Doorbell found for LCDMA RA: Reverse Doorbell not used;
-waiting count not found in CSL_LcdmaRingaccRingCfg
-max ring_num assert condition for LCDMA RA updated to 100 (Normal RA count waas 1024)
-new param for LCDMA RA CredChkSecure in CSL_LcdmaRingaccRingCfg initialized to 0U.
(BCDMA Channel Type) (Udma Driver Channel No.) (DMSC-Channel Index Range) (DMSC-Ring Index Range) (CSL-BCDMA Channel Index Range) (CSL-Ring Index Range)
1.Blk Copy Channels -txChNum: 0-27 (32+)0-27 <offset 32> 0-27 <no offset> 0-27 <no offset> 0-27 <no offset>
2.Split TR Tx Channels -txChNum: 0-19 0-19 <no offset> 28-47 <offset 28> 28-47 <offset 28> 28-47 <offset 28>
3.Split TR Rx Channels -rxChNum: 0-19 0-19 <no offset> 48-67 <offset 48> 48-67 <offset 48> 48-67 <offset 48>
Channel Offsets:
1. BlkCopyChOffset = 32 <hardcoded>
2. txChOffset = 28 <numBlkCopyCh>
3. rxChOffset = 48 <txChOffset + numSplitTrTxCh>
-Added blkCopychOffset
-0 for all UDMAP instances (SOC's)
-Added to index (txChNum) param to pass to Sciclient_rmUdmapTxChCfg API, such that it programs the BlkCopy channels in bchan region
-ringNum = chNum (for BlkCpoy)
= chNum + txChOffset (for SplitTR Tx)
= chNum + rxChOffset (for SplitTR Rx)
-For CSL_bcdma* API's passed param - channel_num = txChNum (for BlkCopy)
= txChNum + txChOffset (for SplitTR Tx)
= rxChNum + rxChOffset (for SplitTR Rx)
Updates of BCDMA Block Copy
-chPair and unPair not needed in case of BCDMA Block Copy
-rxChNum and PeerThreadId assigned to Invalid
-rxCh Pause/Resume not required in case of BCDMA Block Copy
-Splitted/separated the assignment of overlay pointers in AllocResources for BlkCopy Ch and TX Ch , in case of BCDMA.
-BCDMA Block Copy - Bypass RxCh Config
Bypassing TEARDOWN event Register and Unregister
Added following new variables under drvHandle
1) srcIdRingIrq - Ring completion event IRQ Source ID : devIdIa for AM64x; devIdRing for others
2) blkCopyRingIrqOffset - Block Copy channel ring completion event IRQ offset
3) txRingIrqOffset - TX channel ring completion event IRQ offset.
4) rxRingIrqOffset - RX channel ring completion event IRQ offset.
For AM64x 2,3 & 4 will be corresponding TISCI Offset minus its ringNum offset ; for other devices this will be same(= TISCI RA IRQ Offset)
Added TISCI IRQ Events Offset macros
udma_memcpy_test_app updates
-using BCDMA Instance ID for memcpy , in case of SOC_AM64x
-disabled UART_printf
- Also Added Open Close Test Loop in udma_memcpy_testapp
Dual Ring mode support for AM64x
-Added check for Ring Mode
Benchmark profiling of udma_memcpy Disabled by default
Signed-off-by: Don Dominic <a0486429@ti.com>
BCDMA verified : udma_memcpy_test on mcu1_0 working fine on VLAB and Zebu
Note: BCDMA is only enabled for mcu1_0 since resource partition in AM64x UDMA is still pending and needs alignment based on usecase.
Major Highlights:
1) Added SOC Specific Files and Top Level Changes
2) Added new macros for:
a) UDMA & LCDMA presence
b) UDMAP/LCDMA_BCDMA/LCDMA_PKTDMA instance Types
c) PROXY presence
d) CLEC presence
e) TX_Channels FDEPTH bi-direction
3) Added support for LCDMA Ring Accelerator
4) Added Support for BCDMA/PKTDMA
5) Workaround for channel Offsets, to handle different DMSC & CSL channel index ranges
6) Updates of BCDMA Block Copy
7) Handling Completion Queue and Bypassing TEARDOWN event
9) Handling DMA Completion event
10) Updates for enabling udma_memcpy_test_app for AM64x and Added benchmark profiling support
11) Support Dual Ring Mode in AM64x
Squashed Commits:
Added Blk Copy Channel Offset and max Count
-Added Block Copy Offset of 32 since BlkCpy channel starts from 32
Updated udma_soc.c for AM64x(V3)
-Bcdma/Pktdma instead of Udmap
-lcdma_RA instead of RA
-clecRtMap disabled by default , since no separate MCU domain
-removed proxy related codes, since no proxy related defines found in cslr_dmss_defines.h & cslr_soc_baseaddress.h
Updated udma_rmcfg.c for AM64x(V3)
-UdmaRmDefCfg defined only for BCDMA instance of Core - MPU1_0
-Removed maxProxy param from Udma_RmInstCheckPrms , since no proxy related defines found in cslr_dmss_defines.h
-Hence also removed the check for proxy
-Also removed the params numCores & startCoreId , which was used in Udma_rmCheckInstOverlap for Events and Vintr
-Since in AM64x the Events and Vintr are common for all cores(bcdma/pktdma instance independent)
Updated udma_soc.h for AM64x(V3)
Top level changes
-Inital commit for adding support for am64x SOC and am64x_evm
Handling CSL_NAVSS_UDMAP_TX_*_CHANS_FDEPTH in udma_ch.c
-Added the CSL macros to soc.h file and defined the macro as UDMA_TX_*_CHANS_FDEPTH
-CHANS_FDEPTH value was found same for BCDMA & PKTDMA; so using the same macro.
-Also updated devIdRing for BCDMA & PKTDMA
Added Ifdef's for Proxy and Clec related codes
Handling CSL_RINGACC_MEM_OPS_TYPE_WR & CSL_RINGACC_MEM_OPS_TYPE_RD in udma_osal.c
Added Instance Type and LCDMA_PRESENT Macro
- Also updated Udma_DrvObj by adding LCDMA DMSS specific instance parameters
-Added new macros for: LCMDA RA / Normal RA presence
-Split ring.c source files into common and lcdma/normal RA specific
-Other related changes
Handling Proxy and ringFlushRaw
Updates in ring src file(s) for Normal & Lcdma RA types
-Modified the src file ring.c to ring_common.c
-Added new src file ring_normal.c for Normal RA specific APIs
-Added new src file ring_lcdma.c for LCDMA RA specific APIs
-Added the function declarations to udam_priv.h
-Updated make file to build ring_normal.c / ring_lcdma.c depending on SOC
Handling LCDMA RingAcc and added ifdef's for Ring Monitor
-Forward and Reverse Doorbell found for LCDMA RA: Reverse Doorbell not used;
-waiting count not found in CSL_LcdmaRingaccRingCfg
-max ring_num assert condition for LCDMA RA updated to 100 (Normal RA count waas 1024)
-new param for LCDMA RA CredChkSecure in CSL_LcdmaRingaccRingCfg initialized to 0U.
(BCDMA Channel Type) (Udma Driver Channel No.) (DMSC-Channel Index Range) (DMSC-Ring Index Range) (CSL-BCDMA Channel Index Range) (CSL-Ring Index Range)
1.Blk Copy Channels -txChNum: 0-27 (32+)0-27 <offset 32> 0-27 <no offset> 0-27 <no offset> 0-27 <no offset>
2.Split TR Tx Channels -txChNum: 0-19 0-19 <no offset> 28-47 <offset 28> 28-47 <offset 28> 28-47 <offset 28>
3.Split TR Rx Channels -rxChNum: 0-19 0-19 <no offset> 48-67 <offset 48> 48-67 <offset 48> 48-67 <offset 48>
Channel Offsets:
1. BlkCopyChOffset = 32 <hardcoded>
2. txChOffset = 28 <numBlkCopyCh>
3. rxChOffset = 48 <txChOffset + numSplitTrTxCh>
-Added blkCopychOffset
-0 for all UDMAP instances (SOC's)
-Added to index (txChNum) param to pass to Sciclient_rmUdmapTxChCfg API, such that it programs the BlkCopy channels in bchan region
-ringNum = chNum (for BlkCpoy)
= chNum + txChOffset (for SplitTR Tx)
= chNum + rxChOffset (for SplitTR Rx)
-For CSL_bcdma* API's passed param - channel_num = txChNum (for BlkCopy)
= txChNum + txChOffset (for SplitTR Tx)
= rxChNum + rxChOffset (for SplitTR Rx)
Updates of BCDMA Block Copy
-chPair and unPair not needed in case of BCDMA Block Copy
-rxChNum and PeerThreadId assigned to Invalid
-rxCh Pause/Resume not required in case of BCDMA Block Copy
-Splitted/separated the assignment of overlay pointers in AllocResources for BlkCopy Ch and TX Ch , in case of BCDMA.
-BCDMA Block Copy - Bypass RxCh Config
Bypassing TEARDOWN event Register and Unregister
Added following new variables under drvHandle
1) srcIdRingIrq - Ring completion event IRQ Source ID : devIdIa for AM64x; devIdRing for others
2) blkCopyRingIrqOffset - Block Copy channel ring completion event IRQ offset
3) txRingIrqOffset - TX channel ring completion event IRQ offset.
4) rxRingIrqOffset - RX channel ring completion event IRQ offset.
For AM64x 2,3 & 4 will be corresponding TISCI Offset minus its ringNum offset ; for other devices this will be same(= TISCI RA IRQ Offset)
Added TISCI IRQ Events Offset macros
udma_memcpy_test_app updates
-using BCDMA Instance ID for memcpy , in case of SOC_AM64x
-disabled UART_printf
- Also Added Open Close Test Loop in udma_memcpy_testapp
Dual Ring mode support for AM64x
-Added check for Ring Mode
Benchmark profiling of udma_memcpy Disabled by default
Signed-off-by: Don Dominic <a0486429@ti.com>
[AM64x-Zebu][DMSC] DMSC Launch Script for AM64x-Zebu
This script will load DMSC successfully(but finally will end in timeout error)
Note: Do 'CPU Reset' for MCU1_0 before loading the program
Signed-off-by: Don Dominic <a0486429@ti.com>
This script will load DMSC successfully(but finally will end in timeout error)
Note: Do 'CPU Reset' for MCU1_0 before loading the program
Signed-off-by: Don Dominic <a0486429@ti.com>
PDK-4946 : Packageing ICSS firmware
Signed-off-by: sujith <sujith.s@ti.com>
Signed-off-by: sujith <sujith.s@ti.com>
MIBSPI LLD: Migrate to mibspi lld from spi lld for tpr12
Based on review comments create a separate drv/mibspi
instead of implementing as a SPI variant v3 for
mibspi peripheral driver for TPR12
Signed-off-by: Badri S <badri@ti.com>
Based on review comments create a separate drv/mibspi
instead of implementing as a SPI variant v3 for
mibspi peripheral driver for TPR12
Signed-off-by: Badri S <badri@ti.com>
[PDK-4927] SPI LLD for TPR12
SPI LLD for MIBSPI peripheral of TPR12
Following requirements are implemented
PDK-4857,PDK-4884,PDK-4895,PDK-4906,PDK-4909,
PDK-4911,PDK-4919,PDK-4927
Signed-off-by: Badri S <badri@ti.com>
SPI LLD for MIBSPI peripheral of TPR12
Following requirements are implemented
PDK-4857,PDK-4884,PDK-4895,PDK-4906,PDK-4909,
PDK-4911,PDK-4919,PDK-4927
Signed-off-by: Badri S <badri@ti.com>
3 years agoAligned Port state IOCTL with single ICSS design REL.PRU-ICSS-PROFINET-SWITCH_02.02.00.02
Aligned Port state IOCTL with single ICSS design
[Bugfix] PDK-5681: edma driver instance id are not proper
- removed edma instance ordering from soc defines.
- added api to get hardware attributes structure for each instance
- updated driver to use hardware attributes from soc file for each instance
Signed-off-by: Prasad Konnur <prasadkonnur@ti.com>
- removed edma instance ordering from soc defines.
- added api to get hardware attributes structure for each instance
- updated driver to use hardware attributes from soc file for each instance
Signed-off-by: Prasad Konnur <prasadkonnur@ti.com>
gpio: enabled example on dsp core and added rtos example
Signed-off-by: Prasad Konnur <prasadkonnur@ti.com>
Signed-off-by: Prasad Konnur <prasadkonnur@ti.com>
PDK-4882: GPIO LLD: Port GPIO functionalities for TPR12
Signed-off-by: Prasad Konnur <prasadkonnur@ti.com>
Signed-off-by: Prasad Konnur <prasadkonnur@ti.com>
PDK-5588:FIxed the default dmTimer frequency
Signed-off-by: Aravind Batni <aravindbr@ti.com>
Signed-off-by: Aravind Batni <aravindbr@ti.com>
osal: enable tirtos timer support for am64x
Signed-off-by: Aravind Batni <aravindbr@ti.com>
Signed-off-by: Aravind Batni <aravindbr@ti.com>
PRSDK-7878: Board: Added support for configuring MCU and MAIN pinmux separately for J7
mailbox: updated read ack interrupt handling
Signed-off-by: Prasad Konnur <prasadkonnur@ti.com>
Signed-off-by: Prasad Konnur <prasadkonnur@ti.com>
Added dup app needed for CSL IPC multicore gen app
Signed-off-by: Sivaraj R <sivaraj@ti.com>
Signed-off-by: Sivaraj R <sivaraj@ti.com>
Fix McSPI app package build
Signed-off-by: Sivaraj R <sivaraj@ti.com>
Signed-off-by: Sivaraj R <sivaraj@ti.com>
SCICLIENT: Revert Boardcfg RM entries to 2
- This fixes the SBL size issue
Signed-off-by: Sivaraj R <sivaraj@ti.com>
- This fixes the SBL size issue
Signed-off-by: Sivaraj R <sivaraj@ti.com>
pdk: build: disable SBL app image gen for am64x
This will temporarily resolve the package build issue.
This commit need to be reverted after SBL is supported
for am64x
Signed-off-by: Hao Zhang <hzhang@ti.com>
This will temporarily resolve the package build issue.
This commit need to be reverted after SBL is supported
for am64x
Signed-off-by: Hao Zhang <hzhang@ti.com>
Fix build errors for Am64x merge
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Hao Zhang <hzhang@ti.com>
Merge branch 'dev_pn_tsn_inc2_am65xx_pg2.0_release' of ssh://bitbucket.itg.ti.com/processor-sdk/pdk into dev_pn_tsn_inc2_am65xx_pg2.0_release
Fix for PINDSW-4183, removing TM_CFG access from drivers
Signed-off-by: Pratheesh Gangadhar <pratheesh@ti.com>
Signed-off-by: Pratheesh Gangadhar <pratheesh@ti.com>
updating the memory map file to remove not required defines
Am64x merge fix for sciclient
Signed-off-by: Sivaraj R <sivaraj@ti.com>
Signed-off-by: Sivaraj R <sivaraj@ti.com>
board flash: am64x: fix build issue.
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Hao Zhang <hzhang@ti.com>
AM64x Merge to master
Signed-off-by: Sivaraj R <sivaraj@ti.com>
Signed-off-by: Sivaraj R <sivaraj@ti.com>
3 years agoPDK-5576: IPC: AM65XX: Use AM65XX-specific sysbios and r5 config files REL.PRU-ICSS-HSR-PRP-DAN_01.00.05.01
PDK-5576: IPC: AM65XX: Use AM65XX-specific sysbios and r5 config files
The ipc_perf_test was using the same r5 config files for
AM65XX as for J721E, and therefore not correcting programming
the memory regions for r5f vring access. Update the ipc_perf_test
to use the correct files.
Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
The ipc_perf_test was using the same r5 config files for
AM65XX as for J721E, and therefore not correcting programming
the memory regions for r5f vring access. Update the ipc_perf_test
to use the correct files.
Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
makefile: added sciclient_boardcfg as a make option to build the board configuration
Now one has to explicitly make the board configuration using "make sciclient_boardcfg"
Signed-off-by: Piyali Goswami <piyali_g@ti.com>
Now one has to explicitly make the board configuration using "make sciclient_boardcfg"
Signed-off-by: Piyali Goswami <piyali_g@ti.com>
board: board_clock.c Added the devices for MCU only boot mode
Added TISCI_DEV_WKUPMCU2MAIN_VD and TISCI_DEV_MAIN2WKUPMCU_VD to support MCU Only boot mode.
Fixes: SYSFW-3266
Signed-off-by: Piyali Goswami <piyali_g@ti.com>
Added TISCI_DEV_WKUPMCU2MAIN_VD and TISCI_DEV_MAIN2WKUPMCU_VD to support MCU Only boot mode.
Fixes: SYSFW-3266
Signed-off-by: Piyali Goswami <piyali_g@ti.com>
sciclient: src: makefile: ABI3.0 SYSFW change for board config to be presorted
The RM board confiuration needs to be prevalidated before booting.
Fixes: PDK-4958
Signed-off-by: Piyali Goswami <piyali_g@ti.com>
The RM board confiuration needs to be prevalidated before booting.
Fixes: PDK-4958
Signed-off-by: Piyali Goswami <piyali_g@ti.com>
sciclient: Migrating to SYSFW version v2020.01
Migrating to the 2020.01 release for the SYSFW
Migrating to the 2020.01 release for the SYSFW
Add firmwareheader.sh in the migration script
Signed-off-by: Piyali Goswami <piyali_g@ti.com>
Signed-off-by: Piyali Goswami <piyali_g@ti.com>
gpio: PRSDK-8081: fix build issue for uninitialized varaibles
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Hao Zhang <hzhang@ti.com>
Uart Test App - remvoed custom bios cfg
Rely on the generic cfg instead
Signed-off-by: sujith <sujith.s@ti.com>
Rely on the generic cfg instead
Signed-off-by: sujith <sujith.s@ti.com>
PDK-4946 : Fixing more AM65x build errors
Note that MSMC size on AM65xx is half of J721E.
. I2C EEPROM test would fail to build in debug, lack
space for .text segment
. PCIE example fails to build in debug mode, lack
space for .text segment
. All cores build fails, as osal was not built for
mcu 1 0
. Raised PDK-4946 taks to minimize no of linker files
being used.
Signed-off-by: sujith <sujith.s@ti.com>
Note that MSMC size on AM65xx is half of J721E.
. I2C EEPROM test would fail to build in debug, lack
space for .text segment
. PCIE example fails to build in debug mode, lack
space for .text segment
. All cores build fails, as osal was not built for
mcu 1 0
. Raised PDK-4946 taks to minimize no of linker files
being used.
Signed-off-by: sujith <sujith.s@ti.com>
PDK-4946: Board: Fix for AM65x board library C++ build errors
- HW_RD_DDRPHY_REG32 is a macro function with multiple instructions.
Using this macro in conditional statements is causing build exception
during C++ build. Updated the code to avoid using macro functions in
conditional statements.
- HW_RD_DDRPHY_REG32 is a macro function with multiple instructions.
Using this macro in conditional statements is causing build exception
during C++ build. Updated the code to avoid using macro functions in
conditional statements.
sciclient: firewall: Adding firewall APIs in Sciclient
Adding firewall APIs in SCICLIENT
Fixes: PDK-4928
Signed-off-by: Piyali Goswami <piyali_g@ti.com>
Adding firewall APIs in SCICLIENT
Fixes: PDK-4928
Signed-off-by: Piyali Goswami <piyali_g@ti.com>
PDK-5575: IPC: Add J7200 Support
Add the support to build for J7200. This includes
component library as well as examples.
Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
Add the support to build for J7200. This includes
component library as well as examples.
Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
SBL: add flag to enable HLOS to control OSPI flash
Adds build flag, SBL_HLOS_OWNS_FLASH, to allow the SBL
'CUST' build to bypass setting up the OSPI flash in
XIP mode. This allows the subsequent Boot App (used to
boot HLOS on Cortex-A cores) to boot the required cores
and then reconfigure the OSPI flash in SPI mode in order
for the HLOS to take control of the flash.
Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>
Adds build flag, SBL_HLOS_OWNS_FLASH, to allow the SBL
'CUST' build to bypass setting up the OSPI flash in
XIP mode. This allows the subsequent Boot App (used to
boot HLOS on Cortex-A cores) to boot the required cores
and then reconfigure the OSPI flash in SPI mode in order
for the HLOS to take control of the flash.
Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>
PRSDK-8325: SA_UnitTest: verifyTestFramework returned error after initial framework setup
- The QMSS queue push API is implemented with _BIG_ENDIAN compile macro, which is defined by compiler even for LE modes. As the PDK support for BE is taken out, we can fix this issue by making the #ifdef LITTLE_ENDIAN as the default check and hence the bug would not be introduced.
Signed-off-by: Aravind Batni <aravindbr@ti.com>
- The QMSS queue push API is implemented with _BIG_ENDIAN compile macro, which is defined by compiler even for LE modes. As the PDK support for BE is taken out, we can fix this issue by making the #ifdef LITTLE_ENDIAN as the default check and hence the bug would not be introduced.
Signed-off-by: Aravind Batni <aravindbr@ti.com>
PDK-5574: ipc-lld: fix issue with handling out of order buffers
The remote core may have 2 threads sending messages to the host.
In this case it is possible that thread A may get an available
buffer, and then thread B can come along and interrupt thread A
and also get an available buffer, and then put that buffer to
the used list before thead A can put the buffer to the used list.
In this case, the available buffer index will no longer match
the index of the buffer in the desc array. When this happens,
the same message gets read twice, and also the desc array itself
becomes corrupted due to the receiving-side always assuming that
the index will be matching. Instead, when getting and putting
buffers, a token should be taken in order to indicate the location
of the message in the desc array. When adding buffers back,
the desc array should only be updated at that token index. The id of
the buffer in the available array should also be updated to the token
value being added.
In this way, re-ordering of buffers is accounted for.
Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
The remote core may have 2 threads sending messages to the host.
In this case it is possible that thread A may get an available
buffer, and then thread B can come along and interrupt thread A
and also get an available buffer, and then put that buffer to
the used list before thead A can put the buffer to the used list.
In this case, the available buffer index will no longer match
the index of the buffer in the desc array. When this happens,
the same message gets read twice, and also the desc array itself
becomes corrupted due to the receiving-side always assuming that
the index will be matching. Instead, when getting and putting
buffers, a token should be taken in order to indicate the location
of the message in the desc array. When adding buffers back,
the desc array should only be updated at that token index. The id of
the buffer in the available array should also be updated to the token
value being added.
In this way, re-ordering of buffers is accounted for.
Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
PDK-5573: ipc-lld: Return NULL when HeapAlloc fails
Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
Signed-off-by: Kedar Chitnis <kedarc@ti.com>
Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
Signed-off-by: Kedar Chitnis <kedarc@ti.com>
PDK-5572: IPC: examples: make c7x Vring Linux as Un-cached
Make the address for Linux IPC shared memory with
C7x as un-cached in the C7x MPU settings.
Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
Make the address for Linux IPC shared memory with
C7x as un-cached in the C7x MPU settings.
Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
PDK-5572: IPC: Update R5 MPU settings to make only Vrings as un-cached
And also add the cache function for the trace buffer
in the case where the trace buffer is shared with A72/A53.
Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
And also add the cache function for the trace buffer
in the case where the trace buffer is shared with A72/A53.
Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
PDK-5572: IPC: Configure Linux VRINGs as Un-cached in R5F MPU config
Linux VRINGs should be configured as un-cached in the R5F
MPU config, in addition to RTOS<->RTOS Vring.
Update the MPU config to configure the appropriate VRING
based on which R5F core is being used.
Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
Linux VRINGs should be configured as un-cached in the R5F
MPU config, in addition to RTOS<->RTOS Vring.
Update the MPU config to configure the appropriate VRING
based on which R5F core is being used.
Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
gpio: PRSDK-8081: remove hard coded GPIO base address
Remove the hard coded GPIO instance base address in GPIO_socConfigIntrPath(),
the base address is passed by the parameter.
Signed-off-by: Hao Zhang <hzhang@ti.com>
Remove the hard coded GPIO instance base address in GPIO_socConfigIntrPath(),
the base address is passed by the parameter.
Signed-off-by: Hao Zhang <hzhang@ti.com>
3 years agoPRSDK-8379: PA: Removing redundant .cfg file from example project DEV.PROCESSOR-SDK-RTOS_06.03.00.106 DEV.PROCESSOR-SDK_06.03.00.106
PRSDK-8379: PA: Removing redundant .cfg file from example project
Reversing the Express queue bitmask to align with firmware usage
PRSDK-8387:PRSDK-8388:PRSDK-8389: Build: Adding back the compiler flags for arm9 (omapl13x)
PDK: update tool version for TPR12
Signed-off-by: Eric Ruei <e-ruei1@ti.com>
Signed-off-by: Eric Ruei <e-ruei1@ti.com>
[FPD DRV]addressed review comments
Signed-off-by: Vivek Dhande <a0132295@ti.com>
Signed-off-by: Vivek Dhande <a0132295@ti.com>
[FPD Lib][PDK-4985]Updated UB9702 driver for test pattern generation API
- Added test patter generation API
- Curretly support following:
- 1920x1080 @30 FPS
- 3840x2160 @40 FPS
Signed-off-by: Vivek Dhande <a0132295@ti.com>
- Added test patter generation API
- Curretly support following:
- 1920x1080 @30 FPS
- 3840x2160 @40 FPS
Signed-off-by: Vivek Dhande <a0132295@ti.com>
board OSPI flash: PRSDK-7916: add support for extended SPI mode (1-1-1)
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Hao Zhang <hzhang@ti.com>
Merge remote-tracking branch 'remotes/origin/HEAD' into dev_icssg_tsn_mac_baseline
sciclient: sciclient_pm.c Fix for 0 payload
Fixed the payload to not have a NULL pointer.
Fixes: PDK-5261
Signed-off-by: Piyali Goswami <piyali_g@ti.com>
Fixed the payload to not have a NULL pointer.
Fixes: PDK-5261
Signed-off-by: Piyali Goswami <piyali_g@ti.com>
UART: AM335x no longer has SAM and DAM configured
PDK-5146: IPC: Call Board_init only for non-Linux MPU case
If Linux is running on MPU, then Board_init is not needed to be
called, since we are not using UART traces and re-initializing
the pinmux can in fact causing issues when IPC example
firmware is used in conjunction with other test firmware
that are making pinmux settings.
Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
If Linux is running on MPU, then Board_init is not needed to be
called, since we are not using UART traces and re-initializing
the pinmux can in fact causing issues when IPC example
firmware is used in conjunction with other test firmware
that are making pinmux settings.
Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
PRSDK-8302: Board: Fix GTC clock rate to match ATF on A72 cores
Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>
Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>
Build fix
Merge remote-tracking branch 'remotes/origin/dev_pn_tsn_inc2_am65xx_pg2.0_release_express_queue_mask' into dev_icssg_tsn_mac_baseline
Update FW headers and memory map
Aligning to FW changes
Added support to configure express queue mask for firmware use
Aligning to FW memory map changes
Changes to align with port specific configuration support in FW
Update switch_mem_map.h to align with the latest
Updating switch_mem_map.h to reflect PASTAT debug counter updates
PDK-4946 : Fixing c++ build issues
Signed-off-by: sujith <sujith.s@ti.com>
Signed-off-by: sujith <sujith.s@ti.com>
Removing EMAC_AM65XX_DUAL_ICSSG_CONFIG
Signed-off-by: Pratheesh Gangadhar <pratheesh@ti.com>
Signed-off-by: Pratheesh Gangadhar <pratheesh@ti.com>
Cleaning up port specific configuration variables to use respective DMEM
Signed-off-by: Pratheesh Gangadhar <pratheesh@ti.com>
Signed-off-by: Pratheesh Gangadhar <pratheesh@ti.com>
SBL: OSPI: Fix instability for CPU reads from OSPI flash
Enable Dual Transfer Rate (DTR) mode of OSPI interface for
the SBL to safely copy the SYSFW image out of OSPI flash.
There was instability in reading the SYSFW image without
this setting, especially after the board had been on for
some time or after multiple power cycles.
This is a workaround for bug PRSDK-8301, until such time
as SDR mode of the OSPI interface can be made stable again
for all image transfers.
NOTE: this workaround causes a boot time degradation of
about 2.6 ms for the SBL CUST build (OSPI boot) when using
OSPI in DDR mode, instead of in SDR mode, since DMA transfers
cannot be used early in the SBL to transfer the SYSFW binary.
Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>
Enable Dual Transfer Rate (DTR) mode of OSPI interface for
the SBL to safely copy the SYSFW image out of OSPI flash.
There was instability in reading the SYSFW image without
this setting, especially after the board had been on for
some time or after multiple power cycles.
This is a workaround for bug PRSDK-8301, until such time
as SDR mode of the OSPI interface can be made stable again
for all image transfers.
NOTE: this workaround causes a boot time degradation of
about 2.6 ms for the SBL CUST build (OSPI boot) when using
OSPI in DDR mode, instead of in SDR mode, since DMA transfers
cannot be used early in the SBL to transfer the SYSFW binary.
Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>
Merge remote-tracking branch 'remotes/origin/dev_pn_tsn_inc2_am65xx_pg2.0_release' into dev_icssg_tsn_mac_baseline
Updating the invalid timestamp check. Updating memory map
Fixes for Preemption IOCTL not working on one slice
PRSDK-7206:sbl:PRSDK-7206:sbl:Fix Klocwork critical/error warnings
PRSDK-3810: AM65XX: emac: update unity tag for requirements verification
TPR12: clean up for R5F lock-step mode support
In lock-step mode, only mcu1_0 build is required and it owns all resources
- remove mcu1_1 from default core list for build
- increase TCM_RAM size from 16k to 32K
Signed-off-by: Eric Ruei <e-ruei1@ti.com>
In lock-step mode, only mcu1_0 build is required and it owns all resources
- remove mcu1_1 from default core list for build
- increase TCM_RAM size from 16k to 32K
Signed-off-by: Eric Ruei <e-ruei1@ti.com>
PRSDK-8296: icss-emac-lld: fix compilation of test app for linux use case
PRSDK-7565: Board: Fix for Uniflash failure on AM65x HS platform
gpmc: PRSDK-7209: fix KW issues for am335x/am437x
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Hao Zhang <hzhang@ti.com>
PRSDK-8192: Board: Enabled ARM mode for diag etnry code
PRSDK-8253: icss-emac: Adding 32 bit version utility functions for memcpy and memset
required to access PRU-ICSS memory for statistics
Signed-off-by: Tinku Mannan <tmannan@ti.com>
required to access PRU-ICSS memory for statistics
Signed-off-by: Tinku Mannan <tmannan@ti.com>
PRSDK-4913:ICSS-EMAC:NIMU-ICSS:adding support for MC/UC/BC Storm feature implementation
Fix for PINDSW-4185 priority regeneration to work
Signed-off-by: Pratheesh Gangadhar <pratheesh@ti.com>
Signed-off-by: Pratheesh Gangadhar <pratheesh@ti.com>
3 years agoPDK-4855: Ported mailbox driver from MMWAVESDK REL.CORESDK.06.02.01.01 REL.CORESDK.06.02.01.02 REL.CORESDK.06.02.01.03
PDK-4855: Ported mailbox driver from MMWAVESDK
Signed-off-by: Sivaraj R <sivaraj@ti.com>
Signed-off-by: Prasad Konnur <prasadkonnur@ti.com>
Signed-off-by: Sivaraj R <sivaraj@ti.com>
Signed-off-by: Prasad Konnur <prasadkonnur@ti.com>
IPC: Specify Core List for Appimage separate from CORELIST
The full CORELIST includes c7x-hostemu, which is not needed
for the combined appimage generation. Create a separate
APPCORELIST for just the cores needed for the combined
ipc_multicore_perf_test appimage generation.
Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
The full CORELIST includes c7x-hostemu, which is not needed
for the combined appimage generation. Create a separate
APPCORELIST for just the cores needed for the combined
ipc_multicore_perf_test appimage generation.
Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
PRSDK-8270: emac: update unity tag requirement list
PRSDK-8263: SBL: Fix for OMAPL138 build error due to insufficient memory
PRSDK-7156: Test update for pruss driver pg2.0 verification
Fix for PINDSW-4203. To fix the issues with forwarding of > 1523B packets due to MII RT configuration
Merge remote-tracking branch 'remotes/origin/master' into dev_icssg_tsn_mac_baseline