pasdk/shared/ipc.cfg.xs

   1 /*
   2 Copyright (c) 2016, Texas Instruments Incorporated - http://www.ti.com/
   3 All rights reserved.
   4
   5 * Redistribution and use in source and binary forms, with or without
   6 * modification, are permitted provided that the following conditions
   7 * are met:
   8 *
   9 * Redistributions of source code must retain the above copyright
  10 * notice, this list of conditions and the following disclaimer.
  11 *
  12 * Redistributions in binary form must reproduce the above copyright
  13 * notice, this list of conditions and the following disclaimer in the
  14 * documentation and/or other materials provided with the
  15 * distribution.
  16 *
  17 * Neither the name of Texas Instruments Incorporated nor the names of
  18 * its contributors may be used to endorse or promote products derived
  19 * from this software without specific prior written permission.
  20 *
  21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32 *
  33 */
  34
  35 /*
  36  *  ======== ipc.cfg.xs ========
  37  */
  38
  39 /* root of the configuration object model */
  40 var Program = xdc.useModule('xdc.cfg.Program');
  41 var cfgArgs = Program.build.cfgArgs;
  42
  43 /* configure processor names */
  44 var procNameAry = ["HOST", "CORE0"];
  45 var MultiProc = xdc.useModule('ti.sdo.utils.MultiProc');
  46 MultiProc.setConfig(xdc.global.procName, procNameAry);
  47
  48 /* ipc configuration */
  49 var Ipc = xdc.useModule('ti.sdo.ipc.Ipc');
  50 Ipc.procSync = Ipc.ProcSync_PAIR;
  51 Ipc.sr0MemorySetup = true;
  52
  53 /* shared region configuration */
  54 var SharedRegion = xdc.useModule('ti.sdo.ipc.SharedRegion');
  55
  56 SharedRegion.numEntries = 4;
  57
  58 /* configure SharedRegion #0 (IPC) */
  59 var Sr0Mem = Program.cpu.memoryMap["SR_0"];
  60
  61 SharedRegion.setEntryMeta(0,
  62     new SharedRegion.Entry({
  63         name:           "SR_0",
  64         base:           Sr0Mem.base,
  65         len:            Sr0Mem.len,
  66         ownerProcId:    1,
  67         isValid:        true,
  68         cacheEnable:    xdc.global.SR0_cacheEnable
  69     })
  70 );
  71
  72 /* configure SharedRegion #1 (MSMC) */
  73 var SrMsmcMem = Program.cpu.memoryMap["SR_MSMC"];
  74
  75 SharedRegion.setEntryMeta(1,
  76     new SharedRegion.Entry({
  77         name:           "SR_MSMC",
  78         base:           SrMsmcMem.base,
  79         len:            SrMsmcMem.len,
  80         ownerProcId:    1,
  81         isValid:        true,
  82         cacheEnable:    xdc.global.SrMsmcMem_cacheEnable,
  83         createHeap:     true
  84     })
  85 );
  86
  87 /* configure SharedRegion #2 (DDR3) */
  88 var SrDDr3Mem = Program.cpu.memoryMap["SR_DDR3"];
  89
  90 SharedRegion.setEntryMeta(2,
  91     new SharedRegion.Entry({
  92         name:           "SR_DDR3",
  93         base:           SrDDr3Mem.base,
  94         len:            SrDDr3Mem.len,
  95         ownerProcId:    1,
  96         isValid:        true,
  97         cacheEnable:    xdc.global.SrDDr3Mem_cacheEnable,
  98         createHeap:     true
  99     })
 100 );
 101
 102 /* configure SharedRegion #3 (DDR3) */
 103 var SrDDr3_2Mem = Program.cpu.memoryMap["COMMON2_DDR3"];
 104
 105 SharedRegion.setEntryMeta(3,
 106     new SharedRegion.Entry({
 107         name:           "COMMON2_DDR3",
 108         base:           SrDDr3_2Mem.base,
 109         len:            SrDDr3_2Mem.len,
 110         ownerProcId:    1,
 111         isValid:        true,
 112         cacheEnable:    xdc.global.SrDDr3_2Mem_cacheEnable,
 113         createHeap:     true
 114     })
 115 );