2 /*
3 Copyright (c) 2016, Texas Instruments Incorporated - http://www.ti.com/
4 All rights reserved.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 *
13 * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the
16 * distribution.
17 *
18 * Neither the name of Texas Instruments Incorporated nor the names of
19 * its contributors may be used to endorse or promote products derived
20 * from this software without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
23 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
24 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
25 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
26 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
27 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
28 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
32 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 *
34 */
36 /*
37 * ======== app.cfg ========
38 * Platform: 66AK2G_bios_elf
39 * Target: ti.targets.elf.C66
40 */
42 /* root of the configuration object model */
43 var Program = xdc.useModule('xdc.cfg.Program');
44 var cfgArgs = Program.build.cfgArgs;
45 var RB = (cfgArgs.profile == "release" ? true : false);
47 /* application uses the following modules and packages */
48 var Defaults = xdc.useModule('xdc.runtime.Defaults');
49 var Diags = xdc.useModule('xdc.runtime.Diags');
50 var Error = xdc.useModule('xdc.runtime.Error');
51 var Log = xdc.useModule('xdc.runtime.Log');
52 var Main = xdc.useModule('xdc.runtime.Main');
53 var Memory = xdc.useModule('xdc.runtime.Memory')
54 var SysMin = xdc.useModule('xdc.runtime.SysMin');
55 var System = xdc.useModule('xdc.runtime.System');
56 var Text = xdc.useModule('xdc.runtime.Text');
58 var BIOS = xdc.useModule('ti.sysbios.BIOS');
59 var Hwi = xdc.useModule('ti.sysbios.hal.Hwi');
60 var Cache = xdc.useModule('ti.sysbios.hal.Cache');
61 var Timer = xdc.useModule('ti.sysbios.hal.Timer');
62 var HeapBuf = xdc.useModule('ti.sysbios.heaps.HeapBuf');
63 var HeapMem = xdc.useModule('ti.sysbios.heaps.HeapMem');
64 var Clock = xdc.useModule('ti.sysbios.knl.Clock');
65 var Idle = xdc.useModule('ti.sysbios.knl.Idle');
66 var Queue = xdc.useModule('ti.sysbios.knl.Queue');
67 var Semaphore = xdc.useModule('ti.sysbios.knl.Semaphore');
68 var Task = xdc.useModule('ti.sysbios.knl.Task');
69 var Load = xdc.useModule('ti.sysbios.utils.Load');
71 var LoggingSetup = xdc.useModule('ti.uia.sysbios.LoggingSetup');
72 var UIAEvt = xdc.useModule('ti.uia.events.UIAEvt');
74 var ECM = xdc.useModule('ti.sysbios.family.c64p.EventCombiner');
76 xdc.useModule('ti.sdo.utils.MultiProc');
78 /*
79 * ======== IPC Configuration ========
80 */
81 xdc.global.SR0_cacheEnable = true;
82 xdc.global.SrMsmcMem_cacheEnable = true;
83 xdc.global.SrDDr3Mem_cacheEnable = true;
84 xdc.global.procName = "CORE0";
85 var ipc_cfg = xdc.loadCapsule("C:/ti/processor_audio_sdk_1_00_00_00/pasdk/shared/ipc.cfg.xs");
87 /* select ipc libraries */
88 var Build = xdc.useModule('ti.sdo.ipc.Build');
89 Build.libType = (RB ? Build.LibType_NonInstrumented : Build.LibType_Debug);
90 Build.assertsEnabled = (RB ? false : true);
91 Build.logsEnabled = (RB ? false : true);
94 /*
95 * Uncomment this line to globally disable Asserts.
96 * All modules inherit the default from the 'Defaults' module. You
97 * can override these defaults on a per-module basis using Module.common$.
98 * Disabling Asserts will save code space and improve runtime performance.
99 Defaults.common$.diags_ASSERT = Diags.ALWAYS_OFF;
100 */
102 /*
103 * Uncomment this line to keep module names from being loaded on the target.
104 * The module name strings are placed in the .const section. Setting this
105 * parameter to false will save space in the .const section. Error and
106 * Assert messages will contain an "unknown module" prefix instead
107 * of the actual module name.
108 Defaults.common$.namedModule = false;
109 */
111 /*
112 * Minimize exit handler array in System. The System module includes
113 * an array of functions that are registered with System_atexit() to be
114 * called by System_exit().
115 */
116 System.maxAtexitHandlers = 4;
118 /*
119 * Uncomment this line to disable the Error print function.
120 * We lose error information when this is disabled since the errors are
121 * not printed. Disabling the raiseHook will save some code space if
122 * your app is not using System_printf() since the Error_print() function
123 * calls System_printf().
124 Error.raiseHook = null;
125 */
127 /*
128 * Uncomment this line to keep Error, Assert, and Log strings from being
129 * loaded on the target. These strings are placed in the .const section.
130 * Setting this parameter to false will save space in the .const section.
131 * Error, Assert and Log message will print raw ids and args instead of
132 * a formatted message.
133 Text.isLoaded = false;
134 */
136 /*
137 * Uncomment this line to disable the output of characters by SysMin
138 * when the program exits. SysMin writes characters to a circular buffer.
139 * This buffer can be viewed using the SysMin Output view in ROV.
140 SysMin.flushAtExit = false;
141 */
143 /*
144 * The BIOS module will create the default heap for the system.
145 * Specify the size of this default heap.
146 */
147 //BIOS.heapSize = 0x1000; // initial setting
148 BIOS.heapSize = 0x2000; // from pa.cfg
149 BIOS.heapSection = ".systemHeap";
150 Program.sectMap[".systemHeap"] = "CORE0_DDR3";
152 /*
153 * Build a custom SYS/BIOS library from sources.
154 */
155 BIOS.libType = (RB ? BIOS.LibType_NonInstrumented : BIOS.LibType_Instrumented);
156 // BIOS.libType = BIOS.LibType_Custom;
157 // BIOS.libType = BIOS.LibType_Debug;
159 /* System stack size (used by ISRs and Swis) */
160 Program.stack = 0x2000;
161 Program.sectMap[".stack"] = "L2SRAM"
163 /* Circular buffer size for System_printf() */
164 SysMin.bufSize = 0x200;
166 System.SupportProxy = SysMin;
168 /* ------ */
169 /* Set CPU frequency to 600 MHz */
170 BIOS.cpuFreq.lo = 600000000;
171 BIOS.cpuFreq.hi = 0;
173 /* Set Sysclock period (usec.) */
174 Clock.tickPeriod = 1000;
176 /* Configure Logging */
177 LoggingSetup.loggerType = LoggingSetup.LoggerType_STOPMODE; // LoggerType_JTAGRUNMODE
178 LoggingSetup.sysbiosTaskLogging = false; // true;
179 LoggingSetup.sysbiosSwiLogging = false;
180 LoggingSetup.sysbiosHwiLogging = false; // true
181 //LoggingSetup.sysbiosLoggerSize = 16384;
182 LoggingSetup.loadLogging = false; //true;
183 LoggingSetup.mainLogging = true;
184 LoggingSetup.mainLoggingRuntimeControl = false;
185 LoggingSetup.mainLoggerSize = 327680; //81960;
186 //LoggingSetup.memorySectionName = "CORE0_DDR3"; //"CORE0_MSMC";
188 /* Configure Load Logging */ // FL: doesn't work
189 //Load.taskEnabled = true;
190 //Load.hwiEnabled = true;
191 //Load.common$.diags_USER4 = Diags.ALWAYS_ON;
193 //Task.common$.diags_USER1 = Diags.ALWAYS_ON;
194 Task.common$.diags_INFO = Diags.ALWAYS_ON;
196 /* Disallow nested hardware interrupts */
197 Hwi.dispatcherAutoNestingSupport = false;
199 var ProjName = environment["ProjName"];
200 var topo = ProjName.replace( /pa_([a-z])[0-9]+_.*/, "$1");
201 var AudioClockSim = environment["AudioClockSim"];
202 var acSimBuild = (AudioClockSim == "1" ? true : false);
203 var RxAlphaSim = environment["RxAlphaSim"];
204 var rxAlphaSimBuild = (RxAlphaSim == "1" ? true : false);
206 if (acSimBuild == false)
207 {
208 var drv = xdc.loadPackage('ti.sdo.edma3.drv');
209 var rm = xdc.loadPackage ("ti.sdo.edma3.rm");
210 var Edma = xdc.loadPackage ("ti.sdo.edma3.drv.sample");
211 var Hwi = xdc.useModule('ti.sysbios.family.c64p.Hwi');
212 }
213 else
214 {
215 //
216 // SIO simulation
217 //
219 /* Add timer to simulate Rx audio DMA */
220 var timer0Params = new Timer.Params();
221 timer0Params.instance.name = "timerRxAudio";
222 timer0Params.period = 5330;
223 timer0Params.startMode = xdc.module("ti.sysbios.interfaces.ITimer").StartMode_USER;
224 Program.global.timerRxAudio = Timer.create(1, null, timer0Params);
226 /* Add timer to simulate Tx audio DMA */
227 var timer1Params = new Timer.Params();
228 timer1Params.instance.name = "timerTxAudio";
229 timer1Params.startMode = xdc.module("ti.sysbios.interfaces.ITimer").StartMode_USER;
230 timer1Params.period = 5330;
231 Program.global.timerTxAudio = Timer.create(2, null, timer1Params);
233 /* Add semaphore for Rx audio DMA */
234 var semaphore0Params = new Semaphore.Params();
235 semaphore0Params.instance.name = "semaphoreRxAudio";
236 Program.global.semaphoreRxAudio = Semaphore.create(null, semaphore0Params);
238 /* Add semaphore for Tx audio DMA */
239 var semaphore1Params = new Semaphore.Params();
240 semaphore1Params.instance.name = "semaphoreTxAudio";
241 Program.global.semaphoreTxAudio = Semaphore.create(null, semaphore1Params);
242 }
244 if (rxAlphaSimBuild == false)
245 {
246 var devType = "k2g"
248 var CpIntc = xdc.useModule('ti.sysbios.family.c66.tci66xx.CpIntc');
250 /* Load the OSAL package */
251 var osType = "tirtos";
252 var Osal = xdc.useModule('ti.osal.Settings');
253 Osal.osType = osType;
254 Osal.socType = devType;
256 /* Load the uart package */
257 var Uart = xdc.loadPackage('ti.drv.uart');
258 Uart.Settings.enableProfiling = false;
259 Uart.Settings.socType = devType;
260 Uart.Settings.useDma = "true";
262 /* Load the spi package */
263 var Spi = xdc.loadPackage('ti.drv.spi');
264 Spi.Settings.enableProfiling = false;
265 Spi.Settings.socType = devType;
267 /* Load the i2c package */
268 var I2c = xdc.loadPackage('ti.drv.i2c');
269 I2c.Settings.enableProfiling = false;
270 I2c.Settings.socType = devType;
272 /* Load and use the CSL packages */
273 var Csl = xdc.useModule('ti.csl.Settings');
274 Csl.deviceType = devType;
275 }
276 else
277 {
278 //
279 // Rx alpha commands simulation
280 //
282 /* Add clock for Rx alpha commands DMA */
283 var clock0Params = new Clock.Params();
284 clock0Params.instance.name = "clockRxAlpha";
285 Program.global.clockRxAlpha = Clock.create("&clockRxAlphaFxn", 0, clock0Params);
287 /* Add semaphore for Rx alpha commands DMA */
288 var semaphore2Params = new Semaphore.Params();
289 semaphore2Params.instance.name = "semaphoreRxAlpha";
290 Program.global.semaphoreRxAlpha = Semaphore.create(null, semaphore2Params);
291 }
293 /* Set default stack size for tasks */
294 Task.defaultStackSize = 2048;
296 /* Set size of idle task stack */
297 Task.idleTaskStackSize = 2048;
299 /* Add Audio Function Processing (AFP) task */
300 var task0Params = new Task.Params();
301 task0Params.instance.name = "TaskAfp";
302 task0Params.stackSize = 0x1000; // initial value from pa.cfg
303 task0Params.stackSection = ".far:taskStackSectionAfp";
304 task0Params.arg0 = 0;
305 task0Params.priority = -1; //1;
306 Program.global.TaskAfp = Task.create("&taskAfpFxn", task0Params);
307 Program.sectMap[".far:taskStackSectionAfp"] = "CORE0_DDR3"; // SDRAM in pa.cfg
309 /* Add Alpha Interval Processing (AIP) task */
310 var task1Params = new Task.Params();
311 task1Params.instance.name = "TaskAip";
312 task1Params.stackSize = 0x1000;
313 task1Params.stackSection = ".far:taskStackSectionAip";
314 task1Params.arg0 = 0;
315 task1Params.priority = -1; //2;
316 Program.global.TaskAip = Task.create("&taskAipFxn", task1Params);
317 Program.sectMap[".far:taskStackSectionAip"] = "CORE0_MSMC"; // L3RAM in pa.cfg
319 /* Add Audio Stream Input Processing (ASIP) task */
320 var task2Params = new Task.Params();
321 task2Params.instance.name = "TaskAsip";
322 task2Params.stackSize = 0x4000;
323 task2Params.stackSection = ".far:taskStackSectionAsip";
324 //task2Params.arg0 = 0;
325 task2Params.arg0 = $externPtr("asip_params_PA" + topo);
326 task2Params.arg1 = $externPtr("asip_patchs_PA" + topo);
327 task2Params.priority = -1; //3;
328 Program.global.TaskAsip = Task.create("&taskAsipFxn", task2Params);
329 Program.sectMap[".far:taskStackSectionAsip"] = "CORE0_MSMC";
331 /* Add Audio Stream Output Processing (ASOP) task */
332 var task3Params = new Task.Params();
333 task3Params.instance.name = "TaskAsop";
334 task3Params.stackSize = 0x4000;
335 task3Params.stackSection = ".far:taskStackSectionAsop";
336 //task3Params.arg0 = 0;
337 task3Params.arg0 = $externPtr("asop_params_PA" + topo);
338 task3Params.arg1 = $externPtr("asop_patchs_PA" + topo);
339 task3Params.priority = -1; //3;
340 Program.global.TaskAsop = Task.create("&taskAsopFxn", task3Params);
341 Program.sectMap[".far:taskStackSectionAsop"] = "CORE0_MSMC";
343 /* Add System Initialization task */
344 var task4Params = new Task.Params();
345 task4Params.instance.name = "TaskSysInit";
346 task4Params.stackSize = 0x1000;
347 task4Params.stackSection = ".far:taskStackSectionSysInit";
348 task4Params.priority = 4;
349 Program.global.TaskSysInit = Task.create("&taskSysInitFxn", task4Params);
350 Program.sectMap[".far:taskStackSectionSysInit"] = "CORE0_DDR3";
352 Program.sectMap[".far:taskStackSection"] = "CORE0_DDR3"; // SDRAM in pa.cfg
354 /* Add idle functions */
355 if (acSimBuild == false)
356 {
357 Idle.idleFxns[0] = "&SAP_watchDog"; // Idle function for DSP watchdog; formerly DAP_watchDog()
358 }
359 else
360 {
361 //
362 // SIO simulation
363 //
364 Idle.idleFxns[0] = "&idleDapWatchDog"; // Idle function for DSP watchdog; formerly DAP_watchDog()
365 }
366 Idle.idleFxns[1] = "&idleAudioStream"; // Idle function for audio stream; formerly audioStream1Idle()
367 Idle.idleFxns[2] = "&idleNotifyInfoChange"; // Idle function for Notify Information Change (NIC); formerly customSystemStreamIdleNIC()
369 /* Add L2 SRAM heap */ // formerly IRAM
370 var heapMem0Params = new HeapMem.Params();
371 heapMem0Params.instance.name = "heapMemL2Sram";
372 heapMem0Params.size = 256*1024; // 96000; // from pa.cfg
373 heapMem0Params.sectionName = ".l2SramHeap";
374 Program.global.heapMemL2Sram = HeapMem.create(heapMem0Params);
375 Program.sectMap[".l2SramHeap"] = "L2SRAM";
377 // Dec ip circular buffer will be in MSMC, size~=180 kB.
378 // Dec op circular buffer will be in MSMC, size~=192 kB.
379 // Both buffers will be in Shared Region MSMC.
380 /* Add MSMC SRAM heap */ // formerly L3RAM
381 var heapMem1Params = new HeapMem.Params();
382 heapMem1Params.instance.name = "heapMemMsmcSram";
383 // 43008=42 kB from pa.cfg
384 // 184320=180 kB, size of input circ buf, //185344=181 kB;
385 // 384*1024 for combined size of Dec ip/op buffers
386 heapMem1Params.size = 128*1024;
387 heapMem1Params.sectionName = ".msmcSramHeap";
388 Program.global.heapMemMsmcSram = HeapMem.create(heapMem1Params);
389 Program.sectMap[".msmcSramHeap"] = "CORE0_MSMC";
391 /* Add DDR3 heap */ // formerly SDRAM
392 var heapMem2Params = new HeapMem.Params();
393 heapMem2Params.instance.name = "heapMemDdr3";
394 heapMem2Params.size = 4350528;
395 heapMem2Params.sectionName = ".ddr3Heap";
396 Program.global.heapMemDdr3 = HeapMem.create(heapMem2Params);
397 Program.sectMap[".ddr3Heap"] = "CORE0_DDR3";
399 /* FL: hack for DCS7, dcs7_cfg.c */
400 Program.global.SDRAMHeap = Program.global.heapMemDdr3;
402 Program.sectMap["platform_lib"] = "L2SRAM";
403 //Program.sectMap[".stack"] = "L2SRAM";
405 if (acSimBuild == false)
406 {
407 ECM.eventGroupHwiNum[0] = 7;
408 ECM.eventGroupHwiNum[1] = 8; // FL: conflict w/ UART LLD (intr-callback)
409 ECM.eventGroupHwiNum[2] = 9;
410 ECM.eventGroupHwiNum[3] = 10;
411 //Clock.tickPeriod = 100; // FL: UART LLD (intr-callback) unresponsive
412 }
413 else
414 {
415 ////
416 //// For simulation
417 //// This doesn't work-- events #34,36 aren't enabled in C66 EVTMASK1
418 //
419 //// Use EventCombiner module
420 //var EventCombiner = xdc.useModule('ti.sysbios.family.c64p.EventCombiner');
421 //
422 //// Plug function and argument for event 31 (timer1) then enable it.
423 //EventCombiner.events[34].fxn = '&timerRxFxn';
424 //EventCombiner.events[34].arg = 34;
425 //EventCombiner.events[34].unmask = true;
426 //
427 //// Plug function and argument for event 36 (timer2) then enable it.
428 //EventCombiner.events[36].fxn = '&timerTxFxn';
429 //EventCombiner.events[36].arg = 36;
430 //EventCombiner.events[36].unmask = true;
431 //
432 //// Map event 1 (combine events 32-63) to vector 7
433 //EventCombiner.eventGroupHwiNum[1] = 7;
434 }