8eff4c42b1f16ac5ed632ccb8f30f8717e9a7b96
2 /*
3 Copyright (c) 2016, Texas Instruments Incorporated - http://www.ti.com/
4 All rights reserved.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 *
13 * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the
16 * distribution.
17 *
18 * Neither the name of Texas Instruments Incorporated nor the names of
19 * its contributors may be used to endorse or promote products derived
20 * from this software without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
23 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
24 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
25 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
26 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
27 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
28 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
32 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 *
34 */
36 /*
37 * ======== app.cfg ========
38 * Platform: 66AK2G_bios_elf
39 * Target: ti.targets.elf.C66
40 */
42 /* root of the configuration object model */
43 var Program = xdc.useModule('xdc.cfg.Program');
44 var cfgArgs = Program.build.cfgArgs;
45 var RB = (cfgArgs.profile == "release" ? true : false);
47 /* application uses the following modules and packages */
48 var Defaults = xdc.useModule('xdc.runtime.Defaults');
49 var Diags = xdc.useModule('xdc.runtime.Diags');
50 var Error = xdc.useModule('xdc.runtime.Error');
51 var Log = xdc.useModule('xdc.runtime.Log');
52 var Main = xdc.useModule('xdc.runtime.Main');
53 var Memory = xdc.useModule('xdc.runtime.Memory')
54 var SysMin = xdc.useModule('xdc.runtime.SysMin');
55 var System = xdc.useModule('xdc.runtime.System');
56 var Text = xdc.useModule('xdc.runtime.Text');
58 var BIOS = xdc.useModule('ti.sysbios.BIOS');
59 var Hwi = xdc.useModule('ti.sysbios.hal.Hwi');
60 var Cache = xdc.useModule('ti.sysbios.hal.Cache');
61 var Cachec66 = xdc.useModule('ti.sysbios.family.c66.Cache');
62 var Timer = xdc.useModule('ti.sysbios.hal.Timer');
63 var HeapBuf = xdc.useModule('ti.sysbios.heaps.HeapBuf');
64 var HeapMem = xdc.useModule('ti.sysbios.heaps.HeapMem');
65 var Clock = xdc.useModule('ti.sysbios.knl.Clock');
66 var Idle = xdc.useModule('ti.sysbios.knl.Idle');
67 var Queue = xdc.useModule('ti.sysbios.knl.Queue');
68 var Semaphore = xdc.useModule('ti.sysbios.knl.Semaphore');
69 var Task = xdc.useModule('ti.sysbios.knl.Task');
70 var Load = xdc.useModule('ti.sysbios.utils.Load');
72 var LoggingSetup = xdc.useModule('ti.uia.sysbios.LoggingSetup');
73 var UIAEvt = xdc.useModule('ti.uia.events.UIAEvt');
75 var ECM = xdc.useModule('ti.sysbios.family.c64p.EventCombiner');
77 xdc.useModule('ti.sdo.utils.MultiProc');
79 /*
80 * ======== IPC Configuration ========
81 */
82 xdc.global.SR0_cacheEnable = true;
83 xdc.global.SrMsmcMem_cacheEnable = true;
84 xdc.global.SrDDr3Mem_cacheEnable = true;
85 xdc.global.SrDDr3_2Mem_cacheEnable = false;
86 xdc.global.procName = "CORE0";
87 var ipc_cfg = xdc.loadCapsule("C:/ti/processor_audio_sdk_1_00_00_01/pasdk/shared/ipc.cfg.xs");
89 /* select ipc libraries */
90 var Build = xdc.useModule('ti.sdo.ipc.Build');
91 Build.libType = (RB ? Build.LibType_NonInstrumented : Build.LibType_Debug);
92 Build.assertsEnabled = (RB ? false : true);
93 Build.logsEnabled = (RB ? false : true);
96 /*
97 * Uncomment this line to globally disable Asserts.
98 * All modules inherit the default from the 'Defaults' module. You
99 * can override these defaults on a per-module basis using Module.common$.
100 * Disabling Asserts will save code space and improve runtime performance.
101 Defaults.common$.diags_ASSERT = Diags.ALWAYS_OFF;
102 */
104 /*
105 * Uncomment this line to keep module names from being loaded on the target.
106 * The module name strings are placed in the .const section. Setting this
107 * parameter to false will save space in the .const section. Error and
108 * Assert messages will contain an "unknown module" prefix instead
109 * of the actual module name.
110 Defaults.common$.namedModule = false;
111 */
113 /*
114 * Minimize exit handler array in System. The System module includes
115 * an array of functions that are registered with System_atexit() to be
116 * called by System_exit().
117 */
118 System.maxAtexitHandlers = 4;
120 /*
121 * Uncomment this line to disable the Error print function.
122 * We lose error information when this is disabled since the errors are
123 * not printed. Disabling the raiseHook will save some code space if
124 * your app is not using System_printf() since the Error_print() function
125 * calls System_printf().
126 Error.raiseHook = null;
127 */
129 /*
130 * Uncomment this line to keep Error, Assert, and Log strings from being
131 * loaded on the target. These strings are placed in the .const section.
132 * Setting this parameter to false will save space in the .const section.
133 * Error, Assert and Log message will print raw ids and args instead of
134 * a formatted message.
135 Text.isLoaded = false;
136 */
138 /*
139 * Uncomment this line to disable the output of characters by SysMin
140 * when the program exits. SysMin writes characters to a circular buffer.
141 * This buffer can be viewed using the SysMin Output view in ROV.
142 SysMin.flushAtExit = false;
143 */
145 /*
146 * The BIOS module will create the default heap for the system.
147 * Specify the size of this default heap.
148 */
149 //BIOS.heapSize = 0x1000; // initial setting
150 BIOS.heapSize = 0x2000; // from pa.cfg
151 BIOS.heapSection = ".systemHeap";
152 Program.sectMap[".systemHeap"] = "CORE0_DDR3";
154 /*
155 * Build a custom SYS/BIOS library from sources.
156 */
157 BIOS.libType = (RB ? BIOS.LibType_NonInstrumented : BIOS.LibType_Instrumented);
158 // BIOS.libType = BIOS.LibType_Custom;
159 // BIOS.libType = BIOS.LibType_Debug;
161 /* System stack size (used by ISRs and Swis) */
162 Program.stack = 0x2000;
163 Program.sectMap[".stack"] = "L2SRAM"
165 /* Circular buffer size for System_printf() */
166 SysMin.bufSize = 0x200;
168 System.SupportProxy = SysMin;
170 /* ------ */
171 /* Set CPU frequency to 600 MHz */
172 BIOS.cpuFreq.lo = 600000000;
173 BIOS.cpuFreq.hi = 0;
175 /* Set Sysclock period (usec.) */
176 Clock.tickPeriod = 1000;
178 /* Configure Logging */
179 LoggingSetup.loggerType = LoggingSetup.LoggerType_STOPMODE; // LoggerType_JTAGRUNMODE
180 LoggingSetup.sysbiosTaskLogging = false; // true;
181 LoggingSetup.sysbiosSwiLogging = false;
182 LoggingSetup.sysbiosHwiLogging = false; // true
183 //LoggingSetup.sysbiosLoggerSize = 16384;
184 LoggingSetup.loadLogging = false; //true;
185 LoggingSetup.mainLogging = true;
186 LoggingSetup.mainLoggingRuntimeControl = false;
187 LoggingSetup.mainLoggerSize = 327680; //81960;
188 //LoggingSetup.memorySectionName = "CORE0_DDR3"; //"CORE0_MSMC";
190 // FL: CPU load logging via UIA doesn't work.
191 // Below settings work for target-side load computation (no UIA) when LoggingSetup.loadLogging set to false, but not true.
192 // Load.common$.diags_USER4 set to default or Diags.ALWAYS_ON makes no difference.
193 /* Configure Load Logging */
194 Load.updateInIdle = true; // default=true
195 Load.windowInMs = 5.33; // 48KHz 256 @ 5.33ms // in msec., default=500
196 Load.taskEnabled = true; // default=true
197 Load.swiEnabled = false; // default=true
198 Load.hwiEnabled = false; // default=true
199 //Load.common$.diags_USER4 = Diags.ALWAYS_ON; // default=Diags.RUNTIME_ON
201 //Task.common$.diags_USER1 = Diags.ALWAYS_ON;
202 Task.common$.diags_INFO = Diags.ALWAYS_ON;
204 /* Disallow nested hardware interrupts */
205 Hwi.dispatcherAutoNestingSupport = false;
207 var ProjName = environment["ProjName"];
208 var topo = ProjName.replace( /pa_([a-z])[0-9]+_.*/, "$1");
209 var AudioClockSim = environment["AudioClockSim"];
210 var acSimBuild = (AudioClockSim == "1" ? true : false);
211 var RxAlphaSim = environment["RxAlphaSim"];
212 var rxAlphaSimBuild = (RxAlphaSim == "1" ? true : false);
214 if (acSimBuild == false)
215 {
216 var drv = xdc.loadPackage('ti.sdo.edma3.drv');
217 var rm = xdc.loadPackage ("ti.sdo.edma3.rm");
218 var Edma = xdc.loadPackage ("ti.sdo.edma3.drv.sample");
219 var Hwi = xdc.useModule('ti.sysbios.family.c64p.Hwi');
220 }
221 else
222 {
223 //
224 // SIO simulation
225 //
227 /* Add timer to simulate Rx audio DMA */
228 var timer0Params = new Timer.Params();
229 timer0Params.instance.name = "timerRxAudio";
230 timer0Params.period = 5330;
231 timer0Params.startMode = xdc.module("ti.sysbios.interfaces.ITimer").StartMode_USER;
232 Program.global.timerRxAudio = Timer.create(1, null, timer0Params);
234 /* Add timer to simulate Tx audio DMA */
235 var timer1Params = new Timer.Params();
236 timer1Params.instance.name = "timerTxAudio";
237 timer1Params.startMode = xdc.module("ti.sysbios.interfaces.ITimer").StartMode_USER;
238 timer1Params.period = 5330;
239 Program.global.timerTxAudio = Timer.create(2, null, timer1Params);
241 /* Add semaphore for Rx audio DMA */
242 var semaphore0Params = new Semaphore.Params();
243 semaphore0Params.instance.name = "semaphoreRxAudio";
244 Program.global.semaphoreRxAudio = Semaphore.create(null, semaphore0Params);
246 /* Add semaphore for Tx audio DMA */
247 var semaphore1Params = new Semaphore.Params();
248 semaphore1Params.instance.name = "semaphoreTxAudio";
249 Program.global.semaphoreTxAudio = Semaphore.create(null, semaphore1Params);
250 }
252 if (rxAlphaSimBuild == false)
253 {
254 var devType = "k2g"
256 var CpIntc = xdc.useModule('ti.sysbios.family.c66.tci66xx.CpIntc');
258 /* Load the OSAL package */
259 var osType = "tirtos";
260 var Osal = xdc.useModule('ti.osal.Settings');
261 Osal.osType = osType;
262 Osal.socType = devType;
264 /* Load the uart package */
265 var Uart = xdc.loadPackage('ti.drv.uart');
266 Uart.Settings.enableProfiling = false;
267 Uart.Settings.socType = devType;
268 Uart.Settings.useDma = "true";
270 /* Load the spi package */
271 var Spi = xdc.loadPackage('ti.drv.spi');
272 Spi.Settings.enableProfiling = false;
273 Spi.Settings.socType = devType;
275 /* Load the i2c package */
276 var I2c = xdc.loadPackage('ti.drv.i2c');
277 I2c.Settings.enableProfiling = false;
278 I2c.Settings.socType = devType;
280 /* Load and use the CSL packages */
281 var Csl = xdc.useModule('ti.csl.Settings');
282 Csl.deviceType = devType;
283 }
284 else
285 {
286 //
287 // Rx alpha commands simulation
288 //
290 /* Add clock for Rx alpha commands DMA */
291 var clock0Params = new Clock.Params();
292 clock0Params.instance.name = "clockRxAlpha";
293 Program.global.clockRxAlpha = Clock.create("&clockRxAlphaFxn", 0, clock0Params);
295 /* Add semaphore for Rx alpha commands DMA */
296 var semaphore2Params = new Semaphore.Params();
297 semaphore2Params.instance.name = "semaphoreRxAlpha";
298 Program.global.semaphoreRxAlpha = Semaphore.create(null, semaphore2Params);
299 }
301 /* Set default stack size for tasks */
302 Task.defaultStackSize = 2048;
304 /* Set size of idle task stack */
305 Task.idleTaskStackSize = 2048;
307 /* Add Audio Function Processing (AFP) task */
308 var task0Params = new Task.Params();
309 task0Params.instance.name = "TaskAfp";
310 task0Params.stackSize = 0x1000; // initial value from pa.cfg
311 task0Params.stackSection = ".far:taskStackSectionAfp";
312 task0Params.arg0 = 0;
313 task0Params.priority = -1; //1;
314 Program.global.TaskAfp = Task.create("&taskAfpFxn", task0Params);
315 Program.sectMap[".far:taskStackSectionAfp"] = "CORE0_DDR3"; // SDRAM in pa.cfg
317 /* Add Alpha Interval Processing (AIP) task */
318 var task1Params = new Task.Params();
319 task1Params.instance.name = "TaskAip";
320 task1Params.stackSize = 0x1000;
321 task1Params.stackSection = ".far:taskStackSectionAip";
322 task1Params.arg0 = 0;
323 task1Params.priority = -1; //2;
324 Program.global.TaskAip = Task.create("&taskAipFxn", task1Params);
325 Program.sectMap[".far:taskStackSectionAip"] = "CORE0_MSMC"; // L3RAM in pa.cfg
327 /* Add Audio Stream Input Processing (ASIP) task */
328 var task2Params = new Task.Params();
329 task2Params.instance.name = "TaskAsip";
330 task2Params.stackSize = 0x4000;
331 task2Params.stackSection = ".far:taskStackSectionAsip";
332 //task2Params.arg0 = 0;
333 task2Params.arg0 = $externPtr("asip_params_PA" + topo);
334 task2Params.arg1 = $externPtr("asip_patchs_PA" + topo);
335 task2Params.priority = -1; //3;
336 Program.global.TaskAsip = Task.create("&taskAsipFxn", task2Params);
337 Program.sectMap[".far:taskStackSectionAsip"] = "CORE0_MSMC";
339 /* Add Audio Stream Output Processing (ASOP) task */
340 var task3Params = new Task.Params();
341 task3Params.instance.name = "TaskAsop";
342 task3Params.stackSize = 0x4000;
343 task3Params.stackSection = ".far:taskStackSectionAsop";
344 //task3Params.arg0 = 0;
345 task3Params.arg0 = $externPtr("asop_params_PA" + topo);
346 task3Params.arg1 = $externPtr("asop_patchs_PA" + topo);
347 task3Params.priority = -1; //3;
348 Program.global.TaskAsop = Task.create("&taskAsopFxn", task3Params);
349 Program.sectMap[".far:taskStackSectionAsop"] = "CORE0_MSMC";
351 /* Add System Initialization task */
352 var task4Params = new Task.Params();
353 task4Params.instance.name = "TaskSysInit";
354 task4Params.stackSize = 0x1000;
355 task4Params.stackSection = ".far:taskStackSectionSysInit";
356 task4Params.priority = 6; //5;
357 Program.global.TaskSysInit = Task.create("&taskSysInitFxn", task4Params);
358 Program.sectMap[".far:taskStackSectionSysInit"] = "CORE0_DDR3";
360 Program.sectMap[".far:taskStackSection"] = "CORE0_DDR3"; // SDRAM in pa.cfg
362 /* Add task for audio System stream processing; formerly audioStream1Idle() */
363 var task5Params = new Task.Params();
364 task5Params.instance.name = "TaskSystemStream";
365 task5Params.stackSize = 0x1000;
366 task5Params.stackSection = ".far:taskStackSectionAudioStream";
367 task5Params.priority = -1;
368 Program.global.TaskSystemStream = Task.create("&taskSystemStreamFxn", task5Params);
369 Program.sectMap[".far:taskStackSectionAudioStream"] = "CORE0_DDR3";
371 /* Add idle functions */
372 if (acSimBuild == false)
373 {
374 Idle.idleFxns[0] = "&SAP_watchDog"; // Idle function for DSP watchdog; formerly DAP_watchDog()
375 }
376 else
377 {
378 //
379 // SIO simulation
380 //
381 Idle.idleFxns[0] = "&idleDapWatchDog"; // Idle function for DSP watchdog; formerly DAP_watchDog()
382 }
383 // Remark: Moved idleAudioStream (idle function) to taskSystemStreamFxn (task)
384 //Idle.idleFxns[1] = "&idleAudioStream"; // Idle function for audio stream; formerly audioStream1Idle()
386 //Idle.idleFxns[2] = "&idleNotifyInfoChange"; // Idle function for Notify Information Change (NIC); formerly customSystemStreamIdleNIC()
387 Idle.idleFxns[1] = "&idleNotifyInfoChange"; // Idle function for Notify Information Change (NIC); formerly customSystemStreamIdleNIC()
389 /* Add L2 SRAM heap */ // formerly IRAM
390 var heapMem0Params = new HeapMem.Params();
391 heapMem0Params.instance.name = "heapMemL2Sram";
392 heapMem0Params.size = 256*1024; // 96000; // from pa.cfg
393 heapMem0Params.sectionName = ".l2SramHeap";
394 Program.global.heapMemL2Sram = HeapMem.create(heapMem0Params);
395 Program.sectMap[".l2SramHeap"] = "L2SRAM";
397 // Dec ip circular buffer will be in MSMC, size~=180 kB.
398 // Dec op circular buffer will be in MSMC, size~=192 kB.
399 // Both buffers will be in Shared Region MSMC.
400 /* Add MSMC SRAM heap */ // formerly L3RAM
401 var heapMem1Params = new HeapMem.Params();
402 heapMem1Params.instance.name = "heapMemMsmcSram";
403 // 43008=42 kB from pa.cfg
404 // 184320=180 kB, size of input circ buf, //185344=181 kB;
405 // 384*1024 for combined size of Dec ip/op buffers
406 heapMem1Params.size = 128*1024;
407 heapMem1Params.sectionName = ".msmcSramHeap";
408 Program.global.heapMemMsmcSram = HeapMem.create(heapMem1Params);
409 Program.sectMap[".msmcSramHeap"] = "CORE0_MSMC";
411 /* Add DDR3 heap */ // formerly SDRAM
412 var heapMem2Params = new HeapMem.Params();
413 heapMem2Params.instance.name = "heapMemDdr3";
414 heapMem2Params.size = 4350528;
415 heapMem2Params.sectionName = ".ddr3Heap";
416 Program.global.heapMemDdr3 = HeapMem.create(heapMem2Params);
417 Program.sectMap[".ddr3Heap"] = "CORE0_DDR3";
419 /* FL: hack for DCS7, dcs7_cfg.c */
420 Program.global.Heap = Program.global.heapMemDdr3;
422 Program.sectMap["platform_lib"] = "L2SRAM";
423 //Program.sectMap[".stack"] = "L2SRAM";
425 if (acSimBuild == false)
426 {
427 ECM.eventGroupHwiNum[0] = 7;
428 ECM.eventGroupHwiNum[1] = 8; // FL: conflict w/ UART LLD (intr-callback)
429 ECM.eventGroupHwiNum[2] = 9;
430 ECM.eventGroupHwiNum[3] = 10;
431 //Clock.tickPeriod = 100; // FL: UART LLD (intr-callback) unresponsive
432 }
433 else
434 {
435 ////
436 //// For simulation
437 //// This doesn't work-- events #34,36 aren't enabled in C66 EVTMASK1
438 //
439 //// Use EventCombiner module
440 //var EventCombiner = xdc.useModule('ti.sysbios.family.c64p.EventCombiner');
441 //
442 //// Plug function and argument for event 31 (timer1) then enable it.
443 //EventCombiner.events[34].fxn = '&timerRxFxn';
444 //EventCombiner.events[34].arg = 34;
445 //EventCombiner.events[34].unmask = true;
446 //
447 //// Plug function and argument for event 36 (timer2) then enable it.
448 //EventCombiner.events[36].fxn = '&timerTxFxn';
449 //EventCombiner.events[36].arg = 36;
450 //EventCombiner.events[36].unmask = true;
451 //
452 //// Map event 1 (combine events 32-63) to vector 7
453 //EventCombiner.eventGroupHwiNum[1] = 7;
454 }