[processor-sdk/performance-audio-sr.git] / pasdk / test_dsp / application / itopo / evmk2g / mcasp_cfg.c
1 /*
2 * Copyright (c) 2015, Texas Instruments Incorporated
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * * Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 *
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * * Neither the name of Texas Instruments Incorporated nor the names of
17 * its contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
22 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
24 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
25 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
26 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
27 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
28 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
29 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
30 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 */
34 /**
35 * \file mcasp_config.c
36 *
37 * \brief Configures McASP module
38 *
39 */
41 #include "mcasp_cfg.h"
42 #include "ioConfig.h"
44 #define AUDIO_DAC0_TEST
46 /* McASP device handles - one for each McASP port. */
47 Ptr mcaspDevHandles[NUM_MCASP_PORTS] = {NULL, NULL, NULL};
49 /* McASP parameters needed by mcaspBindDev */
50 Mcasp_Params mcaspParams;
52 /* Error flag */
53 uint32_t gblErrFlag = 0;
54 Error_Block eb;
56 void GblErr(Mcasp_errCbStatus arg);
58 /* Handle to eDMA */
59 extern EDMA3_DRV_Handle hEdma0;
60 extern EDMA3_DRV_Handle hEdma1;
62 /* External function declarations */
63 extern void McaspDevice_init(void);
64 extern signed char* getGlobalAddr(signed char* addr);
66 #ifdef IO_LOOPBACK_TEST
67 extern void mcaspAppCallbackRx(void* arg, MCASP_Packet *mcasp_packet);
68 extern void mcaspAppCallbackTx(void* arg, MCASP_Packet *mcasp_packet);
69 #else
70 extern void asipMcaspCallback(void* arg, MCASP_Packet *mcasp_packet);
71 extern void asopMcaspCallback(void* arg, MCASP_Packet *mcasp_packet);
72 #endif
74 /* McASP HW setup that is common for receive and transmit. It is the same for
75 * all of 3 McASP ports. */
76 Mcasp_HwSetupGbl mcaspGblSetup = {
77 (Uint32)0x0, /* pfunc */
78 (Uint32)0x2000001, /* pdir */
79 (Uint32)0x0, /* ctl */
80 (Uint32)0x0, /* ditCtl */
81 (Uint32)0x0, /* dlbMode */
82 (Uint32)0x2, /* amute */
83 {
84 (Uint32)0x0, /* [0] */
85 (Uint32)0x0, /* [1] */
86 (Uint32)0x0, /* [2] */
87 (Uint32)0x0, /* [3] */
88 (Uint32)0x0, /* [4] */
89 (Uint32)0x0, /* [5] */
90 (Uint32)0x0, /* [6] */
91 (Uint32)0x0, /* [7] */
92 (Uint32)0x0, /* [8] */
93 (Uint32)0x0, /* [9] */
94 (Uint32)0x0, /* [10] */
95 (Uint32)0x0, /* [11] */
96 (Uint32)0x0, /* [12] */
97 (Uint32)0x0, /* [13] */
98 (Uint32)0x0, /* [14] */
99 (Uint32)0x0, /* [15] */
100 } /* serSetup */
101 };
103 /* McASP HW setup for receive (ADC) */
104 Mcasp_HwSetupData mcaspRcvSetupADC = {
105 /* .rmask = */ 0xFFFFFFFF, /* 16 bits are to be used */
106 /* .rfmt = */ 0x000180F2, /*
107 * 0 bit delay from framesync
108 * MSB first
109 * No extra bit padding
110 * Padding bit (ignore)
111 * slot Size is 32
112 * Reads from DMA port
113 * NO rotation
114 */
115 /* .afsrctl = */ 0X00000112, /* I2S mode - 2 slot TDM
116 * Frame sync is one word
117 * Internally generated frame sync
118 * Rising edge is start of frame
119 */
120 /* .rtdm = */ 0x00000003, /* slot 1 and 2 are active (I2S) */
121 /* .rintctl = */ 0x00000000, /* sync error and overrun error */
122 /* .rstat = */ 0x000001FF, /* reset any existing status bits */
123 /* .revtctl = */ 0x00000000, /* DMA request is enabled */
124 {
125 /* .aclkrctl = */ 0x000000A7,
126 /* .ahclkrctl = */ 0x0000C000,
127 /* .rclkchk = */ 0x00000000
128 }
129 };
131 /* McASP HW setup for receive (S/PDIF or HDMI)*/
132 Mcasp_HwSetupData mcaspRcvSetupDIR = {
133 MCASP_DIR_RMASK, /* .rmask: 0xFFFFFFFF */
134 MCASP_DIR_RFMT, /* .rfmt: 0x000180F0 */
135 MCASP_DIR_AFSRCTL, /* .afsrctl: 0x00000111 */
136 MCASP_DIR_RTDM, /* .rtdm: 0x00000003 */
137 MCASP_DIR_RINTCTL, /* .rintctl: 0x00000000 */
138 MCASP_DIR_RSTAT, /* .rstat: 0x000001FF */
139 MCASP_DIR_REVTCTL, /* .revtctl */
140 {
141 MCASP_DIR_ACLKRCTL, /* .aclkrctl: 0x00000080 */
142 MCASP_DIR_AHCLKRCTL, /* .ahclkrctl: 0x00000000 */
143 MCASP_DIR_RCLKCHK /* .rclkchk: 0x00000000 */
144 }
145 };
147 /* McASP HW setup for transmit (DAC) */
148 Mcasp_HwSetupData mcaspXmtSetupDAC = {
149 /* .xmask = */ 0xFFFFFFFF, /* 16 bits are to be used */
150 /* .xfmt = */ 0x000180F0, /*
151 * 0 bit delay from framesync
152 * MSB first
153 * No extra bit padding
154 * Padding bit (ignore)
155 * slot Size is 32
156 * Reads from DMA port
157 * NO rotation
158 */
159 /* .afsxctl = */ 0x00000112, /* I2S mode - 2 slot TDM
160 * Frame sync is one word
161 * Rising edge is start of frame
162 * Internally generated frame sync
163 */
164 /* .xtdm = */ 0x00000003, /* slot 1 and 2 are active (I2S) */
165 /* .xintctl = */ 0x00000000, /* sync error,overrun error,clK error */
166 /* .xstat = */ 0x000001FF, /* reset any existing status bits */
167 /* .xevtctl = */ 0x00000000, /* DMA request is enabled or disabled */
168 {
169 /* .aclkxctl = */ 0X000000E1,
170 /* .ahclkxctl = */ 0x00004000 ,
171 /* .xclkchk = */ 0x00000000
172 },
173 };
175 /* McASP HW setup for transmit (DAC slave) */
176 Mcasp_HwSetupData mcaspXmtSetupDACSlave = {
177 /* .xmask = */ 0xFFFFFFFF, /* 16 bits are to be used */
178 /* .xfmt = */ 0x000180F6, /*
179 * 0 bit delay from framesync
180 * MSB first
181 * No extra bit padding
182 * Padding bit (ignore)
183 * slot Size is 32
184 * Reads from DMA port
185 * NO rotation
186 */
187 /* .afsxctl = */ 0x00000112, /* I2S mode - 2 slot TDM
188 * Frame sync is one word
189 * Rising edge is start of frame
190 * Internally generated frame sync
191 */
192 /* .xtdm = */ 0x00000003, /* slot 1 and 2 are active (I2S) */
193 /* .xintctl = */ 0x00000000, /* sync error,overrun error,clK error */
194 /* .xstat = */ 0x000001FF, /* reset any existing status bits */
195 /* .xevtctl = */ 0x00000000, /* DMA request is enabled or disabled */
196 {
197 /* .aclkxctl = */ 0X000000A7,
198 /* .ahclkxctl = */ 0x0000C000,
199 /* .xclkchk = */ 0x00000000
200 },
201 };
203 /* McASP channel parameters for ADC input */
204 Mcasp_ChanParams mcaspRxChanParamADC =
205 {
206 0x0004, /* number of serializers */
207 {Mcasp_SerializerNum_0,
208 Mcasp_SerializerNum_1,
209 Mcasp_SerializerNum_2,
210 Mcasp_SerializerNum_3 }, /* serializer index */
211 &mcaspRcvSetupADC,
212 TRUE, /* isDmaDriven */
213 Mcasp_OpMode_TDM, /* Mode (TDM/DIT) */
214 Mcasp_WordLength_32, /* wordWidth */
215 NULL, /* void * userLoopJobBuffer */
216 0, /* userLoopJobLength */
217 NULL, /* edmaHandle */
218 GblErr,
219 2, /* number of TDM channels */
220 Mcasp_BufferFormat_MULTISER_MULTISLOT_SEMI_INTERLEAVED_1,
221 TRUE, /* enableHwFifo */
222 1, /* hwFifoEventDMARatio */
223 TRUE, /* isDataPacked */
224 Mcasp_WordBitsSelect_LSB /* wordBitsSelect */
225 };
227 /* McASP channel parameters for ADC 6 channel input */
228 Mcasp_ChanParams mcaspRxChanParamADC6ch =
229 {
230 0x0003, /* number of serializers */
231 {Mcasp_SerializerNum_0,
232 Mcasp_SerializerNum_1,
233 Mcasp_SerializerNum_2}, /* serializer index */
234 &mcaspRcvSetupADC,
235 TRUE,
236 Mcasp_OpMode_TDM, /* Mode (TDM/DIT) */
237 Mcasp_WordLength_32,
238 NULL,
239 0,
240 NULL,
241 GblErr,
242 2, /* number of TDM channels */
243 Mcasp_BufferFormat_MULTISER_MULTISLOT_SEMI_INTERLEAVED_1,
244 TRUE, /* enableHwFifo */
245 1, /* hwFifoEventDMARatio */
246 TRUE, /* isDataPacked */
247 Mcasp_WordBitsSelect_LSB /* wordBitsSelect */
248 };
250 /* McASP channel parameters for ADC stereo input */
251 Mcasp_ChanParams mcaspRxChanParamADCStereo =
252 {
253 0x0001, /* number of serializers */
254 {Mcasp_SerializerNum_0}, /* serializer index */
255 &mcaspRcvSetupADC,
256 TRUE,
257 Mcasp_OpMode_TDM, /* Mode (TDM/DIT) */
258 Mcasp_WordLength_32,
259 NULL,
260 0,
261 NULL,
262 GblErr,
263 2, /* number of TDM channels */
264 Mcasp_BufferFormat_MULTISER_MULTISLOT_SEMI_INTERLEAVED_1,
265 TRUE, /* enableHwFifo */
266 1, /* hwFifoEventDMARatio */
267 TRUE, /* isDataPacked */
268 Mcasp_WordBitsSelect_LSB /* wordBitsSelect */
269 };
271 /* McAsp channel parameters for DIR input */
272 Mcasp_ChanParams mcaspRxChanParamDIR =
273 {
274 0x0001, /* Number of serializers */
275 {Mcasp_SerializerNum_5}, /* Serializer index */
276 &mcaspRcvSetupDIR,
277 TRUE,
278 Mcasp_OpMode_TDM, /* Mode (TDM/DIT) */
279 Mcasp_WordLength_16, /* 16-bit by default */
280 NULL,
281 0,
282 NULL,
283 GblErr,
284 2, /* number of TDM channels */
285 Mcasp_BufferFormat_1SER_MULTISLOT_INTERLEAVED,
286 TRUE,
287 1, /* hwFifoEventDMARatio */
288 TRUE, /* isDataPacked */
289 Mcasp_WordBitsSelect_MSB /* wordBitsSelect */
290 };
292 /* McASP LLD channel parameters for HDMI input with 4XI2S:
293 * When slot size of McASP is configured to 32-bit, HDMI data always come to 16 MSBs of the slot
294 * and the 16 LSBs are filled with 0's. This is the nature of HDMI and I2S.
295 * For PCM data, we want all 32 bits in the slot to be transferred to the input buffer:
296 * - wordWidth = Mcasp_WordLength_32
297 * - isDataPacked = 1,
298 * - wordBitsSelect having no effect since wordWidth = slot size
299 * For bit stream, we want only 16 MSBs in the slot to be transferred to the input buffer:
300 * - wordWidth = Mcasp_WordLength_16
301 * - isDataPacked = 1,
302 * - wordBitsSelect = Mcasp_WordBitsSelect_MSB
303 */
304 Mcasp_ChanParams mcaspRxChanParamHDMI =
305 {
306 0x0004, /* number of serializers */
307 {Mcasp_SerializerNum_12,
308 Mcasp_SerializerNum_13,
309 Mcasp_SerializerNum_14,
310 Mcasp_SerializerNum_15 }, /* serializer index */
311 &mcaspRcvSetupDIR,
312 TRUE,
313 Mcasp_OpMode_TDM, /* Mode (TDM/DIT) */
314 Mcasp_WordLength_16, /* 16-bit word length, MSB or LSB of slot to be transfered, depending on wordBitsSelect */
315 NULL,
316 0,
317 NULL,
318 GblErr,
319 2, /* number of TDM channels */
320 Mcasp_BufferFormat_MULTISER_MULTISLOT_SEMI_INTERLEAVED_1,
321 TRUE, /* enableHwFifo */
322 1, /* hwFifoEventDMARatio */
323 TRUE, /* isDataPacked, only transfer the selected bits of slot, based on wordWidth and wordBitsSelect */
324 Mcasp_WordBitsSelect_MSB /* wordBitsSelect, only matters if wordWidth < slot size */
325 };
327 /* McAsp channel parameters for HDMI stereo input with 1XI2S */
328 Mcasp_ChanParams mcaspRxChanParamHDMIStereo =
329 {
330 0x0001, /* Number of serializers */
331 {Mcasp_SerializerNum_12}, /* Serializer index */
332 &mcaspRcvSetupDIR,
333 TRUE,
334 Mcasp_OpMode_TDM, /* Mode (TDM/DIT) */
335 Mcasp_WordLength_16, /* 16-bit by default */
336 NULL,
337 0,
338 NULL,
339 GblErr,
340 2, /* number of TDM channels */
341 Mcasp_BufferFormat_1SER_MULTISLOT_INTERLEAVED,
342 TRUE, /* enableHwFifo */
343 1, /* hwFifoEventDMARatio */
344 TRUE, /* isDataPacked */
345 Mcasp_WordBitsSelect_MSB /* wordBitsSelect */
346 };
348 /* McAsp channel parameters for DAC output - DAC0 */
349 Mcasp_ChanParams mcaspTx0ChanParamDAC =
350 {
351 0x0004, /* number of serializers */
352 {Mcasp_SerializerNum_0,
353 Mcasp_SerializerNum_1,
354 Mcasp_SerializerNum_2,
355 Mcasp_SerializerNum_3 }, /* serializer index for DAC0 */
356 &mcaspXmtSetupDAC,
357 TRUE,
358 Mcasp_OpMode_TDM,
359 Mcasp_WordLength_32, /* word width */
360 NULL,
361 0,
362 NULL,
363 GblErr,
364 2, /* number of TDM channels */
365 Mcasp_BufferFormat_MULTISER_MULTISLOT_SEMI_INTERLEAVED_1,
366 TRUE,
367 1, /* hwFifoEventDMARatio */
368 TRUE, /* isDataPacked */
369 Mcasp_WordBitsSelect_LSB /* wordBitsSelect */
370 };
372 /* McAsp channel parameters for DAC stereo output - DAC0 */
373 Mcasp_ChanParams mcaspTx0ChanParamDACStereo =
374 {
375 0x0001, /* number of serializers */
376 {Mcasp_SerializerNum_0}, /* serializer index for DAC0 */
377 &mcaspXmtSetupDAC,
378 TRUE,
379 Mcasp_OpMode_TDM,
380 Mcasp_WordLength_32, /* word width */
381 NULL,
382 0,
383 NULL,
384 GblErr,
385 2, /* number of TDM channels */
386 Mcasp_BufferFormat_MULTISER_MULTISLOT_SEMI_INTERLEAVED_1,
387 TRUE,
388 1, /* hwFifoEventDMARatio */
389 TRUE, /* isDataPacked */
390 Mcasp_WordBitsSelect_LSB /* wordBitsSelect */
391 };
393 /* McAsp channel parameters for DAC 12 channel output */
394 Mcasp_ChanParams mcaspTx0ChanParamDAC12ch =
395 {
396 0x0006, /* number of serializers */
397 {Mcasp_SerializerNum_0,
398 Mcasp_SerializerNum_1,
399 Mcasp_SerializerNum_2,
400 Mcasp_SerializerNum_3,
401 Mcasp_SerializerNum_4,
402 Mcasp_SerializerNum_5 }, /* serializer index for DAC0 */
403 &mcaspXmtSetupDAC,
404 TRUE,
405 Mcasp_OpMode_TDM,
406 Mcasp_WordLength_32, /* word width */
407 NULL,
408 0,
409 NULL,
410 GblErr,
411 2, /* number of TDM channels */
412 Mcasp_BufferFormat_MULTISER_MULTISLOT_SEMI_INTERLEAVED_1,
413 TRUE,
414 1, /* hwFifoEventDMARatio */
415 TRUE, /* isDataPacked */
416 Mcasp_WordBitsSelect_LSB /* wordBitsSelect */
417 };
419 /* McAsp channel parameters for DAC 16 channel output */
420 Mcasp_ChanParams mcaspTx0ChanParamDAC16ch =
421 {
422 0x0008, /* number of serializers */
423 {Mcasp_SerializerNum_0,
424 Mcasp_SerializerNum_1,
425 Mcasp_SerializerNum_2,
426 Mcasp_SerializerNum_3,
427 Mcasp_SerializerNum_4,
428 Mcasp_SerializerNum_5,
429 Mcasp_SerializerNum_6,
430 Mcasp_SerializerNum_7 }, /* serializer index for DAC0 */
431 &mcaspXmtSetupDAC,
432 TRUE,
433 Mcasp_OpMode_TDM,
434 Mcasp_WordLength_32, /* word width */
435 NULL,
436 0,
437 NULL,
438 GblErr,
439 2, /* number of TDM channels */
440 Mcasp_BufferFormat_MULTISER_MULTISLOT_SEMI_INTERLEAVED_1,
441 TRUE,
442 1, /* hwFifoEventDMARatio */
443 TRUE, /* isDataPacked */
444 Mcasp_WordBitsSelect_LSB /* wordBitsSelect */
445 };
447 /* McAsp channel parameters for transmit - DAC1 */
448 Mcasp_ChanParams mcaspTx1ChanParam =
449 {
450 0x0001, /* number of serializers */
451 {Mcasp_SerializerNum_4}, /* serializer index for DAC0 */
452 &mcaspXmtSetupDAC,
453 TRUE,
454 Mcasp_OpMode_TDM,
455 Mcasp_WordLength_32, /* word width */
456 NULL,
457 0,
458 NULL,
459 GblErr,
460 2, /* number of TDM channels */
461 Mcasp_BufferFormat_1SER_MULTISLOT_INTERLEAVED,
462 TRUE,
463 1, /* hwFifoEventDMARatio */
464 TRUE, /* isDataPacked */
465 Mcasp_WordBitsSelect_LSB /* wordBitsSelect */
466 };
469 /**
470 * \brief Function called by McASP driver in case of error
471 *
472 * \return None
473 */
474 void GblErr(Mcasp_errCbStatus arg)
475 {
476 gblErrFlag = 1;
477 }
480 /* DAC default configuration parameters */
481 DacConfig DAC_Cfg =
482 {
483 AUD_DAC_AMUTE_CTRL_DAC_DISABLE_CMD, /* Amute event */
484 0, /* Amute control */
485 AUD_DAC_SAMPLING_MODE_AUTO, /* Sampling mode */
486 AUD_DAC_DATA_FORMAT_I2S, /* Data format */
487 0, /* Soft mute control */
488 AUD_DAC_ATTENUATION_WIDE_RANGE, /* Attenuation mode */
489 AUD_DAC_DEEMP_DISABLE, /* De-emph control */
490 100 /* Volume */
491 };
493 /**
494 * \brief Configures audio DAC module
495 *
496 * \return none
497 */
498 void configAudioDAC(void)
499 {
500 Aud_STATUS status;
502 aud_delay(10000);
504 /* Initialize Audio DAC module */
505 status = audioDacConfig(AUD_DAC_DEVICE_ALL, &DAC_Cfg);
506 if(status != Aud_EOK)
507 {
508 //platform_write("Audio DAC Configuration Failed!\n");
509 //testRet(1);
510 }
511 }
512 #if 0
513 /**
514 * \brief Configures McASP module and creates the channel
515 * for audio Tx and Rx
516 *
517 * \return Aud_EOK on Success or error code
518 */
519 Aud_STATUS mcaspAudioConfig(void)
520 {
521 int32_t status;
523 hMcaspDevTx = NULL;
524 hMcaspDevRx = NULL;
525 hMcaspTxChan = NULL;
526 hMcaspRxChan = NULL;
528 /* Initialize McASP Tx and Rx parameters */
529 mcaspTxParams = Mcasp_PARAMS;
530 mcaspRxParams = Mcasp_PARAMS;
532 mcaspTxParams.mcaspHwSetup.tx.clk.clkSetupClk = 0x23; // not used
533 mcaspTxParams.mcaspHwSetup.rx.clk.clkSetupClk = 0x23; // not used
534 mcaspRxParams.mcaspHwSetup.rx.clk.clkSetupClk = 0x23;
535 mcaspRxParams.mcaspHwSetup.tx.clk.clkSetupClk = 0x63; // Asynchronous. Separate clock and frame sync used by transmit and receive sections.
537 #ifndef INPUT_SPDIF
538 mcaspRxParams.mcaspHwSetup.glb.pdir |= 0x2000000; //Special case, since for HDMI input - mcasp0 is both Rx & Tx
539 mcaspRxParams.mcaspHwSetup.glb.amute = 0x2; // this to ensure one doesn't overwrite the other (rx/tx)
540 mcaspTxParams.mcaspHwSetup.glb.pdir |= 0x2000000; //Set Amute pin as output for Tx channel
541 mcaspTxParams.mcaspHwSetup.glb.amute = 0x2;
542 #else
543 mcaspTxParams.mcaspHwSetup.glb.pdir |= 0x2000000; //Set Amute pin as output for Tx channel
544 mcaspTxParams.mcaspHwSetup.glb.amute = 0x2;
545 #endif
547 /* Set the HW interrupt number */
548 //mcaspTxParams.hwiNumber = 8;
549 //mcaspRxParams.hwiNumber = 8;
551 /* Initialize eDMA handle */
552 #ifdef INPUT_SPDIF
553 mcaspRxChanParam.edmaHandle = hEdma1;
554 #else
555 mcaspRxChanParam.edmaHandle = hEdma0;
556 #endif
558 mcaspTx0ChanParam.edmaHandle = hEdma0;
559 mcaspTx1ChanParam.edmaHandle = hEdma0;
561 #ifdef INPUT_SPDIF
562 /* Bind McASP0 for Tx */
563 status = mcaspBindDev(&hMcaspDevTx, CSL_MCASP_0, &mcaspTxParams);
564 if((status != MCASP_COMPLETED) || (hMcaspDevTx == NULL))
565 {
566 //IFPRINT(platform_write("mcaspBindDev for Tx Failed\n"));
567 return (Aud_EFAIL);
568 }
570 /* Bind McASP2 for Rx */
571 status = mcaspBindDev(&hMcaspDevRx, CSL_MCASP_2, &mcaspRxParams);
572 if((status != MCASP_COMPLETED) || (hMcaspDevRx == NULL))
573 {
574 //IFPRINT(platform_write("mcaspBindDev for Rx Failed\n"));
575 return (Aud_EFAIL);
576 }
578 #else /* HDMI or HDMI_STEREO */
579 /* Bind McASP0 for Rx and Tx */
580 status = mcaspBindDev(&hMcaspDevRx, CSL_MCASP_0, &mcaspRxParams);
581 if((status != MCASP_COMPLETED) || (hMcaspDevRx == NULL))
582 {
583 //IFPRINT(platform_write("mcaspBindDev for Rx Failed\n"));
584 return (Aud_EFAIL);
585 }
587 hMcaspDevTx = hMcaspDevRx;
588 #endif
590 /* Create McASP channel for Tx */
591 status = mcaspCreateChan(&hMcaspTxChan, hMcaspDevTx,
592 MCASP_OUTPUT,
593 #ifdef AUDIO_DAC0_TEST
594 &mcaspTx0ChanParam,
595 #else
596 &mcaspTx1ChanParam,
597 #endif
598 #ifdef IO_LOOPBACK_TEST
599 mcaspAppCallbackTx, NULL);
600 #else
601 asopMcaspCallback, NULL);
602 #endif
604 if((status != MCASP_COMPLETED) || (hMcaspTxChan == NULL))
605 {
606 //IFPRINT(platform_write("mcaspCreateChan for Tx Failed\n"));
607 return (Aud_EFAIL);
608 }
610 /* Create McASP channel for Rx */
611 status = mcaspCreateChan(&hMcaspRxChan, hMcaspDevRx,
612 MCASP_INPUT,
613 &mcaspRxChanParam,
614 #ifdef IO_LOOPBACK_TEST
615 mcaspAppCallbackRx, NULL);
616 #else
617 asipMcaspCallback, NULL);
618 #endif
620 if((status != MCASP_COMPLETED) || (hMcaspRxChan == NULL))
621 {
622 //IFPRINT(platform_write("mcaspCreateChan for Rx Failed\n"));
623 return (Aud_EFAIL);
624 }
626 return (Aud_EOK);
627 } /* mcaspAudioConfig */
630 Aud_STATUS mcaspRx(void)
631 {
633 }
635 Aud_STATUS mcaspRxDeInit(void)
636 {
637 mcaspDeleteChan(hMcaspRxChan);
638 hMcaspRxChan = NULL;
640 mcaspUnBindDev(hMcaspDevRx);
641 hMcaspDevRx = NULL;
643 return (Aud_EOK);
644 }
646 Aud_STATUS mcaspChanReset(Ptr hMcaspDev, Ptr hMcaspChan)
647 {
648 if(hMcaspChan != NULL) {
649 mcaspDeleteChan(hMcaspChan);
650 }
651 }
653 Aud_STATUS mcaspRxReset(void)
654 {
655 if(hMcaspRxChan != NULL) {
656 mcaspDeleteChan(hMcaspRxChan);
657 hMcaspRxChan = NULL;
658 }
660 return (Aud_EOK);
661 }
663 Aud_STATUS mcaspRxCreate(void)
664 {
665 int32_t status;
667 /* Create McASP channel for Rx */
668 status = mcaspCreateChan(&hMcaspRxChan, hMcaspDevRx,
669 MCASP_INPUT,
670 &mcaspRxChanParam,
671 #ifdef IO_LOOPBACK_TEST
672 mcaspAppCallbackRx, NULL);
673 #else
674 asipMcaspCallback, NULL);
675 #endif
677 if((status != MCASP_COMPLETED) || (hMcaspRxChan == NULL))
678 {
679 //IFPRINT(platform_write("mcaspCreateChan for Rx Failed\n"));
680 return (Aud_EFAIL);
681 }
683 return (Aud_EOK);
684 }
686 Aud_STATUS mcaspTxReset(void)
687 {
688 if(hMcaspTxChan != NULL) {
689 mcaspDeleteChan(hMcaspTxChan);
690 hMcaspTxChan = NULL;
691 }
693 return (Aud_EOK);
694 }
696 Aud_STATUS mcaspTxCreate(void)
697 {
698 int32_t status;
700 /* Create McASP channel for Tx */
701 status = mcaspCreateChan(&hMcaspTxChan, hMcaspDevTx,
702 MCASP_OUTPUT,
703 &mcaspTx0ChanParam,
704 #ifdef IO_LOOPBACK_TEST
705 mcaspAppCallbackTx, NULL);
706 #else
707 asopMcaspCallback, NULL);
708 #endif
709 if((status != MCASP_COMPLETED) || (hMcaspTxChan == NULL))
710 {
711 //IFPRINT(platform_write("mcaspCreateChan for Tx Failed\n"));
712 return (Aud_EFAIL);
713 }
715 return (Aud_EOK);
716 }
717 #endif
720 Aud_STATUS mcaspRecfgWordWidth(Ptr hMcaspChan, uint16_t wordWidth)
721 {
722 Mcasp_ChanParams chanParams;
723 int32_t status;
725 chanParams.wordWidth = wordWidth; //to do: change mcaspControlChan to have wordWidth as the parameter instead of chanParams!!
727 status = mcaspControlChan(hMcaspChan, Mcasp_IOCTL_CHAN_PARAMS_WORD_WIDTH, &chanParams);
729 if((status != MCASP_COMPLETED)) {
730 return (Aud_EFAIL);
731 }
732 else {
733 return (Aud_EOK);
734 }
735 } /* mcaspRecfgWordWidth */
737 /*======================================================================================
738 * This function checks if McASP Rx overruns or Tx underruns
739 *====================================================================================*/
740 int mcaspCheckOverUnderRun(Ptr mcaspChanHandle)
741 {
742 Mcasp_errCbStatus mcaspErrStat;
744 mcaspControlChan(mcaspChanHandle, Mcasp_IOCTL_CHAN_QUERY_ERROR_STATS, &mcaspErrStat);
746 return (mcaspErrStat.isRcvOvrRunOrTxUndRunErr);
747 }
750 /** McASP LLD configuration parameters for all input and output interfaces */
751 mcaspLLDconfig LLDconfigRxDIR = // for SAP_D10_RX_DIR
752 {
753 &mcaspGblSetup,
754 &mcaspRcvSetupDIR,
755 &mcaspRxChanParamDIR,
756 0x23,
757 0x23,
758 CSL_MCASP_2,
759 MCASP_INPUT,
760 asipMcaspCallback,
761 NULL,
762 NULL
763 };
765 mcaspLLDconfig LLDconfigRxADC = // for SAP_D10_RX_ADC_44100HZ, SAP_D10_RX_ADC_88200HZ
766 {
767 &mcaspGblSetup,
768 &mcaspRcvSetupADC,
769 &mcaspRxChanParamADC,
770 0x23,
771 0x23,
772 CSL_MCASP_1,
773 MCASP_INPUT,
774 asipMcaspCallback,
775 NULL,
776 NULL
777 };
779 mcaspLLDconfig LLDconfigRxADC6ch = // for SAP_D10_RX_ADC_6CH_44100HZ, SAP_D10_RX_ADC_6CH_88200HZ
780 {
781 &mcaspGblSetup,
782 &mcaspRcvSetupADC,
783 &mcaspRxChanParamADC6ch,
784 0x23,
785 0x23,
786 CSL_MCASP_1,
787 MCASP_INPUT,
788 asipMcaspCallback,
789 NULL,
790 NULL,
791 };
793 mcaspLLDconfig LLDconfigRxADCStereo = // for SAP_D10_RX_ADC_STEREO_44100HZ, SAP_D10_RX_ADC_STEREO_88200HZ
794 {
795 &mcaspGblSetup,
796 &mcaspRcvSetupADC,
797 &mcaspRxChanParamADCStereo,
798 0x23,
799 0x23,
800 CSL_MCASP_1,
801 MCASP_INPUT,
802 asipMcaspCallback,
803 NULL,
804 NULL
805 };
807 mcaspLLDconfig LLDconfigRxHDMIStereo = // for SAP_D10_RX_HDMI_STEREO
808 {
809 &mcaspGblSetup,
810 &mcaspRcvSetupDIR,
811 &mcaspRxChanParamHDMIStereo,
812 0x23,
813 0x63,
814 CSL_MCASP_0,
815 MCASP_INPUT,
816 asipMcaspCallback,
817 NULL,
818 NULL
819 };
821 mcaspLLDconfig LLDconfigRxHDMI = // for SAP_D10_RX_HDMI
822 {
823 &mcaspGblSetup,
824 &mcaspRcvSetupDIR,
825 &mcaspRxChanParamHDMI,
826 0x23,
827 0x63,
828 CSL_MCASP_0,
829 MCASP_INPUT,
830 asipMcaspCallback,
831 NULL,
832 NULL
833 };
835 /*
836 mcaspLLDconfig LLDconfigTxDIT = // for SAP_D10_TX_DIT
837 {
838 &mcaspGblSetup,
839 &mcaspXmtSetupDIT,
840 &mcaspTx0ChanParamDIT,
841 NULL,
842 NULL,
843 CSL_MCASP_2
844 };
845 */
847 mcaspLLDconfig LLDconfigTxDAC = // for SAP_D10_TX_DAC
848 {
849 &mcaspGblSetup,
850 &mcaspXmtSetupDAC,
851 &mcaspTx0ChanParamDAC,
852 0x23,
853 0x63,
854 CSL_MCASP_0,
855 MCASP_OUTPUT,
856 asopMcaspCallback,
857 NULL,
858 NULL
859 };
861 mcaspLLDconfig LLDconfigTxDACSlave = // for SAP_D10_TX_DAC_SLAVE
862 {
863 &mcaspGblSetup,
864 &mcaspXmtSetupDACSlave,
865 &mcaspTx0ChanParamDAC,
866 0x23,
867 0x63,
868 CSL_MCASP_0,
869 MCASP_OUTPUT,
870 asopMcaspCallback,
871 NULL,
872 NULL
873 };
875 mcaspLLDconfig LLDconfigTxDACStereo = // for SAP_D10_TX_STEREO_DAC
876 {
877 &mcaspGblSetup,
878 &mcaspXmtSetupDAC,
879 &mcaspTx0ChanParamDACStereo,
880 0x23,
881 0x63,
882 CSL_MCASP_0,
883 MCASP_OUTPUT,
884 asopMcaspCallback,
885 NULL,
886 NULL
887 };
889 mcaspLLDconfig LLDconfigTxDACStereoSlave = // for SAP_D10_TX_STEREO_DAC_SLAVE
890 {
891 &mcaspGblSetup,
892 &mcaspXmtSetupDACSlave,
893 &mcaspTx0ChanParamDACStereo,
894 0x23,
895 0x63,
896 CSL_MCASP_0,
897 MCASP_OUTPUT,
898 asopMcaspCallback,
899 NULL,
900 NULL
901 };
903 mcaspLLDconfig LLDconfigTxDAC12ch = // for SAP_D10_TX_DAC_12CH
904 {
905 &mcaspGblSetup,
906 &mcaspXmtSetupDAC,
907 &mcaspTx0ChanParamDAC12ch,
908 0x23,
909 0x63,
910 CSL_MCASP_0,
911 MCASP_OUTPUT,
912 asopMcaspCallback,
913 NULL,
914 NULL
915 };
917 mcaspLLDconfig LLDconfigTxDAC16ch = // for SAP_D10_TX_DAC_16CH
918 {
919 &mcaspGblSetup,
920 &mcaspXmtSetupDAC,
921 &mcaspTx0ChanParamDAC16ch,
922 0x23,
923 0x63,
924 CSL_MCASP_0,
925 MCASP_OUTPUT,
926 asopMcaspCallback,
927 NULL,
928 NULL
929 };
932 /**
933 * \brief Create a channel of McASP LLD and return the handle.
934 *
935 * \return Aud_EOK on Success or error code
936 */
937 Aud_STATUS mcasplldChanCreate(mcaspLLDconfig *lldCfg, Ptr *pChanHandle)
938 {
939 int32_t status;
941 if(mcaspDevHandles[lldCfg->mcaspPort] == NULL) {
942 /* Initialize McASP Tx and Rx parameters */
943 mcaspParams = Mcasp_PARAMS;
945 //mcaspParams.mcaspHwSetup.tx.clk.clkSetupClk = 0x23; // not used
946 //mcaspParams.mcaspHwSetup.rx.clk.clkSetupClk = 0x23; // not used
947 mcaspParams.mcaspHwSetup.rx.clk.clkSetupClk = lldCfg->clkSetupClkRx;
948 mcaspParams.mcaspHwSetup.tx.clk.clkSetupClk = lldCfg->clkSetupClkTx;
950 mcaspParams.mcaspHwSetup.glb.pdir = lldCfg->mcaspSetupGbl->pdir;
951 mcaspParams.mcaspHwSetup.glb.amute = lldCfg->mcaspSetupGbl->amute;
953 status = mcaspBindDev(&mcaspDevHandles[lldCfg->mcaspPort], lldCfg->mcaspPort, &mcaspParams);
954 if((status != MCASP_COMPLETED) || (mcaspDevHandles[lldCfg->mcaspPort] == NULL)) {
955 //IFPRINT(platform_write("mcaspBindDev for Tx Failed\n"));
956 return (Aud_EFAIL);
957 }
958 }
960 lldCfg->hMcaspDev = mcaspDevHandles[lldCfg->mcaspPort];
962 lldCfg->mcaspChanParams->mcaspSetup = lldCfg->mcaspSetupData;
963 if(lldCfg->mcaspPort == CSL_MCASP_0) {
964 lldCfg->mcaspChanParams->edmaHandle = hEdma0;
965 }
966 else {
967 lldCfg->mcaspChanParams->edmaHandle = hEdma1;
968 }
970 /* Create McASP channel for Tx */
971 *pChanHandle = NULL;
972 status = mcaspCreateChan(pChanHandle, lldCfg->hMcaspDev,
973 lldCfg->chanMode, lldCfg->mcaspChanParams,
974 lldCfg->cbFxn, NULL);
976 if((status != MCASP_COMPLETED) || (*pChanHandle == NULL))
977 {
978 //IFPRINT(platform_write("mcaspCreateChan for Tx Failed\n"));
979 return (Aud_EFAIL);
980 }
982 return (Aud_EOK);
983 } /* mcasplldChanCreate */
985 /* Nothing past this point */