2 /*
3 Copyright (c) 2017, Texas Instruments Incorporated - http://www.ti.com/
4 All rights reserved.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 *
13 * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the
16 * distribution.
17 *
18 * Neither the name of Texas Instruments Incorporated nor the names of
19 * its contributors may be used to endorse or promote products derived
20 * from this software without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
23 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
24 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
25 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
26 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
27 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
28 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
32 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 *
34 */
36 /**
37 * \file audio_dc_cfg.h
38 *
39 * \brief Audio daughter card configuration header file
40 *
41 */
43 #ifndef _AUDIO_DC_CFG_H_
44 #define _AUDIO_DC_CFG_H_
46 #include "audk2g.h"
47 #include "audk2g_audio.h"
48 /**
49 * \brief ADC configuration parameter structure
50 *
51 */
52 typedef struct _AdcConfig
53 {
54 uint8_t gain;
55 Audk2gAdcLeftInputMux adc1LMux;
56 Audk2gAdcLeftInputMux adc2LMux;
57 Audk2gAdcRightInputMux adc1RMux;
58 Audk2gAdcRightInputMux adc2RMux;
59 Audk2gAdcRxWordLen wlen;
60 Audk2gAdcDataFormat format;
61 uint8_t intEnable;
62 } AdcConfig;
64 /**
65 * \brief DAC configuration parameter structure
66 *
67 */
68 typedef struct _DacConfig
69 {
70 Audk2gDacAmuteCtrl amuteCtrl;
71 uint8_t amuteEnable;
72 Audk2gDacSamplingMode samplingMode;
73 Audk2gDacDataFormat dataFormat;
74 uint8_t softMuteEnable;
75 Audk2gDacAttnMode attnMode;
76 Audk2gDacDeempCtrl deempCtrl;
77 uint8_t volume;
78 } DacConfig;
80 /**
81 * \brief Initializes ADC module
82 *
83 * This function initializes and configures the ADC modules
84 * on audio daughter card
85 *
86 * \param devId [IN] ADC Device Id
87 * \param config [IN] ADC configuration parameters
88 *
89 * \return Platform_EOK on Success or error code
90 */
91 Audk2g_STATUS audioAdcConfig(Audk2gAdcDevId devId, AdcConfig *config);
93 /**
94 * \brief Initializes DAC module
95 *
96 * This function initializes and configures the DAC modules
97 * on audio daughter card
98 *
99 * \param devId [IN] DAC Device Id
100 * \param config [IN] DAC configuration parameters
101 *
102 * \return Platform_EOK on Success or error code
103 */
104 Audk2g_STATUS audioDacConfig(Audk2gDacDevId devId, DacConfig *config);
106 /**
107 * \brief Initializes DIR module
108 *
109 * This function initializes and configures the DIR modules
110 * on audio daughter card
111 *
112 * \return Platform_EOK on Success or error code
113 */
114 Audk2g_STATUS audioDirConfig(void);
116 /**
117 * \brief Initializes HSR41 module
118 *
119 * This function initializes and configures the HDMI module
120 * with the audio daughter card
121 *
122 * \return Platform_EOK on Success or error code
123 */
124 Audk2g_STATUS audioHDMIConfig(void);
126 /**
127 * \brief Read HDMI sampling rate
128 *
129 */
130 unsigned int read_hdmi_samprate();
132 /**
133 * \brief Clear HDMI interrupt on ~HMINT
134 *
135 */
136 void clear_hdmi_hmint();
138 /* ------------------------------------------------------------------------ *
139 * *
140 * Variable types *
141 * *
142 * ------------------------------------------------------------------------ */
144 #define Uint32 unsigned int
145 #define Uint16 unsigned short
146 #define Uint8 unsigned char
147 #define Int32 int
148 #define Int16 short
149 #define Int8 char
150 /* ------------------------------------------------------------------------ *
151 * *
152 * I2C Controller *
153 * *
154 * ------------------------------------------------------------------------ */
155 #define I2C_BASE 0x2530400U
156 #define I2C_OAR *( volatile Uint32* )( I2C_BASE + 0x00 )
157 #define I2C_ICIMR *( volatile Uint32* )( I2C_BASE + 0x04 )
158 #define I2C_ICSTR *( volatile Uint32* )( I2C_BASE + 0x08 )
159 #define I2C_ICCLKL *( volatile Uint32* )( I2C_BASE + 0x0C )
160 #define I2C_ICCLKH *( volatile Uint32* )( I2C_BASE + 0x10 )
161 #define I2C_ICCNT *( volatile Uint32* )( I2C_BASE + 0x14 )
162 #define I2C_ICDRR *( volatile Uint32* )( I2C_BASE + 0x18 )
163 #define I2C_ICSAR *( volatile Uint32* )( I2C_BASE + 0x1C )
164 #define I2C_ICDXR *( volatile Uint32* )( I2C_BASE + 0x20 )
165 #define I2C_ICMDR *( volatile Uint32* )( I2C_BASE + 0x24 )
166 #define I2C_ICIVR *( volatile Uint32* )( I2C_BASE + 0x28 )
167 #define I2C_ICEMDR *( volatile Uint32* )( I2C_BASE + 0x2C )
168 #define I2C_ICPSC *( volatile Uint32* )( I2C_BASE + 0x30 )
169 #define I2C_ICPID1 *( volatile Uint32* )( I2C_BASE + 0x34 )
170 #define I2C_ICPID2 *( volatile Uint32* )( I2C_BASE + 0x38 )
172 /* I2C Field Definitions */
173 #define ICOAR_MASK_7 0x007F
174 #define ICOAR_MASK_10 0x03FF
175 #define ICSAR_MASK_7 0x007F
176 #define ICSAR_MASK_10 0x03FF
177 #define ICOAR_OADDR 0x007f
178 #define ICSAR_SADDR 0x0050
180 #define ICSTR_SDIR 0x4000
181 #define ICSTR_NACKINT 0x2000
182 #define ICSTR_BB 0x1000
183 #define ICSTR_RSFULL 0x0800
184 #define ICSTR_XSMT 0x0400
185 #define ICSTR_AAS 0x0200
186 #define ICSTR_AD0 0x0100
187 #define ICSTR_SCD 0x0020
188 #define ICSTR_ICXRDY 0x0010
189 #define ICSTR_ICRRDY 0x0008
190 #define ICSTR_ARDY 0x0004
191 #define ICSTR_NACK 0x0002
192 #define ICSTR_AL 0x0001
194 #define ICMDR_NACKMOD 0x8000
195 #define ICMDR_FREE 0x4000
196 #define ICMDR_STT 0x2000
197 #define ICMDR_IDLEEN 0x1000
198 #define ICMDR_STP 0x0800
199 #define ICMDR_MST 0x0400
200 #define ICMDR_TRX 0x0200
201 #define ICMDR_XA 0x0100
202 #define ICMDR_RM 0x0080
203 #define ICMDR_DLB 0x0040
204 #define ICMDR_IRS 0x0020
205 #define ICMDR_STB 0x0010
206 #define ICMDR_FDF 0x0008
207 #define ICMDR_BC_MASK 0x0007
209 #endif /* _AUDIO_DC_CFG_H_ */
211 /* Nothing past this point */