[processor-sdk/performance-audio-sr.git] / pdk_k2g_1_0_1 / packages / ti / board / diag / dcan / src / evmk2g_dcan.c
1 /*
2 * Copyright (c) 2010-2015, Texas Instruments Incorporated
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4 *
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32 */
34 /**
35 * \file evmk2g_dcan.c
36 *
37 * \brief DCAN APIs.
38 *
39 * This file contains the device abstraction layer APIs for
40 * Dual Controller Area Network(DCAN).
41 */
43 #include "platform_internal.h"
45 #if (PLATFORM_DCAN_IN)
47 /*******************************************************************************
48 * API FUNCTION DEFINITIONS
49 *******************************************************************************/
50 /**
51 * \brief This API will enable the DCAN peripheral in Initialization mode.
52 *
53 * \param baseAdd Base Address of the DCAN Module Registers.
54 *
55 * \return None.
56 *
57 * \note By calling this API, communication on CAN bus is stopped and the
58 * CAN module enters initialization mode.
59 *
60 **/
61 void DCANInitModeSet(unsigned int baseAdd)
62 {
63 /* Set the Init field of DCAN_CTL register */
64 HWREG(baseAdd + DCAN_CTL) |= DCAN_CTL_INIT;
66 /* Wait for Init bit to set */
67 while(!(HWREG(baseAdd + DCAN_CTL) & DCAN_CTL_INIT));
68 }
70 /**
71 * \brief This API will enable the DCAN peripheral in Normal mode of
72 * operation.
73 *
74 * \param baseAdd Base Address of the DCAN Module Registers.
75 *
76 * \return None.
77 *
78 * \note By calling this API, the DCAN module exits Initialization mode
79 * and communication on CAN bus is started.
80 *
81 **/
82 void DCANNormalModeSet(unsigned int baseAdd)
83 {
84 /* Clear the CCE and Init bit */
85 HWREG(baseAdd + DCAN_CTL) &= ~DCAN_CTL_INIT;
87 /* Wait for Init bit to clear */
88 while(HWREG(baseAdd + DCAN_CTL) & DCAN_CTL_INIT);
89 }
91 /**
92 * \brief This API will write the CAN Bit-Timing values to the
93 * DCAN_BTR register.
94 *
95 * \param baseAdd Base Address of the DCAN Module Registers.
96 * \param btrValue Bit-Timing register value.
97 *
98 * \return None.
99 *
100 * \note To configure CAN bit timing the DCAN peripheral should be in
101 * initialization mode and CPU should have access to the DCAN
102 * configuration registers.
103 * 8 MHz is the minimum CAN clock frequency required to operate
104 * the DCAN at a bit rate of 1MBits/s.
105 *
106 **/
107 void DCANBitTimingConfig(unsigned int baseAdd, unsigned int btrValue)
108 {
109 /* Write the value to DCAN_BTR register */
110 HWREG(baseAdd + DCAN_BTR) = btrValue;
111 }
113 /**
114 * \brief This API will reset the DCAN peripheral.
115 *
116 * \param baseAdd Base Address of the DCAN Module Registers.
117 *
118 * \return None.
119 *
120 * \note To perform software reset the DCAN peripheral should be enabled in
121 * initialization mode.
122 *
123 **/
124 void DCANReset(unsigned int baseAdd)
125 {
126 /* Set the SWR bit of DCAN_CTL register */
127 HWREG(baseAdd + DCAN_CTL) |= DCAN_CTL_SWR;
129 /* Poll in the loop until reset completes */
130 while((HWREG(baseAdd + DCAN_CTL) & DCAN_CTL_SWR));
131 }
133 /**
134 * \brief This API will enable the Interrupts of DCAN peripheral.
135 *
136 * \param baseAdd Base Address of the DCAN Module Registers.
137 * \param intFlags Enable Interrupts.
138 *
139 * 'intFlags' can take the following values \n
140 * DCAN_STATUS_CHANGE_INT - Enable Status change Interrupt \n
141 * DCAN_ERROR_INT - Enable error Interrupt \n
142 *
143 * \return None.
144 *
145 **/
146 void DCANIntEnable(unsigned int baseAdd, unsigned int intFlags)
147 {
148 /* Enable the DCAN interrupts */
149 HWREG(baseAdd + DCAN_CTL) |= (intFlags & (DCAN_CTL_SIE | DCAN_CTL_EIE));
150 }
152 /**
153 * \brief This API will disable the Interrupts of DCAN peripheral.
154 *
155 * \param baseAdd Base Address of the DCAN Module Registers.
156 * \param intFlags Disable Interrupts.
157 *
158 * 'intFlags' can take the following values \n
159 * DCAN_STATUS_CHANGE_INT - Disable Status change Interrupt \n
160 * DCAN_ERROR_INT - Disable error Interrupt \n
161 *
162 * \return None.
163 *
164 **/
165 void DCANIntDisable(unsigned int baseAdd, unsigned int intFlags)
166 {
167 /* Disable the DCAN interrupts */
168 HWREG(baseAdd + DCAN_CTL) &= ~(intFlags & (DCAN_CTL_SIE | DCAN_CTL_EIE));
169 }
171 /**
172 * \brief This API will enable/disable the auto re-transmission of
173 * unsuccessful messages of DCAN peripheral.
174 *
175 * \param baseAdd Base Address of the DCAN Module Registers.
176 * \param autoReTxn Enable/disable setting for Auto re-transmision.
177 *
178 * 'autoReTxn' can take the following values \n
179 * DCAN_AUTO_RETXN_ENABLE - Enable auto re-transmission \n
180 * DCAN_AUTO_RETXN_DISABLE - Disable auto re-transmission \n
181 *
182 * \return None.
183 *
184 **/
185 void DCANAutoReTransmitControl(unsigned int baseAdd, unsigned int autoReTxn)
186 {
187 /* Clear the DAR field of DCAN_CTL register */
188 HWREG(baseAdd + DCAN_CTL) &= ~DCAN_CTL_DAR;
190 /* Set the user sent value to DAR field */
191 HWREG(baseAdd + DCAN_CTL) |= (autoReTxn & DCAN_CTL_DAR);
192 }
194 /**
195 * \brief This API will enable/disable the CPU write access to the
196 * configuration registers of DCAN peripheral.
197 *
198 * \param baseAdd Base Address of the DCAN Module Registers.
199 * \param regConfig Enable/disable write access to configuration
200 * registers.
201 *
202 * 'regConfig' can take the following values \n
203 * DCAN_CONF_REG_WR_ACCESS_ENABLE - Enable write access \n
204 * DCAN_CONF_REG_WR_ACCESS_DISABLE - Disable write access \n
205 *
206 * \return None.
207 *
208 * \note If the user wants to enable write access to configuration registers,
209 * then DCAN peripheral should be in initialization mode before doing
210 * so.
211 *
212 **/
213 void DCANConfigRegWriteAccessControl(unsigned int baseAdd,
214 unsigned int regConfig)
215 {
216 /* Clear the CCE field of DCAN_CTL register */
217 HWREG(baseAdd + DCAN_CTL) &= ~DCAN_CTL_CCE;
219 /* Set the CCE field with the user sent value */
220 HWREG(baseAdd + DCAN_CTL) |= (regConfig & DCAN_CTL_CCE);
221 }
223 /**
224 * \brief This API will enable/disable the test mode of DCAN peripheral.
225 *
226 * \param baseAdd Base Address of the DCAN Module Registers.
227 * \param testMode Enable/disable test mode.
228 *
229 * 'testMode' can take the following values \n
230 * DCAN_TEST_MODE_ENABLE - Enable test mode of DCAN peripheral \n
231 * DCAN_TEST_MODE_DISABLE - Disable test mode and enable normal mode
232 * of DCAN peripheral \n
233 *
234 * \return None.
235 *
236 **/
237 void DCANTestModeControl(unsigned int baseAdd, unsigned int testMode)
238 {
239 /* Clear the Test field of DCAN_CTL register */
240 HWREG(baseAdd + DCAN_CTL) &= ~DCAN_CTL_TEST;
242 /* Set the Test field with the user sent value */
243 HWREG(baseAdd + DCAN_CTL) |= (testMode & DCAN_CTL_TEST);
244 }
246 /**
247 * \brief This API will enable/disable the Auto-bus-on feature of DCAN
248 * peripheral.
249 *
250 * \param baseAdd Base Address of the DCAN Module Registers.
251 * \param busControl Auto-bus-on mode setting.
252 *
253 * 'busControl' can take the following values \n
254 * DCAN_AUTO_BUS_ON_ENABLE - Enable Auto-bus-on feature of DCAN peripheral \n
255 * DCAN_AUTO_BUS_ON_DISABLE - Disable Auto-bus-on feature of DCAN
256 * peripheral \n
257 *
258 * \return None.
259 *
260 **/
261 void DCANAutoBusOnControl(unsigned int baseAdd, unsigned int busControl)
262 {
263 /* Clear the ABO field of DCAN_CTL register */
264 HWREG(baseAdd + DCAN_CTL) &= ~DCAN_CTL_ABO;
266 /* Set the ABO field with the user sent value */
267 HWREG(baseAdd + DCAN_CTL) |= (busControl & DCAN_CTL_ABO);
268 }
270 /**
271 * \brief This API will enable/disable the parity function of DCAN
272 * peripheral.
273 *
274 * \param baseAdd Base Address of the DCAN Module Registers.
275 * \param paritySet Configure parity.
276 *
277 * 'paritySet' can take the following values \n
278 * DCAN_PARITY_FUNC_ENABLE - Enable parity function of DCAN peripheral \n
279 * DCAN_PARITY_FUNC_DISABLE - Disable parity function of DCAN peripheral \n
280 *
281 * \return None.
282 *
283 **/
284 void DCANParityControl(unsigned int baseAdd, unsigned int paritySet)
285 {
286 /* Clear the PMD field of DCAN_CTL register */
287 HWREG(baseAdd + DCAN_CTL) &= ~DCAN_CTL_PMD;
289 /* Set the PMD field with the user sent value */
290 HWREG(baseAdd + DCAN_CTL) |= (paritySet & DCAN_CTL_PMD);
291 }
293 /**
294 * \brief This API will enable Interrupt lines of DCAN peripheral.
295 *
296 * \param baseAdd Base Address of the DCAN Module Registers.
297 * \param enableLine Enable Interrupt lines.
298 *
299 * 'enableLine' can take the following values \n
300 * DCAN_INT_LINE0 - Enable Interrupt line 0 \n
301 * DCAN_INT_LINE1 - Enable Interrupt line 1 \n
302 *
303 * \return None.
304 *
305 * \note The Error and Status change interrupts can only be routed to
306 * DCANINT0 line and message object interrupts can be routed to
307 * both lines. Hence DCANINT0 line has to be enabled if error and
308 * status change interrupts have to be serviced.
309 *
310 **/
311 void DCANIntLineEnable(unsigned int baseAdd, unsigned int enableLine)
312 {
313 /* Enable the interrupt lines */
314 HWREG(baseAdd + DCAN_CTL) |= (enableLine & (DCAN_CTL_IE1 | DCAN_CTL_IE0));
315 }
317 /**
318 * \brief This API will disable the Interrupt lines of DCAN peripheral.
319 *
320 * \param baseAdd Base Address of the DCAN Module Registers.
321 * \param disableLine Disable Interrupt lines.
322 *
323 * 'disableLine' can take the following values \n
324 * DCAN_INT_LINE0 - Disable interrupt line 0 \n
325 * DCAN_INT_LINE1 - Disable interrupt line 1\n
326 *
327 * \return None.
328 *
329 **/
330 void DCANIntLineDisable(unsigned int baseAdd, unsigned int disableLine)
331 {
332 /* Disable the interrupt lines */
333 HWREG(baseAdd + DCAN_CTL) &= ~(disableLine & (DCAN_CTL_IE1 | DCAN_CTL_IE0));
334 }
336 /**
337 * \brief This API will enable the DMA request line for Interface
338 * registers(IF[1:3]) of the DCAN peripheral.
339 *
340 * \param baseAdd Base Address of the DCAN Module Registers.
341 * \param ifRegFlags Enable DMA request lines.
342 *
343 * 'ifRegFlags' can take the following values \n
344 * DCAN_DMA_REQUEST_LINE_IF1 - Enable DMA request line for IF1 \n
345 * DCAN_DMA_REQUEST_LINE_IF2 - Enable DMA request line for IF2 \n
346 * DCAN_DMA_REQUEST_LINE_IF3 - Enable DMA request line for IF3 \n
347 *
348 * \return None.
349 *
350 **/
351 void DCANDmaRequestLineEnable(unsigned int baseAdd, unsigned int ifRegFlags)
352 {
353 /* Enable the DMA request lines */
354 HWREG(baseAdd + DCAN_CTL) |= (ifRegFlags &
355 (DCAN_CTL_DE1 | DCAN_CTL_DE2 | DCAN_CTL_DE3));
356 }
358 /**
359 * \brief This API will disable the DMA request line for Interface
360 * registers(IF[1:3]) of the DCAN peripheral.
361 *
362 * \param baseAdd Base Address of the DCAN Module Registers.
363 * \param ifRegFlags Disable DMA request lines.
364 *
365 * 'ifRegFlags' can take the following values \n
366 * DCAN_DMA_REQUEST_LINE_IF1 - Disable DMA request line for IF1 \n
367 * DCAN_DMA_REQUEST_LINE_IF2 - Disable DMA request line for IF2 \n
368 * DCAN_DMA_REQUEST_LINE_IF3 - Disable DMA request line for IF3 \n
369 *
370 * \return None.
371 *
372 **/
373 void DCANDmaRequestLineDisable(unsigned int baseAdd, unsigned int ifRegFlags)
374 {
375 /* Disable the DMA request lines */
376 HWREG(baseAdd + DCAN_CTL) &= ~(ifRegFlags &
377 (DCAN_CTL_DE1 | DCAN_CTL_DE2 | DCAN_CTL_DE3));
378 }
380 /**
381 * \brief This API will return the status of Interrupt register DCAN_INT.
382 *
383 * \param baseAdd Base Address of the DCAN Module Registers.
384 * \param intLnFlag Int line no whose status is to be returned.
385 *
386 * 'intLnFlag' can take the following values \n
387 * DCAN_INT_LINE0_STAT - Status of Interrupt line 0 \n
388 * DCAN_INT_LINE1_STAT - Status of Interrupt line 1 \n
389 *
390 * \return Returns the status of DCAN_INT register.
391 *
392 **/
393 unsigned int DCANIntRegStatusGet(unsigned int baseAdd, unsigned int intLnFlag)
394 {
395 /* Return the status of DCAN_INT register */
396 return(HWREG(baseAdd + DCAN_INT) & intLnFlag);
397 }
399 /**
400 * \brief This API will return the status of Error and status DCAN_ES register.
401 *
402 * \param baseAdd Base Address of the DCAN Module Registers.
403 *
404 * \return Returns the status of DCAN_ES register.
405 *
406 * The user can use these macros for handling the status of DCAN_ES
407 * register in the application code.
408 *
409 * DCAN_LST_ERRCODE_NO_ERR - No error in LEC field \n
410 * DCAN_LST_ERRCODE_STUFF_ERR - Stuff error is detected in LEC field \n
411 * DCAN_LST_ERRCODE_FORM_ERR - Form error detected in LEC field \n
412 * DCAN_LST_ERRCODE_ACK_ERR - Ack error detected in LEC field \n
413 * DCAN_LST_ERRCODE_BIT1_ERR - Bit1 error detected in LEC field \n
414 * DCAN_LST_ERRCODE_BIT0_ERR - Bit0 error detected in LEC field \n
415 * DCAN_LST_ERRCODE_CRC_ERR - CRC error detected in LEC field \n
416 * DCAN_NO_EVENT_ON_CAN_BUS - No event generated on CAN bus since
417 * last read of DCAN_ES register \n
418 * DCAN_TXD_MSG_SUCCESSFULLY - DCAN transmitted message successfully \n
419 * DCAN_RXD_MSG_SUCCESSFULLY - DCAN received message successfully \n
420 * DCAN_CORE_IN_ERR_PASSIVE - DCAN core in error passive state \n
421 * DCAN_ERR_WARN_STATE_RCHD - Atleast one of the counters have reached
422 * error warning limit \n
423 * DCAN_MOD_IN_BUS_OFF_STATE - DCAN in bus off state \n
424 * DCAN_PARITY_ERR_DETECTED - Parity error detected \n
425 * DCAN_INITIATED_SYSTEM_WKUP - DCAN initiated system wakeup \n
426 * DCAN_IN_LOCAL_PWR_DWN_MODE - DCAN in local power down mode \n
427 *
428 * \note Reading the error and status register will clear/set certain bits
429 * in the error and status register. For more information please refer
430 * the DCAN Technical Reference Manual(TRM).
431 * For debug support, the auto clear functionality of error and status
432 * register is disabled when in debug/suspend mode.
433 *
434 **/
435 unsigned int DCANErrAndStatusRegInfoGet(unsigned int baseAdd)
436 {
437 /* Return the status of DCAN_ES register to the caller */
438 return(HWREG(baseAdd + DCAN_ES));
439 }
441 /**
442 * \brief This API will return the status of Error counter register.
443 *
444 * \param baseAdd Base Address of the DCAN Module Registers.
445 * \param cntrFlags Status to be returned from the API.
446 *
447 * 'cntrFlags' can take the following values \n
448 * DCAN_TX_ERR_CNTR - Return the TEC[7:0] field of DCAN_ERRC register \n
449 * DCAN_RX_ERR_CNTR - Return the REC[6:0] field of DCAN_ERRC register \n
450 * DCAN_RX_ERR_PASSIVE - Return the receiver error passive status \n
451 *
452 * \return This API returns the status of DCAN_ERRC register.
453 *
454 **/
455 unsigned int DCANErrCntrRegStatusGet(unsigned int baseAdd,
456 unsigned int cntrFlags)
457 {
458 /* Return the status of DCAN_ERRC register to the caller */
459 return(HWREG(baseAdd + DCAN_ERRC) & cntrFlags);
460 }
462 /**
463 * \brief This API will enable the test modes of DCAN peripheral.
464 *
465 * \param baseAdd Base Address of the DCAN Module Registers.
466 * \param tstMode Enable test mode.
467 *
468 * 'tstMode' can take the following values \n
469 * DCAN_TST_SILENT_MD - Enable silent mode \n
470 * DCAN_TST_LPBCK_MD - Enable loopback mode \n
471 * DCAN_TST_EXTLPBCK_MD - Enable external loopback mode \n
472 * DCAN_TST_LPBCK_SILENT_MD - Enable loopback with silent mode \n
473 * DCAN_TST_RAM_DIRECT_ACCESS - Direct access to RAM enabled \n
474 *
475 * \return None.
476 *
477 * \note Before calling the API 'DCANTestModesEnable' ensure to enable DCAN
478 * in test mode by using the API 'DCANTestModeControl'.
479 * When internal loop-back mode is active, if external loopback is
480 * enabled then external loopback will be ignored.
481 *
482 **/
483 void DCANTestModesEnable(unsigned int baseAdd, unsigned int tstMode)
484 {
485 /* Set test mode fields of DCAN_TEST register with the user sent value */
486 HWREG(baseAdd + DCAN_TEST) |= (tstMode &
487 (DCAN_TEST_RDA | DCAN_TEST_EXL |
488 DCAN_TEST_LBACK | DCAN_TEST_SILENT));
489 }
491 /**
492 * \brief This API will disable the test modes of DCAN peripheral.
493 *
494 * \param baseAdd Base Address of the DCAN Module Registers.
495 * \param tstMode Disable test mode.
496 *
497 * 'tstMode' can take the following values \n
498 * DCAN_TST_SILENT_MD - Disable silent mode \n
499 * DCAN_TST_LPBCK_MD - Disable loopback mode \n
500 * DCAN_TST_EXTLPBCK_MD - Disable external loopback mode \n
501 * DCAN_TST_LPBCK_SILENT_MD - Disable loopback with silent mode \n
502 * DCAN_TST_RAM_DIRECT_ACCESS - Direct access to RAM disabled
503 * (normal operation enabled) \n
504 *
505 * \return None.
506 *
507 * \note Usage of this API is only valid if DCAN is enabled in test mode.
508 * DCAN can be enabled in test mode by using the API
509 * 'DCANTestModeControl'.
510 *
511 **/
512 void DCANTestModesDisable(unsigned int baseAdd, unsigned int tstMode)
513 {
514 /* Clear the mode fields of DCAN_TEST register with the user sent value */
515 HWREG(baseAdd + DCAN_TEST) &= ~(tstMode &
516 (DCAN_TEST_RDA | DCAN_TEST_EXL |
517 DCAN_TEST_LBACK | DCAN_TEST_SILENT));
518 }
520 /**
521 * \brief This API will configure the control for CAN_TX pin.
522 *
523 * \param baseAdd Base Address of the DCAN Module Registers.
524 * \param pinCtl Pin control used for CAN_TX.
525 *
526 * 'pinCtl' can take the following values \n
527 * DCAN_TST_TX_NRML_OP - Normal operation of CAN_TX pin \n
528 * DCAN_TST_TX_SAMPLE_PT_MNTR - Sample point can be monitored at CAN_TX pin \n
529 * DCAN_TST_TX_DRIV_DOM_VAL - CAN_TX pin drives a dominant value \n
530 * DCAN_TST_TX_DRIV_RSV_VAL - CAN_TX pin drives a recessive value \n
531 *
532 * \return None.
533 *
534 * \note Usage of this API is only valid if DCAN is enabled in test mode.
535 * DCAN can be enabled in test mode by using the API
536 * 'DCANTestModeControl'.
537 * Setting for CAN_TX pin other than DCAN_TST_TX_NRML_OP will disturb
538 * message transfer.
539 *
540 **/
541 void DCANTxPinControl(unsigned int baseAdd, unsigned int pinCtl)
542 {
543 /* Clear the TX[1:0] field of DCAN_TEST register */
544 HWREG(baseAdd + DCAN_TEST) &= ~DCAN_TEST_TX;
546 /* Set the TX[1:0] field with the user sent value */
547 HWREG(baseAdd + DCAN_TEST) |= (pinCtl & DCAN_TEST_TX);
548 }
550 /**
551 * \brief This API will return the status of CAN_RX pin.
552 *
553 * \param baseAdd Base Address of the DCAN Module Registers.
554 *
555 * \return Returns the status of CAN_RX pin.
556 *
557 * User can use the below macros to check the status \n
558 * DCAN_TST_RX_IS_DOM - CAN bus is dominant \n
559 * DCAN_TST_RX_IS_RSV - CAN bus is recessive \n
560 *
561 * \note Usage of this API is only valid if DCAN is enabled in test mode.
562 * DCAN can be enabled in test mode by using the API
563 * 'DCANTestModeControl'.
564 *
565 **/
566 unsigned int DCANRxPinStatusGet(unsigned int baseAdd)
567 {
568 /* Return the status of CAN_RX pin to the caller */
569 return(HWREG(baseAdd + DCAN_TEST) & DCAN_TEST_RX);
570 }
572 /**
573 * \brief This API will return the status of parity error code register
574 * DCAN_PERR.
575 *
576 * \param baseAdd Base Address of the DCAN Module Registers.
577 * \param statFlg Status of word/message number to be returned
578 * from API.
579 *
580 * \return Returns the status of DCAN_PERR register.
581 *
582 * User can use the below macros to check the status \n
583 * DCAN_PARITY_ERR_MSG_NUM - Message object number where parity
584 * error is detected \n
585 * DCAN_PARITY_ERR_WRD_NUM - Word number where parity error is
586 * detected \n
587 *
588 **/
589 unsigned int DCANParityErrCdRegStatusGet(unsigned int baseAdd,
590 unsigned int statFlg)
591 {
592 /* Return the status of Parity error code register */
593 return(HWREG(baseAdd + DCAN_PERR) & statFlg);
594 }
596 /**
597 * \brief This API will set the Auto-bus on timer value to the DCAN_ABOTR
598 * register.
599 *
600 * \param baseAdd Base Address of the DCAN Module Registers.
601 * \param timeVal Auto-bus on timer value.
602 *
603 * \return None.
604 *
605 * \note This API is valid only if the auto-bus-on feature is enabled using
606 * 'DCANAutoBusOnControl' API.
607 * On write access to the CAN control register while auto-bus-on timer
608 * is running, the auto-bus-on procedure will be aborted.
609 * During debug/suspend mode, running Auto-bus-on timer will be paused.
610 *
611 **/
612 void DCANAutoBusOnTimeValSet(unsigned int baseAdd, unsigned int timeVal)
613 {
614 /* Set the user sent value to DCAN_ABOTR register */
615 HWREG(baseAdd + DCAN_ABOTR) = timeVal;
616 }
618 /**
619 * \brief This API will return the auto-bus-on time register value.
620 *
621 * \param baseAdd Base Address of the DCAN Module Registers.
622 *
623 * \return Returns the auto-bus-on timer value.
624 *
625 * \note This API is valid only if the auto-bus-on feature is enabled using
626 * 'DCANAutoBusOnControl' API.
627 * On write access to the CAN control register while auto-bus-on timer
628 * is running, the auto-bus-on procedure will be aborted.
629 * During debug/suspend mode, running Auto-bus-on timer will be paused.
630 *
631 **/
632 unsigned int DCANAutoBusOnTimeValGet(unsigned int baseAdd)
633 {
634 /* Return the Auto-bus-on timer value to the caller */
635 return(HWREG(baseAdd + DCAN_ABOTR));
636 }
638 /**
639 * \brief This API will return the status from DCAN_TXRQ_X register.
640 *
641 * \param baseAdd Base Address of the DCAN Module Registers.
642 *
643 * \return Returns the status from the transmit request X register.
644 * User can use the below macro to check the status \n
645 * DCAN_TXRQST_X_REG(n) - Status of DCAN_TXRQ_X register
646 * corresponding to n \n
647 * where 1 <= n <= 8 \n
648 *
649 **/
650 unsigned int DCANTxRqstXStatusGet(unsigned int baseAdd)
651 {
652 /* Return the status from DCAN_TXRQ_X register */
653 return(HWREG(baseAdd + DCAN_TXRQ_X) & TX_REQUEST_X_MASK);
654 }
656 /**
657 * \brief This API will return the status from DCAN_TXRQ(n) register.
658 * Where n = 12,34,56,78.
659 *
660 * \param baseAdd Base Address of the DCAN Module Registers.
661 * \param msgNum Message object number whose TxRqst status is to
662 * be returned.
663 *
664 * \return Returns the transmit request status from DCAN_TXRQ(n) register.
665 * Where n = 12,34,56,78.
666 *
667 * \note Values for 'msgNum' can range from \n
668 * 1 <= msgNum <= 128.
669 *
670 **/
671 unsigned int DCANTxRqstStatusGet(unsigned int baseAdd, unsigned int msgNum)
672 {
673 unsigned int regNum;
674 unsigned int offSet;
676 regNum = (msgNum - 1) / 32;
677 offSet = (msgNum - 1) % 32;
679 /* Return the status from DCAN_TXRQ register */
680 return(HWREG(baseAdd + DCAN_TXRQ(regNum)) & (1 << offSet));
681 }
683 /**
684 * \brief This API will return the lowest message object number whose transmit
685 * request status is not set from DCAN_TXRQ(n) register.
686 * Where n = 12,34,56,78.
687 *
688 * \param baseAdd Base Address of the DCAN Module Registers.
689 *
690 * \return Returns the transmit request status from DCAN_TXRQ(n) register.
691 * Where n = 12,34,56,78.
692 *
693 * \note This API is similar to 'DCANTxRqstStatusGet'. Only difference is
694 * that the user need not send the message number to read the TxRqst
695 * status of that message number. This API will return the lowest
696 * message object number whose TxRqst status is not set.
697 *
698 **/
699 unsigned int DCANTxRqstStatGet(unsigned int baseAdd)
700 {
701 unsigned int index = 1;
702 unsigned int regNum;
703 unsigned int offSet;
705 while(index < 128)
706 {
707 regNum = (index - 1) / 32;
708 offSet = (index - 1) % 32;
710 if(!(HWREG(baseAdd + DCAN_TXRQ(regNum)) & (1 << offSet)))
711 {
712 break;
713 }
714 index++;
715 }
717 return(index);
718 }
720 /**
721 * \brief This API will return the status from DCAN_NWDAT_X register.
722 *
723 * \param baseAdd Base Address of the DCAN Module Registers.
724 *
725 * \return Returns the status from DCAN_NWDAT_X register.
726 * User can use the below macro to check the status \n
727 * DCAN_NEWDAT_X_REG(n) - Status of DCAN_NWDAT_X register
728 * corresponding to n \n
729 * where 1 <= n <= 8 \n
730 *
731 **/
732 unsigned int DCANNewDataXStatusGet(unsigned int baseAdd)
733 {
734 /* Return the status from DCAN_NWDAT_X register */
735 return(HWREG(baseAdd + DCAN_NWDAT_X) & NEW_DATA_X_MASK);
736 }
738 /**
739 * \brief This API will return the status from DCAN_NWDAT(n) register.
740 * Where n = 12,34,56,78.
741 *
742 * \param baseAdd Base Address of the DCAN Module Registers.
743 * \param msgNum Message object number whose NewDat status is
744 * to be returned.
745 *
746 * \return Returns the New data status from DCAN_NWDAT(n) register.
747 * Where n = 12,34,56,78.
748 *
749 * \note Values for 'msgNum' can range from \n
750 * 1 <= msgNum <= 128.
751 *
752 **/
753 unsigned int DCANNewDataStatusGet(unsigned int baseAdd, unsigned int msgNum)
754 {
755 unsigned int regNum;
756 unsigned int offSet;
758 regNum = (msgNum - 1) / 32;
759 offSet = (msgNum - 1) % 32;
761 /* Return the status from DCAN_NWDAT register */
762 return(HWREG(baseAdd + DCAN_NWDAT(regNum)) & (1 << offSet));
763 }
765 /**
766 * \brief This API will return the lowest message object number whose new
767 * data status is set from DCAN_NWDAT(n) register.
768 * Where n = 12,34,56,78.
769 *
770 * \param baseAdd Base Address of the DCAN Module Registers.
771 *
772 * \return Returns the new data status from DCAN_NWDAT(n) register.
773 * Where n = 12,34,56,78.
774 *
775 * \note This API is similar to 'DCANNewDataStatusGet'. Only difference is
776 * that the user need not send the message number to read the NewData
777 * status of that message number. This API will return the lowest
778 * message object number whose NewData status is set.
779 *
780 **/
781 unsigned int DCANNewDataStatGet(unsigned int baseAdd)
782 {
783 unsigned int index = 1;
784 unsigned int regNum;
785 unsigned int offSet;
787 while(index < 128)
788 {
789 regNum = (index - 1) / 32;
790 offSet = (index - 1) % 32;
792 if((HWREG(baseAdd + DCAN_NWDAT(regNum)) & (1 << offSet)))
793 {
794 break;
795 }
796 index++;
797 }
799 return(index);
800 }
802 /**
803 * \brief This API will return the status from DCAN_INTPND_X register.
804 *
805 * \param baseAdd Base Address of the DCAN Module Registers.
806 *
807 * \return Returns the status from DCAN_INTPND_X register.
808 * User can use the below macro to check the status \n
809 * DCAN_INTPND_X_REG(n) - Status of DCAN_INTPND_X register
810 * corresponding to n \n
811 * where 1 <= n <= 8 \n
812 *
813 **/
814 unsigned int DCANIntPendingXStatusGet(unsigned int baseAdd)
815 {
816 /* Return the status from DCAN_INTPND_X register */
817 return(HWREG(baseAdd + DCAN_INTPND_X) & INT_PEND_X_MASK);
818 }
820 /**
821 * \brief This API will return the status from DCAN_INTPND(n) register.
822 * Where n = 12,34,56,78.
823 *
824 * \param baseAdd Base Address of the DCAN Module Registers.
825 * \param msgNum Message object number whose IntPnd status is to
826 * be returned.
827 *
828 * \return Returns the Interrupt pending status from DCAN_INTPND(n) register.
829 * Where n = 12,34,56,78.
830 *
831 * \note Values for 'msgNum' can range from \n
832 * 1 <= msgNum <= 128.
833 *
834 **/
835 unsigned int DCANIntPendingStatusGet(unsigned int baseAdd, unsigned int msgNum)
836 {
837 unsigned int regNum;
838 unsigned int offSet;
840 regNum = (msgNum - 1) / 32;
841 offSet = (msgNum - 1) % 32;
843 /* Return the status from DCAN_INTPND register */
844 return(HWREG(baseAdd + DCAN_INTPND(regNum)) & (1 << offSet));
845 }
847 /**
848 * \brief This API will return the status from DCAN_MSGVAL_X register.
849 *
850 * \param baseAdd Base Address of the DCAN Module Registers.
851 *
852 * \return Returns the status from DCAN_MSGVAL_X register.
853 * User can use the below macro to check the status \n
854 * DCAN_MSGVAL_X_REG(n) - Status of DCAN_MSGVAL_X register
855 * corresponding to n \n
856 * where 1 <= n <= 8 \n
857 *
858 **/
859 unsigned int DCANMsgValidXStatusGet(unsigned int baseAdd)
860 {
861 /* Return the status from DCAN_MSGVAL_X register */
862 return(HWREG(baseAdd + DCAN_MSGVAL_X) & MSG_VALID_X_MASK);
863 }
865 /**
866 * \brief This API will return the status from DCAN_MSGVAL(n) register.
867 * Where n = 12,34,56,78.
868 *
869 * \param baseAdd Base Address of the DCAN Module Registers.
870 * \param msgNum Message object number whose MsgVal status is to
871 * be returned.
872 *
873 * \return Returns the Message valid status from DCAN_MSGVAL(n) register.
874 * Where n = 12,34,56,78.
875 *
876 * \note Values for 'msgNum' can take the following values \n
877 * 1 <= msgNum <= 128.
878 *
879 **/
880 unsigned int DCANMsgValidStatusGet(unsigned int baseAdd, unsigned int msgNum)
881 {
882 unsigned int regNum;
883 unsigned int offSet;
885 regNum = (msgNum - 1) / 32;
886 offSet = (msgNum - 1) % 32;
888 /* Return the status from DCAN_MSGVAL register */
889 return(HWREG(baseAdd + DCAN_MSGVAL(regNum)) & (1 << offSet));
890 }
892 /**
893 * \brief This API will configure which Interrupt line will be used to
894 * service interrupts from message objects.
895 *
896 * \param baseAdd Base Address of the DCAN Module Registers.
897 * \param intLine Interrupt line to be configured.
898 * \param msgNum Message object number whose IntMux is to be
899 * configured.
900 *
901 * 'intLine' can take the following values \n
902 * DCAN_INT0_ACTIVE - DCANINT0 line is active if corresponding
903 * IntPnd flag is set \n
904 * DCAN_INT1_ACTIVE - DCANINT1 line is active if corresponding
905 * IntPnd flag is one \n
906 *
907 * \return None.
908 *
909 * \note Values for 'msgNum' can range from \n
910 * 1 <= msgNum <= 128.
911 *
912 **/
913 void DCANIntMuxConfig(unsigned int baseAdd, unsigned int intLine,
914 unsigned int msgNum)
915 {
916 unsigned int regNum;
917 unsigned int offSet;
919 regNum = (msgNum - 1) / 32;
920 offSet = (msgNum - 1) % 32;
922 /* Clear the IntMux field of DCAN_INTMUX register corresponding to msgNum */
923 HWREG(baseAdd + DCAN_INTMUX(regNum)) &= ~(1 << offSet);
925 /* Set the DCAN_INTMUX field corresponding to msgNum */
926 HWREG(baseAdd + DCAN_INTMUX(regNum)) |= (msgNum << offSet);
927 }
929 /**
930 * \brief This API will validate a message object.
931 *
932 * \param baseAdd Base Address of the DCAN Module Registers.
933 * \param regNum Interface register number used.
934 *
935 * 'regNum' can take the following values \n
936 * DCAN_IF1_REG - IF register 1 is used \n
937 * DCAN_IF2_REG - IF register 2 is used \n
938 *
939 * \return None.
940 *
941 **/
942 void DCANMsgObjValidate(unsigned int baseAdd, unsigned int regNum)
943 {
944 /* Wait in loop until busy bit is cleared */
945 while(DCANIFBusyStatusGet(baseAdd, regNum));
947 /* Validate the message object */
948 HWREG(baseAdd + DCAN_IFARB(regNum)) |= DCAN_IFARB_MSGVAL;
949 }
951 /**
952 * \brief This API will invalidate a message object.
953 *
954 * \param baseAdd Base Address of the DCAN Module Registers.
955 * \param regNum Interface register number used.
956 *
957 * 'regNum' can take the following values \n
958 * DCAN_IF1_REG - IF register 1 is used \n
959 * DCAN_IF2_REG - IF register 2 is used \n
960 *
961 * \return None.
962 *
963 **/
964 void DCANMsgObjInvalidate(unsigned int baseAdd, unsigned int regNum)
965 {
966 /* Wait in loop until busy bit is cleared */
967 while(DCANIFBusyStatusGet(baseAdd, regNum));
969 /* Invalidate the message object */
970 HWREG(baseAdd + DCAN_IFARB(regNum)) &= ~DCAN_IFARB_MSGVAL;
971 }
973 /**
974 * \brief This API will set the fields of DCAN_IFCMD register.
975 *
976 * \param baseAdd Base Address of the DCAN Module Registers.
977 * \param cmdFlags Fields of the DCAN_IFCMD register which are
978 * to be set.
979 * \param objNum Message object number to be configured.
980 * \param regNum Interface register number used.
981 *
982 * 'cmdFlags' can take the following values \n
983 * DCAN_DMA_ACTIVE - Enable DMA feature \n
984 * DCAN_DAT_A_ACCESS - Access data from IF DataA register \n
985 * DCAN_DAT_B_ACCESS - Access data from IF DataB register \n
986 * DCAN_TXRQST_ACCESS - Access the TxRqst bit \n
987 * DCAN_CLR_INTPND - Clear the IntPnd bit \n
988 * DCAN_ACCESS_CTL_BITS - Access control bits \n
989 * DCAN_ACCESS_ARB_BITS - Access Arbitration bits \n
990 * DCAN_ACCESS_MSK_BITS - Access the mask bits \n
991 * DCAN_MSG_WRITE - Transfer direction is from IF registers to
992 * message RAM \n
993 * DCAN_MSG_READ - Transfer direction is from message RAM to
994 * IF registers \n
995 *
996 * 'regNum' can take the following values \n
997 * DCAN_IF1_REG - IF register 1 is used \n
998 * DCAN_IF2_REG - IF register 2 is used \n
999 *
1000 * \return None.
1001 *
1002 **/
1003 void DCANCommandRegSet(unsigned int baseAdd, unsigned int cmdFlags,
1004 unsigned int objNum, unsigned int regNum)
1005 {
1006 /* Wait in loop until busy bit is cleared */
1007 while(DCANIFBusyStatusGet(baseAdd, regNum));
1009 /* Clear the DCAN_IFCMD register fields */
1010 HWREG(baseAdd + DCAN_IFCMD(regNum)) &= ~(DCAN_IFCMD_DMAACTIVE |
1011 DCAN_IFCMD_DATAA |
1012 DCAN_IFCMD_DATAB |
1013 DCAN_IFCMD_TXRQST_NEWDAT |
1014 DCAN_IFCMD_CLRINTPND |
1015 DCAN_IFCMD_CONTROL |
1016 DCAN_IFCMD_ARB |
1017 DCAN_IFCMD_MASK |
1018 DCAN_IFCMD_MESSAGENUMBER |
1019 DCAN_IFCMD_WR_RD);
1021 /* Wait in loop until busy bit is cleared */
1022 while(DCANIFBusyStatusGet(baseAdd, regNum));
1024 /* Set the DCAN_IFCMD register fields represented by cmdFlags */
1025 HWREG(baseAdd + DCAN_IFCMD(regNum)) |= ((cmdFlags &
1026 (DCAN_IFCMD_DMAACTIVE |
1027 DCAN_IFCMD_DATAA |
1028 DCAN_IFCMD_DATAB |
1029 DCAN_IFCMD_TXRQST_NEWDAT |
1030 DCAN_IFCMD_CLRINTPND |
1031 DCAN_IFCMD_CONTROL |
1032 DCAN_IFCMD_ARB |
1033 DCAN_IFCMD_MASK |
1034 DCAN_IFCMD_WR_RD)) |
1035 (objNum & DCAN_IFCMD_MESSAGENUMBER));
1037 /* Wait for some time after setting the command register */
1038 platform_delay(100);
1039 }
1041 /**
1042 * \brief This API will return the status of Busy field from DCAN_IFCMD
1043 * register.
1044 *
1045 * \param baseAdd Base Address of the DCAN Module Registers.
1046 * \param regNum Interface register number used.
1047 *
1048 * 'regNum' can take the following values \n
1049 * DCAN_IF1_REG - Interface register 1 is used \n
1050 * DCAN_IF2_REG - Interface register 2 is used \n
1051 *
1052 * \return Returns the Busy bit status from the DCAN_IFCMD register.
1053 * User can use the below macros to check the status \n
1054 * DCAN_IF_BUSY - Transfer between IF register and message RAM is
1055 * in progress.
1056 * DCAN_IF_NOT_BUSY - No Transfer between IF register and message RAM.
1057 *
1058 **/
1059 unsigned int DCANIFBusyStatusGet(unsigned int baseAdd, unsigned int regNum)
1060 {
1061 /* Returns the status of BUSY field from DCAN_IF_CMD register */
1062 return(HWREG(baseAdd + DCAN_IFCMD(regNum)) & DCAN_IFCMD_BUSY);
1063 }
1065 /**
1066 * \brief This API will set the message identifier length and number.
1067 *
1068 * \param baseAdd Base Address of the DCAN Module Registers.
1069 * \param msgId Message identifier number.
1070 * \param idLength Identifier length.
1071 * \param regNum Interface register number used.
1072 *
1073 * 'idLength' can take the following values \n
1074 * DCAN_11_BIT_ID - 11 bit identifier is used \n
1075 * DCAN_29_BIT_ID - 29 bit identifier is used \n
1076 *
1077 * 'regNum' can take the following values \n
1078 * DCAN_IF1_REG - Interface register 1 is used \n
1079 * DCAN_IF2_REG - Interface register 2 is used \n
1080 *
1081 * \return None.
1082 *
1083 **/
1084 void DCANMsgIdSet(unsigned int baseAdd, unsigned int msgId,
1085 unsigned int idLength, unsigned int regNum)
1086 {
1088 if(idLength == DCAN_11_BIT_ID)
1089 {
1090 msgId <<= DCAN_STD_ID_SHIFT;
1091 }
1093 /* Wait in loop until busy bit is cleared */
1094 while(DCANIFBusyStatusGet(baseAdd, regNum));
1096 /* Clear the Msk field of DCAN_IFARB register */
1097 HWREG(baseAdd + DCAN_IFARB(regNum)) &= ~(DCAN_IFARB_MSK | DCAN_IFARB_XTD);
1099 /* Wait in loop until busy bit is cleared */
1100 while(DCANIFBusyStatusGet(baseAdd, regNum));
1102 /* Set the Msk field with the ID value */
1103 HWREG(baseAdd + DCAN_IFARB(regNum)) |= ((msgId & DCAN_IFARB_MSK) |
1104 (idLength & DCAN_IFARB_XTD));
1105 }
1107 /**
1108 * \brief This API will set the direction for the message object.
1109 *
1110 * \param baseAdd Base Address of the DCAN Module Registers.
1111 * \param msgDir Message direction for the message object.
1112 * \param regNum Interface register number used.
1113 *
1114 * 'msgDir' can take the following values \n
1115 * DCAN_TX_DIR - Message object set to transmit a message \n
1116 * DCAN_RX_DIR - Message object set to receive a message \n
1117 *
1118 * 'regNum' can take the following values \n
1119 * DCAN_IF1_REG - Interface register 1 is used \n
1120 * DCAN_IF2_REG - Interface register 2 is used \n
1121 *
1122 * \return None.
1123 *
1124 **/
1125 void DCANMsgDirectionSet(unsigned int baseAdd, unsigned int msgDir,
1126 unsigned int regNum)
1127 {
1128 /* Wait in loop until busy bit is cleared */
1129 while(DCANIFBusyStatusGet(baseAdd, regNum));
1131 /* Clear the Dir field of DCAN_IFARB register */
1132 HWREG(baseAdd + DCAN_IFARB(regNum)) &= ~DCAN_IFARB_DIR;
1134 /* Wait in loop until busy bit is cleared */
1135 while(DCANIFBusyStatusGet(baseAdd, regNum));
1137 /* Set the Dir field with the user sent value */
1138 HWREG(baseAdd + DCAN_IFARB(regNum)) |= (msgDir & DCAN_IFARB_DIR);
1139 }
1141 /**
1142 * \brief This API will write data bytes to the IF Data registers.
1143 *
1144 * \param baseAdd Base Address of the DCAN Module Registers.
1145 * \param dataPtr Pointer used to fetch data bytes.
1146 * \param regNum Interface register number used.
1147 *
1148 * 'regNum' can take the following values \n
1149 * DCAN_IF1_REG - IF register 1 is used \n
1150 * DCAN_IF2_REG - IF register 2 is used \n
1151 *
1152 * \return None.
1153 *
1154 **/
1155 void DCANDataWrite(unsigned int baseAdd, unsigned int* dataPtr,
1156 unsigned int regNum)
1157 {
1158 /* Wait in loop until busy bit is cleared */
1159 while(DCANIFBusyStatusGet(baseAdd, regNum));
1161 /* Write the lower 4 data bytes to IFDATA register */
1162 HWREG(baseAdd + DCAN_IFDATA(regNum)) = *dataPtr++;
1164 /* Wait in loop until busy bit is cleared */
1165 while(DCANIFBusyStatusGet(baseAdd, regNum));
1167 /* Write the higher 4 data bytes to IFDATB register */
1168 HWREG(baseAdd + DCAN_IFDATB(regNum)) = *dataPtr;
1169 }
1171 /**
1172 * \brief This API will read the data bytes from the IF Data registers.
1173 *
1174 * \param baseAdd Base Address of the DCAN Module Registers.
1175 * \param regNum Interface register number used.
1176 *
1177 * 'regNum' can take the following values \n
1178 * DCAN_IF1_REG - IF register 1 is used \n
1179 * DCAN_IF2_REG - IF register 2 is used \n
1180 * DCAN_IF3_REG - IF register 3 is used \n
1181 *
1182 * \return None.
1183 *
1184 **/
1185 void DCANDataRead(unsigned int baseAdd, unsigned int* data,
1186 unsigned int regNum)
1187 {
1188 /* Read the data bytes from the DCAN_IFDATA register */
1189 *data++ = HWREG(baseAdd + DCAN_IFDATA(regNum));
1191 /* Read the data bytes from the DCAN_IFDATB register */
1192 *data = HWREG(baseAdd + DCAN_IFDATB(regNum));
1193 }
1195 /**
1196 * \brief This API will set the data length code.
1197 *
1198 * \param baseAdd Base Address of the DCAN Module Registers.
1199 * \param dlc Data length code.
1200 * \param regNum Interface register number used.
1201 *
1202 * 'dlc' can take the below values \n
1203 * dlc can range between 1-8 for 1-8 data bytes \n
1204 * dlc value lying between 9-15 will configure it for 8 data bytes \n
1205 *
1206 * 'regNum' can take the following values \n
1207 * DCAN_IF1_REG - IF register 1 is used \n
1208 * DCAN_IF2_REG - IF register 2 is used \n
1209 *
1210 * \return None.
1211 *
1212 **/
1213 void DCANDataLengthCodeSet(unsigned int baseAdd, unsigned int dlc,
1214 unsigned int regNum)
1215 {
1216 /* Wait in loop until busy bit is cleared */
1217 while(DCANIFBusyStatusGet(baseAdd, regNum));
1219 /* Clear the DLC field of DCAN_IFMCTL register */
1220 HWREG(baseAdd + DCAN_IFMCTL(regNum)) &= ~DCAN_IFMCTL_DATALENGTHCODE;
1222 /* Wait in loop until busy bit is cleared */
1223 while(DCANIFBusyStatusGet(baseAdd, regNum));
1225 /* Set the DLC field with the user sent value */
1226 HWREG(baseAdd + DCAN_IFMCTL(regNum)) |= (dlc & DCAN_IFMCTL_DATALENGTHCODE);
1227 }
1229 /**
1230 * \brief This API will enable the Message object interrupts of the DCAN
1231 * peripheral.
1232 *
1233 * \param baseAdd Base Address of the DCAN Module Registers.
1234 * \param intFlags Enable the message object interrupts
1235 * represented by intFlags.
1236 * \param regNum Interface register number used.
1237 *
1238 * 'intFlags' can take the following values \n
1239 * DCAN_TRANSMIT_INT - Enable the transmit interrupt \n
1240 * DCAN_RECEIVE_INT - Enable the receive interrupt \n
1241 *
1242 * 'regNum' can take the following values \n
1243 * DCAN_IF1_REG - IF register 1 is used \n
1244 * DCAN_IF2_REG - IF register 2 is used \n
1245 *
1246 * \return None.
1247 *
1248 **/
1249 void DCANMsgObjIntEnable(unsigned int baseAdd, unsigned int intFlags,
1250 unsigned int regNum)
1251 {
1252 /* Wait in loop until busy bit is cleared */
1253 while(DCANIFBusyStatusGet(baseAdd, regNum));
1255 /* Enable Message object interrupts */
1256 HWREG(baseAdd + DCAN_IFMCTL(regNum)) |= (intFlags &
1257 (DCAN_IFMCTL_TXIE |
1258 DCAN_IFMCTL_RXIE));
1259 }
1261 /**
1262 * \brief This API will disable the Message object interrupts of the DCAN
1263 * peripheral.
1264 *
1265 * \param baseAdd Base Address of the DCAN Module Registers.
1266 * \param intFlags Disable the message object interrupts
1267 * represented by intFlags.
1268 * \param regNum Interface register number used.
1269 *
1270 * 'intFlags' can take the following values \n
1271 * DCAN_TRANSMIT_INT - Disable the transmit interrupt \n
1272 * DCAN_RECEIVE_INT - Disable the receive interrupt \n
1273 *
1274 * 'regNum' can take the following values \n
1275 * DCAN_IF1_REG - IF register 1 is used \n
1276 * DCAN_IF2_REG - IF register 2 is used \n
1277 *
1278 * \return None.
1279 *
1280 **/
1281 void DCANMsgObjIntDisable(unsigned int baseAdd, unsigned int intFlags,
1282 unsigned int regNum)
1283 {
1284 /* Wait in loop until busy bit is cleared */
1285 while(DCANIFBusyStatusGet(baseAdd, regNum));
1287 /* Enable Message object interrupts */
1288 HWREG(baseAdd + DCAN_IFMCTL(regNum)) &= ~(intFlags &
1289 (DCAN_IFMCTL_TXIE |
1290 DCAN_IFMCTL_RXIE));
1291 }
1293 /**
1294 * \brief This API will configure the end of block settings for the DCAN
1295 * peripheral.
1296 *
1297 * \param baseAdd Base Address of the DCAN Module Registers.
1298 * \param eob Configure End of block.
1299 * \param regNum Interface register number used.
1300 *
1301 * 'eob' can take the following values \n
1302 * DCAN_END_OF_BLOCK_ENABLE - Enable end of block \n
1303 * DCAN_END_OF_BLOCK_DISABLE - Disable end of block \n
1304 *
1305 * 'regNum' can take the following values \n
1306 * DCAN_IF1_REG - IF register 1 is used \n
1307 * DCAN_IF2_REG - IF register 2 is used \n
1308 *
1309 * \return None.
1310 *
1311 **/
1312 void DCANFIFOEndOfBlockControl(unsigned int baseAdd, unsigned int eob,
1313 unsigned int regNum)
1314 {
1315 /* Wait in loop until busy bit is cleared */
1316 while(DCANIFBusyStatusGet(baseAdd, regNum));
1318 /* Clear the EOB field of DCAN_IFMCTL register */
1319 HWREG(baseAdd + DCAN_IFMCTL(regNum)) &= ~DCAN_IFMCTL_EOB;
1321 /* Wait in loop until busy bit is cleared */
1322 while(DCANIFBusyStatusGet(baseAdd, regNum));
1324 /* Set the EOB field with the user sent value */
1325 HWREG(baseAdd + DCAN_IFMCTL(regNum)) |= (eob & DCAN_IFMCTL_EOB);
1326 }
1328 /**
1329 * \brief This API will configure the mask settings for a message object.
1330 *
1331 * \param baseAdd Base Address of the DCAN Module Registers.
1332 * \param idMsk Identifier mask.
1333 * \param msgDir Mask message direction.
1334 * \param extId Mask extended identifier.
1335 * \param regNum Interface register number used.
1336 *
1337 * 'idMsk' can take the following value \n
1338 * DCAN_IDENTIFIER_MSK(mask, idType) \n
1339 * where 0 <= mask <= 0x1FFFFFFF \n
1340 *
1341 * 'idType' can take the following values \n
1342 * DCAN_ID_MSK_11_BIT - 11 bit identifier mask is used \n
1343 * DCAN_ID_MSK_29_BIT - 29 bit identifier mask is used \n
1344 *
1345 * 'msgDir' can take the following values \n
1346 * DCAN_MSK_MSGDIR_ENABLE - Message direction bit is used for
1347 * acceptance filtering \n
1348 * DCAN_MSK_MSGDIR_DISABLE - Message direction bit has no effect on
1349 * acceptance filtering \n
1350 *
1351 * 'extId' can take the following values \n
1352 * DCAN_MSK_EXT_ID_ENABLE - The IDE bit is used for acceptance filtering \n
1353 * DCAN_MSK_EXT_ID_DISABLE - The IDE bit is not used for acceptance
1354 * filtering \n
1355 *
1356 * 'regNum' can take the following values \n
1357 * DCAN_IF1_REG - IF register 1 is used \n
1358 * DCAN_IF2_REG - IF register 2 is used \n
1359 *
1360 * \return None.
1361 *
1362 **/
1363 void DCANMsgObjectMskConfig(unsigned int baseAdd, unsigned int idMsk,
1364 unsigned int msgDir, unsigned int extId,
1365 unsigned int regNum)
1366 {
1367 /* Wait in loop until busy bit is cleared */
1368 while(DCANIFBusyStatusGet(baseAdd, regNum));
1370 /* Write to the DCAN_IFMSK register */
1371 HWREG(baseAdd + DCAN_IFMSK(regNum)) = ((idMsk & DCAN_IF1MSK_MSK) |
1372 (msgDir & DCAN_IFMSK_MDIR) |
1373 (extId & DCAN_IFMSK_MXTD));
1374 }
1376 /**
1377 * \brief This API will configure IF3 register set so that it is
1378 * automatically updated with the received value in message RAM.
1379 * Where n = 12,34,56,78.
1380 *
1381 * \param baseAdd Base Address of the DCAN Module Registers.
1382 * \param msgNum Message object number for which IF3 register
1383 * set has to be updated.
1384 *
1385 * \return None.
1386 *
1387 * \note Values for 'msgNum' can range from \n
1388 * 1 <= msgNum <= 128.
1389 * IF3 Update enable should not be set for transmit objects.
1390 *
1391 **/
1392 void DCANIF3RegUpdateEnableSet(unsigned int baseAdd, unsigned int msgNum)
1393 {
1394 unsigned int regNum;
1395 unsigned int offSet;
1397 regNum = (msgNum - 1) / 32;
1398 offSet = (msgNum - 1) % 32;
1400 /* Set the DCAN_IF3UPD register with the proper value */
1401 HWREG(baseAdd + DCAN_IF3UPD(regNum)) |= (1 << offSet);
1402 }
1404 /**
1405 * \brief This API will set the observation flag bits in the IF3 observation
1406 * register which are used to determine which data sections of the IF3
1407 * interface register set have to be read in order to complete a DMA
1408 * read cycle.
1409 *
1410 * \param baseAdd Base Address of the DCAN Module Registers.
1411 * \param obsFlags Flags which are to be set.
1412 *
1413 * 'obsFlags' can take the follwing values \n
1414 * DCAN_MASK_DATA - Set Mask data read observation \n
1415 * DCAN_ARB_DATA - Set Arbitration data read observation \n
1416 * DCAN_CTRL_DATA - Set Ctrl read observation \n
1417 * DCAN_DAT_A_DATA - Set Data A read observation \n
1418 * DCAN_DAT_B_DATA - Set Data B read observation \n
1419 *
1420 * \return None.
1421 *
1422 **/
1423 void DCANIF3ObservationFlagSet(unsigned int baseAdd, unsigned int obsFlags)
1424 {
1425 /* Set the appropriate flags in the DCAN_IF3OBS register */
1426 HWREGB(baseAdd + DCAN_IF3OBS) |= (obsFlags & (DCAN_IF3OBS_MASK |
1427 DCAN_IF3OBS_ARB | DCAN_IF3OBS_CTRL |
1428 DCAN_IF3OBS_DATAA | DCAN_IF3OBS_DATAB));
1429 }
1431 /**
1432 * \brief This API will clear the observation flag bits in the IF3 observation
1433 * register which are used to determine which data sections of the IF3
1434 * interface register set have to be read in order to complete a DMA
1435 * read cycle.
1436 *
1437 * \param baseAdd Base Address of the DCAN Module Registers.
1438 * \param obsFlags Flags which are to be cleared.
1439 *
1440 * 'obsFlags' can take the following values \n
1441 * DCAN_MASK_DATA - Clear Mask data read observation \n
1442 * DCAN_ARB_DATA - Clear Arbitration data read observation \n
1443 * DCAN_CTRL_DATA - Clear Ctrl read observation \n
1444 * DCAN_DAT_A_DATA - Clear Data A read observation \n
1445 * DCAN_DAT_B_DATA - Clear Data B read observation \n
1446 *
1447 * \return None.
1448 *
1449 **/
1450 void DCANIF3ObservationFlagClear(unsigned int baseAdd, unsigned int obsFlags)
1451 {
1452 /* Set the appropriate flags in the DCAN_IF3OBS register */
1453 HWREGB(baseAdd + DCAN_IF3OBS) &= ~(obsFlags & (DCAN_IF3OBS_MASK |
1454 DCAN_IF3OBS_ARB | DCAN_IF3OBS_CTRL |
1455 DCAN_IF3OBS_DATAA| DCAN_IF3OBS_DATAB));
1456 }
1458 /**
1459 * \brief This API will return observation flag status from the DCAN_IF3OBS
1460 * register.
1461 *
1462 * \param baseAdd Base Address of the DCAN Module Registers.
1463 *
1464 * \return Returns the observation flag status from the DCAN_IF3OBS register.
1465 * The following macros can be used to check the status \n
1466 * DCAN_IF3_MASK_STATUS - IF3 status of Mask data read access \n
1467 * DCAN_IF3_ARB_STATUS - IF3 status of Arbitration data read access \n
1468 * DCAN_IF3_CTRL_STATUS - IF3 status of Control bits read access \n
1469 * DCAN_IF3_DAT_A_STATUS - IF3 status of Data A read access \n
1470 * DCAN_IF3_DAT_B_STATUS - IF3 status of Data B read access \n
1471 * DCAN_IF3_UPDATE_STATUS - IF3 Update data status \n
1472 *
1473 **/
1474 unsigned char DCANIF3ObservationFlagStatGet(unsigned int baseAdd)
1475 {
1476 /* Return the observation flag status from the DCAN_IF3OBS register */
1477 return(HWREGB(baseAdd + DCAN_IF3OBS + 1));
1478 }
1480 /**
1481 * \brief This API will return the status from the DCAN_IF_MSK register.
1482 *
1483 * \param baseAdd Base Address of the DCAN Module Registers.
1484 * \param regNum Interface register used.
1485 *
1486 * 'regNum' can take the following values \n
1487 * DCAN_IF1_REG - Interface register 1 is used \n
1488 * DCAN_IF2_REG - Interface register 2 is used \n
1489 * DCAN_IF3_REG - Interface register 3 is used \n
1490 *
1491 * \return Returns the status of DCAN_IF_MSK register.
1492 * The following macros can be used to check the status \n
1493 * DCAN_ID_MSK_READ - Read Identifier mask \n
1494 * DCAN_MSK_MSG_DIR_READ - Read mask message direction \n
1495 * DCAN_MSK_EXT_ID_READ - Read mask extended identifier \n
1496 *
1497 **/
1498 unsigned int DCANIFMaskStatusGet(unsigned int baseAdd, unsigned int regNum)
1499 {
1500 /* Return the status of DCAN_IF_MSK register */
1501 return(HWREG(baseAdd + DCAN_IFMSK(regNum)));
1502 }
1504 /**
1505 * \brief This API will return the status from the DCAN_IF_ARB register.
1506 *
1507 * \param baseAdd Base Address of the DCAN Module Registers.
1508 * \param regNum Interface register used.
1509 *
1510 * 'regNum' can take the following values \n
1511 * DCAN_IF1_REG - Interface register 1 is used \n
1512 * DCAN_IF2_REG - Interface register 2 is used \n
1513 * DCAN_IF3_REG - Interface register 3 is used \n
1514 *
1515 * \return Returns the status of DCAN_IF_ARB register.
1516 * The following macros can be used to check the status \n
1517 * DCAN_MSG_ID_READ - Read message Identifier \n
1518 * DCAN_MSG_DIR_READ - Read message direction \n
1519 * DCAN_EXT_ID_READ - Read extended identifier \n
1520 * DCAN_MSGVAL_READ - Read message valid status \n
1521 *
1522 **/
1523 unsigned int DCANIFArbStatusGet(unsigned int baseAdd, unsigned int regNum)
1524 {
1525 /* Return the status of DCAN_IF_ARB register */
1526 return(HWREG(baseAdd + DCAN_IFARB(regNum)));
1527 }
1529 /**
1530 * \brief This API will return the status from the DCAN_IFMCTL register.
1531 *
1532 * \param baseAdd Base Address of the DCAN Module Registers.
1533 * \param regNum Interface register used.
1534 *
1535 * 'regNum' can take the following values \n
1536 * DCAN_IF1_REG - Interface register 1 is used \n
1537 * DCAN_IF2_REG - Interface register 2 is used \n
1538 * DCAN_IF3_REG - Interface register 3 is used \n
1539 *
1540 * \return Returns the status of DCAN_IFMCTL register.
1541 * The following macros can be used to check the status \n
1542 * DCAN_DAT_LEN_CODE_READ - Read data length code \n
1543 * DCAN_END_OF_BLOCK_READ - Read end of block bit \n
1544 * DCAN_TXRQST_READ - Read transmit request bit \n
1545 * DCAN_RMT_ENABLE_READ - Read remote enable bit \n
1546 * DCAN_RX_INT_ENABLE_READ - Read Rx interrupt enable bit \n
1547 * DCAN_TX_INT_ENABLE_READ - Read Tx interrupt enable bit \n
1548 * DCAN_UMASK_READ - Read use acceptance mask bit \n
1549 * DCAN_INTPND_READ - Read interrupt pending status \n
1550 * DCAN_MSG_LOST_READ - Read message lost status \n
1551 * DCAN_NEWDAT_READ - Read new data status \n
1552 *
1553 **/
1554 unsigned int DCANIFMsgCtlStatusGet(unsigned int baseAdd, unsigned int regNum)
1555 {
1556 /* Return the status of DCAN_IFMCTl register */
1557 return(HWREG(baseAdd + DCAN_IFMCTL(regNum)));
1558 }
1560 /**
1561 * \brief This API will clear the IntPnd bit of DCAN_IFMCTL register.
1562 *
1563 * \param baseAdd Base Address of the DCAN Module Registers.
1564 * \param regNum Interface register set used.
1565 *
1566 * 'regNum' can take the following values \n
1567 * DCAN_IF1_REG - Interface register set 1 is used \n
1568 * DCAN_IF2_REG - Interface register set 2 is used \n
1569 *
1570 * \return None.
1571 *
1572 **/
1573 void DCANClrIntPnd(unsigned int baseAdd, unsigned int regNum)
1574 {
1575 /* Wait in loop until busy bit is cleared */
1576 while(DCANIFBusyStatusGet(baseAdd, regNum));
1578 /* Clear the IntPnd bit of DCAN_IFMCTL register */
1579 HWREG(baseAdd + DCAN_IFMCTL(regNum)) &= ~(DCAN_IFMCTL_INTPND);
1580 }
1582 /**
1583 * \brief This API will set/clear the NewDat bit of DCAN_IFMCTL register.
1584 *
1585 * \param baseAdd Base Address of the DCAN Module Registers.
1586 * \param newDat Set/Clear NewDat bit.
1587 * \param regNum Interface register set used.
1588 *
1589 * 'newDat' can take the following values \n
1590 * DCAN_NEW_DAT_SET - Set NewDat bit \n
1591 * DCAN_NEW_DAT_CLR - Clear NewDat bit \n
1592 *
1593 * 'regNum' can take the following values \n
1594 * DCAN_IF1_REG - Interface register set 1 is used \n
1595 * DCAN_IF2_REG - Interface register set 2 is used \n
1596 *
1597 * \return None.
1598 *
1599 * \note If TxRqst/NewDat is set by using the API 'DCANCommandRegSet' then
1600 * TxRqst/NewDat will be set to '1' independent of the value set
1601 * using this API.
1602 *
1603 **/
1604 void DCANNewDataControl(unsigned int baseAdd, unsigned int newDat,
1605 unsigned int regNum)
1606 {
1607 /* Clear the NewDat bit of DCAN_IFMCTL register */
1608 HWREG(baseAdd + DCAN_IFMCTL(regNum)) &= ~(DCAN_IFMCTL_NEWDAT);
1610 /* Set the NewDat bit with user sent value */
1611 HWREG(baseAdd + DCAN_IFMCTL(regNum)) |= (newDat & DCAN_IFMCTL_NEWDAT);
1612 }
1614 /**
1615 * \brief This API will control the Acceptance mask feature.
1616 *
1617 * \param baseAdd Base Address of the DCAN Module Registers.
1618 * \param uMask Acceptance mask control.
1619 * \param regNum Interface register set used.
1620 *
1621 * 'uMask' can take the following values \n
1622 * DCAN_MASK_USED - Acceptance mask used \n
1623 * DCAN_MASK_IGNORED - Acceptance mask ignored \n
1624 *
1625 * 'regNum' can take the following values \n
1626 * DCAN_IF1_REG - Interface register set 1 is used \n
1627 * DCAN_IF2_REG - Interface register set 2 is used \n
1628 *
1629 * \return None.
1630 *
1631 **/
1632 void DCANUseAcceptanceMaskControl(unsigned int baseAdd, unsigned int uMask,
1633 unsigned int regNum)
1634 {
1635 /* Clear the UMask bit of DCAN_IFMCTL register */
1636 HWREG(baseAdd + DCAN_IFMCTL(regNum)) &= ~(DCAN_IFMCTL_UMASK);
1638 /* Set the UMask bit of DCAN_IFMCTL register with the user sent value */
1639 HWREG(baseAdd + DCAN_IFMCTL(regNum)) |= (uMask & DCAN_IFMCTL_UMASK);
1640 }
1642 /**
1643 * \brief This API will control the Transmission request feature.
1644 *
1645 * \param baseAdd Base Address of the DCAN Module Registers.
1646 * \param txRqst Transmit request control.
1647 * \param regNum Interface register set used.
1648 *
1649 * 'txRqst' can take the following values \n
1650 * DCAN_TRANSMIT_REQUESTED - Transmission requested \n
1651 * DCAN_TRANSMIT_NOT_REQUESTED - Transmission not requested \n
1652 *
1653 * 'regNum' can take the following values \n
1654 * DCAN_IF1_REG - Interface register set 1 is used \n
1655 * DCAN_IF2_REG - Interface register set 2 is used \n
1656 *
1657 * \return None.
1658 *
1659 * \note If TxRqst/NewDat is set by using the API 'DCANCommandRegSet' then
1660 * TxRqst/NewDat will be set to '1' independent of the value set
1661 * using this API.
1662 *
1663 **/
1664 void DCANTransmitRequestControl(unsigned int baseAdd, unsigned int txRqst,
1665 unsigned int regNum)
1666 {
1667 /* Clear the TxRqst bit of DCAN_IFMCTL register */
1668 HWREG(baseAdd + DCAN_IFMCTL(regNum)) &= ~(DCAN_IFMCTL_TXRQST);
1670 /* Set the TxRqst bit with the user sent value */
1671 HWREG(baseAdd + DCAN_IFMCTL(regNum)) |= (txRqst & DCAN_IFMCTL_TXRQST);
1672 }
1674 #endif /* #if (PLATFORM_DCAN_IN) */
1676 /****************************** END OF FILE ***********************************/