[processor-sdk/performance-audio-sr.git] / pdk_k2g_1_0_1 / packages / ti / board / diag / framework / src / framework_entry.S
1 @******************************************************************************
2 @
3 @ rtc_init.S - Init code routines
4 @
5 @******************************************************************************
6 @
7 @ Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
8 @
9 @
10 @ Redistribution and use in source and binary forms, with or without
11 @ modification, are permitted provided that the following conditions
12 @ are met:
13 @
14 @ Redistributions of source code must retain the above copyright
15 @ notice, this list of conditions and the following disclaimer.
16 @
17 @ Redistributions in binary form must reproduce the above copyright
18 @ notice, this list of conditions and the following disclaimer in the
19 @ documentation and/or other materials provided with the
20 @ distribution.
21 @
22 @ Neither the name of Texas Instruments Incorporated nor the names of
23 @ its contributors may be used to endorse or promote products derived
24 @ from this software without specific prior written permission.
25 @
26 @ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
27 @ "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
28 @ LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
29 @ A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
30 @ OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
31 @ SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
32 @ LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
33 @ DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
34 @ THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
35 @ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
36 @ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37 @
38 @******************************************************************************
40 @****************************** Global Symbols*********************************
41 .global Entry
42 .global _stack
43 .global _bss_start
44 .global _bss_end
45 .global start_boot
46 .global IRQHandler
47 .global FIQHandler
48 .global AbortHandler
49 .global SVC_Handler
50 .global UndefInstHandler
51 .global INTCCommonIntrHandler
53 @************************ Internal Definitions ********************************
54 @
55 @ Define the stack sizes for different modes. The user/system mode will use
56 @ the rest of the total stack size
57 @
58 .set UND_STACK_SIZE, 0x8
59 .set ABT_STACK_SIZE, 0x8
60 .set FIQ_STACK_SIZE, 0x8
61 .set IRQ_STACK_SIZE, 0x1000
62 .set SVC_STACK_SIZE, 0x8
64 @
65 @ to set the mode bits in CPSR for different modes
66 @
67 .set MODE_USR, 0x10
68 .set MODE_FIQ, 0x11
69 .set MODE_IRQ, 0x12
70 .set MODE_SVC, 0x13
71 .set MODE_ABT, 0x17
72 .set MODE_UND, 0x1B
73 .set MODE_SYS, 0x1F
75 .equ I_F_BIT, 0xC0
76 .equ MASK_SVC_NUM, 0x1
78 @**************************** Code Seection ***********************************
79 .text
81 @
82 @ This code is assembled for ARM instructions
83 @
84 .code 32
86 @******************************************************************************
87 @
88 @******************************************************************************
89 @
90 @ The reset handler in StarterWare is named as 'Entry'.
91 @ The reset handler sets up the stack pointers for all the modes. The FIQ and
92 @ IRQ shall be disabled during this. Then clear the BSS sections and finally
93 @ switch to the function calling the main() function.
94 @
95 Entry:
96 @
97 @ Set up the Stack for Undefined mode
98 @
99 LDR r0, =_stack @ Read the stack address
100 MSR cpsr_c, #MODE_UND|I_F_BIT @ switch to undef mode
101 MOV sp,r0 @ write the stack pointer
102 SUB r0, r0, #UND_STACK_SIZE @ give stack space
103 @
104 @ Set up the Stack for abort mode
105 @
106 MSR cpsr_c, #MODE_ABT|I_F_BIT @ Change to abort mode
107 MOV sp, r0 @ write the stack pointer
108 SUB r0,r0, #ABT_STACK_SIZE @ give stack space
109 @
110 @ Set up the Stack for FIQ mode
111 @
112 MSR cpsr_c, #MODE_FIQ|I_F_BIT @ change to FIQ mode
113 MOV sp,r0 @ write the stack pointer
114 SUB r0,r0, #FIQ_STACK_SIZE @ give stack space
115 @
116 @ Set up the Stack for IRQ mode
117 @
118 MSR cpsr_c, #MODE_IRQ|I_F_BIT @ change to IRQ mode
119 MOV sp,r0 @ write the stack pointer
120 SUB r0,r0, #IRQ_STACK_SIZE @ give stack space
121 @
122 @ Set up the Stack for SVC mode
123 @
124 MSR cpsr_c, #MODE_SVC|I_F_BIT @ change to SVC mode
125 MOV sp,r0 @ write the stack pointer
126 SUB r0,r0, #SVC_STACK_SIZE @ give stack space
127 @
128 @ Set up the Stack for USer/System mode
129 @
130 MSR cpsr_c, #MODE_SYS|I_F_BIT @ change to system mode
131 MOV sp,r0 @ write the stack pointer
133 @ Invalidate and Enable Branch Prediction
134 MOV r0, #0
135 MCR p15, #0, r0, c7, c5, #6
136 ISB
137 MRC p15, #0, r0, c1, c0, #0
138 ORR r0, r0, #0x00000800
139 MCR p15, #0, r0, c1, c0, #0
141 @
142 @ Enable Neon/VFP Co-Processor
143 @
144 MRC p15, #0, r1, c1, c0, #2 @ r1 = Access Control Register
145 ORR r1, r1, #(0xf << 20) @ enable full access for p10,11
146 MCR p15, #0, r1, c1, c0, #2 @ Access Control Register = r1
147 MOV r1, #0
148 MCR p15, #0, r1, c7, c5, #4 @ flush prefetch buffer
149 MOV r0,#0x40000000
150 FMXR FPEXC, r0 @ Set Neon/VFP Enable bit
152 @
153 @ Clear the BSS section here
154 @
155 Clear_Bss_Section:
157 LDR r0, =_bss_start @ Start address of BSS
158 LDR r1, =(_bss_end - 0x04) @ End address of BSS
159 MOV r2, #0
160 Loop:
161 STR r2, [r0], #4 @ Clear one word in BSS
162 CMP r0, r1
163 BLE Loop @ Clear till BSS end
165 @
166 @ Enter the start_boot function. The execution still happens in system mode.
167 @
168 @Enter_main:
169 LDR r10,=main
170 MOV lr,pc @ Dummy return from start_boot
171 BX r10 @ Branch to start_boot
172 SUB pc, pc, #0x08 @ looping
174 @******************************************************************************
175 @* Function Definition of SWI Handler
176 @******************************************************************************
177 @
178 @ The SVC Handler switches to system mode if the SVC number is 1. If the
179 @ SVC number is different, no mode switching will be done. No other SVC are
180 @ handled here
181 @
182 SVC_Handler:
183 STMFD r13!, {r0-r1, r14} @ Save context in SVC stack
184 SUB r13, r13, #0x4 @ Adjust the stack pointer
185 LDR r0, [r14, #-4] @ R0 points to SWI instruction
186 BIC r0, r0, #MASK_SVC_NUM @ Get the SWI number
187 CMP r0, #458752
188 MRSEQ r1, spsr @ Copy SPSR
189 ORREQ r1, r1, #0x1F @ Change the mode to System
190 MSREQ spsr_cf, r1 @ Restore SPSR
191 ADD r13, r13, #0x4 @ Adjust the stack pointer
192 LDMFD r13!, {r0-r1, pc}^ @ Restore registers from IRQ stack
194 @******************************************************************************
195 @* Function Definition of IRQ Handler
196 @******************************************************************************
197 @
198 @ The IRQ handler saves the context and jumps to the common handler which calls
199 @ the handlers of highest priority pending IRQ.
200 @
201 IRQHandler:
202 SUB r14, r14, #4 @ Apply lr correction
203 STMFD r13!, {r0-r3, r12, r14} @ Save context
204 MRS r12, spsr @ Copy spsr
205 VMRS r1, FPSCR @ Copy fpscr
206 VMRS r2, FPEXC @ Copy fpexc
207 STMFD r13!, {r1-r2, r12} @ Save spsr, fpscr and fpexc
208 VSTMDB r13!, {d0-d7} @ Save D0-D7 Neon/VFP registers
209 VSTMDB r13!, {d16-d31} @ Save D16-D31 Neon/VFP registers
211 bl INTCCommonIntrHandler
213 VLDMIA r13!, {d16-d31} @ Restore D16-D31 Neon/VFP registers
214 VLDMIA r13!, {d0-d7} @ Restore D0-D7 Neon/VFP registers
215 LDMFD r13!, {r1-r2, r12} @ Get fpscr, fpexc and spsr
216 MSR spsr, r12 @ Restore spsr
217 VMSR fpscr, r1 @ Restore fpscr
218 VMSR fpexc, r2 @ Restore fpexc
220 LDMFD r13!, {r0-r3, r12, pc}^ @ Restore the context and return
222 @******************************************************************************
223 @* Function Definition of FIQ Handler
224 @******************************************************************************
225 @
226 @ FIQ is not supported in this version of software.
227 @
228 FIQHandler:
229 SUBS pc, r14, #0x4 @ Return to program before FIQ
231 @******************************************************************************
232 @* Function Definition of Abort/Undef Handler
233 @******************************************************************************
234 @
235 @ The Abort handler goes to the C handler of abort mode. Note that the undefined
236 @ instruction is not handled separately.
237 @ if nothing is done in the abort mode, the execution enters infinite loop.
238 @
239 AbortHandler:
240 UndefInstHandler:
241 @
242 @ Go to infinite loop.
243 @
244 loop0:
245 B loop0
247 @
248 @ End of the file
249 @
250 .end