[processor-sdk/performance-audio-sr.git] / pdk_k2g_1_0_1 / packages / ti / platform / evmk2g / platform_lib / include / platform_audio.h
1 /*
2 * Copyright (c) 2015, Texas Instruments Incorporated
3 * All rights reserved.
4 *
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19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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32 */
34 /**
35 * \file platform_audio.h
36 *
37 * \brief Platform audio header file.
38 *
39 * This file contains structures, typedefs and function prototypes
40 * for platform audio module.
41 *
42 */
44 #ifndef _PLATFORM_AUDIO_H_
45 #define _PLATFORM_AUDIO_H_
47 /** @defgroup Platform Audio Macros */
48 /*@{*/
50 /** I2C slave address of DAC0 */
51 #define PLATFORM_AUDIO_DAC0_ADDR (0x4C)
52 /** I2C slave address of DAC1 */
53 #define PLATFORM_AUDIO_DAC1_ADDR (0x4D)
55 /** I2C slave address of ADC0 */
56 #define PLATFORM_AUDIO_ADC0_ADDR (0x4A)
57 /** I2C slave address of ADC1 */
58 #define PLATFORM_AUDIO_ADC1_ADDR (0x4B)
60 /** DAC HW instance count */
61 #define PLATFORM_AUDIO_DAC_COUNT (2)
62 /** ADC HW instance count */
63 #define PLATFORM_AUDIO_ADC_COUNT (2)
65 /** GPIO number for DIR RST pin - GPIO port 1 */
66 #define PLATFORM_AUDIO_DIR_RST_GPIO (9)
67 /** GPIO number for DIR AUDIO pin - GPIO port 0 */
68 #define PLATFORM_AUDIO_DIR_AUDIO_GPIO (134)
69 /** GPIO number for DIR EMPH pin - GPIO port 0 */
70 #define PLATFORM_AUDIO_DIR_EMPH_GPIO (135)
71 /** GPIO number for DIR ERROR pin - GPIO port 0 */
72 #define PLATFORM_AUDIO_DIR_ERR_GPIO (136)
73 /** GPIO number for DIR CLKST pin - GPIO port 0 */
74 #define PLATFORM_AUDIO_DIR_CLKST_GPIO (133)
75 /** GPIO number for DIR FSOUT0 pin - GPIO port 0 */
76 #define PLATFORM_AUDIO_DIR_FSOUT0_GPIO (124)
77 /** GPIO number for DIR FSOUT1 pin - GPIO port 0 */
78 #define PLATFORM_AUDIO_DIR_FSOUT1_GPIO (125)
80 /** GPIO number for McASP clock select pin - GPIO port 0 */
81 #define PLATFORM_AUDIO_CLK_SEL_GPIO (132)
82 /** GPIO number for PCM1690_RST pin - GPIO port 1 */
83 #define PLATFORM_AUDIO_PCM1690_RST_GPIO (10)
84 /** GPIO number for McASP clock select# pin - GPIO port 0 */
85 #define PLATFORM_AUDIO_CLK_SELz_GPIO (101)
87 /** PADCONFIG pin number for DIR RST pin - GPIO port 1 */
88 #define PLATFORM_AUDIO_DIR_RST_PADCFG (184)
89 /** PADCONFIG pin number for DIR AUDIO pin - GPIO port 0 */
90 #define PLATFORM_AUDIO_DIR_AUDIO_PADCFG (165)
91 /** PADCONFIG pin number for DIR EMPH pin - GPIO port 0 */
92 #define PLATFORM_AUDIO_DIR_EMPH_PADCFG (166)
93 /** PADCONFIG pin number for DIR ERROR pin - GPIO port 0 */
94 #define PLATFORM_AUDIO_DIR_ERR_PADCFG (167)
95 /** PADCONFIG pin number for DIR CLKST pin - GPIO port 0 */
96 #define PLATFORM_AUDIO_DIR_CLKST_PADCFG (164)
97 /** PADCONFIG pin number for DIR FSOUT0 pin - GPIO port 0 */
98 #define PLATFORM_AUDIO_DIR_FSOUT0_PADCFG (155)
99 /** PADCONFIG pin number for DIR FSOUT1 pin - GPIO port 0 */
100 #define PLATFORM_AUDIO_DIR_FSOUT1_PADCFG (156)
102 /** GPIO number for I2S Header HSR4's ~HMINT pin - GPIO port 0 */
103 #define PLATFORM_AUDIO_HSR_HMINTz_GPIO (105)
105 /** GPIO number for I2S Header HSR4's ~RESET pin - GPIO port 0 */
106 #define PLATFORM_AUDIO_HSR_RESETz_GPIO (104)
108 /*@}*/ /* defgroup */
110 /**
111 * \brief Enum to choose clock source for DAC and ADC
112 */
113 typedef enum _AudioClkSrc
114 {
115 AUDIO_CLK_SRC_DIR = 0,
116 AUDIO_CLK_SRC_I2S,
117 AUDIO_CLK_SRC_OSC
118 } AudioClkSrc;
120 /** @defgroup Platform Audio ADC Enums */
121 /*@{*/
123 /**
124 * \brief Enum to choose HW ADC device
125 */
126 typedef enum _AdcDevId
127 {
128 /** Enables HW ADC device instance 0 for the operation */
129 ADC_DEVICE_0 = 0,
130 /** Enables HW ADC device instance 1 for the operation */
131 ADC_DEVICE_1,
132 /** Enables all the available HW ADC device instances for the operation */
133 ADC_DEVICE_ALL
135 } AdcDevId;
137 /**
138 * \brief Enum to indicate ADC channel number
139 */
140 typedef enum _AdcChanId
141 {
142 /** ADC channel 1 left */
143 ADC_CH1_LEFT = 0,
144 /** ADC channel 1 right */
145 ADC_CH1_RIGHT,
146 /** ADC channel 2 left */
147 ADC_CH2_LEFT,
148 /** ADC channel 2 right */
149 ADC_CH2_RIGHT,
150 /** All the 4 ADC channels */
151 ADC_CH_ALL
153 } AdcChanId;
155 /**
156 * \brief ADC left channel input mux selection
157 */
158 typedef enum _AdcLeftInputMux
159 {
160 /** ADC left channel input disabled */
161 ADC_INL_NONE = 0x0,
162 /** Single ended VINL1 is selected as ADC left input */
163 ADC_INL_SE_VINL1 = 0x1,
164 /** Single ended VINL2 is selected as ADC left input */
165 ADC_INL_SE_VINL2 = 0x2,
166 /** Single ended VINL2 + VINL1 is selected as ADC left input */
167 ADC_INL_SE_VINL2_VINL1 = 0x3,
168 /** Single ended VINL3 is selected as ADC left input */
169 ADC_INL_SE_VINL3 = 0x4,
170 /** Single ended VINL3 + VINL1 is selected as ADC left input */
171 ADC_INL_SE_VINL3_VINL1 = 0x5,
172 /** Single ended VINL3 + VINL2 is selected as ADC left input */
173 ADC_INL_SE_VINL3_VINL2 = 0x6,
174 /** Single ended VINL3 + VINL2 + VINL1 is selected as ADC left input */
175 ADC_INL_SE_VINL3_VINL2_VINL1 = 0x7,
176 /** Single ended VINL4 is selected as ADC left input */
177 ADC_INL_SE_VINL4 = 0x8,
178 /** Single ended VINL4 + VINL1 is selected as ADC left input */
179 ADC_INL_SE_VINL4_VINL1 = 0x9,
180 /** Single ended VINL4 + VINL2 is selected as ADC left input */
181 ADC_INL_SE_VINL4_VINL2 = 0xA,
182 /** Single ended VINL4 + VINL2 + VINL1 is selected as ADC left input */
183 ADC_INL_SE_VINL4_VINL2_VINL1 = 0xB,
184 /** Single ended VINL4 + VINL3 is selected as ADC left input */
185 ADC_INL_SE_VINL4_VINL3 = 0xC,
186 /** Single ended VINL4 + VINL3 + VINL1 is selected as ADC left input */
187 ADC_INL_SE_VINL4_VINL3_VINL1 = 0xD,
188 /** Single ended VINL4 + VINL3 + VINL2 is selected as ADC left input */
189 ADC_INL_SE_VINL4_VINL3_VINL2 = 0xE,
190 /** Single ended VINL4 + VINL3 + VINL2 + VINL1 is selected
191 as ADC left input */
192 ADC_INL_SE_VINL4_VINL3_VINL2_VINL1 = 0xF,
193 /** Differential VIN1P + VIN1M is selected as ADC left input */
194 ADC_INL_DIFF_VIN1P_VIN1M = 0x10,
195 /** Differential VIN4P + VIN4M is selected as ADC left input */
196 ADC_INL_DIFF_VIN4P_VIN4M = 0x20,
197 /** Differential VIN1P + VIN1M + VIN4P + VIN4M is selected
198 as ADC left input */
199 ADC_INL_DIFF_VIN1P_VIN1M_VIN4P_VIN4M = 0x30
201 } AdcLeftInputMux;
203 /**
204 * \brief ADC right channel input mux selection
205 */
206 typedef enum _AdcRightInputMux
207 {
208 /** ADC right channel input disabled */
209 ADC_INR_NONE = 0x0,
210 /** Single ended VINR1 is selected as ADC right input */
211 ADC_INR_SE_VINR1 = 0x1,
212 /** Single ended VINR2 is selected as ADC right input */
213 ADC_INR_SE_VINR2 = 0x2,
214 /** Single ended VINR2 + VINR1 is selected as ADC right input */
215 ADC_INR_SE_VINR2_VINR1 = 0x3,
216 /** Single ended VINR3 is selected as ADC right input */
217 ADC_INR_SE_VINR3 = 0x4,
218 /** Single ended VINR3 + VINR1 is selected as ADC right input */
219 ADC_INR_SE_VINR3_VINR1 = 0x5,
220 /** Single ended VINR3 + VINR2 is selected as ADC right input */
221 ADC_INR_SE_VINR3_VINR2 = 0x6,
222 /** Single ended VINR3 + VINR2 + VINR1 is selected as ADC right input */
223 ADC_INR_SE_VINR3_VINR2_VINR1 = 0x7,
224 /** Single ended VINR4 is selected as ADC right input */
225 ADC_INL_SE_VINR4 = 0x8,
226 /** Single ended VINR4 + VINR1 is selected as ADC right input */
227 ADC_INR_SE_VINR4_VINR1 = 0x9,
228 /** Single ended VINR4 + VINR2 is selected as ADC right input */
229 ADC_INR_SE_VINR4_VINR2 = 0xA,
230 /** Single ended VINR4 + VINR2 + VINR1 is selected as ADC right input */
231 ADC_INR_SE_VINR4_VINR2_VINR1 = 0xB,
232 /** Single ended VINR4 + VINR3 is selected as ADC right input */
233 ADC_INR_SE_VINR4_VINR3 = 0xC,
234 /** Single ended VINR4 + VINR3 + VINR1 is selected as ADC right input */
235 ADC_INR_SE_VINR4_VINR3_VINR1 = 0xD,
236 /** Single ended VINR4 + VINR3 + VINR2 is selected as ADC right input */
237 ADC_INR_SE_VINR4_VINR3_VINR2 = 0xE,
238 /** Single ended VINR4 + VINR3 + VINR2 + VINR1 is selected
239 as ADC right input */
240 ADC_INR_SE_VINR4_VINR3_VINR2_VINR1 = 0xF,
241 /** Differential VIN2P + VIN2M is selected as ADC right input */
242 ADC_INR_DIFF_VIN2P_VIN2M = 0x10,
243 /** Differential VIN4P + VIN4M is selected as ADC right input */
244 ADC_INR_DIFF_VIN3P_VIN3M = 0x20,
245 /** Differential VIN2P + VIN2M + VIN3P + VIN3M is selected
246 as ADC right input */
247 ADC_INR_DIFF_VIN2P_VIN2M_VIN3P_VIN3M = 0x30
249 } AdcRightInputMux;
251 /**
252 * \brief ADC receive PCM word length selection
253 */
254 typedef enum _AdcRxWordLen
255 {
256 /** ADC PCM word length selection for 24 bit */
257 ADC_RX_WLEN_24BIT = 1,
258 /** ADC PCM word length selection for 20 bit */
259 ADC_RX_WLEN_20BIT = 2,
260 /** ADC PCM word length selection for 16 bit */
261 ADC_RX_WLEN_16BIT = 3
263 } AdcRxWordLen;
265 /**
266 * \brief ADC Serial Audio Interface Data Format
267 */
268 typedef enum _AdcDataFormat
269 {
270 /** ADC I2S data format */
271 ADC_DATA_FORMAT_I2S = 0,
272 /** ADC left justified data format */
273 ADC_DATA_FORMAT_LEFTJ,
274 /** ADC right justified data format */
275 ADC_DATA_FORMAT_RIGHTJ,
276 /** ADC TDM/DSP data format */
277 ADC_DATA_FORMAT_TDM_DSP
279 } AdcDataFormat;
281 /**
282 * \brief ADC power state selection
283 */
284 typedef enum _AdcPowerState
285 {
286 /** ADC digital standby state */
287 ADC_POWER_STATE_STANDBY = 0,
288 /** ADC device sleep state */
289 ADC_POWER_STATE_SLEEP,
290 /** ADC Analog Power Down state */
291 ADC_POWER_STATE_POWERDOWN
292 } AdcPowerState;
294 /**
295 * \brief ADC interrupts
296 */
297 typedef enum _AdcIntr
298 {
299 /** Energysense Interrupt */
300 ADC_INTR_ENERGY_SENSE = 0,
301 /** I2S RX DIN toggle Interrupt */
302 ADC_INTR_DIN_TOGGLE,
303 /** DC Level Change Interrupt */
304 ADC_INTR_DC_CHANGE,
305 /** Clock Error Interrupt */
306 ADC_INTR_CLK_ERR,
307 /** Post-PGA Clipping Interrupt */
308 ADC_INTR_POST_PGA_CLIP,
309 /** To controls all the ADC interrupts together */
310 ADC_INTR_ALL
312 } AdcIntr;
314 /**
315 * \brief ADC status read options
316 */
317 typedef enum _AdcStatus
318 {
319 /** Current Power State of the device */
320 ADC_STATUS_POWER_STATE = 0,
321 /** Current Sampling Frequency */
322 ADC_STATUS_SAMPLING_FREQ,
323 /** Current receiving BCK ratio */
324 ADC_STATUS_BCK_RATIO,
325 /** Current SCK Ratio */
326 ADC_STATUS_SCK_RATIO,
327 /** LRCK Halt Status */
328 ADC_STATUS_LRCK_HALT,
329 /** BCK Halt Status */
330 ADC_STATUS_BCK_HALT,
331 /** SCK Halt Status */
332 ADC_STATUS_SCK_HALT,
333 /** LRCK Error Status */
334 ADC_STATUS_LRCK_ERR,
335 /** BCK Error Status */
336 ADC_STATUS_BCK_ERR,
337 /** SCK Error Status */
338 ADC_STATUS_SCK_ERR,
339 /** DVDD Status */
340 ADC_STATUS_DVDD,
341 /** AVDD Status */
342 ADC_STATUS_AVDD,
343 /** Digital LDO Status */
344 ADC_STATUS_LDO
346 } AdcStatus;
348 /**
349 * \brief ADC DSP channel processing configuration
350 */
351 typedef enum _AdcDspChanCfg
352 {
353 /** ADC DSP 4 channel mode processing */
354 ADC_DSP_PROC_4CHAN = 0,
355 /** ADC DSP 2 channel mode processing */
356 ADC_DSP_PROC_2CHAN
358 } AdcDspChanCfg;
360 /**
361 * \brief ADC DSP mixer selection
362 */
363 typedef enum _AdcDspMixNum
364 {
365 /** ADC DSP mixer 1 */
366 ADC_DSP_MIX1 = 0,
367 /** ADC DSP mixer 2 */
368 ADC_DSP_MIX2,
369 /** ADC DSP mixer 3 */
370 ADC_DSP_MIX3,
371 /** ADC DSP mixer 4 */
372 ADC_DSP_MIX4,
373 /** To control all the DSP mixers together */
374 ADC_DSP_ALL
376 } AdcDspMixNum;
378 /**
379 * \brief ADC DSP mixer channel selection
380 */
381 typedef enum _AdcDspMixChan
382 {
383 /** ADC DSP mixer channel 1 left */
384 ADC_DSP_MIXCHAN_CH1L = 0,
385 /** ADC DSP mixer channel 1 right */
386 ADC_DSP_MIXCHAN_CH1R,
387 /** ADC DSP mixer channel 2 left */
388 ADC_DSP_MIXCHAN_CH2L,
389 /** ADC DSP mixer channel 2 right */
390 ADC_DSP_MIXCHAN_CH2R,
391 /** ADC DSP mixer I2S left */
392 ADC_DSP_MIXCHAN_I2SL,
393 /** ADC DSP mixer I2S right */
394 ADC_DSP_MIXCHAN_I2SR,
395 /** To control all the mixer channels together */
396 ADC_DSP_MIXCHAN_ALL
398 } AdcDspMixChan;
400 /*@}*/ /* defgroup */
403 /** @defgroup Platform Audio DAC Enums */
404 /*@{*/
406 /**
407 * \brief Enum to choose HW DAC device
408 */
409 typedef enum _DacDevId
410 {
411 /** Enables HW DAC device instance 0 for the operation */
412 DAC_DEVICE_0 = 0,
413 /** Enables HW DAC device instance 1 for the operation */
414 DAC_DEVICE_1,
415 /** Enables all the available HW DAC device instances for the operation */
416 DAC_DEVICE_ALL
418 } DacDevId;
420 /**
421 * \brief Enum to indicate DAC internal channels
422 */
423 typedef enum _DacChanId
424 {
425 /** DAC internal channel 1 */
426 DAC_CHAN_1 = 0,
427 /** DAC internal channel 2 */
428 DAC_CHAN_2,
429 /** DAC internal channel 3 */
430 DAC_CHAN_3,
431 /** DAC internal channel 4 */
432 DAC_CHAN_4,
433 /** DAC internal channel 5 */
434 DAC_CHAN_5,
435 /** DAC internal channel 6 */
436 DAC_CHAN_6,
437 /** DAC internal channel 7 */
438 DAC_CHAN_7,
439 /** DAC internal channel 8 */
440 DAC_CHAN_8,
441 /** All DAC internal channels */
442 DAC_CHAN_ALL
444 } DacChanId;
446 /**
447 * \brief Enum to indicate DAC internal channel pair
448 */
449 typedef enum _DacChanPair
450 {
451 /** DAC internal channel 1 and 2 pair */
452 DAC_CHANP_1_2 = 0,
453 /** DAC internal channel 3 and 4 pair */
454 DAC_CHANP_3_4,
455 /** DAC internal channel 5 and 6 pair */
456 DAC_CHANP_5_6,
457 /** DAC internal channel 7 and 8 pair */
458 DAC_CHANP_7_8,
459 /** Indicates all DAC internal channel pairs */
460 DAC_CHANP_ALL
462 } DacChanPair;
464 /**
465 * \brief DAC AMUTE control source event selection
466 */
467 typedef enum _DacAmuteCtrl
468 {
469 /** Analog mute control by SCKI lost */
470 DAC_AMUTE_CTRL_SCKI_LOST = 0,
471 /** Analog mute control by asynchronous detect */
472 DAC_AMUTE_CTRL_ASYNC_DETECT,
473 /** Analog mute control by ZERO1 and ZERO2 detect */
474 DAC_AMUTE_CTRL_ZERO_DETECT,
475 /** Analog mute control by DAC disable command */
476 DAC_AMUTE_CTRL_DAC_DISABLE_CMD
478 } DacAmuteCtrl;
480 /**
481 * \brief DAC sampling mode selection
482 */
483 typedef enum _DacSamplingMode
484 {
485 /** Auto sampling mode */
486 DAC_SAMPLING_MODE_AUTO = 0,
487 /** Single rate sampling mode */
488 DAC_SAMPLING_MODE_SINGLE_RATE,
489 /** Dual rate sampling mode */
490 DAC_SAMPLING_MODE_DUAL_RATE,
491 /** Quad rate sampling mode */
492 DAC_SAMPLING_MODE_QUAD_RATE
494 } DacSamplingMode;
496 /**
497 * \brief DAC audio interface data format selection
498 */
499 typedef enum _DacDataFormat
500 {
501 /** 16-/20-/24-/32-bit I2S format */
502 DAC_DATA_FORMAT_I2S = 0,
503 /** 16-/20-/24-/32-bit left-justified format */
504 DAC_DATA_FORMAT_LEFTJ,
505 /** 24-bit right-justified format */
506 DAC_DATA_FORMAT_24BIT_RIGHTJ,
507 /** 16-bit right-justified format */
508 DAC_DATA_FORMAT_16BIT_RIGHTJ,
509 /** 24-bit I2S mode DSP format */
510 DAC_DATA_FORMAT_24BIT_I2S_DSP,
511 /** 24-bit left-justified mode DSP format */
512 DAC_DATA_FORMAT_24BIT_LEFTJ_DSP,
513 /** 24-bit I2S mode TDM format */
514 DAC_DATA_FORMAT_24BIT_I2S_TDM,
515 /** 24-bit left-justified mode TDM format */
516 DAC_DATA_FORMAT_24BIT_LEFTJ_TDM,
517 /** 24-bit high-speed I2S mode TDM format */
518 DAC_DATA_FORMAT_24BIT_HS_I2S_TDM,
519 /** 24-bit high-speed left-justified mode TDM format */
520 DAC_DATA_FORMAT_24BIT_HS_LEFTJ_TDM
522 } DacDataFormat;
524 /**
525 * \brief DAC operation mode selection
526 */
527 typedef enum _DacOpMode
528 {
529 /** DAC normal operation mode */
530 DAC_OPMODE_NORMAL = 0,
531 /** DAC disabled mode */
532 DAC_OPMODE_DISABLED
534 } DacOpMode;
536 /**
537 * \brief DAC digital filter roll-off selection
538 */
539 typedef enum _DacFilterRolloff
540 {
541 /** Sharp roll-off for digital filter */
542 DAC_FILTER_SHARP_ROLLOFF = 0,
543 /** Slow roll-off for digital filter */
544 DAC_FILTER_SLOW_ROLLOFF
546 } DacFilterRolloff;
548 /**
549 * \brief DAC analog signal output phase selection
550 */
551 typedef enum _DacOutputPhase
552 {
553 /** Normal phase of DAC analog signal output */
554 DAC_OUTPUT_PHASE_NORMAL = 0,
555 /** Inverted phase of DAC analog signal output */
556 DAC_OUTPUT_PHASE_INVERTED
558 } DacOutputPhase;
560 /**
561 * \brief DAC digital attenuation mode control selection
562 */
563 typedef enum _DacAttnMode
564 {
565 /** Fine step attenuation mode : 0.5-dB step for 0 dB to \9663 dB range */
566 DAC_ATTENUATION_FINE_STEP = 0,
567 /** Wide range attenuation mode : 1-dB step for 0 dB to \96100 dB range */
568 DAC_ATTENUATION_WIDE_RANGE
570 } DacAttnMode;
572 /**
573 * \brief DAC Digital de-emphasis function/sampling rate control selection
574 */
575 typedef enum _DacDeempCtrl
576 {
577 /** Digital de-emphasis disabled */
578 DAC_DEEMP_DISABLE = 0,
579 /** Digital de-emphasis 48KHz enabled */
580 DAC_DEEMP_48KHZ,
581 /** Digital de-emphasis 44KHz enabled */
582 DAC_DEEMP_44KHZ,
583 /** Digital de-emphasis 32KHz enabled */
584 DAC_DEEMP_32KHZ
586 } DacDeempCtrl;
589 /*@}*/ /* defgroup */
592 /** @defgroup Platform Audio Common Functions */
593 /*@{*/
595 /**
596 * \brief Initializes Audio module
597 *
598 * This function configures the system level setup required for
599 * operation of the modules that are available on audio daughter card.
600 * This function shall be called before calling any other platform
601 * audio module functions.
602 *
603 * \return Platform_EOK on Success or error code
604 */
605 Platform_STATUS platformAudioInit(void);
607 /**
608 * \brief Resets audio DAC
609 *
610 * This function toggles the GPIO signal connected to RST pin
611 * of DAC module to generate DAC reset.
612 *
613 * \return Platform_EOK on Success or error code
614 */
615 Platform_STATUS platformAudioResetDac(void);
617 /**
618 * \brief Configures audio clock source
619 *
620 * McASP can receive clock from DIR module on daughter card or external
621 * I2S device to operate DAC and ADC modules. This function configures
622 * which clock source to use (DIR or I2S) for DAC and ADC operation
623 *
624 * \param clkSrc [IN] Clock source selection
625 *
626 * \return Platform_EOK on Success or error code
627 */
628 Platform_STATUS platformAudioSelectClkSrc(AudioClkSrc clkSrc);
630 /*@}*/ /* defgroup */
633 /** @defgroup Platform Audio ADC Functions */
634 /*@{*/
636 /**
637 * \brief Initializes ADC module
638 *
639 * This function configures the system level setup required for ADC
640 * operation and initializes the ADC module with default values.
641 * This function should be called before calling any other ADC functions.
642 *
643 * After executing this function, ADC module will be ready for audio
644 * processing with default configuration. Default ADC configurations
645 * can be changed using the other ADC APIs if required.
646 *
647 * \param devId [IN] Device ID of ADC HW instance
648 * Use 'ADC_DEVICE_ALL' to initialize
649 * all the ADC devices available.
650 *
651 * \return Platform_EOK on Success or error code
652 */
653 Platform_STATUS platformAudioAdcInit(AdcDevId devId);
655 /**
656 * \brief Resets ADC module
657 *
658 * This function resets all the ADC module registers to their
659 * HW default values.
660 *
661 * \param devId [IN] Device ID of ADC HW instance
662 * Use 'ADC_DEVICE_ALL' to reset
663 * all the ADC devices available.
664 *
665 * \return Platform_EOK on Success or error code
666 */
667 Platform_STATUS platformAudioAdcReset(AdcDevId devId);
669 /**
670 * \brief Configures ADC gain value
671 *
672 * Range of the gain is exposed as percentage by this API. Gain
673 * is indicated as percentage of maximum gain ranging from 0 to 100.
674 * 0 indicates minimum gain and 100 indicates maximum gain.
675 *
676 * \param devId [IN] Device ID of ADC HW instance
677 * Use 'ADC_DEVICE_ALL' to apply the configuration
678 * for all the ADC devices available.
679 *
680 * \param chanId [IN] Internal ADC channel Id
681 * Use ADC_CH_ALL to set gain for all the
682 * ADC channels
683 *
684 * \param gain [IN] Gain value; 0 to 100
685 *
686 * \return Platform_EOK on Success or error code
687 */
688 Platform_STATUS platformAudioAdcSetGain(AdcDevId devId,
689 AdcChanId chanId,
690 uint8_t gain);
692 /**
693 * \brief Configures ADC analog input selection for left channel
694 *
695 * Default input selection of ADC left channels can be modified using
696 * this function.
697 *
698 * Default input selection for ADC left channels is listed below
699 * CH1 LEFT - VINL1
700 * CH2 LEFT - VINL2
701 *
702 * \param devId [IN] Device ID of ADC HW instance
703 * Use 'ADC_DEVICE_ALL' to apply the configuration
704 * for all the ADC devices available.
705 *
706 * \param chanId [IN] Internal ADC channel Id
707 * ADC_CH1_LEFT - Input selection for channel 1 left
708 * ADC_CH2_LEFT - Input selection for channel 2 left
709 *
710 * \param inputMux [IN] Input mux configuration
711 *
712 * \return Platform_EOK on Success or error code
713 */
714 Platform_STATUS platformAudioAdcSetLeftInputMux(AdcDevId devId,
715 AdcChanId chanId,
716 AdcLeftInputMux inputMux);
718 /**
719 * \brief Configures ADC analog input selection for right channel
720 *
721 * Default input selection of ADC right channels can be modified using
722 * this function
723 *
724 * Default input selection for ADC right channels is shown below
725 * CH1 RIGHT - VINR1
726 * CH2_RIGHT - VINR2
727 *
728 * \param devId [IN] Device ID of ADC HW instance
729 * Use 'ADC_DEVICE_ALL' to apply the configuration
730 * for all the ADC devices available.
731 *
732 * \param chanId [IN] Internal ADC channel Id
733 * ADC_CH1_RIGHT - Input selection for channel 1 right
734 * ADC_CH2_RIGHT - Input selection for channel 2 right
735 *
736 * \param inputMux [IN] Input mux configuration
737 *
738 * \return Platform_EOK on Success or error code
739 */
740 Platform_STATUS platformAudioAdcSetRightInputMux(AdcDevId devId,
741 AdcChanId chanId,
742 AdcRightInputMux inputMux);
744 /**
745 * \brief ADC audio interface data configuration
746 *
747 * This function configures serial audio interface data format and
748 * receive PCM word length for ADC
749 *
750 * \param devId [IN] Device ID of ADC HW instance
751 * Use 'ADC_DEVICE_ALL' to apply the configuration
752 * for all the ADC devices available.
753 *
754 * \param wLen [IN] ADC data word length
755 *
756 * \param format [IN] Audio data format
757 *
758 * \return Platform_EOK on Success or error code
759 */
760 Platform_STATUS platformAudioAdcDataConfig(AdcDevId devId,
761 AdcRxWordLen wLen,
762 AdcDataFormat format);
764 /**
765 * \brief Enables/Disables ADC channel mute
766 *
767 * This function configures mute functionality of each ADC channel
768 *
769 * \param devId [IN] Device ID of ADC HW instance
770 * Use 'ADC_DEVICE_ALL' to apply the configuration
771 * for all the ADC devices available.
772 *
773 * \param chanId [IN] Internal ADC channel Id
774 * Use ADC_CH_ALL to apply mute configuration for
775 * all the ADC channels
776 *
777 * \param muteEnable [IN] Flag to configure mute
778 * 1 - Mute ADC channel
779 * 0 - Unmute ADC channel
780 *
781 * \return Platform_EOK on Success or error code
782 */
783 Platform_STATUS platformAudioAdcMuteCtrl(AdcDevId devId,
784 AdcChanId chanId,
785 uint8_t muteEnable);
787 /**
788 * \brief Configures ADC MIC bias
789 *
790 * This function enables/disables MIC bias for analog MIC input
791 *
792 * \param devId [IN] Device ID of ADC HW instance
793 * Use 'ADC_DEVICE_ALL' to apply the configuration
794 * for all the ADC devices available.
795 *
796 * \param micBiasEnable [IN] Mic Bias enable flag
797 * 1 - Enable MIC Bias
798 * 0 - Disable MIC Bias
799 *
800 * \return Platform_EOK on Success or error code
801 */
802 Platform_STATUS platformAudioAdcMicBiasCtrl(AdcDevId devId,
803 uint8_t micBiasEnable);
805 /**
806 * \brief Configures ADC power state
807 *
808 * This function enables/disables different power modes supported by ADC
809 *
810 * \param devId [IN] Device ID of ADC HW instance
811 * Use 'ADC_DEVICE_ALL' to apply the configuration
812 * for all the ADC devices available.
813 *
814 * \param powState [IN] ADC power state to configure
815 *
816 * \param stateEnable [IN] Power state enable flag
817 * 1 - Enables the power state
818 * 0 - Disables the power state
819 *
820 * \return Platform_EOK on Success or error code
821 */
822 Platform_STATUS platformAudioAdcConfigPowState(AdcDevId devId,
823 AdcPowerState powState,
824 uint8_t stateEnable);
826 /**
827 * \brief Configures ADC interrupts
828 *
829 * This function enables/disables different interrupts supported by ADC
830 *
831 * \param devId [IN] Device ID of ADC HW instance
832 * Use 'ADC_DEVICE_ALL' to apply the configuration
833 * for all the ADC devices available.
834 *
835 * \param intId [IN] Interrupt Id to configure
836 * Use to 'ADC_INTR_ALL' to configure all the
837 * interrupts together
838 *
839 * \param intEnable [IN] Interrupt enable flag
840 * 1 - Enables the interrupt
841 * 0 - Disables the interrupt
842 *
843 * \return Platform_EOK on Success or error code
844 */
845 Platform_STATUS platformAudioAdcConfigIntr(AdcDevId devId,
846 AdcIntr intId,
847 uint8_t intEnable);
849 /**
850 * \brief Reads ADC interrupt status
851 *
852 * This function reads the status of different interrupts supported by ADC
853 *
854 * \param devId [IN] Device ID of ADC HW instance
855 *
856 * \param intId [IN] Interrupt Id to read the status
857 * Use to 'ADC_INTR_ALL' to read status of all the
858 * interrupts together
859 *
860 * \return Interrupt status
861 * 1 - Interrupt occurred
862 * 0 - No interrupt occurred
863 */
864 uint8_t platformAudioAdcGetIntrStatus(AdcDevId devId,
865 AdcIntr intId);
867 /**
868 * \brief Reads ADC status bits
869 *
870 * This function reads the value of different status functions supported
871 * by ADC module (excluding interrupts).
872 *
873 * \param devId [IN] Device ID of ADC HW instance
874 *
875 * \param status [IN] Status function of which status to be read
876 *
877 * \return Value of status function
878 *
879 */
880 uint8_t platformAudioAdcGetStatus(AdcDevId devId,
881 AdcStatus status);
883 /**
884 * \brief ADC DSP channel configuration control
885 *
886 * This function configures the DSP module processing channels
887 * supported by ADC
888 *
889 * \param devId [IN] Device ID of ADC HW instance
890 * Use 'ADC_DEVICE_ALL' to apply the configuration
891 * for all the ADC devices available.
892 *
893 * \param chanCfg [IN] DSP channel configuration
894 *
895 * \return Platform_EOK on Success or error code
896 *
897 */
898 Platform_STATUS platformAudioAdcDspCtrl(AdcDevId devId,
899 AdcDspChanCfg chanCfg);
901 /**
902 * \brief Programs ADC DSP coefficients
903 *
904 * ADC module supports an internal DSP which performs additional audio
905 * processing operations like mixing, LPF/HPF etc.
906 * DSP coefficients can be programmed by this function.
907 *
908 * \param devId [IN] Device ID of ADC HW instance
909 * Use 'ADC_DEVICE_ALL' to apply the configuration
910 * for all the ADC devices available.
911 *
912 * \param coeffRegAddr [IN] Address of DSP coefficient register
913 *
914 * \param dspCoeff [IN] Value of DSP coefficient
915 * Lower 24 bits are written to DSP coeff register
916 *
917 * \return Platform_EOK on Success or error code
918 *
919 */
920 Platform_STATUS platformAudioAdcProgDspCoeff(AdcDevId devId,
921 uint8_t coeffRegAddr,
922 uint32_t dspCoeff);
924 /**
925 * \brief Displays ADC register programmed values
926 *
927 * This function is provided for debug purpose to read the value
928 * of ADC registers. Values read from the ADC registers will be displayed
929 * in CCS output window or serial terminal based on the system level
930 * configuration for debug messages.
931 *
932 * \param devId [IN] Device ID of ADC HW instance
933 * Use 'ADC_DEVICE_ALL' to read the register values
934 * for all the ADC devices available.
935 *
936 * \return Platform_EOK on Success or error code
937 */
938 Platform_STATUS platformAudioAdcGetRegDump(AdcDevId devId);
941 /*@}*/ /* defgroup */
944 /** @defgroup Platform Audio DAC Functions */
945 /*@{*/
947 /**
948 * \brief Initializes DAC module
949 *
950 * This function configures the system level setup required for DAC
951 * operation and initializes the DAC module with default values.
952 * This function should be called before calling any other DAC functions.
953 *
954 * After executing this function, DAC module should be ready for audio
955 * processing with default configuration. Default DAC configurations
956 * can be changed using the other DAC APIs if required.
957 *
958 * \param devId [IN] Device ID of DAC HW instance
959 * Use 'DAC_DEVICE_ALL' to initialize
960 * all the DAC devices available.
961 *
962 * \return Platform_EOK on Success or error code
963 */
964 Platform_STATUS platformAudioDacInit(DacDevId devId);
966 /**
967 * \brief Resets DAC module
968 *
969 * Resetting the DAC module restarts the re-synchronization between
970 * system clock and sampling clock, and DAC operation.
971 *
972 * \param devId [IN] Device ID of DAC HW instance
973 * Use 'DAC_DEVICE_ALL' to reset
974 * all the DAC devices available.
975 *
976 * \return Platform_EOK on Success or error code
977 */
978 Platform_STATUS platformAudioDacReset(DacDevId devId);
980 /**
981 * \brief Configures DAC Analog mute control
982 *
983 * DAC module supports AMUTE functionality which causes the DAC output
984 * to cut-off from the digital input upon the occurrence of any events
985 * which are configured by AMUTE control.
986 *
987 * \param devId [IN] Device ID of DAC HW instance
988 * Use 'DAC_DEVICE_ALL' to apply the configuration
989 * for all the DAC devices available.
990 *
991 * \param muteCtrl [IN] Analog mute control event
992 *
993 * \param muteEnable [IN] Flag to configure AMUTE for given control event
994 * 1 - Enable AMUTE control
995 * 0 - Disable AMUTE control
996 *
997 * \return Platform_EOK on Success or error code
998 */
999 Platform_STATUS platformAudioDacAmuteCtrl(DacDevId devId,
1000 DacAmuteCtrl muteCtrl,
1001 uint8_t muteEnable);
1003 /**
1004 * \brief Configures DAC Audio sampling mode
1005 *
1006 * By default DAC module sampling mode is configured for auto mode.
1007 * In Auto mode, the sampling mode is automatically set according to multiples
1008 * between the system clock and sampling clock. Single rate for 512 fS, 768 fS,
1009 * and 1152 fS, dual rate for 256 fS or 384 fS, and quad rate for 128 fS
1010 * and 192 fS. Setting the sampling mode is required only if auto mode
1011 * configurations are not suitable for the application.
1012 *
1013 * \param devId [IN] Device ID of DAC HW instance
1014 * Use 'DAC_DEVICE_ALL' to apply the configuration
1015 * for all the DAC devices available.
1016 *
1017 * \param samplingMode [IN] DAC audio sampling mode
1018 *
1019 * \return Platform_EOK on Success or error code
1020 */
1021 Platform_STATUS platformAudioDacSetSamplingMode(DacDevId devId,
1022 DacSamplingMode samplingMode);
1024 /**
1025 * \brief Configures DAC Audio interface data format
1026 *
1027 * \param devId [IN] Device ID of DAC HW instance
1028 * Use 'DAC_DEVICE_ALL' to apply the configuration
1029 * for all the DAC devices available.
1030 *
1031 * \param dataFormat [IN] DAC audio data format
1032 *
1033 * \return Platform_EOK on Success or error code
1034 */
1035 Platform_STATUS platformAudioDacSetDataFormat(DacDevId devId,
1036 DacDataFormat dataFormat);
1038 /**
1039 * \brief Configures DAC operation mode
1040 *
1041 * This function configures a particular DAC channel pair to be operating
1042 * normal or disabled.
1043 *
1044 * \param devId [IN] Device ID of DAC HW instance
1045 * Use 'DAC_DEVICE_ALL' to apply the configuration
1046 * for all the DAC devices available.
1047 *
1048 * \param chanPair [IN] Internal DAC channel pair
1049 * Use DAC_CHANP_1_2 to DAC_CHANP_7_8 for
1050 * individual DAC channel pair configuration
1051 * Use DAC_CHANP_ALL to set operation mode
1052 * for all DAC channels
1053 *
1054 * \param opMode [IN] DAC operation mode
1055 *
1056 * \return Platform_EOK on Success or error code
1057 */
1058 Platform_STATUS platformAudioDacSetOpMode(DacDevId devId,
1059 DacChanPair chanPair,
1060 DacOpMode opMode);
1062 /**
1063 * \brief Configures DAC filter roll-off
1064 *
1065 * \param devId [IN] Device ID of DAC HW instance
1066 * Use 'DAC_DEVICE_ALL' to apply the configuration
1067 * for all the DAC devices available.
1068 *
1069 * \param chanPair [IN] Internal DAC channel pair
1070 * Use macros DAC_CHANP_1_2 to DAC_CHANP_7_8 for
1071 * individual DAC channel pair configuration
1072 * Use macro DAC_CHANP_ALL to set filter roll-off
1073 * for all DAC channels
1074 *
1075 * \param rolloff [IN] Roll-off configuration
1076 *
1077 * \return Platform_EOK on Success or error code
1078 */
1079 Platform_STATUS platformAudioDacSetFilterRolloff(DacDevId devId,
1080 DacChanPair chanPair,
1081 DacFilterRolloff rolloff);
1083 /**
1084 * \brief Configures phase of the DAC analog signal outputs
1085 *
1086 * \param devId [IN] Device ID of DAC HW instance
1087 * Use 'DAC_DEVICE_ALL' to apply the configuration
1088 * for all the DAC devices available.
1089 *
1090 * \param chanId [IN] Internal DAC channel Id
1091 * Use DAC_CHAN_1 to DAC_CHAN_8 for individual
1092 * DAC channel configuration
1093 * Use DAC_CHAN_ALL to set output phase for all
1094 * DAC channels
1095 *
1096 * \param outPhase [IN] Mute enable flag
1097 * 0 for unmute and 1 for mute
1098 *
1099 * \return Platform_EOK on Success or error code
1100 */
1101 Platform_STATUS platformAudioDacSetOutputPhase(DacDevId devId,
1102 DacChanId chanId,
1103 DacOutputPhase outPhase);
1105 /**
1106 * \brief Soft mute function control
1107 *
1108 * The Soft mute function allows mute/unmute of DAC output in gradual steps.
1109 * This configuration reduces pop and zipper noise during muting of the
1110 * DAC output.
1111 *
1112 * \param devId [IN] Device ID of DAC HW instance
1113 * Use 'DAC_DEVICE_ALL' to apply the configuration
1114 * for all the DAC devices available.
1115 *
1116 * \param chanId [IN] Internal DAC channel Id
1117 * Use macros DAC_CHAN_1 to DAC_CHAN_8 for individual
1118 * DAC channel configuration
1119 * Use macro DAC_CHAN_ALL to mute/unmute all DAC
1120 * channels
1121 *
1122 * \param muteEnable [IN] Mute enable flag
1123 * 0 for unmute and 1 for mute
1124 *
1125 * \return Platform_EOK on Success or error code
1126 */
1127 Platform_STATUS platformAudioDacSoftMuteCtrl(DacDevId devId,
1128 DacChanId chanId,
1129 uint8_t muteEnable);
1131 /**
1132 * \brief Sets attenuation mode
1133 *
1134 * DAC module supports two types of volume/attenuation dB range
1135 * which can be changed by setting attenuation mode. Volume range and fine
1136 * tuning will change based on the attenuation mode.
1137 *
1138 * \param devId [IN] Device ID of DAC HW instance
1139 * Use 'DAC_DEVICE_ALL' to apply the configuration
1140 * for all the DAC devices available.
1141 *
1142 * \param attnMode [IN] Attenuation mode
1143 *
1144 * \return Platform_EOK on Success or error code
1145 */
1146 Platform_STATUS platformAudioDacSetAttnMode(DacDevId devId,
1147 DacAttnMode attnMode);
1149 /**
1150 * \brief Function to control digital de-emphasis functionality
1151 *
1152 * Disables/Enables the various sampling frequencies of the digital
1153 * de-emphasis function.
1154 *
1155 * \param devId [IN] Device ID of DAC HW instance
1156 * Use 'DAC_DEVICE_ALL' to apply the configuration
1157 * for all the DAC devices available.
1158 *
1159 * \param deempCtrl [IN] De-emphasis control options
1160 *
1161 * \return Platform_EOK on Success or error code
1162 */
1163 Platform_STATUS platformAudioDacDeempCtrl(DacDevId devId,
1164 DacDeempCtrl deempCtrl);
1166 /**
1167 * \brief Configures DAC volume/attenuation
1168 *
1169 * Range of the volume is exposed as percentage by this API. Volume
1170 * is indicated as percentage of maximum value ranging from 0 to 100.
1171 * 0 to mute the volume and 100 to set maximum volume
1172 *
1173 * DAC module supports two types of volume/attenuation dB range
1174 * which can be changed using platformAudioDacSetAttnMode().
1175 * Volume range and fine tuning will change based on the attenuation mode.
1176 *
1177 * \param devId [IN] Device ID of DAC HW instance
1178 * Use 'DAC_DEVICE_ALL' to apply the configuration
1179 * for all the DAC devices available.
1180 *
1181 * \param chanId [IN] Internal DAC channel Id
1182 * Use DAC_CHAN_1 to DAC_CHAN_8 for individual
1183 * DAC channel configuration
1184 * Use DAC_CHAN_ALL to mute/unmute all DAC
1185 * channels
1186 *
1187 * \param volume [IN] Volume in percentage; 0 to 100
1188 *
1189 * \return Platform_EOK on Success or error code
1190 */
1191 Platform_STATUS platformAudioDacSetVolume(DacDevId devId,
1192 DacChanId chanId,
1193 uint8_t volume);
1195 /**
1196 * \brief Configures DAC power-save mode
1197 *
1198 * \param devId [IN] Device ID of DAC HW instance
1199 * Use 'DAC_DEVICE_ALL' to apply the configuration
1200 * for all the DAC devices available.
1201 *
1202 * \param PowerMode [IN] Power-save mode control
1203 * 0 - Enable power-save mode
1204 * 1 - Disable power-save mode
1205 *
1206 * \return Platform_EOK on Success or error code
1207 */
1208 Platform_STATUS platformAudioDacSetPowerMode(DacDevId devId,
1209 uint8_t PowerMode);
1211 /**
1212 * \brief Displays DAC register programmed values
1213 *
1214 * This function is provided for debug purpose to read the value
1215 * of DAC registers. Values read from the DAC registers will be displayed
1216 * in CCS output window or serial terminal based on the system level
1217 * configuration for debug messages.
1218 *
1219 * \param devId [IN] Device ID of DAC HW instance
1220 * Use 'DAC_DEVICE_ALL' to apply the configuration
1221 * for all the DAC devices available.
1222 *
1223 * \return Platform_EOK on Success or error code
1224 */
1225 Platform_STATUS platformAudioDacGetRegDump(DacDevId devId);
1227 /*@}*/ /* defgroup */
1230 /** @defgroup Platform Audio DIR Functions */
1231 /*@{*/
1233 /**
1234 * \brief Initializes DIR module
1235 *
1236 * Configures GPIOs and other settings required for DIR module operation.
1237 * This function should be called before calling any other DIR functions.
1238 *
1239 * \return Platform_EOK on Success or error code
1240 *
1241 */
1242 Platform_STATUS platformAudioDirInit(void);
1244 /**
1245 * \brief Resets DIR module
1246 *
1247 * \return Platform_EOK on Success or error code
1248 *
1249 */
1250 Platform_STATUS platformAudioDirReset(void);
1252 /**
1253 * \brief Reads AUDIO output status value of the DIR
1254 *
1255 * DIR AUDIO output pin gives the audio sample word information
1256 * of the channel-status data bit 1
1257 *
1258 * \return AUDIO pin output with below possible values
1259 * \n 0 - Audio sample word represents linear PCM samples
1260 * \n 1 - Audio sample word is used for other purposes
1261 */
1262 int8_t platformAudioDirGetAudioStatus(void);
1264 /**
1265 * \brief Reads EMPH output status value of the DIR
1266 *
1267 * DIR EMPH output pin gives the emphasis information of the
1268 * channel-status data bit 3.
1269 *
1270 * \return EMPH pin output with below possible values
1271 * \n 0 - Two audio channels without pre-emphasis
1272 * \n 1 - Two audio channels with 50 ms / 15 ms pre-emphasis
1273 */
1274 int8_t platformAudioDirGetEmphStatus(void);
1276 /**
1277 * \brief Reads ERROR pin status value of the DIR
1278 *
1279 * DIR ERROR output pin gives the error state of data and parity errors.
1280 *
1281 * \return EMPH pin output with below possible values
1282 * \n 0 - Lock state of PLL and nondetection of parity error
1283 * \n 1 - Unlock state of PLL or detection of parity error
1284 */
1285 int8_t platformAudioDirGetErrStatus(void);
1287 /**
1288 * \brief Reads CLKST pin status value of the DIR
1289 *
1290 * DIR CLKST pin outputs the PLL status change between LOCK and UNLOCK.
1291 * The CLKST output pulse depends only on the status change of the PLL.
1292 *
1293 * \return EMPH pin output with below possible values
1294 * \n 0 - Lock state of PLL and nondetection of parity error
1295 * \n 1 - Unlock state of PLL or detection of parity error
1296 */
1297 int8_t platformAudioDirGetClkStatus(void);
1299 /**
1300 * \brief Reads FSOUT[1:0] output status value of the DIR
1301 *
1302 * The DIR module calculates the actual sampling frequency of the
1303 * biphase input signal and outputs its result through FSOUT[1:0] pins.
1304 *
1305 * \return FSOUT pin output with below possible values
1306 * \n 0 - Calculated Sampling Frequency Output is 43 kHz\9645.2 kHz
1307 * \n 1 - Calculated Sampling Frequency Output is 46.8 kHz\9649.2 kHz
1308 * \n 2 - Out of range or PLL unlocked
1309 * \n 3 - Calculated Sampling Frequency Output is 31.2 kHz\9632.8 kHz
1310 */
1311 int8_t platformAudioDirGetFsOut(void);
1313 /*@}*/ /* defgroup */
1315 #endif /* _PLATFORM_AUDIO_H_ */
1317 /* Nothing past this point */