fdd3914935845204dd633be2fd2e82ddfd27221b
[processor-sdk/performance-audio-sr.git] / pdk_k2g_1_0_1 / packages / ti / platform / evmk2g / platform_lib / include / platform_audio.h
1 /*
2 * Copyright (c) 2015, Texas Instruments Incorporated
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * * Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 *
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * * Neither the name of Texas Instruments Incorporated nor the names of
17 * its contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
22 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
24 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
25 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
26 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
27 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
28 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
29 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
30 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 */
34 /**
35 * \file platform_audio.h
36 *
37 * \brief Platform audio header file.
38 *
39 * This file contains structures, typedefs and function prototypes
40 * for platform audio module.
41 *
42 */
44 #ifndef _PLATFORM_AUDIO_H_
45 #define _PLATFORM_AUDIO_H_
47 /** @defgroup Platform Audio Macros */
48 /*@{*/
50 /** I2C slave address of DAC0 */
51 #define PLATFORM_AUDIO_DAC0_ADDR (0x4C)
52 /** I2C slave address of DAC1 */
53 #define PLATFORM_AUDIO_DAC1_ADDR (0x4D)
55 /** I2C slave address of ADC0 */
56 #define PLATFORM_AUDIO_ADC0_ADDR (0x4A)
57 /** I2C slave address of ADC1 */
58 #define PLATFORM_AUDIO_ADC1_ADDR (0x4B)
60 /** DAC HW instance count */
61 #define PLATFORM_AUDIO_DAC_COUNT (2)
62 /** ADC HW instance count */
63 #define PLATFORM_AUDIO_ADC_COUNT (2)
65 /** GPIO number for DIR RST pin - GPIO port 1 */
66 #define PLATFORM_AUDIO_DIR_RST_GPIO (9)
67 /** GPIO number for DIR AUDIO pin - GPIO port 0 */
68 #define PLATFORM_AUDIO_DIR_AUDIO_GPIO (134)
69 /** GPIO number for DIR EMPH pin - GPIO port 0 */
70 #define PLATFORM_AUDIO_DIR_EMPH_GPIO (135)
71 /** GPIO number for DIR ERROR pin - GPIO port 0 */
72 #define PLATFORM_AUDIO_DIR_ERR_GPIO (136)
73 /** GPIO number for DIR CLKST pin - GPIO port 0 */
74 #define PLATFORM_AUDIO_DIR_CLKST_GPIO (133)
75 /** GPIO number for DIR FSOUT0 pin - GPIO port 0 */
76 #define PLATFORM_AUDIO_DIR_FSOUT0_GPIO (124)
77 /** GPIO number for DIR FSOUT1 pin - GPIO port 0 */
78 #define PLATFORM_AUDIO_DIR_FSOUT1_GPIO (125)
80 /** GPIO number for McASP clock select pin - GPIO port 0 */
81 #define PLATFORM_AUDIO_CLK_SEL_GPIO (132)
82 /** GPIO number for PCM1690_RST pin - GPIO port 1 */
83 #define PLATFORM_AUDIO_PCM1690_RST_GPIO (10)
84 /** GPIO number for McASP clock select# pin - GPIO port 0 */
85 #define PLATFORM_AUDIO_CLK_SELz_GPIO (101)
87 /** PADCONFIG pin number for DIR RST pin - GPIO port 1 */
88 #define PLATFORM_AUDIO_DIR_RST_PADCFG (184)
89 /** PADCONFIG pin number for DIR AUDIO pin - GPIO port 0 */
90 #define PLATFORM_AUDIO_DIR_AUDIO_PADCFG (165)
91 /** PADCONFIG pin number for DIR EMPH pin - GPIO port 0 */
92 #define PLATFORM_AUDIO_DIR_EMPH_PADCFG (166)
93 /** PADCONFIG pin number for DIR ERROR pin - GPIO port 0 */
94 #define PLATFORM_AUDIO_DIR_ERR_PADCFG (167)
95 /** PADCONFIG pin number for DIR CLKST pin - GPIO port 0 */
96 #define PLATFORM_AUDIO_DIR_CLKST_PADCFG (164)
97 /** PADCONFIG pin number for DIR FSOUT0 pin - GPIO port 0 */
98 #define PLATFORM_AUDIO_DIR_FSOUT0_PADCFG (155)
99 /** PADCONFIG pin number for DIR FSOUT1 pin - GPIO port 0 */
100 #define PLATFORM_AUDIO_DIR_FSOUT1_PADCFG (156)
102 /** GPIO number for I2S Header HSR4's ~HMINT pin - GPIO port 0 */
103 #define PLATFORM_AUDIO_HSR_HMINTz_GPIO (105)
105 /*@}*/ /* defgroup */
107 /**
108 * \brief Enum to choose clock source for DAC and ADC
109 */
110 typedef enum _AudioClkSrc
111 {
112 AUDIO_CLK_SRC_DIR = 0,
113 AUDIO_CLK_SRC_I2S,
114 AUDIO_CLK_SRC_OSC
115 } AudioClkSrc;
117 /** @defgroup Platform Audio ADC Enums */
118 /*@{*/
120 /**
121 * \brief Enum to choose HW ADC device
122 */
123 typedef enum _AdcDevId
124 {
125 /** Enables HW ADC device instance 0 for the operation */
126 ADC_DEVICE_0 = 0,
127 /** Enables HW ADC device instance 1 for the operation */
128 ADC_DEVICE_1,
129 /** Enables all the available HW ADC device instances for the operation */
130 ADC_DEVICE_ALL
132 } AdcDevId;
134 /**
135 * \brief Enum to indicate ADC channel number
136 */
137 typedef enum _AdcChanId
138 {
139 /** ADC channel 1 left */
140 ADC_CH1_LEFT = 0,
141 /** ADC channel 1 right */
142 ADC_CH1_RIGHT,
143 /** ADC channel 2 left */
144 ADC_CH2_LEFT,
145 /** ADC channel 2 right */
146 ADC_CH2_RIGHT,
147 /** All the 4 ADC channels */
148 ADC_CH_ALL
150 } AdcChanId;
152 /**
153 * \brief ADC left channel input mux selection
154 */
155 typedef enum _AdcLeftInputMux
156 {
157 /** ADC left channel input disabled */
158 ADC_INL_NONE = 0x0,
159 /** Single ended VINL1 is selected as ADC left input */
160 ADC_INL_SE_VINL1 = 0x1,
161 /** Single ended VINL2 is selected as ADC left input */
162 ADC_INL_SE_VINL2 = 0x2,
163 /** Single ended VINL2 + VINL1 is selected as ADC left input */
164 ADC_INL_SE_VINL2_VINL1 = 0x3,
165 /** Single ended VINL3 is selected as ADC left input */
166 ADC_INL_SE_VINL3 = 0x4,
167 /** Single ended VINL3 + VINL1 is selected as ADC left input */
168 ADC_INL_SE_VINL3_VINL1 = 0x5,
169 /** Single ended VINL3 + VINL2 is selected as ADC left input */
170 ADC_INL_SE_VINL3_VINL2 = 0x6,
171 /** Single ended VINL3 + VINL2 + VINL1 is selected as ADC left input */
172 ADC_INL_SE_VINL3_VINL2_VINL1 = 0x7,
173 /** Single ended VINL4 is selected as ADC left input */
174 ADC_INL_SE_VINL4 = 0x8,
175 /** Single ended VINL4 + VINL1 is selected as ADC left input */
176 ADC_INL_SE_VINL4_VINL1 = 0x9,
177 /** Single ended VINL4 + VINL2 is selected as ADC left input */
178 ADC_INL_SE_VINL4_VINL2 = 0xA,
179 /** Single ended VINL4 + VINL2 + VINL1 is selected as ADC left input */
180 ADC_INL_SE_VINL4_VINL2_VINL1 = 0xB,
181 /** Single ended VINL4 + VINL3 is selected as ADC left input */
182 ADC_INL_SE_VINL4_VINL3 = 0xC,
183 /** Single ended VINL4 + VINL3 + VINL1 is selected as ADC left input */
184 ADC_INL_SE_VINL4_VINL3_VINL1 = 0xD,
185 /** Single ended VINL4 + VINL3 + VINL2 is selected as ADC left input */
186 ADC_INL_SE_VINL4_VINL3_VINL2 = 0xE,
187 /** Single ended VINL4 + VINL3 + VINL2 + VINL1 is selected
188 as ADC left input */
189 ADC_INL_SE_VINL4_VINL3_VINL2_VINL1 = 0xF,
190 /** Differential VIN1P + VIN1M is selected as ADC left input */
191 ADC_INL_DIFF_VIN1P_VIN1M = 0x10,
192 /** Differential VIN4P + VIN4M is selected as ADC left input */
193 ADC_INL_DIFF_VIN4P_VIN4M = 0x20,
194 /** Differential VIN1P + VIN1M + VIN4P + VIN4M is selected
195 as ADC left input */
196 ADC_INL_DIFF_VIN1P_VIN1M_VIN4P_VIN4M = 0x30
198 } AdcLeftInputMux;
200 /**
201 * \brief ADC right channel input mux selection
202 */
203 typedef enum _AdcRightInputMux
204 {
205 /** ADC right channel input disabled */
206 ADC_INR_NONE = 0x0,
207 /** Single ended VINR1 is selected as ADC right input */
208 ADC_INR_SE_VINR1 = 0x1,
209 /** Single ended VINR2 is selected as ADC right input */
210 ADC_INR_SE_VINR2 = 0x2,
211 /** Single ended VINR2 + VINR1 is selected as ADC right input */
212 ADC_INR_SE_VINR2_VINR1 = 0x3,
213 /** Single ended VINR3 is selected as ADC right input */
214 ADC_INR_SE_VINR3 = 0x4,
215 /** Single ended VINR3 + VINR1 is selected as ADC right input */
216 ADC_INR_SE_VINR3_VINR1 = 0x5,
217 /** Single ended VINR3 + VINR2 is selected as ADC right input */
218 ADC_INR_SE_VINR3_VINR2 = 0x6,
219 /** Single ended VINR3 + VINR2 + VINR1 is selected as ADC right input */
220 ADC_INR_SE_VINR3_VINR2_VINR1 = 0x7,
221 /** Single ended VINR4 is selected as ADC right input */
222 ADC_INL_SE_VINR4 = 0x8,
223 /** Single ended VINR4 + VINR1 is selected as ADC right input */
224 ADC_INR_SE_VINR4_VINR1 = 0x9,
225 /** Single ended VINR4 + VINR2 is selected as ADC right input */
226 ADC_INR_SE_VINR4_VINR2 = 0xA,
227 /** Single ended VINR4 + VINR2 + VINR1 is selected as ADC right input */
228 ADC_INR_SE_VINR4_VINR2_VINR1 = 0xB,
229 /** Single ended VINR4 + VINR3 is selected as ADC right input */
230 ADC_INR_SE_VINR4_VINR3 = 0xC,
231 /** Single ended VINR4 + VINR3 + VINR1 is selected as ADC right input */
232 ADC_INR_SE_VINR4_VINR3_VINR1 = 0xD,
233 /** Single ended VINR4 + VINR3 + VINR2 is selected as ADC right input */
234 ADC_INR_SE_VINR4_VINR3_VINR2 = 0xE,
235 /** Single ended VINR4 + VINR3 + VINR2 + VINR1 is selected
236 as ADC right input */
237 ADC_INR_SE_VINR4_VINR3_VINR2_VINR1 = 0xF,
238 /** Differential VIN2P + VIN2M is selected as ADC right input */
239 ADC_INR_DIFF_VIN2P_VIN2M = 0x10,
240 /** Differential VIN4P + VIN4M is selected as ADC right input */
241 ADC_INR_DIFF_VIN3P_VIN3M = 0x20,
242 /** Differential VIN2P + VIN2M + VIN3P + VIN3M is selected
243 as ADC right input */
244 ADC_INR_DIFF_VIN2P_VIN2M_VIN3P_VIN3M = 0x30
246 } AdcRightInputMux;
248 /**
249 * \brief ADC receive PCM word length selection
250 */
251 typedef enum _AdcRxWordLen
252 {
253 /** ADC PCM word length selection for 24 bit */
254 ADC_RX_WLEN_24BIT = 1,
255 /** ADC PCM word length selection for 20 bit */
256 ADC_RX_WLEN_20BIT = 2,
257 /** ADC PCM word length selection for 16 bit */
258 ADC_RX_WLEN_16BIT = 3
260 } AdcRxWordLen;
262 /**
263 * \brief ADC Serial Audio Interface Data Format
264 */
265 typedef enum _AdcDataFormat
266 {
267 /** ADC I2S data format */
268 ADC_DATA_FORMAT_I2S = 0,
269 /** ADC left justified data format */
270 ADC_DATA_FORMAT_LEFTJ,
271 /** ADC right justified data format */
272 ADC_DATA_FORMAT_RIGHTJ,
273 /** ADC TDM/DSP data format */
274 ADC_DATA_FORMAT_TDM_DSP
276 } AdcDataFormat;
278 /**
279 * \brief ADC power state selection
280 */
281 typedef enum _AdcPowerState
282 {
283 /** ADC digital standby state */
284 ADC_POWER_STATE_STANDBY = 0,
285 /** ADC device sleep state */
286 ADC_POWER_STATE_SLEEP,
287 /** ADC Analog Power Down state */
288 ADC_POWER_STATE_POWERDOWN
289 } AdcPowerState;
291 /**
292 * \brief ADC interrupts
293 */
294 typedef enum _AdcIntr
295 {
296 /** Energysense Interrupt */
297 ADC_INTR_ENERGY_SENSE = 0,
298 /** I2S RX DIN toggle Interrupt */
299 ADC_INTR_DIN_TOGGLE,
300 /** DC Level Change Interrupt */
301 ADC_INTR_DC_CHANGE,
302 /** Clock Error Interrupt */
303 ADC_INTR_CLK_ERR,
304 /** Post-PGA Clipping Interrupt */
305 ADC_INTR_POST_PGA_CLIP,
306 /** To controls all the ADC interrupts together */
307 ADC_INTR_ALL
309 } AdcIntr;
311 /**
312 * \brief ADC status read options
313 */
314 typedef enum _AdcStatus
315 {
316 /** Current Power State of the device */
317 ADC_STATUS_POWER_STATE = 0,
318 /** Current Sampling Frequency */
319 ADC_STATUS_SAMPLING_FREQ,
320 /** Current receiving BCK ratio */
321 ADC_STATUS_BCK_RATIO,
322 /** Current SCK Ratio */
323 ADC_STATUS_SCK_RATIO,
324 /** LRCK Halt Status */
325 ADC_STATUS_LRCK_HALT,
326 /** BCK Halt Status */
327 ADC_STATUS_BCK_HALT,
328 /** SCK Halt Status */
329 ADC_STATUS_SCK_HALT,
330 /** LRCK Error Status */
331 ADC_STATUS_LRCK_ERR,
332 /** BCK Error Status */
333 ADC_STATUS_BCK_ERR,
334 /** SCK Error Status */
335 ADC_STATUS_SCK_ERR,
336 /** DVDD Status */
337 ADC_STATUS_DVDD,
338 /** AVDD Status */
339 ADC_STATUS_AVDD,
340 /** Digital LDO Status */
341 ADC_STATUS_LDO
343 } AdcStatus;
345 /**
346 * \brief ADC DSP channel processing configuration
347 */
348 typedef enum _AdcDspChanCfg
349 {
350 /** ADC DSP 4 channel mode processing */
351 ADC_DSP_PROC_4CHAN = 0,
352 /** ADC DSP 2 channel mode processing */
353 ADC_DSP_PROC_2CHAN
355 } AdcDspChanCfg;
357 /**
358 * \brief ADC DSP mixer selection
359 */
360 typedef enum _AdcDspMixNum
361 {
362 /** ADC DSP mixer 1 */
363 ADC_DSP_MIX1 = 0,
364 /** ADC DSP mixer 2 */
365 ADC_DSP_MIX2,
366 /** ADC DSP mixer 3 */
367 ADC_DSP_MIX3,
368 /** ADC DSP mixer 4 */
369 ADC_DSP_MIX4,
370 /** To control all the DSP mixers together */
371 ADC_DSP_ALL
373 } AdcDspMixNum;
375 /**
376 * \brief ADC DSP mixer channel selection
377 */
378 typedef enum _AdcDspMixChan
379 {
380 /** ADC DSP mixer channel 1 left */
381 ADC_DSP_MIXCHAN_CH1L = 0,
382 /** ADC DSP mixer channel 1 right */
383 ADC_DSP_MIXCHAN_CH1R,
384 /** ADC DSP mixer channel 2 left */
385 ADC_DSP_MIXCHAN_CH2L,
386 /** ADC DSP mixer channel 2 right */
387 ADC_DSP_MIXCHAN_CH2R,
388 /** ADC DSP mixer I2S left */
389 ADC_DSP_MIXCHAN_I2SL,
390 /** ADC DSP mixer I2S right */
391 ADC_DSP_MIXCHAN_I2SR,
392 /** To control all the mixer channels together */
393 ADC_DSP_MIXCHAN_ALL
395 } AdcDspMixChan;
397 /*@}*/ /* defgroup */
400 /** @defgroup Platform Audio DAC Enums */
401 /*@{*/
403 /**
404 * \brief Enum to choose HW DAC device
405 */
406 typedef enum _DacDevId
407 {
408 /** Enables HW DAC device instance 0 for the operation */
409 DAC_DEVICE_0 = 0,
410 /** Enables HW DAC device instance 1 for the operation */
411 DAC_DEVICE_1,
412 /** Enables all the available HW DAC device instances for the operation */
413 DAC_DEVICE_ALL
415 } DacDevId;
417 /**
418 * \brief Enum to indicate DAC internal channels
419 */
420 typedef enum _DacChanId
421 {
422 /** DAC internal channel 1 */
423 DAC_CHAN_1 = 0,
424 /** DAC internal channel 2 */
425 DAC_CHAN_2,
426 /** DAC internal channel 3 */
427 DAC_CHAN_3,
428 /** DAC internal channel 4 */
429 DAC_CHAN_4,
430 /** DAC internal channel 5 */
431 DAC_CHAN_5,
432 /** DAC internal channel 6 */
433 DAC_CHAN_6,
434 /** DAC internal channel 7 */
435 DAC_CHAN_7,
436 /** DAC internal channel 8 */
437 DAC_CHAN_8,
438 /** All DAC internal channels */
439 DAC_CHAN_ALL
441 } DacChanId;
443 /**
444 * \brief Enum to indicate DAC internal channel pair
445 */
446 typedef enum _DacChanPair
447 {
448 /** DAC internal channel 1 and 2 pair */
449 DAC_CHANP_1_2 = 0,
450 /** DAC internal channel 3 and 4 pair */
451 DAC_CHANP_3_4,
452 /** DAC internal channel 5 and 6 pair */
453 DAC_CHANP_5_6,
454 /** DAC internal channel 7 and 8 pair */
455 DAC_CHANP_7_8,
456 /** Indicates all DAC internal channel pairs */
457 DAC_CHANP_ALL
459 } DacChanPair;
461 /**
462 * \brief DAC AMUTE control source event selection
463 */
464 typedef enum _DacAmuteCtrl
465 {
466 /** Analog mute control by SCKI lost */
467 DAC_AMUTE_CTRL_SCKI_LOST = 0,
468 /** Analog mute control by asynchronous detect */
469 DAC_AMUTE_CTRL_ASYNC_DETECT,
470 /** Analog mute control by ZERO1 and ZERO2 detect */
471 DAC_AMUTE_CTRL_ZERO_DETECT,
472 /** Analog mute control by DAC disable command */
473 DAC_AMUTE_CTRL_DAC_DISABLE_CMD
475 } DacAmuteCtrl;
477 /**
478 * \brief DAC sampling mode selection
479 */
480 typedef enum _DacSamplingMode
481 {
482 /** Auto sampling mode */
483 DAC_SAMPLING_MODE_AUTO = 0,
484 /** Single rate sampling mode */
485 DAC_SAMPLING_MODE_SINGLE_RATE,
486 /** Dual rate sampling mode */
487 DAC_SAMPLING_MODE_DUAL_RATE,
488 /** Quad rate sampling mode */
489 DAC_SAMPLING_MODE_QUAD_RATE
491 } DacSamplingMode;
493 /**
494 * \brief DAC audio interface data format selection
495 */
496 typedef enum _DacDataFormat
497 {
498 /** 16-/20-/24-/32-bit I2S format */
499 DAC_DATA_FORMAT_I2S = 0,
500 /** 16-/20-/24-/32-bit left-justified format */
501 DAC_DATA_FORMAT_LEFTJ,
502 /** 24-bit right-justified format */
503 DAC_DATA_FORMAT_24BIT_RIGHTJ,
504 /** 16-bit right-justified format */
505 DAC_DATA_FORMAT_16BIT_RIGHTJ,
506 /** 24-bit I2S mode DSP format */
507 DAC_DATA_FORMAT_24BIT_I2S_DSP,
508 /** 24-bit left-justified mode DSP format */
509 DAC_DATA_FORMAT_24BIT_LEFTJ_DSP,
510 /** 24-bit I2S mode TDM format */
511 DAC_DATA_FORMAT_24BIT_I2S_TDM,
512 /** 24-bit left-justified mode TDM format */
513 DAC_DATA_FORMAT_24BIT_LEFTJ_TDM,
514 /** 24-bit high-speed I2S mode TDM format */
515 DAC_DATA_FORMAT_24BIT_HS_I2S_TDM,
516 /** 24-bit high-speed left-justified mode TDM format */
517 DAC_DATA_FORMAT_24BIT_HS_LEFTJ_TDM
519 } DacDataFormat;
521 /**
522 * \brief DAC operation mode selection
523 */
524 typedef enum _DacOpMode
525 {
526 /** DAC normal operation mode */
527 DAC_OPMODE_NORMAL = 0,
528 /** DAC disabled mode */
529 DAC_OPMODE_DISABLED
531 } DacOpMode;
533 /**
534 * \brief DAC digital filter roll-off selection
535 */
536 typedef enum _DacFilterRolloff
537 {
538 /** Sharp roll-off for digital filter */
539 DAC_FILTER_SHARP_ROLLOFF = 0,
540 /** Slow roll-off for digital filter */
541 DAC_FILTER_SLOW_ROLLOFF
543 } DacFilterRolloff;
545 /**
546 * \brief DAC analog signal output phase selection
547 */
548 typedef enum _DacOutputPhase
549 {
550 /** Normal phase of DAC analog signal output */
551 DAC_OUTPUT_PHASE_NORMAL = 0,
552 /** Inverted phase of DAC analog signal output */
553 DAC_OUTPUT_PHASE_INVERTED
555 } DacOutputPhase;
557 /**
558 * \brief DAC digital attenuation mode control selection
559 */
560 typedef enum _DacAttnMode
561 {
562 /** Fine step attenuation mode : 0.5-dB step for 0 dB to \9663 dB range */
563 DAC_ATTENUATION_FINE_STEP = 0,
564 /** Wide range attenuation mode : 1-dB step for 0 dB to \96100 dB range */
565 DAC_ATTENUATION_WIDE_RANGE
567 } DacAttnMode;
569 /**
570 * \brief DAC Digital de-emphasis function/sampling rate control selection
571 */
572 typedef enum _DacDeempCtrl
573 {
574 /** Digital de-emphasis disabled */
575 DAC_DEEMP_DISABLE = 0,
576 /** Digital de-emphasis 48KHz enabled */
577 DAC_DEEMP_48KHZ,
578 /** Digital de-emphasis 44KHz enabled */
579 DAC_DEEMP_44KHZ,
580 /** Digital de-emphasis 32KHz enabled */
581 DAC_DEEMP_32KHZ
583 } DacDeempCtrl;
586 /*@}*/ /* defgroup */
589 /** @defgroup Platform Audio Common Functions */
590 /*@{*/
592 /**
593 * \brief Initializes Audio module
594 *
595 * This function configures the system level setup required for
596 * operation of the modules that are available on audio daughter card.
597 * This function shall be called before calling any other platform
598 * audio module functions.
599 *
600 * \return Platform_EOK on Success or error code
601 */
602 Platform_STATUS platformAudioInit(void);
604 /**
605 * \brief Resets audio DAC
606 *
607 * This function toggles the GPIO signal connected to RST pin
608 * of DAC module to generate DAC reset.
609 *
610 * \return Platform_EOK on Success or error code
611 */
612 Platform_STATUS platformAudioResetDac(void);
614 /**
615 * \brief Configures audio clock source
616 *
617 * McASP can receive clock from DIR module on daughter card or external
618 * I2S device to operate DAC and ADC modules. This function configures
619 * which clock source to use (DIR or I2S) for DAC and ADC operation
620 *
621 * \param clkSrc [IN] Clock source selection
622 *
623 * \return Platform_EOK on Success or error code
624 */
625 Platform_STATUS platformAudioSelectClkSrc(AudioClkSrc clkSrc);
627 /*@}*/ /* defgroup */
630 /** @defgroup Platform Audio ADC Functions */
631 /*@{*/
633 /**
634 * \brief Initializes ADC module
635 *
636 * This function configures the system level setup required for ADC
637 * operation and initializes the ADC module with default values.
638 * This function should be called before calling any other ADC functions.
639 *
640 * After executing this function, ADC module will be ready for audio
641 * processing with default configuration. Default ADC configurations
642 * can be changed using the other ADC APIs if required.
643 *
644 * \param devId [IN] Device ID of ADC HW instance
645 * Use 'ADC_DEVICE_ALL' to initialize
646 * all the ADC devices available.
647 *
648 * \return Platform_EOK on Success or error code
649 */
650 Platform_STATUS platformAudioAdcInit(AdcDevId devId);
652 /**
653 * \brief Resets ADC module
654 *
655 * This function resets all the ADC module registers to their
656 * HW default values.
657 *
658 * \param devId [IN] Device ID of ADC HW instance
659 * Use 'ADC_DEVICE_ALL' to reset
660 * all the ADC devices available.
661 *
662 * \return Platform_EOK on Success or error code
663 */
664 Platform_STATUS platformAudioAdcReset(AdcDevId devId);
666 /**
667 * \brief Configures ADC gain value
668 *
669 * Range of the gain is exposed as percentage by this API. Gain
670 * is indicated as percentage of maximum gain ranging from 0 to 100.
671 * 0 indicates minimum gain and 100 indicates maximum gain.
672 *
673 * \param devId [IN] Device ID of ADC HW instance
674 * Use 'ADC_DEVICE_ALL' to apply the configuration
675 * for all the ADC devices available.
676 *
677 * \param chanId [IN] Internal ADC channel Id
678 * Use ADC_CH_ALL to set gain for all the
679 * ADC channels
680 *
681 * \param gain [IN] Gain value; 0 to 100
682 *
683 * \return Platform_EOK on Success or error code
684 */
685 Platform_STATUS platformAudioAdcSetGain(AdcDevId devId,
686 AdcChanId chanId,
687 uint8_t gain);
689 /**
690 * \brief Configures ADC analog input selection for left channel
691 *
692 * Default input selection of ADC left channels can be modified using
693 * this function.
694 *
695 * Default input selection for ADC left channels is listed below
696 * CH1 LEFT - VINL1
697 * CH2 LEFT - VINL2
698 *
699 * \param devId [IN] Device ID of ADC HW instance
700 * Use 'ADC_DEVICE_ALL' to apply the configuration
701 * for all the ADC devices available.
702 *
703 * \param chanId [IN] Internal ADC channel Id
704 * ADC_CH1_LEFT - Input selection for channel 1 left
705 * ADC_CH2_LEFT - Input selection for channel 2 left
706 *
707 * \param inputMux [IN] Input mux configuration
708 *
709 * \return Platform_EOK on Success or error code
710 */
711 Platform_STATUS platformAudioAdcSetLeftInputMux(AdcDevId devId,
712 AdcChanId chanId,
713 AdcLeftInputMux inputMux);
715 /**
716 * \brief Configures ADC analog input selection for right channel
717 *
718 * Default input selection of ADC right channels can be modified using
719 * this function
720 *
721 * Default input selection for ADC right channels is shown below
722 * CH1 RIGHT - VINR1
723 * CH2_RIGHT - VINR2
724 *
725 * \param devId [IN] Device ID of ADC HW instance
726 * Use 'ADC_DEVICE_ALL' to apply the configuration
727 * for all the ADC devices available.
728 *
729 * \param chanId [IN] Internal ADC channel Id
730 * ADC_CH1_RIGHT - Input selection for channel 1 right
731 * ADC_CH2_RIGHT - Input selection for channel 2 right
732 *
733 * \param inputMux [IN] Input mux configuration
734 *
735 * \return Platform_EOK on Success or error code
736 */
737 Platform_STATUS platformAudioAdcSetRightInputMux(AdcDevId devId,
738 AdcChanId chanId,
739 AdcRightInputMux inputMux);
741 /**
742 * \brief ADC audio interface data configuration
743 *
744 * This function configures serial audio interface data format and
745 * receive PCM word length for ADC
746 *
747 * \param devId [IN] Device ID of ADC HW instance
748 * Use 'ADC_DEVICE_ALL' to apply the configuration
749 * for all the ADC devices available.
750 *
751 * \param wLen [IN] ADC data word length
752 *
753 * \param format [IN] Audio data format
754 *
755 * \return Platform_EOK on Success or error code
756 */
757 Platform_STATUS platformAudioAdcDataConfig(AdcDevId devId,
758 AdcRxWordLen wLen,
759 AdcDataFormat format);
761 /**
762 * \brief Enables/Disables ADC channel mute
763 *
764 * This function configures mute functionality of each ADC channel
765 *
766 * \param devId [IN] Device ID of ADC HW instance
767 * Use 'ADC_DEVICE_ALL' to apply the configuration
768 * for all the ADC devices available.
769 *
770 * \param chanId [IN] Internal ADC channel Id
771 * Use ADC_CH_ALL to apply mute configuration for
772 * all the ADC channels
773 *
774 * \param muteEnable [IN] Flag to configure mute
775 * 1 - Mute ADC channel
776 * 0 - Unmute ADC channel
777 *
778 * \return Platform_EOK on Success or error code
779 */
780 Platform_STATUS platformAudioAdcMuteCtrl(AdcDevId devId,
781 AdcChanId chanId,
782 uint8_t muteEnable);
784 /**
785 * \brief Configures ADC MIC bias
786 *
787 * This function enables/disables MIC bias for analog MIC input
788 *
789 * \param devId [IN] Device ID of ADC HW instance
790 * Use 'ADC_DEVICE_ALL' to apply the configuration
791 * for all the ADC devices available.
792 *
793 * \param micBiasEnable [IN] Mic Bias enable flag
794 * 1 - Enable MIC Bias
795 * 0 - Disable MIC Bias
796 *
797 * \return Platform_EOK on Success or error code
798 */
799 Platform_STATUS platformAudioAdcMicBiasCtrl(AdcDevId devId,
800 uint8_t micBiasEnable);
802 /**
803 * \brief Configures ADC power state
804 *
805 * This function enables/disables different power modes supported by ADC
806 *
807 * \param devId [IN] Device ID of ADC HW instance
808 * Use 'ADC_DEVICE_ALL' to apply the configuration
809 * for all the ADC devices available.
810 *
811 * \param powState [IN] ADC power state to configure
812 *
813 * \param stateEnable [IN] Power state enable flag
814 * 1 - Enables the power state
815 * 0 - Disables the power state
816 *
817 * \return Platform_EOK on Success or error code
818 */
819 Platform_STATUS platformAudioAdcConfigPowState(AdcDevId devId,
820 AdcPowerState powState,
821 uint8_t stateEnable);
823 /**
824 * \brief Configures ADC interrupts
825 *
826 * This function enables/disables different interrupts supported by ADC
827 *
828 * \param devId [IN] Device ID of ADC HW instance
829 * Use 'ADC_DEVICE_ALL' to apply the configuration
830 * for all the ADC devices available.
831 *
832 * \param intId [IN] Interrupt Id to configure
833 * Use to 'ADC_INTR_ALL' to configure all the
834 * interrupts together
835 *
836 * \param intEnable [IN] Interrupt enable flag
837 * 1 - Enables the interrupt
838 * 0 - Disables the interrupt
839 *
840 * \return Platform_EOK on Success or error code
841 */
842 Platform_STATUS platformAudioAdcConfigIntr(AdcDevId devId,
843 AdcIntr intId,
844 uint8_t intEnable);
846 /**
847 * \brief Reads ADC interrupt status
848 *
849 * This function reads the status of different interrupts supported by ADC
850 *
851 * \param devId [IN] Device ID of ADC HW instance
852 *
853 * \param intId [IN] Interrupt Id to read the status
854 * Use to 'ADC_INTR_ALL' to read status of all the
855 * interrupts together
856 *
857 * \return Interrupt status
858 * 1 - Interrupt occurred
859 * 0 - No interrupt occurred
860 */
861 uint8_t platformAudioAdcGetIntrStatus(AdcDevId devId,
862 AdcIntr intId);
864 /**
865 * \brief Reads ADC status bits
866 *
867 * This function reads the value of different status functions supported
868 * by ADC module (excluding interrupts).
869 *
870 * \param devId [IN] Device ID of ADC HW instance
871 *
872 * \param status [IN] Status function of which status to be read
873 *
874 * \return Value of status function
875 *
876 */
877 uint8_t platformAudioAdcGetStatus(AdcDevId devId,
878 AdcStatus status);
880 /**
881 * \brief ADC DSP channel configuration control
882 *
883 * This function configures the DSP module processing channels
884 * supported by ADC
885 *
886 * \param devId [IN] Device ID of ADC HW instance
887 * Use 'ADC_DEVICE_ALL' to apply the configuration
888 * for all the ADC devices available.
889 *
890 * \param chanCfg [IN] DSP channel configuration
891 *
892 * \return Platform_EOK on Success or error code
893 *
894 */
895 Platform_STATUS platformAudioAdcDspCtrl(AdcDevId devId,
896 AdcDspChanCfg chanCfg);
898 /**
899 * \brief Programs ADC DSP coefficients
900 *
901 * ADC module supports an internal DSP which performs additional audio
902 * processing operations like mixing, LPF/HPF etc.
903 * DSP coefficients can be programmed by this function.
904 *
905 * \param devId [IN] Device ID of ADC HW instance
906 * Use 'ADC_DEVICE_ALL' to apply the configuration
907 * for all the ADC devices available.
908 *
909 * \param coeffRegAddr [IN] Address of DSP coefficient register
910 *
911 * \param dspCoeff [IN] Value of DSP coefficient
912 * Lower 24 bits are written to DSP coeff register
913 *
914 * \return Platform_EOK on Success or error code
915 *
916 */
917 Platform_STATUS platformAudioAdcProgDspCoeff(AdcDevId devId,
918 uint8_t coeffRegAddr,
919 uint32_t dspCoeff);
921 /**
922 * \brief Displays ADC register programmed values
923 *
924 * This function is provided for debug purpose to read the value
925 * of ADC registers. Values read from the ADC registers will be displayed
926 * in CCS output window or serial terminal based on the system level
927 * configuration for debug messages.
928 *
929 * \param devId [IN] Device ID of ADC HW instance
930 * Use 'ADC_DEVICE_ALL' to read the register values
931 * for all the ADC devices available.
932 *
933 * \return Platform_EOK on Success or error code
934 */
935 Platform_STATUS platformAudioAdcGetRegDump(AdcDevId devId);
938 /*@}*/ /* defgroup */
941 /** @defgroup Platform Audio DAC Functions */
942 /*@{*/
944 /**
945 * \brief Initializes DAC module
946 *
947 * This function configures the system level setup required for DAC
948 * operation and initializes the DAC module with default values.
949 * This function should be called before calling any other DAC functions.
950 *
951 * After executing this function, DAC module should be ready for audio
952 * processing with default configuration. Default DAC configurations
953 * can be changed using the other DAC APIs if required.
954 *
955 * \param devId [IN] Device ID of DAC HW instance
956 * Use 'DAC_DEVICE_ALL' to initialize
957 * all the DAC devices available.
958 *
959 * \return Platform_EOK on Success or error code
960 */
961 Platform_STATUS platformAudioDacInit(DacDevId devId);
963 /**
964 * \brief Resets DAC module
965 *
966 * Resetting the DAC module restarts the re-synchronization between
967 * system clock and sampling clock, and DAC operation.
968 *
969 * \param devId [IN] Device ID of DAC HW instance
970 * Use 'DAC_DEVICE_ALL' to reset
971 * all the DAC devices available.
972 *
973 * \return Platform_EOK on Success or error code
974 */
975 Platform_STATUS platformAudioDacReset(DacDevId devId);
977 /**
978 * \brief Configures DAC Analog mute control
979 *
980 * DAC module supports AMUTE functionality which causes the DAC output
981 * to cut-off from the digital input upon the occurrence of any events
982 * which are configured by AMUTE control.
983 *
984 * \param devId [IN] Device ID of DAC HW instance
985 * Use 'DAC_DEVICE_ALL' to apply the configuration
986 * for all the DAC devices available.
987 *
988 * \param muteCtrl [IN] Analog mute control event
989 *
990 * \param muteEnable [IN] Flag to configure AMUTE for given control event
991 * 1 - Enable AMUTE control
992 * 0 - Disable AMUTE control
993 *
994 * \return Platform_EOK on Success or error code
995 */
996 Platform_STATUS platformAudioDacAmuteCtrl(DacDevId devId,
997 DacAmuteCtrl muteCtrl,
998 uint8_t muteEnable);
1000 /**
1001 * \brief Configures DAC Audio sampling mode
1002 *
1003 * By default DAC module sampling mode is configured for auto mode.
1004 * In Auto mode, the sampling mode is automatically set according to multiples
1005 * between the system clock and sampling clock. Single rate for 512 fS, 768 fS,
1006 * and 1152 fS, dual rate for 256 fS or 384 fS, and quad rate for 128 fS
1007 * and 192 fS. Setting the sampling mode is required only if auto mode
1008 * configurations are not suitable for the application.
1009 *
1010 * \param devId [IN] Device ID of DAC HW instance
1011 * Use 'DAC_DEVICE_ALL' to apply the configuration
1012 * for all the DAC devices available.
1013 *
1014 * \param samplingMode [IN] DAC audio sampling mode
1015 *
1016 * \return Platform_EOK on Success or error code
1017 */
1018 Platform_STATUS platformAudioDacSetSamplingMode(DacDevId devId,
1019 DacSamplingMode samplingMode);
1021 /**
1022 * \brief Configures DAC Audio interface data format
1023 *
1024 * \param devId [IN] Device ID of DAC HW instance
1025 * Use 'DAC_DEVICE_ALL' to apply the configuration
1026 * for all the DAC devices available.
1027 *
1028 * \param dataFormat [IN] DAC audio data format
1029 *
1030 * \return Platform_EOK on Success or error code
1031 */
1032 Platform_STATUS platformAudioDacSetDataFormat(DacDevId devId,
1033 DacDataFormat dataFormat);
1035 /**
1036 * \brief Configures DAC operation mode
1037 *
1038 * This function configures a particular DAC channel pair to be operating
1039 * normal or disabled.
1040 *
1041 * \param devId [IN] Device ID of DAC HW instance
1042 * Use 'DAC_DEVICE_ALL' to apply the configuration
1043 * for all the DAC devices available.
1044 *
1045 * \param chanPair [IN] Internal DAC channel pair
1046 * Use DAC_CHANP_1_2 to DAC_CHANP_7_8 for
1047 * individual DAC channel pair configuration
1048 * Use DAC_CHANP_ALL to set operation mode
1049 * for all DAC channels
1050 *
1051 * \param opMode [IN] DAC operation mode
1052 *
1053 * \return Platform_EOK on Success or error code
1054 */
1055 Platform_STATUS platformAudioDacSetOpMode(DacDevId devId,
1056 DacChanPair chanPair,
1057 DacOpMode opMode);
1059 /**
1060 * \brief Configures DAC filter roll-off
1061 *
1062 * \param devId [IN] Device ID of DAC HW instance
1063 * Use 'DAC_DEVICE_ALL' to apply the configuration
1064 * for all the DAC devices available.
1065 *
1066 * \param chanPair [IN] Internal DAC channel pair
1067 * Use macros DAC_CHANP_1_2 to DAC_CHANP_7_8 for
1068 * individual DAC channel pair configuration
1069 * Use macro DAC_CHANP_ALL to set filter roll-off
1070 * for all DAC channels
1071 *
1072 * \param rolloff [IN] Roll-off configuration
1073 *
1074 * \return Platform_EOK on Success or error code
1075 */
1076 Platform_STATUS platformAudioDacSetFilterRolloff(DacDevId devId,
1077 DacChanPair chanPair,
1078 DacFilterRolloff rolloff);
1080 /**
1081 * \brief Configures phase of the DAC analog signal outputs
1082 *
1083 * \param devId [IN] Device ID of DAC HW instance
1084 * Use 'DAC_DEVICE_ALL' to apply the configuration
1085 * for all the DAC devices available.
1086 *
1087 * \param chanId [IN] Internal DAC channel Id
1088 * Use DAC_CHAN_1 to DAC_CHAN_8 for individual
1089 * DAC channel configuration
1090 * Use DAC_CHAN_ALL to set output phase for all
1091 * DAC channels
1092 *
1093 * \param outPhase [IN] Mute enable flag
1094 * 0 for unmute and 1 for mute
1095 *
1096 * \return Platform_EOK on Success or error code
1097 */
1098 Platform_STATUS platformAudioDacSetOutputPhase(DacDevId devId,
1099 DacChanId chanId,
1100 DacOutputPhase outPhase);
1102 /**
1103 * \brief Soft mute function control
1104 *
1105 * The Soft mute function allows mute/unmute of DAC output in gradual steps.
1106 * This configuration reduces pop and zipper noise during muting of the
1107 * DAC output.
1108 *
1109 * \param devId [IN] Device ID of DAC HW instance
1110 * Use 'DAC_DEVICE_ALL' to apply the configuration
1111 * for all the DAC devices available.
1112 *
1113 * \param chanId [IN] Internal DAC channel Id
1114 * Use macros DAC_CHAN_1 to DAC_CHAN_8 for individual
1115 * DAC channel configuration
1116 * Use macro DAC_CHAN_ALL to mute/unmute all DAC
1117 * channels
1118 *
1119 * \param muteEnable [IN] Mute enable flag
1120 * 0 for unmute and 1 for mute
1121 *
1122 * \return Platform_EOK on Success or error code
1123 */
1124 Platform_STATUS platformAudioDacSoftMuteCtrl(DacDevId devId,
1125 DacChanId chanId,
1126 uint8_t muteEnable);
1128 /**
1129 * \brief Sets attenuation mode
1130 *
1131 * DAC module supports two types of volume/attenuation dB range
1132 * which can be changed by setting attenuation mode. Volume range and fine
1133 * tuning will change based on the attenuation mode.
1134 *
1135 * \param devId [IN] Device ID of DAC HW instance
1136 * Use 'DAC_DEVICE_ALL' to apply the configuration
1137 * for all the DAC devices available.
1138 *
1139 * \param attnMode [IN] Attenuation mode
1140 *
1141 * \return Platform_EOK on Success or error code
1142 */
1143 Platform_STATUS platformAudioDacSetAttnMode(DacDevId devId,
1144 DacAttnMode attnMode);
1146 /**
1147 * \brief Function to control digital de-emphasis functionality
1148 *
1149 * Disables/Enables the various sampling frequencies of the digital
1150 * de-emphasis function.
1151 *
1152 * \param devId [IN] Device ID of DAC HW instance
1153 * Use 'DAC_DEVICE_ALL' to apply the configuration
1154 * for all the DAC devices available.
1155 *
1156 * \param deempCtrl [IN] De-emphasis control options
1157 *
1158 * \return Platform_EOK on Success or error code
1159 */
1160 Platform_STATUS platformAudioDacDeempCtrl(DacDevId devId,
1161 DacDeempCtrl deempCtrl);
1163 /**
1164 * \brief Configures DAC volume/attenuation
1165 *
1166 * Range of the volume is exposed as percentage by this API. Volume
1167 * is indicated as percentage of maximum value ranging from 0 to 100.
1168 * 0 to mute the volume and 100 to set maximum volume
1169 *
1170 * DAC module supports two types of volume/attenuation dB range
1171 * which can be changed using platformAudioDacSetAttnMode().
1172 * Volume range and fine tuning will change based on the attenuation mode.
1173 *
1174 * \param devId [IN] Device ID of DAC HW instance
1175 * Use 'DAC_DEVICE_ALL' to apply the configuration
1176 * for all the DAC devices available.
1177 *
1178 * \param chanId [IN] Internal DAC channel Id
1179 * Use DAC_CHAN_1 to DAC_CHAN_8 for individual
1180 * DAC channel configuration
1181 * Use DAC_CHAN_ALL to mute/unmute all DAC
1182 * channels
1183 *
1184 * \param volume [IN] Volume in percentage; 0 to 100
1185 *
1186 * \return Platform_EOK on Success or error code
1187 */
1188 Platform_STATUS platformAudioDacSetVolume(DacDevId devId,
1189 DacChanId chanId,
1190 uint8_t volume);
1192 /**
1193 * \brief Configures DAC power-save mode
1194 *
1195 * \param devId [IN] Device ID of DAC HW instance
1196 * Use 'DAC_DEVICE_ALL' to apply the configuration
1197 * for all the DAC devices available.
1198 *
1199 * \param PowerMode [IN] Power-save mode control
1200 * 0 - Enable power-save mode
1201 * 1 - Disable power-save mode
1202 *
1203 * \return Platform_EOK on Success or error code
1204 */
1205 Platform_STATUS platformAudioDacSetPowerMode(DacDevId devId,
1206 uint8_t PowerMode);
1208 /**
1209 * \brief Displays DAC register programmed values
1210 *
1211 * This function is provided for debug purpose to read the value
1212 * of DAC registers. Values read from the DAC registers will be displayed
1213 * in CCS output window or serial terminal based on the system level
1214 * configuration for debug messages.
1215 *
1216 * \param devId [IN] Device ID of DAC HW instance
1217 * Use 'DAC_DEVICE_ALL' to apply the configuration
1218 * for all the DAC devices available.
1219 *
1220 * \return Platform_EOK on Success or error code
1221 */
1222 Platform_STATUS platformAudioDacGetRegDump(DacDevId devId);
1224 /*@}*/ /* defgroup */
1227 /** @defgroup Platform Audio DIR Functions */
1228 /*@{*/
1230 /**
1231 * \brief Initializes DIR module
1232 *
1233 * Configures GPIOs and other settings required for DIR module operation.
1234 * This function should be called before calling any other DIR functions.
1235 *
1236 * \return Platform_EOK on Success or error code
1237 *
1238 */
1239 Platform_STATUS platformAudioDirInit(void);
1241 /**
1242 * \brief Resets DIR module
1243 *
1244 * \return Platform_EOK on Success or error code
1245 *
1246 */
1247 Platform_STATUS platformAudioDirReset(void);
1249 /**
1250 * \brief Reads AUDIO output status value of the DIR
1251 *
1252 * DIR AUDIO output pin gives the audio sample word information
1253 * of the channel-status data bit 1
1254 *
1255 * \return AUDIO pin output with below possible values
1256 * \n 0 - Audio sample word represents linear PCM samples
1257 * \n 1 - Audio sample word is used for other purposes
1258 */
1259 int8_t platformAudioDirGetAudioStatus(void);
1261 /**
1262 * \brief Reads EMPH output status value of the DIR
1263 *
1264 * DIR EMPH output pin gives the emphasis information of the
1265 * channel-status data bit 3.
1266 *
1267 * \return EMPH pin output with below possible values
1268 * \n 0 - Two audio channels without pre-emphasis
1269 * \n 1 - Two audio channels with 50 ms / 15 ms pre-emphasis
1270 */
1271 int8_t platformAudioDirGetEmphStatus(void);
1273 /**
1274 * \brief Reads ERROR pin status value of the DIR
1275 *
1276 * DIR ERROR output pin gives the error state of data and parity errors.
1277 *
1278 * \return EMPH pin output with below possible values
1279 * \n 0 - Lock state of PLL and nondetection of parity error
1280 * \n 1 - Unlock state of PLL or detection of parity error
1281 */
1282 int8_t platformAudioDirGetErrStatus(void);
1284 /**
1285 * \brief Reads CLKST pin status value of the DIR
1286 *
1287 * DIR CLKST pin outputs the PLL status change between LOCK and UNLOCK.
1288 * The CLKST output pulse depends only on the status change of the PLL.
1289 *
1290 * \return EMPH pin output with below possible values
1291 * \n 0 - Lock state of PLL and nondetection of parity error
1292 * \n 1 - Unlock state of PLL or detection of parity error
1293 */
1294 int8_t platformAudioDirGetClkStatus(void);
1296 /**
1297 * \brief Reads FSOUT[1:0] output status value of the DIR
1298 *
1299 * The DIR module calculates the actual sampling frequency of the
1300 * biphase input signal and outputs its result through FSOUT[1:0] pins.
1301 *
1302 * \return FSOUT pin output with below possible values
1303 * \n 0 - Calculated Sampling Frequency Output is 43 kHz\9645.2 kHz
1304 * \n 1 - Calculated Sampling Frequency Output is 46.8 kHz\9649.2 kHz
1305 * \n 2 - Out of range or PLL unlocked
1306 * \n 3 - Calculated Sampling Frequency Output is 31.2 kHz\9632.8 kHz
1307 */
1308 int8_t platformAudioDirGetFsOut(void);
1310 /*@}*/ /* defgroup */
1312 #endif /* _PLATFORM_AUDIO_H_ */
1314 /* Nothing past this point */