96a6cf0cf3478debf4c611f545b46df42f542357
[processor-sdk/performance-audio-sr.git] / pdk_k2g_1_0_1 / packages / ti / platform / evmk2g / platform_lib / src / platform.c
1 /*
2 * Copyright (c) 2010-2015, Texas Instruments Incorporated
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * * Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 *
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * * Neither the name of Texas Instruments Incorporated nor the names of
17 * its contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
22 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
24 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
25 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
26 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
27 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
28 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
29 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
30 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 */
34 /**
35 *
36 * \file platform.c
37 *
38 * \brief This contains platform common APIs. This file acts as entry
39 * point for all the platform library modules.
40 *
41 ******************************************************************************/
43 #include "platform_internal.h"
45 /* Errno value */
46 uint32_t platform_errno = 0;
47 uint32_t platform_init_return_code = 0;
48 uint8_t uart_port_num = PLATFORM_UART_PORT_0;
50 /* Platform Library Version*/
51 #if (PLATFORM_VERSTRING_IN)
52 #pragma DATA_SECTION(platform_library_version,"platform_lib");
53 static char platform_library_version[16] = PLATFORM_LIB_VERSION;
54 #endif
56 /* Information we need to keep around for access */
57 #pragma DATA_SECTION(platform_mcb,"platform_lib");
58 static struct platform_mcb_t {
59 uint32_t frequency;
60 int32_t board_version;
61 int32_t mastercore;
62 } platform_mcb = {0, 0, 0};
64 #if (PLATFORM_WRITE_IN)
65 #pragma DATA_SECTION(write_type,"platform_lib");
66 static WRITE_info write_type;
67 #pragma DATA_SECTION(write_buffer,"platform_lib");
68 static char write_buffer[MAX_WRITE_LEN];
69 #endif
71 #if (PLATFORM_READ_IN)
72 #pragma DATA_SECTION(read_type,"platform_lib");
73 READ_info read_type = PLATFORM_READ_SCANF;
74 #endif
77 /* This structure holds information about the devices on the platform */
78 #if (PLATFORM_NAND_IN)
79 #pragma DATA_SECTION(gDeviceNandBBlist,"platform_lib");
80 uint8_t gDeviceNandBBlist[BLOCKS_PER_DEVICE];
82 #pragma DATA_SECTION(gDeviceNand,"platform_lib");
83 PLATFORM_DEVICE_info gDeviceNand = {0x2C, 0xCA, PLATFORM_DEVICE_NAND, 16, BLOCKS_PER_DEVICE, PAGES_PER_BLOCK, BYTES_PER_PAGE, SPARE_BYTES_PER_PAGE, PLATFORM_DEVID_MT29F2G16ABAFA, 5, 0x400, 0, NULL, NULL};
84 #endif
86 #if (PLATFORM_NOR_IN)
87 #pragma DATA_SECTION(gDeviceNor,"platform_lib");
88 PLATFORM_DEVICE_info gDeviceNor = {0x20, 0xBA, PLATFORM_DEVICE_NOR, 8, SPI_NOR_SECTOR_COUNT, (SPI_NOR_PAGE_COUNT / SPI_NOR_SECTOR_COUNT), SPI_NOR_PAGE_SIZE, 0, PLATFORM_DEVID_NORN25Q128A13ESF40F, 0, 0, 0, NULL, NULL};
89 #endif
91 #if (PLATFORM_I2C_EEPROM_IN)
92 #pragma DATA_SECTION(gDeviceEeprom0,"platform_lib");
93 PLATFORM_DEVICE_info gDeviceEeprom0 = {PLATFORM_I2C_EEPROM_MANUFACTURER_ID,PLATFORM_I2C_EEPROM_DEVICE_ID_1,PLATFORM_DEVICE_EEPROM, 8, 1, 1, 65536, 0, PLATFORM_DEVID_EEPROM50, 0, 0, 0, NULL, NULL};
94 #pragma DATA_SECTION(gDeviceEeprom1,"platform_lib");
95 PLATFORM_DEVICE_info gDeviceEeprom1 = {PLATFORM_I2C_EEPROM_MANUFACTURER_ID,PLATFORM_I2C_EEPROM_DEVICE_ID_2,PLATFORM_DEVICE_EEPROM, 8, 1, 1, 65536, 0, PLATFORM_DEVID_EEPROM51, 0, 0, 0, NULL, NULL};
96 #endif
98 #if (PLATFORM_MMCHS_IN)
100 #pragma DATA_SECTION(gDeviceSd,"platform_lib");
101 PLATFORM_DEVICE_info gDeviceSd = {0, 0, PLATFORM_DEVICE_MAX, 0, 0, 0, 0, 0, PLATFORM_DEVID_SD, 0, 0, 0, NULL, NULL};
103 #pragma DATA_SECTION(gDeviceEmmc,"platform_lib");
104 PLATFORM_DEVICE_info gDeviceEmmc = {0, 0, PLATFORM_DEVICE_MAX, 0, 0, 0, 0, 0, PLATFORM_DEVID_EMMC, 0, 0, 0, NULL, NULL};
106 mmchsInfo *mmcInfo;
107 mmchsInfo *sdInfo;
108 mmchsCardInfo *mmcCard;
109 mmchsCardInfo *sdCard;
111 #endif
113 #if (PLATFORM_QSPI_FLASH_IN)
114 #pragma DATA_SECTION(gDeviceQspiFlash,"platform_lib");
115 PLATFORM_DEVICE_info gDeviceQspiFlash = {0, 0, PLATFORM_DEVICE_QSPI_FLASH, 8, QSPI_FLASH_NUM_SECTORS, (QSPI_FLASH_SECTOR_SIZE / QSPI_FLASH_PAGE_SIZE), QSPI_FLASH_PAGE_SIZE, 0, PLATFORM_DEVID_QSPIFLASH_S25FL512S, 0, 0, 0, NULL, NULL};
116 uint8_t qspiReadMode = PLATFORM_QSPI_IO_MODE_QUAD;
117 uint8_t qspiWriteMode = PLATFORM_QSPI_IO_MODE_QUAD;
118 #endif
120 /* This structure holds information about the EMAC port on the platform */
121 #pragma DATA_SECTION(emac_port_mode,"platform_lib");
122 PLATFORM_EMAC_PORT_MODE emac_port_mode[PLATFORM_MAX_EMAC_PORT_NUM] =
123 {
124 PLATFORM_EMAC_PORT_MODE_PHY,
125 PLATFORM_EMAC_PORT_MODE_PHY
126 };
128 #if (PLATFORM_EXTMEMTEST_IN)
129 static inline int32_t platform_memory_test (uint32_t start_address, uint32_t end_address);
130 #endif
132 uint8_t gSysClkSel = 0;
134 /******************************************************************************
135 * platform_get_frequency
136 *
137 * Internal function to read frequency from PLL.
138 *
139 ******************************************************************************/
140 static inline uint32_t platform_get_frequency(void)
141 {
142 CSL_Status status;
143 PllcHwSetup hwSetupRead;
144 uint32_t dsp_freq;
146 status = CorePllcGetHwSetup (&hwSetupRead);
148 if (status != CSL_SOK) {
149 IFPRINT(platform_write("platform_get_frequency: Hardware setup parameters reading... Failed.\n"));
150 IFPRINT(platform_write("\tReason: Error setting in hardware validation."\
151 " [status = 0x%x].\n", status));
152 platform_errno = PLATFORM_ERRNO_GENERIC;
153 return (uint32_t)-1;
154 } else {
155 /* Compute the real dsp freq (*100) */
156 dsp_freq = (hwSetupRead.pllM + 1)/(hwSetupRead.preDiv + 1);
157 dsp_freq = (dsp_freq * PLATFORM_BASE_CLK_RATE_MHZ)/(hwSetupRead.postDiv + 1);
158 }
160 return (dsp_freq);
162 }
164 Bool serial_num_isvalid(char c)
165 {
166 if (
167 ((c >= '0') && (c <= '9')) ||
168 ((c >= 'a') && (c <= 'z')) ||
169 ((c >= 'A') && (c <= 'Z'))
170 )
171 {
172 return TRUE;
173 }
174 else
175 {
176 return FALSE;
177 }
178 }
180 static void getSerialNumber(char *buf)
181 {
182 #if (PLATFORM_I2C_EEPROM_IN)
183 PLATFORM_DEVICE_info *p_device;
184 uint32_t i;
186 buf[0] = 0;
188 p_device = platform_device_open(PLATFORM_DEVID_EEPROM50, 0);
189 if (p_device != NULL)
190 {
191 /* Serial number stored in the last 128 bytes of the EEPROM 0x50 */
192 if (platform_device_read(p_device->handle, gDeviceEeprom0.page_size-MAX_SN_STORE_SIZE, (uint8_t *)buf, 16) == Platform_EOK)
193 {
194 for (i = 0; i < MAX_SN_SIZE; i++)
195 {
196 if(!serial_num_isvalid(buf[i]))
197 {
198 break;
199 }
200 }
201 buf[i] = 0;
202 }
203 else
204 {
205 IFPRINT(platform_write("Unable to read board serial number."));
206 }
207 }
209 platform_device_close(p_device->handle);
210 #endif
212 return;
213 }
215 /******************************************************************************
216 * platform_get_info
217 ******************************************************************************/
218 #if (PLATFORM_GETINFO_IN)
219 void platform_get_info(platform_info * p_info)
220 {
221 uint32_t csr = CSL_chipReadCSR();
222 volatile uint32_t *megm_rev = (uint32_t *) (MEGM_REV_ID_REGISTER);
223 uint32_t i;
225 if (p_info == 0) {
226 IFPRINT(platform_write("p_info argument is NULL\n"));
227 platform_errno = PLATFORM_ERRNO_INVALID_ARGUMENT;
228 return;
229 }
231 memset(p_info, 0, sizeof(platform_info));
233 strncpy(p_info->version, platform_library_version, 16);
235 p_info->cpu.core_count = PLATFORM_CORE_COUNT;
236 p_info->cpu.id = (uint16_t) CSL_FEXT(csr, CHIP_CSR_CPU_ID);
237 p_info->cpu.revision_id = (uint16_t) CSL_FEXT(csr, CHIP_CSR_REV_ID);
238 strncpy(p_info->cpu.name, PLATFORM_INFO_CPU_NAME, 32);
240 p_info->cpu.megamodule_revision_major =
241 (uint16_t)(((*megm_rev) & MEGM_REV_ID_MAJ_MASK) >> MEGM_REV_ID_MAJ_SHIFT);
242 p_info->cpu.megamodule_revision_minor =
243 (uint16_t)(((*megm_rev) & MEGM_REV_ID_MIN_MASK) >> MEGM_REV_ID_MIN_SHIFT);
245 strncpy(p_info->board_name, PLATFORM_INFO_BOARD_NAME, 32);
247 /* Only little endian mode is supported by the device */
248 p_info->cpu.endian = PLATFORM_LE;
250 p_info->emac.port_count = PLATFORM_MAX_EMAC_PORT_NUM;
252 p_info->frequency = platform_get_frequency();
253 platform_mcb.frequency = p_info->frequency;
254 p_info->board_rev = getBoardVersion();
255 platform_mcb.board_version = p_info->board_rev;
256 getSerialNumber(p_info->serial_nbr);
258 platform_get_macaddr(PLATFORM_MAC_TYPE_EFUSE, &(p_info->emac.efuse_mac_address[0]));
259 platform_get_macaddr(PLATFORM_MAC_TYPE_EEPROM, &(p_info->emac.eeprom_mac_address[0]));
261 for (i = PLATFORM_USER_LED_CLASS; i < PLATFORM_END_LED_CLASS; i++ ) {
262 switch (i) {
263 case PLATFORM_USER_LED_CLASS:
264 p_info->led[i].count = PLATFORM_SOC_LED_COUNT;
265 break;
266 case PLATFORM_SYSTEM_LED_CLASS:
267 p_info->led[i].count = PLATFORM_I2C_LED_COUNT;
268 break;
269 default:
270 IFPRINT(platform_write("Can't read LED Class information\n"));
271 platform_errno = PLATFORM_ERRNO_LED;
272 break;
273 }
274 }
275 }
276 #endif
278 /******************************************************************************
279 * platform_init
280 ******************************************************************************/
281 #if (PLATFORM_INIT_IN)
283 /*Enable EDC on MSMC*/
284 /* Note: Once MSMC EDC is enabled, error correction stays enabled until
285 * the MSMC is reset
286 */
287 static int MSMC_enableEDC ()
288 {
289 unsigned int status = 0;
291 *(unsigned int *)(SMEDCC) &= 0x7FFFFFFF; //Clear SEN(bit31)=0
292 *(unsigned int *)(SMEDCC) |= 0x40000000; //Set ECM(bit30)=1
294 /* Check the status */
295 status = *(unsigned int *)(SMEDCC);
298 if ((status>>30)==0x1)
299 /* Enabled */
300 return 1;
302 /* Failed */
303 return 0;
304 }
307 /*Enable EDC on L1P*/
308 static int enableL1PEDC ()
309 {
310 unsigned int status = 0;
312 *(unsigned int *)(L1PEDCMD) = 0x1; //Set EN(bit0)=1
314 /* Check the status */
315 status = *(unsigned int *)(L1PEDSTAT);
317 if ((status<<28) == 0x10000000)
318 /* Enabled */
319 return 1;
321 /* Failed */
322 return 0;
323 }
326 /*Enable EDC on L2*/
327 static int enableL2EDC ()
328 {
329 unsigned int status = 0;
331 *(unsigned int *)(L2EDCMD) = 0x1;
333 /* Check the status */
334 status = *(unsigned int *)(L2EDSTAT);
336 if ((status<<28) == 0x10000000)
337 /* Enabled */
338 return 1;
340 /* Failed */
341 return 0;
342 }
344 /*Enable all bits in L2EDCEN*/
345 static int enableEDCL2EDCEN ()
346 {
347 /* Set DL2CEN(bit0),PL2CEN(bit1),DL2SEN(bit2),PL2SEN(bit3),SDMAEN(bit4)=1 */
348 *(unsigned int *)(L2EDCEN) |= 0x1F;
349 return 1;
350 }
352 void configSoCGpio(void)
353 {
354 /* FLASH_HOLD */
355 gpioSetDirection(GPIO_PORT_1, 41, GPIO_OUT);
356 //gpioClearOutput(GPIO_PORT_1, 41);
357 gpioSetOutput(GPIO_PORT_1, 41);
359 // Set GPIO1_54 to output, drive low.
360 // This enables UART connection to RS232 tranceiver / DB9 connector on K2G EVM.
361 gpioSetDirection(GPIO_PORT_1, 54, GPIO_OUT);
362 gpioClearOutput(GPIO_PORT_1, 54);
363 }
365 #define ENABLE_CLK_DEBUG
367 void platform_info_print(void)
368 {
369 platform_write("\n\nPlatform Info:\n");
370 platform_write("**************************************\n");
371 platform_write("66AK2G02 - C66 Core\n");
372 platform_write("\nClock Selection - ");
373 if(gSysClkSel)
374 {
375 platform_write("External Clock on SYSCLKP\n\n");
376 }
377 else
378 {
379 platform_write("Internal Clock on SYSOSC_IN\n\n");
380 }
382 platform_write("Core PLL Clock - 600MHz\n");
383 platform_write("DDR PLL Clock - 200MHz\n");
384 platform_write("UART PLL Clock - 384MHz\n");
385 platform_write("DSS PLL Clock - 72.4MHz\n");
386 platform_write("NSS PLL Clock - 1000MHz\n");
387 platform_write("ICSS PLL Clock - 200MHz\n");
388 platform_write("**************************************\n\n\n");
389 }
391 Platform_STATUS platform_init(platform_init_flags * p_flags,
392 platform_init_config * p_config)
393 {
394 CSL_Status status;
395 PllcHwSetup pllc_hwSetup;
396 PllcHwSetup pllc_hwSetupRead;
397 volatile uint32_t i;
398 uint8_t pData[50];
400 struct pll_init_data ddr_pll_data = {DDR3A_PLL, PLLM_DDR3,PLLD_DDR3,PLLOD_DDR3};
401 pll_init_data pll_data;
403 #ifdef PLATFORM_PLL_REINIT
404 int loop_count;
405 #endif
407 /*************************************************************************
408 * This routine may be called before BIOS or the application has loaded.
409 * Do not try and write debug statements from here.
410 ***********************************************************************/
412 if ((p_flags == 0) || (p_config == 0)){
413 platform_errno = PLATFORM_ERRNO_INVALID_ARGUMENT;
414 return ( (Platform_STATUS) Platform_EFAIL);
415 }
417 /* Start TCSL so its free running */
418 CSL_chipWriteTSCL(0);
420 /* Unlock the Boot Config */
421 CSL_BootCfgUnlockKicker();
423 /* Get the sys clock selection based on SYSCLKSEL pin status */
424 gSysClkSel = CSL_FEXT (hBootCfg->PLLCLKSEL_STAT,
425 BOOTCFG_PLLCLKSEL_STAT_SYSCLKSEL_STAT);
426 if(gSysClkSel)
427 {
428 //printf("Clock Input is SYSCLKP\n");
430 ddr_pll_data.pll = 0;
431 ddr_pll_data.pll_m = DDRCLKP_PLLM_DDR3;
432 ddr_pll_data.pll_d = DDRCLKP_PLLD_DDR3;
433 ddr_pll_data.pll_od = DDRCLKP_PLLOD_DDR3;
434 }
435 else
436 {
437 //printf("Clock Input is HF OSC\n");
438 }
440 #if defined(SODIMM_CONFIG)
441 uint8_t buf[256];
442 uint8_t i2cportnumber=1;
443 if(readSPD(0x53,buf,i2cportnumber) == Platform_EOK)
444 {
445 uint8_t Dividend,Divisor;
446 uint16_t ddrClock;
447 float MTB,tCK;
448 Dividend = buf[10];
449 Divisor = buf[11];
450 MTB = (float)Dividend/Divisor;
451 tCK = buf[12]*MTB; // minimum cycle time tCK
452 ddrClock = ((1/tCK)*1000)*2;
453 if(ddrClock == 800)
454 {
455 ddr_pll_data.pll = 0;
456 ddr_pll_data.pll_m = 4;
457 ddr_pll_data.pll_d = 1;
458 ddr_pll_data.pll_od = 2;
459 }
460 else if(ddrClock == 1066)
461 {
462 ddr_pll_data.pll = 0;
463 ddr_pll_data.pll_m = 16;
464 ddr_pll_data.pll_d = 1;
465 ddr_pll_data.pll_od = 6;
466 }
467 else if(ddrClock == 1333)
468 {
469 ddr_pll_data.pll = 0;
470 ddr_pll_data.pll_m = 20;
471 ddr_pll_data.pll_d = 1;
472 ddr_pll_data.pll_od = 6;
473 }
474 else if(ddrClock == 1600)
475 {
476 ddr_pll_data.pll = 0;
477 ddr_pll_data.pll_m = 8;
478 ddr_pll_data.pll_d = 1;
479 ddr_pll_data.pll_od = 2;
480 }
481 else
482 {
483 printf("ddrClock --> %d is not valid\n",ddrClock);
484 return ( (Platform_STATUS) Platform_EFAIL);
485 }
486 }
487 #endif
489 #ifdef PLATFORM_PLL_REINIT
490 for (loop_count = 0; loop_count < 10; loop_count++) {
491 platform_errno = 0;
492 #endif
494 PowerUpDomains();
496 /* Initialise default pin muxing */
497 pinMuxInit();
499 /* PLLC module handle structure */
500 if (p_flags->pll)
501 {
502 /* Set the Core PLL */
503 /* Clear local data structures */
504 memset(&pllc_hwSetup, 0, sizeof(PllcHwSetup));
506 /* Setup PLLC hardware parameters */
507 pllc_hwSetup.divEnable = (CSL_BitMask32) (PLLC_DIVEN_PLLDIV2 |
508 PLLC_DIVEN_PLLDIV3) ;
510 /* Setup PLLC hardware parameters */
511 pllc_hwSetup.pllM =
512 (((p_config->pllm) ? p_config->pllm : PLATFORM_PLL1_PLLM_val) - 1);
513 pllc_hwSetup.preDiv = PLATFORM_PLL_PREDIV_val - 1;
514 pllc_hwSetup.pllDiv2 = PLATFORM_PLLDIV2_val - 1;
515 pllc_hwSetup.pllDiv3 = PLATFORM_PLLDIV3_val - 1;
516 pllc_hwSetup.postDiv = PLATFORM_PLL_POSTDIV_val -1;
518 /* Configure PLL muxing and selection */
519 configPllClkSelection(gSysClkSel);
521 #ifdef ENABLE_CLK_DEBUG
522 /* Enable Main PLL on OBSCLK pin and SYSCLKOUT */
523 enablePllObsClk(OBSCLK_MAIN_PLL);
524 CSL_FINS(hBootCfg->DEVCFG, BOOTCFG_DEVCFG_SYSCLKOUTEN, 1);
525 #endif
526 /* set Pll */
527 status = CorePllcHwSetup (&pllc_hwSetup);
529 if (status != CSL_SOK) {
530 platform_errno = PLATFORM_ERRNO_PLL_SETUP;
531 return ( (Platform_STATUS) Platform_EFAIL);
532 }
534 /* Read back */
535 status = CorePllcGetHwSetup (&pllc_hwSetupRead);
537 if (status != CSL_SOK) {
538 platform_errno = PLATFORM_ERRNO_PLL_SETUP;
539 return ( (Platform_STATUS) Platform_EFAIL);
540 }
542 #ifdef ENABLE_CLK_DEBUG
543 /* Enable NSS PLL on OBSCLK pin */
544 enablePllObsClk(OBSCLK_NSS_PLL);
545 #endif
546 pll_data.pll_m = PLLM_NSS;
547 pll_data.pll_d = PLLD_NSS;
548 pll_data.pll_od = CLKOD_NSS;
550 /* Set the NSS PLL */
551 status = SetNssPllConfig(&pll_data);
552 if (status != CSL_SOK) {
553 platform_errno = PLATFORM_ERRNO_PLL_SETUP;
554 return ( (Platform_STATUS) Platform_EFAIL);
555 }
557 #ifdef ENABLE_CLK_DEBUG
558 /* Enable DDR3 PLL on OBSCLK pin */
559 enablePllObsClk(OBSCLK_DDR3A_PLL);
560 #endif
561 /* Set the DDR3 PLL */
562 status = SetDDR3PllConfig(&ddr_pll_data);
563 if (status != CSL_SOK)
564 {
565 platform_errno = PLATFORM_ERRNO_PLL_SETUP;
566 return ( (Platform_STATUS) Platform_EFAIL);
567 }
569 #ifdef ENABLE_CLK_DEBUG
570 /* Enable DSS PLL on OBSCLK pin */
571 enablePllObsClk(OBSCLK_DSS_PLL);
572 #endif
574 pll_data.pll_m = PLLM_DSS;
575 pll_data.pll_d = PLLD_DSS;
576 pll_data.pll_od = CLKOD_DSS;
578 /* Set the DSS PLL */
579 status = SetDssPllConfig(&pll_data);
580 if (status != CSL_SOK) {
581 platform_errno = PLATFORM_ERRNO_PLL_SETUP;
582 return ( (Platform_STATUS) Platform_EFAIL);
583 }
585 #ifdef ENABLE_CLK_DEBUG
586 /* Enable ICSS PLL on OBSCLK pin */
587 enablePllObsClk(OBSCLK_ICSS_PLL);
588 #endif
590 pll_data.pll_m = PLLM_ICSS;
591 pll_data.pll_d = PLLD_ICSS;
592 pll_data.pll_od = CLKOD_ICSS;
594 /* Set the ICSS PLL */
595 status = SetIcssPllConfig(&pll_data);
596 if (status != CSL_SOK) {
597 platform_errno = PLATFORM_ERRNO_PLL_SETUP;
598 return ( (Platform_STATUS) Platform_EFAIL);
599 }
601 #ifdef ENABLE_CLK_DEBUG
602 /* Enable UART PLL on OBSCLK pin */
603 enablePllObsClk(OBSCLK_UART_PLL);
604 #endif
606 pll_data.pll_m = PLLM_UART;
607 pll_data.pll_d = PLLD_UART;
608 pll_data.pll_od = CLKOD_UART;
610 /* Set the UART PLL */
611 status = SetUartPllConfig(&pll_data);
612 if (status != CSL_SOK) {
613 platform_errno = PLATFORM_ERRNO_PLL_SETUP;
614 return ( (Platform_STATUS) Platform_EFAIL);
615 }
616 }
618 /* Save frequency, its needed by platform_delay */
619 if(!platform_mcb.frequency) {
620 platform_mcb.frequency = platform_get_frequency();
621 }
623 /* Initialize DDR */
624 if (p_flags->ddr) {
626 xmc_setup();
628 /* Delay 10msec */
629 for (i=0; i<1000; i++)
630 platform_delay (10);
631 #if defined(SODIMM_CONFIG)
632 status = init_ddr3param(buf);
633 #else
635 status = DDR3Init();
636 #endif
638 if (status != CSL_SOK) {
639 platform_errno = PLATFORM_ERRNO_GENERIC;
640 return ( (Platform_STATUS) Platform_EFAIL);
641 }
642 }
644 #ifdef PLATFORM_PLL_REINIT
645 if (!p_flags->pll || !p_flags->ddr) {
646 break;
647 }
649 /* Run DDR3 test */
650 if (platform_memory_test(PLL_REINIT_DDR3_TEST_START_ADDR,
651 PLL_REINIT_DDR3_TEST_END_ADDR) == Platform_EOK) {
652 break;
653 }
654 }
655 platform_init_return_code = loop_count;
657 if (loop_count == 10) {
658 platform_errno = PLATFORM_ERRNO_GENERIC;
659 return ( (Platform_STATUS) Platform_EFAIL);
660 }
661 #endif
663 /* Enable Error Correction for memory */
664 if (p_flags->ecc) {
665 enableL1PEDC();
666 enableEDCL2EDCEN();
667 enableL2EDC();
668 MSMC_enableEDC();
669 }
671 //TODO: Need to change SGMII to RGMII
672 if (p_flags->phy) {
673 //configSerdes();
674 //Init_SGMII(0);
675 //Init_SGMII(1);
676 }
678 #if (PLATFORM_GPIO_IN)
679 gpioInit(GPIO_PORT_0);
680 gpioInit(GPIO_PORT_1);
681 configSoCGpio();
682 #endif
684 #if (PLATFORM_LED_IN)
685 /* Enable GPIO mode for LED0 and LED1 */
686 pinMuxSetMode(SOC_LED0_PADCONFIG, PADCONFIG_MUX_MODE_QUATERNARY);
687 pinMuxSetMode(SOC_LED1_PADCONFIG, PADCONFIG_MUX_MODE_QUATERNARY);
689 /* Configure LED0 and LED1 GPIO pins as output */
690 gpioSetDirection(GPIO_PORT_0, SOC_LED0_GPIO, GPIO_OUT);
691 gpioSetDirection(GPIO_PORT_1, SOC_LED1_GPIO, GPIO_OUT);
692 #endif
694 #if (PLATFORM_I2C_IN)
695 /* Initialize all the I2C ports - Needed for different I2C devices on the board */
696 evmI2CInit(I2C_PORT_0);
697 evmI2CInit(I2C_PORT_1);
698 evmI2CInit(I2C_PORT_2);
699 //status = i2cProbe (0x0, 0x5C, 0x0900, pData, 0x2 );
700 //status = i2cProbe (0x0, 0x5C, 0x0000, pData, 0x2 );
701 #endif
703 pinMuxSetMode(113, PADCONFIG_MUX_MODE_QUATERNARY);
704 gpioSetDirection(GPIO_PORT_0, PLATFORM_AUDIO_HSR_RESETz_GPIO, GPIO_OUT);
705 gpioSetOutput(GPIO_PORT_0, PLATFORM_AUDIO_HSR_RESETz_GPIO);
707 #if (PLATFORM_I2C_IO_EXP_IN)
708 /* Initialize IO expander */
709 i2cIoExpanderInit();
710 #endif
712 return Platform_EOK;
713 }
714 #endif
716 /******************************************************************************
717 * platform_get_coreid
718 ******************************************************************************/
719 #if (PLATFORM_GETCOREID_IN)
720 uint32_t platform_get_coreid(void)
721 {
722 return (CSL_chipReadDNUM());
723 }
724 #endif
726 uint32_t platform_get_clksel(void)
727 {
728 return (gSysClkSel);
729 }
731 /******************************************************************************
732 * platform_getmacaddr
733 ******************************************************************************/
734 #if (PLATFORM_GETMACADDR_IN)
735 Platform_STATUS platform_get_emac_info(uint32_t port_num, PLATFORM_EMAC_EXT_info * emac_info)
736 {
737 uint32_t mac_addr2, mac_addr1;
739 IFPRINT(platform_write("platform_get_emac_info called \n"));
741 emac_info->port_num = port_num;
742 emac_info->mode = emac_port_mode[port_num];
744 CSL_BootCfgGetMacIdentifier(&mac_addr1, &mac_addr2);
745 emac_info->mac_address[0] = ((mac_addr2 & 0x0000ff00) >> 8);
746 emac_info->mac_address[1] = (mac_addr2 & 0x000000ff);
748 emac_info->mac_address[2] = ((mac_addr1 & 0xff000000) >> 24);
749 emac_info->mac_address[3] = ((mac_addr1 & 0x00ff0000) >> 16);
750 emac_info->mac_address[4] = ((mac_addr1 & 0x0000ff00) >> 8);
751 emac_info->mac_address[5] = (mac_addr1 & 0x000000ff);
753 return Platform_EOK;
754 }
756 /*
757 * August 15, 2011 - platform_get_macaddr() is deprecated, application needs to call
758 * the new API platform_get_emac_info() to get the MAC address of the port
759 */
760 Platform_STATUS platform_get_macaddr(PLATFORM_MAC_TYPE type, uint8_t * p_mac_address)
761 {
762 IFPRINT(platform_write("platform_get_macaddr called \n"));
764 switch (type) {
766 case PLATFORM_MAC_TYPE_EFUSE:
767 {
768 uint32_t mac_addr2, mac_addr1;
770 CSL_BootCfgGetMacIdentifier(&mac_addr1, &mac_addr2);
771 p_mac_address[0] = ((mac_addr2 & 0x0000ff00) >> 8);
772 p_mac_address[1] = (mac_addr2 & 0x000000ff);
774 p_mac_address[2] = ((mac_addr1 & 0xff000000) >> 24);
775 p_mac_address[3] = ((mac_addr1 & 0x00ff0000) >> 16);
776 p_mac_address[4] = ((mac_addr1 & 0x0000ff00) >> 8);
777 p_mac_address[5] = (mac_addr1 & 0x000000ff);
779 return Platform_EOK;
780 }
782 default:
783 case PLATFORM_MAC_TYPE_EEPROM:
784 {
785 memset(p_mac_address, 0, 6);
786 return ((Platform_STATUS) Platform_EUNSUPPORTED);
787 }
788 }
789 }
790 #endif
792 /******************************************************************************
793 * platform_get_phy_addr
794 ******************************************************************************/
795 #if (PLATFORM_GETPHYADDR_IN)
796 int32_t platform_get_phy_addr(uint32_t port_num)
797 {
798 IFPRINT(platform_write("platform_get_phy_addr called \n"));
800 return port_num;
801 }
802 #endif
804 /******************************************************************************
805 * platform_phy_link_status
806 ******************************************************************************/
807 #if (PLATFORM_PHYLINKSTATUS_IN)
808 Platform_STATUS platform_phy_link_status(uint32_t port_num)
809 {
810 uint32_t phy_addr;
811 CSL_MDIO_USERACCESS user_access_reg;
813 IFPRINT(platform_write("platform_get_phy_link_status (portnum = %d) called \n", port_num));
815 phy_addr = platform_get_phy_addr( port_num);
817 CSL_MDIO_getUserAccessRegister(port_num, &user_access_reg);
819 user_access_reg.phyAddr = phy_addr;
820 user_access_reg.regAddr = 24; //The LED Control Reg address
821 user_access_reg.data &= 0xFFBE; // Need to check this in ?
822 user_access_reg.data |= 1;
824 CSL_MDIO_setUserAccessRegister(port_num, &user_access_reg);
826 return Platform_EOK;
827 }
828 #endif
830 /******************************************************************************
831 * platform_get_switch_state
832 ******************************************************************************/
833 #if (PLATFORM_GETSWITCHSTATE_IN)
834 uint32_t platform_get_switch_state(uint32_t id)
835 {
836 IFPRINT(platform_write("platform_get_switch_state(id=%d) called \n", id));
838 return (bmcGetUserSwitch(id));
839 }
840 #endif
843 /******************************************************************************
844 * platform_uart_read
845 ******************************************************************************/
846 #if (PLATFORM_UART_IN)
847 Platform_STATUS platform_uart_read(uint8_t *buf, uint32_t delay)
848 {
849 uint32_t delayCount = delay;
851 if (buf == NULL){
852 return ((Platform_STATUS) Platform_EINVALID);
853 }
855 while( (UartIsDataReady(uart_port_num)) != 1)
856 {
857 if (delayCount--)
858 {
859 platform_delay(1);
860 }
861 else
862 {
863 IFPRINT(platform_write("platform_uart_read: Read timeout\n"));
864 platform_errno = PLATFORM_ERRNO_READTO;
865 *buf = UartReadData(uart_port_num);
866 return ( (Platform_STATUS) Platform_EFAIL);
867 }
868 }
870 *buf = UartReadData (uart_port_num);
872 return Platform_EOK;
873 }
875 /******************************************************************************
876 * platform_uart_write
877 ******************************************************************************/
878 Platform_STATUS platform_uart_write(uint8_t buf)
879 {
880 UART_RET ret;
882 ret = UartWriteData(uart_port_num, buf);
883 if(ret != UART_RET_OK)
884 {
885 platform_errno = PLATFORM_ERRNO_DEV_FAIL;
886 return Platform_EFAIL;
887 }
889 return Platform_EOK;
890 }
892 /******************************************************************************
893 * platform_uart_set_baudrate
894 ******************************************************************************/
895 Platform_STATUS platform_uart_set_baudrate(uint32_t baudrate)
896 {
897 uint16_t brate;
898 UART_RET ret;
900 IFPRINT(platform_write("platform_uart_set_baudrate(baudrate=%d) called \n", baudrate));
902 brate = ((uint16_t) (PLATFORM_UART_INPUT_CLOCK_RATE/(baudrate * 16)));
904 ret = UartSetBaudRate(uart_port_num, brate);
905 if(ret != UART_RET_OK)
906 {
907 IFPRINT(platform_write("platform_uart_set_baudrate: Failed with error - %d\n", ret));
908 platform_errno = PLATFORM_ERRNO_DEV_FAIL;
909 return Platform_EFAIL;
910 }
912 return Platform_EOK;
913 }
915 /******************************************************************************
916 * platform_uart_init
917 ******************************************************************************/
918 Platform_STATUS platform_uart_init(void) {
920 UART_RET ret;
921 Platform_STATUS staus;
922 IFPRINT(platform_write("platform_uart_init called \n"));
924 ret = UartInit(uart_port_num);
925 if(ret != UART_RET_OK)
926 {
927 platform_errno = PLATFORM_ERRNO_DEV_FAIL;
928 return Platform_EFAIL;
929 }
931 staus = platform_uart_set_baudrate(115200);
933 return (staus);
934 }
936 /******************************************************************************
937 * platform_uart_set_params
938 *
939 * UART platform library supports three HW instances of UART controller but
940 * platform uart APIs does not provide choose UART port number.
941 * Set UART port number using this function and subsequent calls to platform
942 * uart APIs will use the uart port number set.
943 ******************************************************************************/
944 Platform_STATUS platform_uart_set_params(PLATFORM_UART_Params *params) {
946 IFPRINT(platform_write("platform_uart_set_params called \n"));
948 if(params->uart_port <= PLATFORM_UART_PORT_2)
949 {
950 uart_port_num = params->uart_port;
951 }
952 else
953 {
954 return Platform_EFAIL;
955 }
957 return Platform_EOK;
958 }
960 #endif
963 #if (PLATFORM_LED_IN)
965 uint8_t soc_led_pin_num [PLATFORM_SOC_LED_COUNT] = {SOC_LED0_GPIO, SOC_LED1_GPIO, IO_EXP_SOC_LED2, IO_EXP_SOC_LED3, IO_EXP_SOC_LED4};
966 uint8_t soc_led_gpio_port [2] = {GPIO_PORT_0, GPIO_PORT_1};
968 /******************************************************************************
969 * platform_user_led_ctrl
970 ******************************************************************************/
971 static Platform_STATUS platform_user_led_ctrl(uint32_t led_id, PLATFORM_LED_OP operation)
972 {
973 GPIO_RET gpioRet;
974 I2C_RET i2cRet;
975 Platform_STATUS status;
977 status = Platform_EOK;
979 IFPRINT(platform_write("platform_user_led_ctrl called \n"));
981 switch(led_id) {
982 case PLATFORM_SOC_LED0:
983 case PLATFORM_SOC_LED1:
984 if (operation == PLATFORM_LED_OFF) {
985 gpioRet = gpioClearOutput(soc_led_gpio_port[led_id],
986 soc_led_pin_num[led_id]);
987 }
988 else {
989 gpioRet = gpioSetOutput(soc_led_gpio_port[led_id],
990 soc_led_pin_num[led_id]);
991 }
993 if(gpioRet != GPIO_RET_OK)
994 {
995 IFPRINT(platform_write("platform_user_led_ctrl: Configuring LED %d Failed!\n", led_id));
996 platform_errno = PLATFORM_ERRNO_DEV_FAIL;
997 status = Platform_EFAIL;
998 }
1000 break;
1002 case PLATFORM_SOC_LED2:
1003 case PLATFORM_SOC_LED3:
1004 case PLATFORM_SOC_LED4:
1005 if (operation == PLATFORM_LED_ON) {
1006 i2cRet = i2cIoExpanderWritePin(
1007 (I2cIoExpPins) soc_led_pin_num[led_id],
1008 I2C_IO_EXP_PIN_LOW); // LOW to LED ON
1009 }
1010 else {
1011 i2cRet = i2cIoExpanderWritePin(
1012 (I2cIoExpPins) soc_led_pin_num[led_id],
1013 I2C_IO_EXP_PIN_HIGH); // HIGH to LED OFF
1014 }
1016 if(i2cRet != I2C_RET_OK)
1017 {
1018 IFPRINT(platform_write("platform_user_led_ctrl: Configuring LED %d Failed!\n", led_id));
1019 platform_errno = PLATFORM_ERRNO_DEV_FAIL;
1020 status = Platform_EFAIL;
1021 }
1023 break;
1025 default:
1026 IFPRINT(platform_write("platform_user_led_ctrl: Invalid led_id %d\n", led_id));
1027 platform_errno = PLATFORM_ERRNO_INVALID_ARGUMENT;
1028 return ( (Platform_STATUS) Platform_EUNSUPPORTED);
1029 }
1031 return (status);
1032 }
1034 /******************************************************************************
1035 * platform_led
1036 ******************************************************************************/
1037 Platform_STATUS platform_led(uint32_t led_id, PLATFORM_LED_OP operation, LED_CLASS_E led_class)
1038 {
1039 Platform_STATUS status;
1041 IFPRINT(platform_write("platform_led(ledid=%d,operation=%d,class=%d) called \n", led_id, operation, led_class));
1043 switch (led_class) {
1044 case PLATFORM_USER_LED_CLASS:
1045 status = platform_user_led_ctrl(led_id, operation);
1046 break;
1047 case PLATFORM_SYSTEM_LED_CLASS:
1048 return ( (Platform_STATUS) Platform_EUNSUPPORTED);
1049 default:
1050 IFPRINT(platform_write("platform_led: Invalid led_class %d\n", led_class));
1051 platform_errno = PLATFORM_ERRNO_INVALID_ARGUMENT;
1052 return ( (Platform_STATUS) Platform_EUNSUPPORTED);
1053 }
1055 return (status);
1056 }
1057 #endif
1059 /******************************************************************************
1060 * platform_delay
1061 ******************************************************************************/
1062 #if (PLATFORM_DELAY_IN)
1063 Platform_STATUS platform_delay(uint32_t usecs)
1064 {
1065 int32_t delayCount = (int32_t) usecs * platform_mcb.frequency;
1066 int32_t start_val = (int32_t) CSL_chipReadTSCL();
1068 while (((int32_t)CSL_chipReadTSCL() - start_val) < delayCount);
1070 return Platform_EOK;
1071 }
1073 void platform_delaycycles(uint32_t cycles)
1074 {
1075 uint32_t start_val = CSL_chipReadTSCL();
1077 while ((CSL_chipReadTSCL() - start_val) < cycles);
1079 return;
1080 }
1081 #endif
1083 /******************************************************************************
1084 * platform_memory_test
1085 ******************************************************************************/
1086 #if (PLATFORM_EXTMEMTEST_IN)
1087 static inline int32_t platform_memory_test (uint32_t start_address, uint32_t end_address)
1088 {
1089 uint32_t index, value;
1091 /* Write a pattern */
1092 for (index = start_address; index < end_address; index += 4) {
1093 *(volatile uint32_t *) index = (uint32_t)index;
1094 }
1096 /* Read and check the pattern */
1097 for (index = start_address; index < end_address; index += 4) {
1099 value = *(uint32_t *) index;
1101 if (value != index) {
1102 IFPRINT(platform_write("platform_memory_test: Failed at address index = 0x%x value = 0x%x *(index) = 0x%x\n",
1103 index, value, *(volatile uint32_t *) index));
1104 platform_errno = index;
1105 return (Platform_EFAIL);
1106 }
1107 }
1109 /* Write a pattern for complementary values */
1110 for (index = start_address; index < end_address; index += 4) {
1111 *(volatile uint32_t *) index = (uint32_t)~index;
1112 }
1114 /* Read and check the pattern */
1115 for (index = start_address; index < end_address; index += 4) {
1117 value = *(uint32_t *) index;
1119 if (value != ~index) {
1120 IFPRINT(platform_write("platform_memory_test: Failed at address index = 0x%x value = 0x%x *(index) = 0x%x\n",
1121 index, value, *(volatile uint32_t *) index));
1122 platform_errno = index;
1123 return (Platform_EFAIL);
1124 }
1125 }
1127 return Platform_EOK;
1128 }
1129 #endif
1131 /******************************************************************************
1132 * platform_external_memory_test
1133 ******************************************************************************/
1134 #if (PLATFORM_EXTMEMTEST_IN)
1135 Platform_STATUS platform_external_memory_test(uint32_t start_address, uint32_t end_address)
1136 {
1137 IFPRINT(platform_write("platform_external_memory_test(start=0x%x,end=0x%x) called \n", start_address, end_address));
1139 if((start_address == 0) && (end_address == 0)) {
1140 start_address = PLATFORM_DDR3_SDRAM_START;
1141 end_address = PLATFORM_DDR3_SDRAM_END - 1;
1142 }
1144 if ((start_address < PLATFORM_DDR3_SDRAM_START) ||
1145 (end_address > PLATFORM_DDR3_SDRAM_END) ||
1146 (start_address >= end_address)){
1147 IFPRINT(platform_write("platform_external_memory_test: Start address (0x%08x) or end address (0x%08x)\n",
1148 start_address, end_address));
1149 platform_errno = PLATFORM_ERRNO_INVALID_ARGUMENT;
1150 return ((Platform_STATUS) Platform_EINVALID);
1151 }
1153 return platform_memory_test(start_address, end_address);
1154 }
1155 #endif
1157 /******************************************************************************
1158 * platform_write - Printf or echo to UART or both
1159 ******************************************************************************/
1160 #if (PLATFORM_WRITE_IN)
1161 WRITE_info platform_write_configure (WRITE_info wtype) {
1162 WRITE_info original;
1163 IFPRINT(platform_write("platform_write_configure(write_type=%d) called \n", wtype));
1164 original = write_type;
1165 write_type = wtype;
1166 return original;
1167 }
1169 void platform_write(const char *fmt, ... )
1170 {
1171 va_list arg_ptr;
1172 uint32_t i, length;
1174 /* Initial platform_write to temporary buffer.. at least try some sort of sanity check so we don't write all over
1175 * memory if the print is too large.
1176 */
1177 if (strlen(fmt) > MAX_WRITE_LEN) {platform_errno = PLATFORM_ERRNO_INVALID_ARGUMENT; return;}
1179 va_start( arg_ptr, fmt );
1180 length = vsprintf( (char *)write_buffer, fmt, arg_ptr );
1181 va_end( arg_ptr );
1183 if ((write_type == PLATFORM_WRITE_PRINTF) || (write_type == PLATFORM_WRITE_ALL)) {
1184 printf( "%s", write_buffer );
1185 fflush(stdout);
1186 }
1188 if ((write_type == PLATFORM_WRITE_UART) || (write_type == PLATFORM_WRITE_ALL)) {
1189 /* Log to console port (routine only sends a byte at a time) */
1190 for (i=0; i < length; i++) {
1191 if (write_buffer[i] == '\n') {
1192 UartWriteData(PLATFORM_UART_DBG_PORT, (uint8_t)0x0D);
1193 UartWriteData(PLATFORM_UART_DBG_PORT, (uint8_t)0x0A);
1194 }
1195 else {
1196 UartWriteData(PLATFORM_UART_DBG_PORT, (uint8_t)write_buffer[i]);
1197 }
1198 }
1199 }
1201 return;
1202 }
1203 #endif
1205 /******************************************************************************
1206 * platform_read_configure - Connfigures the input source for platform_read
1207 ******************************************************************************/
1208 #if (PLATFORM_READ_IN)
1209 READ_info platform_read_configure (READ_info rdype) {
1210 READ_info original;
1212 IFPRINT(platform_write("platform_read_configure(read_type=%d) called \n", rdype));
1214 original = read_type;
1215 read_type = rdype;
1217 return original;
1218 }
1220 /******************************************************************************
1221 * platform_read - scanf or read from UART
1222 ******************************************************************************/
1223 uint32_t platform_read(uint8_t *data, uint32_t length)
1224 {
1225 Platform_STATUS status = Platform_EOK;
1226 uint32_t count = 0;
1228 if (read_type == PLATFORM_READ_UART)
1229 {
1230 /* Wait till an input is provided */
1231 do
1232 {
1233 status = platform_uart_read(data, PLATFORM_READ_DELAY);
1234 if(status == Platform_EOK)
1235 {
1236 /* Check if user pressed enter */
1237 if((*data == 0xD) || (*data == 0x1B))
1238 {
1239 *data = '\0';
1240 break;
1241 }
1243 platform_uart_write(*data);
1245 count++;
1246 data++;
1247 }
1249 } while ((status != Platform_EOK) || (count != length));
1250 }
1252 if (read_type == PLATFORM_READ_SCANF)
1253 {
1254 count = scanf("%s", data);
1255 }
1257 return (count);
1258 }
1259 #endif /* #if (PLATFORM_READ_IN) */
1261 /******************************************************************************
1262 * platform_device_open
1263 ******************************************************************************/
1264 #if (PLATFORM_NAND_IN) || (PLATFORM_NOR_IN) || (PLATFORM_I2C_EEPROM_IN) || (PLATFORM_MMCHS_IN) || (PLATFORM_QSPI_FLASH_IN)
1265 PLATFORM_DEVICE_info *platform_device_open(uint32_t deviceid, uint32_t flags ) {
1267 PLATFORM_DEVICE_info *p_info;
1269 IFPRINT(platform_write("platform_device_open(deviceid=0x%x,flags=0x%x) called \n", deviceid, flags));
1271 #if (PLATFORM_NAND_IN)
1273 if (deviceid == PLATFORM_DEVID_MT29F2G16ABAFA) {
1274 /* Disable Write protect in NAND */
1275 if (nandInit() != SUCCESS) {
1276 IFPRINT(platform_write("platform_dveice_open: Initialization failed.\n"));
1277 return NULL;
1278 }
1280 /* Store the open flags */
1281 gDeviceNand.flags = flags;
1283 /* Set the device to point to its bad block list */
1284 gDeviceNand.bblist = (uint8_t *)&gDeviceNandBBlist;
1286 p_info = &gDeviceNand;
1288 if (NandGetDetails(p_info) != SUCCESS) {
1289 IFPRINT(platform_write("platform_device_open: Unable to read device information.\n"));
1290 platform_errno = PLATFORM_ERRNO_BADFLASHDEV;
1291 return NULL;
1292 }
1294 p_info->handle = deviceid;
1296 return p_info;
1297 }
1299 #endif
1301 #if (PLATFORM_NOR_IN)
1303 NOR_STATUS nor_status;
1305 if (deviceid == PLATFORM_DEVID_NORN25Q128A13ESF40F) {
1307 /* Disable Write protect in NOR */
1308 nor_status = nor_init();
1309 if (nor_status != NOR_EOK) {
1310 IFPRINT(platform_write("platform_device_open: Initialization failed.\n"));
1311 return NULL;
1312 }
1314 /* Store the open flags */
1315 gDeviceNor.flags = flags;
1317 p_info = &gDeviceNor;
1319 if (nor_get_details(p_info) != SUCCESS) {
1320 IFPRINT(platform_write("platform_device_open: Unable to read device information.\n"));
1321 platform_errno = PLATFORM_ERRNO_BADFLASHDEV;
1322 return NULL;
1323 }
1325 p_info->handle = deviceid;
1327 return p_info;
1328 }
1329 #endif
1331 #if (PLATFORM_I2C_EEPROM_IN)
1332 uint8_t i2cportnumber=0;
1333 if (deviceid == PLATFORM_DEVID_EEPROM50) {
1334 /* Store the open flags */
1335 gDeviceEeprom0.flags = flags;
1337 evmI2CInit(i2cportnumber);
1338 p_info = &gDeviceEeprom0;
1339 p_info->handle = deviceid;
1340 return p_info;
1341 }
1343 if (deviceid == PLATFORM_DEVID_EEPROM51) {
1344 /* Store the open flags */
1345 gDeviceEeprom1.flags = flags;
1346 evmI2CInit(i2cportnumber);
1347 p_info = &gDeviceEeprom1;
1348 p_info->handle = deviceid;
1349 return p_info;
1350 }
1352 #endif
1354 #if (PLATFORM_MMCHS_IN)
1356 if (deviceid == PLATFORM_DEVID_EMMC) {
1357 mmcInfo = mmchsInit(MMCHS_MMC_INST);
1358 if (mmcInfo == NULL) {
1359 IFPRINT(platform_write("platform_device_open: Initialization failed.\n"));
1360 return NULL;
1361 }
1363 /* Store the open flags */
1364 gDeviceEmmc.flags = flags;
1365 mmcCard = mmcInfo->card;
1367 p_info = &gDeviceEmmc;
1368 p_info->handle = deviceid;
1370 if (mmcCard->cardType == MMCHS_MMC)
1371 {
1372 p_info->type = PLATFORM_DEVICE_EMMC;
1373 p_info->manufacturer_id = mmcCard->cid.manfid;
1374 p_info->device_id = mmcCard->cid.oemid;
1375 p_info->width = mmcCard->busWidth;
1376 p_info->block_count = mmcCard->nBlks;
1377 p_info->page_size = mmcCard->blkLen;
1378 }
1379 return p_info;
1380 }
1382 if (deviceid == PLATFORM_DEVID_SD) {
1383 sdInfo = mmchsInit(MMCHS_SD_CARD_INST);
1384 if (sdInfo == NULL) {
1385 IFPRINT(platform_write("platform_device_open: Initialization failed.\n"));
1386 return NULL;
1387 }
1389 /* Store the open flags */
1390 gDeviceSd.flags = flags;
1391 sdCard = sdInfo->card;
1393 p_info = &gDeviceSd;
1394 p_info->handle = deviceid;
1396 if (sdCard->cardType == MMCHS_SD_CARD)
1397 {
1398 p_info->type = PLATFORM_DEVICE_SD;
1399 p_info->manufacturer_id = sdCard->cid.manfid;
1400 p_info->device_id = sdCard->cid.oemid;
1401 p_info->width = sdCard->busWidth;
1402 p_info->block_count = sdCard->nBlks;
1403 p_info->page_size = sdCard->blkLen;
1405 }
1406 return p_info;
1407 }
1409 #endif
1411 #if (PLATFORM_QSPI_FLASH_IN)
1412 QSPI_STATUS qspiStatus;
1414 if (deviceid == PLATFORM_DEVID_QSPIFLASH_S25FL512S) {
1416 /* Initialize the qspi flash */
1417 qspiStatus = qspiFlashInit(&gDeviceQspiFlash);
1418 if (qspiStatus != QSPI_SUCCESS) {
1419 IFPRINT(platform_write("platform_device_open: QSPI Flash Initialization failed.\n"));
1420 return NULL;
1421 }
1423 /* Store the open flags */
1424 gDeviceQspiFlash.flags = flags;
1426 p_info = &gDeviceQspiFlash;
1428 if (qspiFlashReadId(p_info) != SUCCESS) {
1429 IFPRINT(platform_write("platform_device_open: Unable to read device information.\n"));
1430 platform_errno = PLATFORM_ERRNO_BADFLASHDEV;
1431 return NULL;
1432 }
1434 p_info->handle = deviceid;
1436 return p_info;
1437 }
1438 #endif
1440 platform_errno = PLATFORM_ERRNO_UNSUPPORTED;
1442 return NULL;
1443 }
1444 #endif
1446 /******************************************************************************
1447 * platform_flash_close
1448 ******************************************************************************/
1449 #if (PLATFORM_NAND_IN) || (PLATFORM_NOR_IN) || (PLATFORM_I2C_EEPROM_IN) || (PLATFORM_MMCHS_IN) || (PLATFORM_QSPI_FLASH_IN)
1450 Platform_STATUS platform_device_close(PLATFORM_DEVHANDLE deviceid) {
1452 IFPRINT(platform_write("platform_device_close(handle=0x%x) called \n", deviceid));
1454 #if (PLATFORM_NAND_IN)
1455 if (deviceid == PLATFORM_DEVID_MT29F2G16ABAFA) {
1456 gDeviceNand.handle = 0;
1457 return Platform_EOK;
1458 }
1459 #endif
1461 #if (PLATFORM_NOR_IN)
1462 if (deviceid == PLATFORM_DEVID_NORN25Q128A13ESF40F) {
1463 gDeviceNor.handle = 0;
1464 return Platform_EOK;
1465 }
1466 #endif
1468 #if (PLATFORM_I2C_EEPROM_IN)
1470 if (deviceid == PLATFORM_DEVID_EEPROM50) {
1471 gDeviceEeprom0.handle = 0;
1472 return Platform_EOK;
1473 }
1475 if (deviceid == PLATFORM_DEVID_EEPROM51) {
1476 gDeviceEeprom1.handle = 0;
1477 return Platform_EOK;
1478 }
1480 #endif
1482 #if (PLATFORM_MMCHS_IN)
1484 if (deviceid == PLATFORM_DEVID_EMMC) {
1485 gDeviceEmmc.handle = 0;
1486 return Platform_EOK;
1487 }
1489 if (deviceid == PLATFORM_DEVID_SD) {
1490 gDeviceSd.handle = 0;
1491 return Platform_EOK;
1492 }
1494 #endif
1496 #if (PLATFORM_QSPI_FLASH_IN)
1497 if (deviceid == PLATFORM_DEVID_QSPIFLASH_S25FL512S) {
1498 gDeviceQspiFlash.handle = 0;
1499 return Platform_EOK;
1500 }
1501 #endif
1503 return Platform_EUNSUPPORTED;
1504 }
1505 #endif
1507 /******************************************************************************
1508 * platform_flash_read_spare_data
1509 ******************************************************************************/
1510 #if (PLATFORM_NAND_IN) || (PLATFORM_NOR_IN) || (PLATFORM_I2C_EEPROM_IN)
1511 Platform_STATUS platform_device_read_spare_data(PLATFORM_DEVHANDLE deviceid,
1512 uint32_t block_number,
1513 uint32_t page_number,
1514 uint8_t *buf) {
1516 IFPRINT(platform_write("platform_device_read_spare_data(handle=0x%x, block=%d, page=%d,buf=0x%x) called \n",
1517 deviceid, block_number, page_number, buf));
1519 if (buf == NULL) {
1520 platform_errno = PLATFORM_ERRNO_INVALID_ARGUMENT;
1521 return Platform_EINVALID;
1522 }
1524 #if (PLATFORM_NAND_IN)
1525 if (deviceid == PLATFORM_DEVID_MT29F2G16ABAFA) {
1526 if ((block_number >= gDeviceNand.block_count) || (page_number >= gDeviceNand.page_count))
1527 {
1528 platform_errno = PLATFORM_ERRNO_INVALID_ARGUMENT;
1529 return Platform_EINVALID;
1530 }
1532 if (NandReadSpareArea (&gDeviceNand, block_number, page_number, buf) != SUCCESS) {
1533 return ( (Platform_STATUS) Platform_EFAIL);
1534 }
1535 return Platform_EOK;
1536 }
1537 #endif
1539 return Platform_EUNSUPPORTED;
1541 }
1542 #endif
1544 /******************************************************************************
1545 * platform_device_mark_block_bad
1546 ******************************************************************************/
1547 #if PLATFORM_NAND_WRITE_IN
1548 Platform_STATUS platform_device_mark_block_bad(PLATFORM_DEVHANDLE deviceid,
1549 uint32_t block_number) {
1551 uint8_t *buf = NULL;
1552 PLATFORM_DEVICE_info *p_device;
1554 if (deviceid == PLATFORM_DEVID_MT29F2G16ABAFA) {
1555 p_device = &gDeviceNand;
1556 }
1557 else {
1558 p_device = NULL;
1559 }
1561 if (p_device == NULL) {
1562 platform_errno = PLATFORM_ERRNO_INVALID_ARGUMENT;
1563 return Platform_EINVALID;
1564 }
1566 buf = (uint8_t *) Osal_platformMalloc(platform_roundup(p_device->spare_size, PLATFORM_CACHE_LINE_SIZE),
1567 PLATFORM_CACHE_LINE_SIZE);
1569 platform_device_read_spare_data(deviceid, block_number, 0, buf);
1571 buf[p_device->bboffset] = 0xA5; /* BI indicator byte*/
1573 if ( block_number >= gDeviceNand.block_count ) {
1574 platform_errno = PLATFORM_ERRNO_INVALID_ARGUMENT;
1575 Osal_platformFree(buf, platform_roundup(p_device->spare_size, PLATFORM_CACHE_LINE_SIZE));
1576 return Platform_EINVALID;
1577 }
1579 if (NandWriteSpareArea (p_device, block_number, 0, buf) != SUCCESS) {
1580 Osal_platformFree(buf, platform_roundup(p_device->spare_size, PLATFORM_CACHE_LINE_SIZE));
1581 return ( (Platform_STATUS) Platform_EFAIL);
1582 }
1584 Osal_platformFree(buf, platform_roundup(p_device->spare_size, PLATFORM_CACHE_LINE_SIZE));
1586 return Platform_EOK;
1588 }
1589 #endif
1591 /******************************************************************************
1592 * platform_flash_write_spare_data
1593 ******************************************************************************/
1594 #if (PLATFORM_NAND_IN) || (PLATFORM_NOR_IN) || (PLATFORM_I2C_EEPROM_IN)
1595 Platform_STATUS platform_device_write_spare_data(PLATFORM_DEVHANDLE deviceid,
1596 uint32_t block_number,
1597 uint32_t page_number,
1598 uint8_t *buf) {
1600 IFPRINT(platform_write("platform_device_write_spare_data(handle=0x%x, block=%d, page=%d,buf=0x%x) called \n",
1601 deviceid, block_number, page_number, buf));
1603 if (buf == NULL) {
1604 platform_errno = PLATFORM_ERRNO_INVALID_ARGUMENT;
1605 return Platform_EINVALID;
1606 }
1608 #if (PLATFORM_NAND_WRITE_IN)
1609 if (deviceid == PLATFORM_DEVID_MT29F2G16ABAFA) {
1610 if ((block_number >= gDeviceNand.block_count) || (page_number >= gDeviceNand.page_count))
1611 {
1612 platform_errno = PLATFORM_ERRNO_INVALID_ARGUMENT;
1613 return Platform_EINVALID;
1614 }
1616 if (NandWriteSpareArea (&gDeviceNand, block_number, page_number, buf) != SUCCESS) {
1617 return ( (Platform_STATUS) Platform_EFAIL);
1618 }
1619 return Platform_EOK;
1620 }
1621 #endif
1623 return Platform_EUNSUPPORTED;
1625 }
1626 #endif
1628 /******************************************************************************
1629 * platform_device_read
1630 ******************************************************************************/
1631 #if (PLATFORM_NAND_IN) || (PLATFORM_NOR_IN) || (PLATFORM_I2C_EEPROM_IN) || (PLATFORM_MMCHS_IN) || (PLATFORM_QSPI_FLASH_IN)
1632 Platform_STATUS platform_device_read(PLATFORM_DEVHANDLE deviceid,
1633 uint32_t offset,
1634 uint8_t *buf,
1635 uint32_t len) {
1637 IFPRINT(platform_write("platform_device_read(handle=0x%x, offset=%d, len=%d, buf=0x%x) called \n",
1638 deviceid, offset, len, buf));
1640 if (buf == NULL || len == 0) {
1641 platform_errno = PLATFORM_ERRNO_INVALID_ARGUMENT;
1642 return Platform_EINVALID;
1643 }
1645 #if (PLATFORM_NAND_IN)
1646 if (deviceid == PLATFORM_DEVID_MT29F2G16ABAFA) {
1647 NAND_ADDR addr;
1648 uint32_t read_len = 0;
1650 addr.uiColumnAddr= 0;
1652 for (read_len = 0; read_len < len; read_len += gDeviceNand.page_size)
1653 {
1654 if (platform_offset_to_blocknpage(deviceid, offset+read_len, &addr.uiBlockAddr, &addr.uiPageAddr) != Platform_EOK) {
1655 return Platform_EUNSUPPORTED;
1656 }
1658 if (readNandPage (&gDeviceNand, addr, &buf[read_len]) != SUCCESS) {
1659 return ( (Platform_STATUS) Platform_EFAIL);
1660 }
1661 }
1663 return Platform_EOK;
1664 }
1665 #endif
1667 #if (PLATFORM_NOR_IN)
1668 if (deviceid == PLATFORM_DEVID_NORN25Q128A13ESF40F) {
1669 if (nor_read (&gDeviceNor, offset, len, buf) != SUCCESS) {
1670 return ( (Platform_STATUS) Platform_EFAIL);
1671 }
1672 return Platform_EOK;
1673 }
1674 #endif
1676 #if (PLATFORM_I2C_EEPROM_IN)
1677 uint8_t i2cportnumber=0;
1678 if (deviceid == PLATFORM_DEVID_EEPROM50) {
1679 if (i2cEepromRead (offset, len, buf, 0x50,i2cportnumber) != I2C_RET_OK) {
1680 IFPRINT(platform_write("platform_eeprom_read: EEPROM read failed\n"));
1681 return ( (Platform_STATUS) Platform_EFAIL);
1682 }
1683 return Platform_EOK;
1684 }
1686 if (deviceid == PLATFORM_DEVID_EEPROM51) {
1687 if (i2cEepromRead (offset, len, buf, 0x51,i2cportnumber) != I2C_RET_OK) {
1688 IFPRINT(platform_write("platform_eeprom_read: EEPROM read failed\n"));
1689 return ( (Platform_STATUS) Platform_EFAIL);
1690 }
1691 return Platform_EOK;
1692 }
1694 #endif
1696 #if (PLATFORM_MMCHS_IN)
1698 if (deviceid == PLATFORM_DEVID_EMMC){
1699 //TODO: Need to add support for reading data which is not multiple of block length
1700 if (mmchsBlockRead (mmcCard, offset, (len/MMCHS_BLK_LEN), buf) != SUCCESS) {
1701 return ( (Platform_STATUS) Platform_EFAIL);
1702 }
1704 return Platform_EOK;
1705 }
1707 if (deviceid == PLATFORM_DEVID_SD) {
1708 //TODO: Need to add support for reading data which is not multiple of block length
1709 if (mmchsBlockRead (sdCard, offset, (len/MMCHS_BLK_LEN), buf) != SUCCESS) {
1710 return ( (Platform_STATUS) Platform_EFAIL);
1711 }
1713 return Platform_EOK;
1714 }
1716 #endif
1718 #if (PLATFORM_QSPI_FLASH_IN)
1719 if (deviceid == PLATFORM_DEVID_QSPIFLASH_S25FL512S) {
1720 if (qspiFlashRead (&gDeviceQspiFlash, offset, len, buf, qspiReadMode)
1721 != SUCCESS) {
1722 return ( (Platform_STATUS) Platform_EFAIL);
1723 }
1724 return Platform_EOK;
1725 }
1726 #endif
1728 return Platform_EUNSUPPORTED;
1730 }
1731 #endif
1733 /******************************************************************************
1734 * Computes a block and page based on an offset
1735 ******************************************************************************/
1736 #if (PLATFORM_NAND_IN) || (PLATFORM_NOR_IN) || (PLATFORM_QSPI_FLASH_IN)
1738 Platform_STATUS platform_offset_to_blocknpage(PLATFORM_DEVHANDLE deviceid,
1739 uint32_t offset,
1740 uint32_t *block,
1741 uint32_t *page) {
1742 uint32_t leftover;
1743 uint32_t block_size;
1744 uint32_t block_count, page_size, page_count;
1746 IFPRINT(platform_write("platform_offset_to_blocknpage(handle=0x%x, offset=%d) called \n",
1747 deviceid, offset));
1749 if (deviceid == PLATFORM_DEVID_MT29F2G16ABAFA) {
1750 block_count = gDeviceNand.block_count;
1751 page_size = gDeviceNand.page_size;
1752 page_count = gDeviceNand.page_count;
1753 }
1754 else if (deviceid == PLATFORM_DEVID_NORN25Q128A13ESF40F) {
1755 block_count = gDeviceNor.block_count;
1756 page_size = gDeviceNor.page_size;
1757 page_count = gDeviceNor.page_count;
1758 }
1759 else if (deviceid == PLATFORM_DEVID_QSPIFLASH_S25FL512S) {
1760 block_count = gDeviceQspiFlash.block_count;
1761 page_size = gDeviceQspiFlash.page_size;
1762 page_count = gDeviceQspiFlash.page_count;
1763 }
1764 else {
1765 return Platform_EUNSUPPORTED;
1766 }
1768 block_size = (page_count * page_size);
1770 *block = offset / block_size;
1771 leftover = offset % block_size;
1772 *page = leftover / page_size;
1773 if (leftover % page_size) {
1774 /* All writes must be page aligned for now */
1775 return Platform_EUNSUPPORTED;
1776 }
1777 if (*block > block_count) {
1778 return Platform_EINVALID;
1779 }
1780 if (*page > page_count) {
1781 return Platform_EINVALID;
1782 }
1784 IFPRINT(platform_write("platform_offset_to_blocknpage: offset = %d block = %d page = %d \n", offset, *block, *page));
1786 return Platform_EOK;
1788 }
1790 #endif
1792 /******************************************************************************
1793 * Computes a block and page based on an offset
1794 ******************************************************************************/
1795 #if (PLATFORM_NAND_IN) || (PLATFORM_NOR_IN) || (PLATFORM_QSPI_FLASH_IN)
1797 Platform_STATUS platform_blocknpage_to_offset(PLATFORM_DEVHANDLE deviceid,
1798 uint32_t *offset,
1799 uint32_t block,
1800 uint32_t page) {
1802 uint32_t block_count, page_size, page_count;
1804 IFPRINT(platform_write("platform_blocknpage_to_offset(handle=0x%x, block=%d, page=%d) called \n",
1805 deviceid, block, page));
1807 if (deviceid == PLATFORM_DEVID_MT29F2G16ABAFA) {
1808 block_count = gDeviceNand.block_count;
1809 page_size = gDeviceNand.page_size;
1810 page_count = gDeviceNand.page_count;
1811 }
1812 else if (deviceid == PLATFORM_DEVID_NORN25Q128A13ESF40F) {
1813 block_count = gDeviceNor.block_count;
1814 page_size = gDeviceNor.page_size;
1815 page_count = gDeviceNor.page_count;
1816 }
1817 else if (deviceid == PLATFORM_DEVID_QSPIFLASH_S25FL512S) {
1818 block_count = gDeviceQspiFlash.block_count;
1819 page_size = gDeviceQspiFlash.page_size;
1820 page_count = gDeviceQspiFlash.page_count;
1821 }
1822 else {
1823 return Platform_EUNSUPPORTED;
1824 }
1826 if (block >block_count || page > page_count) {
1827 return Platform_EINVALID;
1828 }
1830 *offset = (block * (page_count * page_size)) + (page * page_size);
1832 IFPRINT(platform_write("platform_blocknpage_to_offset: offset = %d block = %d page = %d \n", *offset, block, page));
1834 return Platform_EOK;
1835 }
1837 #endif
1839 /******************************************************************************
1840 * platform_device_write
1841 ******************************************************************************/
1843 #if (PLATFORM_NAND_IN) || (PLATFORM_NOR_IN) || (PLATFORM_I2C_EEPROM_IN) || (PLATFORM_MMCHS_IN) || (PLATFORM_QSPI_FLASH_IN)
1845 Platform_STATUS platform_device_write(PLATFORM_DEVHANDLE deviceid,
1846 uint32_t offset,
1847 uint8_t *buf,
1848 uint32_t len) {
1850 IFPRINT(platform_write("platform_device_write(handle=0x%x, offset=%d, len=%d, buf=0x%x) called \n",
1851 deviceid, offset, len, buf));
1853 /* Check general args */
1854 if (buf == NULL || len == 0) {
1855 platform_errno = PLATFORM_ERRNO_INVALID_ARGUMENT;
1856 return Platform_EINVALID;
1857 }
1859 #if (PLATFORM_NAND_WRITE_IN || PLATFORM_NOR_WRITE_IN || PLATFORM_QSPI_FLASH_IN)
1860 if ((deviceid == PLATFORM_DEVID_MT29F2G16ABAFA) ||
1861 (deviceid == PLATFORM_DEVID_NORN25Q128A13ESF40F) ||
1862 (deviceid == PLATFORM_DEVID_QSPIFLASH_S25FL512S))
1863 {
1864 NAND_ADDR addr;
1865 NAND_ADDR StartAddress;
1866 Platform_STATUS retval = Platform_EOK;
1867 PLATFORM_DEVICE_info *p_device;
1868 int32_t block, page;
1869 int32_t bufindex;
1870 int32_t index;
1871 int32_t useable_page_size;
1872 int32_t block_size;
1873 uint32_t noraddress;
1874 uint32_t qspiflashaddress;
1875 uint8_t *pBlock = NULL;
1876 uint8_t *pPage = NULL;
1878 if (deviceid == PLATFORM_DEVID_MT29F2G16ABAFA) {
1879 p_device = &gDeviceNand;
1880 }
1881 else if (deviceid == PLATFORM_DEVID_NORN25Q128A13ESF40F) {
1882 p_device = &gDeviceNor;
1883 }
1884 else {
1885 p_device = &gDeviceQspiFlash;
1886 }
1889 #if (PLATFORM_QSPI_FLASH_WRITE_IN)
1890 if (deviceid == PLATFORM_DEVID_QSPIFLASH_S25FL512S) {
1891 if (qspiFlashWrite (&gDeviceQspiFlash, offset, len, buf, qspiWriteMode)
1892 != SUCCESS) {
1893 return ( (Platform_STATUS) Platform_EFAIL);
1894 }
1895 return Platform_EOK;
1896 }
1897 #endif
1898 /* Calculate the usable page area.. Its the size of the page */
1899 useable_page_size = p_device->page_size;
1901 /* allocate a buffer big enough to hold one block (must include spare area) */
1902 block_size = p_device->page_size * p_device->page_count;
1904 pBlock = Osal_platformMalloc(platform_roundup(block_size, PLATFORM_CACHE_LINE_SIZE),
1905 PLATFORM_CACHE_LINE_SIZE);
1907 if ( !pBlock ){
1908 platform_errno = PLATFORM_ERRNO_OOM;
1909 retval = Platform_EFAIL;
1910 goto FLASHWRITE_ERROR;
1911 }
1913 /* allocate a buffer big enough to hold one page of the flash */
1914 pPage = Osal_platformMalloc(platform_roundup(p_device->page_size, PLATFORM_CACHE_LINE_SIZE),
1915 PLATFORM_CACHE_LINE_SIZE);
1917 if ( !pPage ){
1918 platform_errno = PLATFORM_ERRNO_OOM;
1919 retval = Platform_EFAIL;
1920 goto FLASHWRITE_ERROR;
1921 }
1923 /* Get starting address */
1924 addr.uiColumnAddr= 0;
1925 if (platform_offset_to_blocknpage(deviceid, offset, &addr.uiBlockAddr, &addr.uiPageAddr) != Platform_EOK) {
1926 retval = Platform_EUNSUPPORTED;
1927 goto FLASHWRITE_ERROR;
1928 }
1930 /*
1931 * We can now write the file to flash. The basic algorithm is this:
1932 * Read the bad block table
1933 * While we have data to write do
1934 * skip block if bad
1935 * read the block (page level)
1936 * erase the block (block level)
1937 * write the block (page level)
1938 */
1940 /* set index to start of the data to write */
1941 bufindex = 0;
1943 /* Initialize the starting block we will be using */
1944 block = addr.uiBlockAddr;
1945 StartAddress.uiBlockAddr = addr.uiBlockAddr;
1946 StartAddress.uiPageAddr = addr.uiPageAddr;
1947 StartAddress.uiColumnAddr = 0;
1949 while (len) {
1951 /* Skip bad blocks */
1952 if (p_device->bblist) {
1953 if (p_device->bblist[block] == 0x00) {
1954 /* Block is bad, skip to next good one */
1955 IFPRINT(platform_write( "platform_device_write: Skipping bad block %d. \n", block));
1956 block++;
1957 while (p_device->bblist[block] == 0x00) {
1958 block++;
1959 }
1960 }
1961 }
1963 /* Make sure we didn't exceed number of blocks */
1964 if (block > p_device->block_count) {
1965 IFPRINT(platform_write( "Due to bad blocks, you have run out of room in the Flash for this image. \n"));
1966 platform_errno = PLATFORM_ERRNO_NOFREEBLOCKS;
1967 retval = Platform_EFAIL;
1968 goto FLASHWRITE_ERROR;
1969 }
1971 IFPRINT(platform_write( "platform_device_write: Writing block %d \n", block));
1973 /*
1974 * Read the block..
1975 * may need to preserve what we don't actually write out.
1976 */
1977 for (page=0, index = 0; page < p_device->page_count;
1978 page++, index +=p_device->page_size) {
1979 addr.uiBlockAddr = block;
1980 addr.uiPageAddr = page;
1981 addr.uiColumnAddr= 0;
1982 if (p_device->handle == PLATFORM_DEVID_MT29F2G16ABAFA) {
1983 #if (PLATFORM_NAND_WRITE_IN)
1985 if (readNandPage (&gDeviceNand, addr, (uint8_t *)(pBlock + index)) != SUCCESS) {
1986 retval = Platform_EFAIL;
1987 IFPRINT(platform_write( "platform_device_write: Error reading block %d page %d. \n", block, page));
1988 goto FLASHWRITE_ERROR;
1989 }
1990 #endif
1991 }
1992 else if (p_device->handle == PLATFORM_DEVID_NORN25Q128A13ESF40F) {
1993 #if (PLATFORM_NOR_WRITE_IN)
1994 (void) platform_blocknpage_to_offset(p_device->handle, &noraddress, addr.uiBlockAddr, addr.uiPageAddr);
1995 if (nor_read (&gDeviceNor, noraddress, p_device->page_size, (uint8_t *)(pBlock + index)) != SUCCESS) {
1996 retval = Platform_EFAIL;
1997 platform_write( "platform_device_write: Error reading block %d page %d. \n", block, page);
1998 goto FLASHWRITE_ERROR;
1999 }
2000 #endif
2001 }
2002 else {
2003 #if (PLATFORM_QSPI_FLASH_WRITE_IN)
2004 (void) platform_blocknpage_to_offset(p_device->handle, &qspiflashaddress, addr.uiBlockAddr, addr.uiPageAddr);
2005 if (qspiFlashRead (&gDeviceQspiFlash, qspiflashaddress, p_device->page_size, (uint8_t *)(pBlock + index), qspiReadMode) != SUCCESS) {
2006 retval = Platform_EFAIL;
2007 platform_write( "platform_device_write: Error reading block %d page %d. \n", block, page);
2008 goto FLASHWRITE_ERROR;
2009 }
2010 #endif
2011 }
2012 }
2014 /* erase the block */
2015 if (p_device->handle == PLATFORM_DEVID_MT29F2G16ABAFA) {
2016 #if (PLATFORM_NAND_WRITE_IN)
2017 if (nandFlashBlockErase (&gDeviceNand, block) != SUCCESS) {
2018 IFPRINT(platform_write( "platform_device_write: Could not erase block %d. \n", block));
2019 retval = Platform_EFAIL;
2020 goto FLASHWRITE_ERROR;
2021 }
2022 #endif
2023 }
2024 else if (p_device->handle == PLATFORM_DEVID_NORN25Q128A13ESF40F) {
2025 #if (PLATFORM_NOR_WRITE_IN)
2026 if (nor_erase (&gDeviceNor, block) != SUCCESS) {
2027 IFPRINT(platform_write( "platform_device_write: Could not erase block %d. \n", block));
2028 retval = Platform_EFAIL;
2029 goto FLASHWRITE_ERROR;
2030 }
2031 #endif
2032 }
2033 else {
2034 #if (PLATFORM_QSPI_FLASH_WRITE_IN)
2035 if (qspiFlashErase (&gDeviceQspiFlash, block) != SUCCESS) {
2036 IFPRINT(platform_write( "platform_device_write: Could not erase block %d. \n", block));
2037 retval = Platform_EFAIL;
2038 goto FLASHWRITE_ERROR;
2039 }
2040 #endif
2041 }
2043 /*
2044 * Write the block...
2045 * - Get one page of data and write out or
2046 * - if we run out of data re-write what we previously read.
2047 */
2048 for (page = 0, index = 0; page < p_device->page_count;
2049 page++, index +=p_device->page_size) {
2051 IFPRINT(platform_write( "platform_device_write: Writing to block %d page %d \n", block, page));
2053 if (block == StartAddress.uiBlockAddr && page < StartAddress.uiPageAddr) {
2054 /* if we are within the first block we are writing, then we may have a start
2055 * page other than page 0, so re-write what was there.
2056 */
2057 memcpy(pPage, (pBlock+bufindex), useable_page_size);
2058 }
2059 else
2060 if (len == 0) {
2061 /* we wrote all the data, so write back any pages we pre-read that are left */
2062 memcpy(pPage, (pBlock+bufindex), useable_page_size);
2063 }
2064 else
2065 if (len < useable_page_size) {
2066 /* we have less than a full page of data */
2067 memset(pPage, 0xFF, p_device->page_size);
2068 memcpy(pPage, (buf+bufindex), len);
2069 len = 0;
2070 }
2071 else {
2072 /* get a full page of data */
2073 memcpy(pPage, (buf+bufindex), useable_page_size);
2074 len -= useable_page_size;
2075 bufindex += useable_page_size;
2076 }
2077 /* write the page */
2078 addr.uiBlockAddr = block;
2079 addr.uiPageAddr = page;
2080 addr.uiColumnAddr= 0;
2081 if (p_device->handle == PLATFORM_DEVID_MT29F2G16ABAFA) {
2082 #if (PLATFORM_NAND_WRITE_IN)
2083 if (writeNandPage (&gDeviceNand, addr, pPage) != SUCCESS) {
2084 IFPRINT(platform_write( "platform_device_write: Error writing block %d page %d. \n", block, page));
2085 retval = Platform_EFAIL;
2086 goto FLASHWRITE_ERROR;
2087 }
2088 #endif
2089 }
2090 else if (p_device->handle == PLATFORM_DEVID_NORN25Q128A13ESF40F) {
2091 #if (PLATFORM_NOR_WRITE_IN)
2092 (void) platform_blocknpage_to_offset(p_device->handle, &noraddress, addr.uiBlockAddr, addr.uiPageAddr);
2093 if (nor_write(&gDeviceNor, noraddress, p_device->page_size, pPage) != SUCCESS) {
2094 IFPRINT(platform_write( "platform_device_write: Error writing block %d page %d. \n", block, page));
2095 retval = Platform_EFAIL;
2096 goto FLASHWRITE_ERROR;
2097 }
2098 #endif
2099 }
2100 else {
2101 #if (PLATFORM_QSPI_FLASH_WRITE_IN)
2102 (void) platform_blocknpage_to_offset(p_device->handle, &qspiflashaddress, addr.uiBlockAddr, addr.uiPageAddr);
2103 if (qspiFlashWrite(&gDeviceQspiFlash, qspiflashaddress, p_device->page_size, pPage, qspiWriteMode) != SUCCESS) {
2104 IFPRINT(platform_write( "platform_device_write: Error writing block %d page %d. \n", block, page));
2105 retval = Platform_EFAIL;
2106 goto FLASHWRITE_ERROR;
2107 }
2108 #endif
2109 }
2110 }
2112 /* increment to the next block */
2113 block++;
2114 }
2116 FLASHWRITE_ERROR:
2118 if (pBlock) {
2119 Osal_platformFree( pBlock, platform_roundup(block_size, PLATFORM_CACHE_LINE_SIZE) );
2120 }
2122 if (pPage) {
2123 Osal_platformFree( pPage, platform_roundup(p_device->page_size, PLATFORM_CACHE_LINE_SIZE));
2124 }
2126 return retval;
2127 }
2128 #endif
2130 #if (PLATFORM_I2C_EEPROM_IN) && (PLATFORM_I2C_EEPROM_WRITE_IN)
2131 uint8_t i2cportnumber=0;
2132 if (deviceid == PLATFORM_DEVID_EEPROM50) {
2133 if (i2cEepromWriteByteAddr(offset, 0x50, buf, len, I2C_RELEASE_BUS,i2cportnumber) != I2C_RET_OK) {
2134 IFPRINT(platform_write("platform_device_write: EEPROM write for address 0x%x failed\n", 0x50));
2135 platform_errno = PLATFORM_ERRNO_EEPROM;
2136 return ( (Platform_STATUS) Platform_EFAIL);
2137 }
2138 return Platform_EOK;
2139 }
2141 if (deviceid == PLATFORM_DEVID_EEPROM51) {
2142 if (i2cEepromWriteByteAddr(offset, 0x51, buf, len, I2C_RELEASE_BUS,i2cportnumber) != I2C_RET_OK) {
2143 IFPRINT(platform_write("platform_device_write: EEPROM write for address 0x%x failed\n", 0x51));
2144 platform_errno = PLATFORM_ERRNO_EEPROM;
2145 return ( (Platform_STATUS) Platform_EFAIL);
2146 }
2147 return Platform_EOK;
2148 }
2150 #endif
2152 #if (PLATFORM_MMCHS_IN)
2154 if (deviceid == PLATFORM_DEVID_EMMC){
2155 //TODO: Need to add support for writing data which is not multiple of block length
2156 if (mmchsBlockWrite (mmcCard, offset, (len/MMCHS_BLK_LEN), buf) != SUCCESS) {
2157 return ( (Platform_STATUS) Platform_EFAIL);
2158 }
2160 return Platform_EOK;
2161 }
2163 if (deviceid == PLATFORM_DEVID_SD) {
2164 //TODO: Need to add support for writing data which is not multiple of block length
2165 if (mmchsBlockWrite (sdCard, offset, (len/MMCHS_BLK_LEN), buf) != SUCCESS) {
2166 return ( (Platform_STATUS) Platform_EFAIL);
2167 }
2169 return Platform_EOK;
2170 }
2172 #endif
2174 return Platform_EUNSUPPORTED;
2176 }
2177 #endif
2179 /******************************************************************************
2180 * platform_device_erase_block
2181 ******************************************************************************/
2182 #if (PLATFORM_NAND_IN) || (PLATFORM_NOR_IN) || (PLATFORM_I2C_EEPROM_IN)
2183 Platform_STATUS platform_device_erase_block(PLATFORM_DEVHANDLE deviceid,
2184 uint32_t block_number) {
2186 IFPRINT(platform_write("platform_device_erase_block(handle=0x%x, blockt=%d) called \n",
2187 deviceid, block_number));
2189 #if (PLATFORM_NAND_IN) && (PLATFORM_NAND_WRITE_IN)
2190 if (deviceid == PLATFORM_DEVID_MT29F2G16ABAFA) {
2191 if (block_number >= gDeviceNand.block_count) {
2192 platform_errno = PLATFORM_ERRNO_INVALID_ARGUMENT;
2193 return Platform_EINVALID;
2194 }
2195 if (nandFlashBlockErase (&gDeviceNand, block_number) != SUCCESS) {
2196 return ( (Platform_STATUS) Platform_EFAIL);
2197 }
2198 return Platform_EOK;
2199 }
2200 #endif
2202 #if (PLATFORM_NOR_IN) && (PLATFORM_NOR_WRITE_IN)
2203 if (deviceid == PLATFORM_DEVID_NORN25Q128A13ESF40F) {
2204 if (block_number > gDeviceNor.block_count) {
2205 platform_errno = PLATFORM_ERRNO_INVALID_ARGUMENT;
2206 return Platform_EINVALID;
2207 }
2208 if (nor_erase (&gDeviceNor, block_number) != SUCCESS) {
2209 return ( (Platform_STATUS) Platform_EFAIL);
2210 }
2211 return Platform_EOK;
2212 }
2213 #endif
2215 #if (PLATFORM_QSPI_FLASH_IN) && (PLATFORM_QSPI_FLASH_WRITE_IN)
2216 if (deviceid == PLATFORM_DEVID_QSPIFLASH_S25FL512S) {
2217 if (block_number > gDeviceQspiFlash.block_count) {
2218 platform_errno = PLATFORM_ERRNO_INVALID_ARGUMENT;
2219 return Platform_EINVALID;
2220 }
2221 if (qspiFlashErase (&gDeviceQspiFlash, block_number) != SUCCESS) {
2222 return ( (Platform_STATUS) Platform_EFAIL);
2223 }
2224 return Platform_EOK;
2225 }
2226 #endif
2228 return Platform_EUNSUPPORTED;
2229 }
2230 #endif
2232 /******************************************************************************
2233 * platform_device_print_info
2234 ******************************************************************************/
2235 #if (PLATFORM_MMCHS_IN)
2236 Platform_STATUS platform_device_print_info(PLATFORM_DEVHANDLE deviceid) {
2238 IFPRINT(platform_write("platform_device_print_info(handle=0x%x) called \n",
2239 deviceid));
2241 #if (PLATFORM_MMCHS_IN)
2242 if (deviceid == PLATFORM_DEVID_EMMC) {
2243 mmchsPrintCardInfo(mmcCard);
2244 return Platform_EOK;
2245 }
2246 else if (deviceid == PLATFORM_DEVID_SD) {
2247 mmchsPrintCardInfo(sdCard);
2248 return Platform_EOK;
2249 }
2251 return Platform_EUNSUPPORTED;
2253 #endif
2254 }
2255 #endif
2257 /******************************************************************************
2258 * platform_device_set_speed
2259 ******************************************************************************/
2260 #if (PLATFORM_MMCHS_IN)
2261 Platform_STATUS platform_device_set_speed(PLATFORM_DEVHANDLE deviceid,
2262 uint32_t speed) {
2264 mmchsCardInfo *cardInfo = NULL;
2266 IFPRINT(platform_write("platform_device_set_speed(handle=0x%x, speed=%d) called \n",
2267 deviceid, speed));
2269 #if (PLATFORM_MMCHS_IN)
2270 if (deviceid == PLATFORM_DEVID_EMMC) {
2271 cardInfo = mmcCard;
2272 }
2273 else if (deviceid == PLATFORM_DEVID_SD) {
2274 cardInfo = sdCard;
2275 }
2277 if(cardInfo != NULL)
2278 {
2279 if (mmchsSetTranSpeed(cardInfo,speed) != SUCCESS) {
2280 return ( (Platform_STATUS) Platform_EFAIL);
2281 }
2283 return Platform_EOK;
2284 }
2286 return Platform_EUNSUPPORTED;
2288 #endif
2289 }
2290 #endif
2292 /******************************************************************************
2293 * platform_device_set_bus_width
2294 ******************************************************************************/
2295 #if (PLATFORM_MMCHS_IN)
2296 Platform_STATUS platform_device_set_bus_width(PLATFORM_DEVHANDLE deviceid,
2297 PLATFORM_MMCSD_BUS_WIDTH width) {
2299 mmchsCardInfo *cardInfo = NULL;
2301 IFPRINT(platform_write("platform_device_set_bus_width(handle=0x%x, Bus width=%d) called \n",
2302 deviceid, width));
2304 #if (PLATFORM_MMCHS_IN)
2305 if (deviceid == PLATFORM_DEVID_EMMC) {
2306 cardInfo = mmcCard;
2307 }
2308 else if (deviceid == PLATFORM_DEVID_SD) {
2309 cardInfo = sdCard;
2310 }
2312 if(cardInfo != NULL)
2313 {
2314 switch(width)
2315 {
2316 case PLATFORM_MMCSD_BUS_1BIT:
2317 mmchsSetBusWidth(cardInfo, SD_BUS_WIDTH_1BIT);
2318 break;
2320 case PLATFORM_MMCSD_BUS_4BIT:
2321 mmchsSetBusWidth(cardInfo, SD_BUS_WIDTH_4BIT);
2322 mmchsPrintCSD(cardInfo);
2323 break;
2325 case PLATFORM_MMCSD_BUS_8BIT:
2326 mmchsSetBusWidth(cardInfo, SD_BUS_WIDTH_8BIT);
2327 mmchsPrintECSD(cardInfo);
2328 break;
2329 }
2331 return Platform_EOK;
2332 }
2334 return Platform_EUNSUPPORTED;
2336 #endif
2337 }
2338 #endif
2340 /******************************************************************************
2341 * platform_device_set_params
2342 ******************************************************************************/
2343 #if (PLATFORM_QSPI_FLASH_IN)
2344 Platform_STATUS platform_device_set_params(PLATFORM_DEVHANDLE deviceid, void *params)
2345 {
2346 Platform_STATUS status;
2347 PLATFORM_DEVICE_info *p_info;
2349 if(deviceid == PLATFORM_DEVID_QSPIFLASH_S25FL512S)
2350 {
2351 qspiReadMode = ((PLATFORM_QSPI_Params *)params)->read_mode;
2352 qspiWriteMode = ((PLATFORM_QSPI_Params *)params)->write_mode;
2353 p_info = &gDeviceQspiFlash;
2354 if (qspiReadMode == PLATFORM_QSPI_IO_MODE_QUAD)
2355 {
2356 status = qspiFlashQuadModeCtrl(p_info, 1);
2357 return status;
2358 }
2359 else
2360 {
2361 status = qspiFlashQuadModeCtrl(p_info, 0);
2362 return status;
2363 }
2364 }
2366 return (Platform_EOK);
2367 }
2368 #endif
2370 #if PLATFORM_CACHE_IN
2371 uint32_t Convert_CoreLocal2GlobalAddr (uint32_t addr)
2372 {
2373 uint32_t coreNum;
2375 /* Get the core number. */
2376 #ifdef SIMULATOR_SUPPORT
2377 coreNum = CSL_chipReadDNUM();
2378 #else
2379 coreNum = platform_get_coreid();
2380 #endif
2381 /* Check if the address is a valid Local L2 address to convert */
2382 if ( (addr >= (uint32_t) 0x800000) &&
2383 (addr < (uint32_t) 0x900000) ) {
2384 /* Compute the global address. */
2385 return ((1 << 28) | (coreNum << 24) | (addr & 0x00ffffff));
2386 }
2387 else {
2388 return (addr);
2389 }
2390 }
2391 #endif