[processor-sdk/performance-audio-sr.git] / pdk_k2g_1_0_1 / packages / ti / platform / evmk2g / platform_lib / src / platform.c
1 /*
2 * Copyright (c) 2010-2015, Texas Instruments Incorporated
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * * Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 *
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * * Neither the name of Texas Instruments Incorporated nor the names of
17 * its contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
22 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
24 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
25 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
26 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
27 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
28 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
29 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
30 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 */
34 /**
35 *
36 * \file platform.c
37 *
38 * \brief This contains platform common APIs. This file acts as entry
39 * point for all the platform library modules.
40 *
41 ******************************************************************************/
43 #include "platform_internal.h"
45 /* Errno value */
46 uint32_t platform_errno = 0;
47 uint32_t platform_init_return_code = 0;
48 uint8_t uart_port_num = PLATFORM_UART_PORT_0;
50 /* Platform Library Version*/
51 #if (PLATFORM_VERSTRING_IN)
52 #pragma DATA_SECTION(platform_library_version,"platform_lib");
53 static char platform_library_version[16] = PLATFORM_LIB_VERSION;
54 #endif
56 /* Information we need to keep around for access */
57 #pragma DATA_SECTION(platform_mcb,"platform_lib");
58 static struct platform_mcb_t {
59 uint32_t frequency;
60 int32_t board_version;
61 int32_t mastercore;
62 } platform_mcb = {0, 0, 0};
64 #if (PLATFORM_WRITE_IN)
65 #pragma DATA_SECTION(write_type,"platform_lib");
66 static WRITE_info write_type;
67 #pragma DATA_SECTION(write_buffer,"platform_lib");
68 static char write_buffer[MAX_WRITE_LEN];
69 #endif
71 #if (PLATFORM_READ_IN)
72 #pragma DATA_SECTION(read_type,"platform_lib");
73 READ_info read_type = PLATFORM_READ_SCANF;
74 #endif
77 /* This structure holds information about the devices on the platform */
78 #if (PLATFORM_NAND_IN)
79 #pragma DATA_SECTION(gDeviceNandBBlist,"platform_lib");
80 uint8_t gDeviceNandBBlist[BLOCKS_PER_DEVICE];
82 #pragma DATA_SECTION(gDeviceNand,"platform_lib");
83 PLATFORM_DEVICE_info gDeviceNand = {0x2C, 0xCA, PLATFORM_DEVICE_NAND, 16, BLOCKS_PER_DEVICE, PAGES_PER_BLOCK, BYTES_PER_PAGE, SPARE_BYTES_PER_PAGE, PLATFORM_DEVID_MT29F2G16ABAFA, 5, 0x400, 0, NULL, NULL};
84 #endif
86 #if (PLATFORM_NOR_IN)
87 #pragma DATA_SECTION(gDeviceNor,"platform_lib");
88 PLATFORM_DEVICE_info gDeviceNor = {0x20, 0xBA, PLATFORM_DEVICE_NOR, 8, SPI_NOR_SECTOR_COUNT, (SPI_NOR_PAGE_COUNT / SPI_NOR_SECTOR_COUNT), SPI_NOR_PAGE_SIZE, 0, PLATFORM_DEVID_NORN25Q128A13ESF40F, 0, 0, 0, NULL, NULL};
89 #endif
91 #if (PLATFORM_I2C_EEPROM_IN)
92 #pragma DATA_SECTION(gDeviceEeprom0,"platform_lib");
93 PLATFORM_DEVICE_info gDeviceEeprom0 = {PLATFORM_I2C_EEPROM_MANUFACTURER_ID,PLATFORM_I2C_EEPROM_DEVICE_ID_1,PLATFORM_DEVICE_EEPROM, 8, 1, 1, 65536, 0, PLATFORM_DEVID_EEPROM50, 0, 0, 0, NULL, NULL};
94 #pragma DATA_SECTION(gDeviceEeprom1,"platform_lib");
95 PLATFORM_DEVICE_info gDeviceEeprom1 = {PLATFORM_I2C_EEPROM_MANUFACTURER_ID,PLATFORM_I2C_EEPROM_DEVICE_ID_2,PLATFORM_DEVICE_EEPROM, 8, 1, 1, 65536, 0, PLATFORM_DEVID_EEPROM51, 0, 0, 0, NULL, NULL};
96 #endif
98 #if (PLATFORM_MMCHS_IN)
100 #pragma DATA_SECTION(gDeviceSd,"platform_lib");
101 PLATFORM_DEVICE_info gDeviceSd = {0, 0, PLATFORM_DEVICE_MAX, 0, 0, 0, 0, 0, PLATFORM_DEVID_SD, 0, 0, 0, NULL, NULL};
103 #pragma DATA_SECTION(gDeviceEmmc,"platform_lib");
104 PLATFORM_DEVICE_info gDeviceEmmc = {0, 0, PLATFORM_DEVICE_MAX, 0, 0, 0, 0, 0, PLATFORM_DEVID_EMMC, 0, 0, 0, NULL, NULL};
106 mmchsInfo *mmcInfo;
107 mmchsInfo *sdInfo;
108 mmchsCardInfo *mmcCard;
109 mmchsCardInfo *sdCard;
111 #endif
113 #if (PLATFORM_QSPI_FLASH_IN)
114 #pragma DATA_SECTION(gDeviceQspiFlash,"platform_lib");
115 PLATFORM_DEVICE_info gDeviceQspiFlash = {0, 0, PLATFORM_DEVICE_QSPI_FLASH, 8, QSPI_FLASH_NUM_SECTORS, (QSPI_FLASH_SECTOR_SIZE / QSPI_FLASH_PAGE_SIZE), QSPI_FLASH_PAGE_SIZE, 0, PLATFORM_DEVID_QSPIFLASH_S25FL512S, 0, 0, 0, NULL, NULL};
116 uint8_t qspiReadMode = PLATFORM_QSPI_IO_MODE_QUAD;
117 uint8_t qspiWriteMode = PLATFORM_QSPI_IO_MODE_QUAD;
118 #endif
120 /* This structure holds information about the EMAC port on the platform */
121 #pragma DATA_SECTION(emac_port_mode,"platform_lib");
122 PLATFORM_EMAC_PORT_MODE emac_port_mode[PLATFORM_MAX_EMAC_PORT_NUM] =
123 {
124 PLATFORM_EMAC_PORT_MODE_PHY,
125 PLATFORM_EMAC_PORT_MODE_PHY
126 };
128 #if (PLATFORM_EXTMEMTEST_IN)
129 static inline int32_t platform_memory_test (uint32_t start_address, uint32_t end_address);
130 #endif
132 uint8_t gSysClkSel = 0;
134 /******************************************************************************
135 * platform_get_frequency
136 *
137 * Internal function to read frequency from PLL.
138 *
139 ******************************************************************************/
140 static inline uint32_t platform_get_frequency(void)
141 {
142 CSL_Status status;
143 PllcHwSetup hwSetupRead;
144 uint32_t dsp_freq;
146 status = CorePllcGetHwSetup (&hwSetupRead);
148 if (status != CSL_SOK) {
149 IFPRINT(platform_write("platform_get_frequency: Hardware setup parameters reading... Failed.\n"));
150 IFPRINT(platform_write("\tReason: Error setting in hardware validation."\
151 " [status = 0x%x].\n", status));
152 platform_errno = PLATFORM_ERRNO_GENERIC;
153 return (uint32_t)-1;
154 } else {
155 /* Compute the real dsp freq (*100) */
156 dsp_freq = (hwSetupRead.pllM + 1)/(hwSetupRead.preDiv + 1);
157 dsp_freq = (dsp_freq * PLATFORM_BASE_CLK_RATE_MHZ)/(hwSetupRead.postDiv + 1);
158 }
160 return (dsp_freq);
162 }
164 Bool serial_num_isvalid(char c)
165 {
166 if (
167 ((c >= '0') && (c <= '9')) ||
168 ((c >= 'a') && (c <= 'z')) ||
169 ((c >= 'A') && (c <= 'Z'))
170 )
171 {
172 return TRUE;
173 }
174 else
175 {
176 return FALSE;
177 }
178 }
180 static void getSerialNumber(char *buf)
181 {
182 #if (PLATFORM_I2C_EEPROM_IN)
183 PLATFORM_DEVICE_info *p_device;
184 uint32_t i;
186 buf[0] = 0;
188 p_device = platform_device_open(PLATFORM_DEVID_EEPROM50, 0);
189 if (p_device != NULL)
190 {
191 /* Serial number stored in the last 128 bytes of the EEPROM 0x50 */
192 if (platform_device_read(p_device->handle, gDeviceEeprom0.page_size-MAX_SN_STORE_SIZE, (uint8_t *)buf, 16) == Platform_EOK)
193 {
194 for (i = 0; i < MAX_SN_SIZE; i++)
195 {
196 if(!serial_num_isvalid(buf[i]))
197 {
198 break;
199 }
200 }
201 buf[i] = 0;
202 }
203 else
204 {
205 IFPRINT(platform_write("Unable to read board serial number."));
206 }
207 }
209 platform_device_close(p_device->handle);
210 #endif
212 return;
213 }
215 /******************************************************************************
216 * platform_get_info
217 ******************************************************************************/
218 #if (PLATFORM_GETINFO_IN)
219 void platform_get_info(platform_info * p_info)
220 {
221 uint32_t csr = CSL_chipReadCSR();
222 volatile uint32_t *megm_rev = (uint32_t *) (MEGM_REV_ID_REGISTER);
223 uint32_t i;
225 if (p_info == 0) {
226 IFPRINT(platform_write("p_info argument is NULL\n"));
227 platform_errno = PLATFORM_ERRNO_INVALID_ARGUMENT;
228 return;
229 }
231 memset(p_info, 0, sizeof(platform_info));
233 strncpy(p_info->version, platform_library_version, 16);
235 p_info->cpu.core_count = PLATFORM_CORE_COUNT;
236 p_info->cpu.id = (uint16_t) CSL_FEXT(csr, CHIP_CSR_CPU_ID);
237 p_info->cpu.revision_id = (uint16_t) CSL_FEXT(csr, CHIP_CSR_REV_ID);
238 strncpy(p_info->cpu.name, PLATFORM_INFO_CPU_NAME, 32);
240 p_info->cpu.megamodule_revision_major =
241 (uint16_t)(((*megm_rev) & MEGM_REV_ID_MAJ_MASK) >> MEGM_REV_ID_MAJ_SHIFT);
242 p_info->cpu.megamodule_revision_minor =
243 (uint16_t)(((*megm_rev) & MEGM_REV_ID_MIN_MASK) >> MEGM_REV_ID_MIN_SHIFT);
245 strncpy(p_info->board_name, PLATFORM_INFO_BOARD_NAME, 32);
247 /* Only little endian mode is supported by the device */
248 p_info->cpu.endian = PLATFORM_LE;
250 p_info->emac.port_count = PLATFORM_MAX_EMAC_PORT_NUM;
252 p_info->frequency = platform_get_frequency();
253 platform_mcb.frequency = p_info->frequency;
254 p_info->board_rev = getBoardVersion();
255 platform_mcb.board_version = p_info->board_rev;
256 getSerialNumber(p_info->serial_nbr);
258 platform_get_macaddr(PLATFORM_MAC_TYPE_EFUSE, &(p_info->emac.efuse_mac_address[0]));
259 platform_get_macaddr(PLATFORM_MAC_TYPE_EEPROM, &(p_info->emac.eeprom_mac_address[0]));
261 for (i = PLATFORM_USER_LED_CLASS; i < PLATFORM_END_LED_CLASS; i++ ) {
262 switch (i) {
263 case PLATFORM_USER_LED_CLASS:
264 p_info->led[i].count = PLATFORM_SOC_LED_COUNT;
265 break;
266 case PLATFORM_SYSTEM_LED_CLASS:
267 p_info->led[i].count = PLATFORM_I2C_LED_COUNT;
268 break;
269 default:
270 IFPRINT(platform_write("Can't read LED Class information\n"));
271 platform_errno = PLATFORM_ERRNO_LED;
272 break;
273 }
274 }
275 }
276 #endif
278 /******************************************************************************
279 * platform_init
280 ******************************************************************************/
281 #if (PLATFORM_INIT_IN)
283 /*Enable EDC on MSMC*/
284 /* Note: Once MSMC EDC is enabled, error correction stays enabled until
285 * the MSMC is reset
286 */
287 static int MSMC_enableEDC ()
288 {
289 unsigned int status = 0;
291 *(unsigned int *)(SMEDCC) &= 0x7FFFFFFF; //Clear SEN(bit31)=0
292 *(unsigned int *)(SMEDCC) |= 0x40000000; //Set ECM(bit30)=1
294 /* Check the status */
295 status = *(unsigned int *)(SMEDCC);
298 if ((status>>30)==0x1)
299 /* Enabled */
300 return 1;
302 /* Failed */
303 return 0;
304 }
307 /*Enable EDC on L1P*/
308 static int enableL1PEDC ()
309 {
310 unsigned int status = 0;
312 *(unsigned int *)(L1PEDCMD) = 0x1; //Set EN(bit0)=1
314 /* Check the status */
315 status = *(unsigned int *)(L1PEDSTAT);
317 if ((status<<28) == 0x10000000)
318 /* Enabled */
319 return 1;
321 /* Failed */
322 return 0;
323 }
326 /*Enable EDC on L2*/
327 static int enableL2EDC ()
328 {
329 unsigned int status = 0;
331 *(unsigned int *)(L2EDCMD) = 0x1;
333 /* Check the status */
334 status = *(unsigned int *)(L2EDSTAT);
336 if ((status<<28) == 0x10000000)
337 /* Enabled */
338 return 1;
340 /* Failed */
341 return 0;
342 }
344 /*Enable all bits in L2EDCEN*/
345 static int enableEDCL2EDCEN ()
346 {
347 /* Set DL2CEN(bit0),PL2CEN(bit1),DL2SEN(bit2),PL2SEN(bit3),SDMAEN(bit4)=1 */
348 *(unsigned int *)(L2EDCEN) |= 0x1F;
349 return 1;
350 }
352 void configSoCGpio(void)
353 {
354 /* FLASH_HOLD */
355 gpioSetDirection(GPIO_PORT_1, 41, GPIO_OUT);
356 //gpioClearOutput(GPIO_PORT_1, 41);
357 gpioSetOutput(GPIO_PORT_1, 41);
358 }
360 #define ENABLE_CLK_DEBUG
362 void platform_info_print(void)
363 {
364 platform_write("\n\nPlatform Info:\n");
365 platform_write("**************************************\n");
366 platform_write("66AK2G02 - C66 Core\n");
367 platform_write("\nClock Selection - ");
368 if(gSysClkSel)
369 {
370 platform_write("External Clock on SYSCLKP\n\n");
371 }
372 else
373 {
374 platform_write("Internal Clock on SYSOSC_IN\n\n");
375 }
377 platform_write("Core PLL Clock - 600MHz\n");
378 platform_write("DDR PLL Clock - 200MHz\n");
379 platform_write("UART PLL Clock - 384MHz\n");
380 platform_write("DSS PLL Clock - 72.4MHz\n");
381 platform_write("NSS PLL Clock - 1000MHz\n");
382 platform_write("ICSS PLL Clock - 200MHz\n");
383 platform_write("**************************************\n\n\n");
384 }
386 Platform_STATUS platform_init(platform_init_flags * p_flags,
387 platform_init_config * p_config)
388 {
389 CSL_Status status;
390 PllcHwSetup pllc_hwSetup;
391 PllcHwSetup pllc_hwSetupRead;
392 volatile uint32_t i;
393 uint8_t pData[50];
395 struct pll_init_data ddr_pll_data = {DDR3A_PLL, PLLM_DDR3,PLLD_DDR3,PLLOD_DDR3};
396 pll_init_data pll_data;
398 #ifdef PLATFORM_PLL_REINIT
399 int loop_count;
400 #endif
402 /*************************************************************************
403 * This routine may be called before BIOS or the application has loaded.
404 * Do not try and write debug statements from here.
405 ***********************************************************************/
407 if ((p_flags == 0) || (p_config == 0)){
408 platform_errno = PLATFORM_ERRNO_INVALID_ARGUMENT;
409 return ( (Platform_STATUS) Platform_EFAIL);
410 }
412 /* Start TCSL so its free running */
413 CSL_chipWriteTSCL(0);
415 /* Unlock the Boot Config */
416 CSL_BootCfgUnlockKicker();
418 /* Get the sys clock selection based on SYSCLKSEL pin status */
419 gSysClkSel = CSL_FEXT (hBootCfg->PLLCLKSEL_STAT,
420 BOOTCFG_PLLCLKSEL_STAT_SYSCLKSEL_STAT);
421 if(gSysClkSel)
422 {
423 //printf("Clock Input is SYSCLKP\n");
425 ddr_pll_data.pll = 0;
426 ddr_pll_data.pll_m = DDRCLKP_PLLM_DDR3;
427 ddr_pll_data.pll_d = DDRCLKP_PLLD_DDR3;
428 ddr_pll_data.pll_od = DDRCLKP_PLLOD_DDR3;
429 }
430 else
431 {
432 //printf("Clock Input is HF OSC\n");
433 }
435 #if defined(SODIMM_CONFIG)
436 uint8_t buf[256];
437 uint8_t i2cportnumber=1;
438 if(readSPD(0x53,buf,i2cportnumber) == Platform_EOK)
439 {
440 uint8_t Dividend,Divisor;
441 uint16_t ddrClock;
442 float MTB,tCK;
443 Dividend = buf[10];
444 Divisor = buf[11];
445 MTB = (float)Dividend/Divisor;
446 tCK = buf[12]*MTB; // minimum cycle time tCK
447 ddrClock = ((1/tCK)*1000)*2;
448 if(ddrClock == 800)
449 {
450 ddr_pll_data.pll = 0;
451 ddr_pll_data.pll_m = 4;
452 ddr_pll_data.pll_d = 1;
453 ddr_pll_data.pll_od = 2;
454 }
455 else if(ddrClock == 1066)
456 {
457 ddr_pll_data.pll = 0;
458 ddr_pll_data.pll_m = 16;
459 ddr_pll_data.pll_d = 1;
460 ddr_pll_data.pll_od = 6;
461 }
462 else if(ddrClock == 1333)
463 {
464 ddr_pll_data.pll = 0;
465 ddr_pll_data.pll_m = 20;
466 ddr_pll_data.pll_d = 1;
467 ddr_pll_data.pll_od = 6;
468 }
469 else if(ddrClock == 1600)
470 {
471 ddr_pll_data.pll = 0;
472 ddr_pll_data.pll_m = 8;
473 ddr_pll_data.pll_d = 1;
474 ddr_pll_data.pll_od = 2;
475 }
476 else
477 {
478 printf("ddrClock --> %d is not valid\n",ddrClock);
479 return ( (Platform_STATUS) Platform_EFAIL);
480 }
481 }
482 #endif
484 #ifdef PLATFORM_PLL_REINIT
485 for (loop_count = 0; loop_count < 10; loop_count++) {
486 platform_errno = 0;
487 #endif
489 PowerUpDomains();
491 /* Initialise default pin muxing */
492 pinMuxInit();
494 /* PLLC module handle structure */
495 if (p_flags->pll)
496 {
497 /* Set the Core PLL */
498 /* Clear local data structures */
499 memset(&pllc_hwSetup, 0, sizeof(PllcHwSetup));
501 /* Setup PLLC hardware parameters */
502 pllc_hwSetup.divEnable = (CSL_BitMask32) (PLLC_DIVEN_PLLDIV2 |
503 PLLC_DIVEN_PLLDIV3) ;
505 /* Setup PLLC hardware parameters */
506 pllc_hwSetup.pllM =
507 (((p_config->pllm) ? p_config->pllm : PLATFORM_PLL1_PLLM_val) - 1);
508 pllc_hwSetup.preDiv = PLATFORM_PLL_PREDIV_val - 1;
509 pllc_hwSetup.pllDiv2 = PLATFORM_PLLDIV2_val - 1;
510 pllc_hwSetup.pllDiv3 = PLATFORM_PLLDIV3_val - 1;
511 pllc_hwSetup.postDiv = PLATFORM_PLL_POSTDIV_val -1;
513 /* Configure PLL muxing and selection */
514 configPllClkSelection(gSysClkSel);
516 #ifdef ENABLE_CLK_DEBUG
517 /* Enable Main PLL on OBSCLK pin and SYSCLKOUT */
518 enablePllObsClk(OBSCLK_MAIN_PLL);
519 CSL_FINS(hBootCfg->DEVCFG, BOOTCFG_DEVCFG_SYSCLKOUTEN, 1);
520 #endif
521 /* set Pll */
522 status = CorePllcHwSetup (&pllc_hwSetup);
524 if (status != CSL_SOK) {
525 platform_errno = PLATFORM_ERRNO_PLL_SETUP;
526 return ( (Platform_STATUS) Platform_EFAIL);
527 }
529 /* Read back */
530 status = CorePllcGetHwSetup (&pllc_hwSetupRead);
532 if (status != CSL_SOK) {
533 platform_errno = PLATFORM_ERRNO_PLL_SETUP;
534 return ( (Platform_STATUS) Platform_EFAIL);
535 }
537 #ifdef ENABLE_CLK_DEBUG
538 /* Enable NSS PLL on OBSCLK pin */
539 enablePllObsClk(OBSCLK_NSS_PLL);
540 #endif
541 pll_data.pll_m = PLLM_NSS;
542 pll_data.pll_d = PLLD_NSS;
543 pll_data.pll_od = CLKOD_NSS;
545 /* Set the NSS PLL */
546 status = SetNssPllConfig(&pll_data);
547 if (status != CSL_SOK) {
548 platform_errno = PLATFORM_ERRNO_PLL_SETUP;
549 return ( (Platform_STATUS) Platform_EFAIL);
550 }
552 #ifdef ENABLE_CLK_DEBUG
553 /* Enable DDR3 PLL on OBSCLK pin */
554 enablePllObsClk(OBSCLK_DDR3A_PLL);
555 #endif
556 /* Set the DDR3 PLL */
557 status = SetDDR3PllConfig(&ddr_pll_data);
558 if (status != CSL_SOK)
559 {
560 platform_errno = PLATFORM_ERRNO_PLL_SETUP;
561 return ( (Platform_STATUS) Platform_EFAIL);
562 }
564 #ifdef ENABLE_CLK_DEBUG
565 /* Enable DSS PLL on OBSCLK pin */
566 enablePllObsClk(OBSCLK_DSS_PLL);
567 #endif
569 pll_data.pll_m = PLLM_DSS;
570 pll_data.pll_d = PLLD_DSS;
571 pll_data.pll_od = CLKOD_DSS;
573 /* Set the DSS PLL */
574 status = SetDssPllConfig(&pll_data);
575 if (status != CSL_SOK) {
576 platform_errno = PLATFORM_ERRNO_PLL_SETUP;
577 return ( (Platform_STATUS) Platform_EFAIL);
578 }
580 #ifdef ENABLE_CLK_DEBUG
581 /* Enable ICSS PLL on OBSCLK pin */
582 enablePllObsClk(OBSCLK_ICSS_PLL);
583 #endif
585 pll_data.pll_m = PLLM_ICSS;
586 pll_data.pll_d = PLLD_ICSS;
587 pll_data.pll_od = CLKOD_ICSS;
589 /* Set the ICSS PLL */
590 status = SetIcssPllConfig(&pll_data);
591 if (status != CSL_SOK) {
592 platform_errno = PLATFORM_ERRNO_PLL_SETUP;
593 return ( (Platform_STATUS) Platform_EFAIL);
594 }
596 #ifdef ENABLE_CLK_DEBUG
597 /* Enable UART PLL on OBSCLK pin */
598 enablePllObsClk(OBSCLK_UART_PLL);
599 #endif
601 pll_data.pll_m = PLLM_UART;
602 pll_data.pll_d = PLLD_UART;
603 pll_data.pll_od = CLKOD_UART;
605 /* Set the UART PLL */
606 status = SetUartPllConfig(&pll_data);
607 if (status != CSL_SOK) {
608 platform_errno = PLATFORM_ERRNO_PLL_SETUP;
609 return ( (Platform_STATUS) Platform_EFAIL);
610 }
611 }
613 /* Save frequency, its needed by platform_delay */
614 if(!platform_mcb.frequency) {
615 platform_mcb.frequency = platform_get_frequency();
616 }
618 /* Initialize DDR */
619 if (p_flags->ddr) {
621 xmc_setup();
623 /* Delay 10msec */
624 for (i=0; i<1000; i++)
625 platform_delay (10);
626 #if defined(SODIMM_CONFIG)
627 status = init_ddr3param(buf);
628 #else
630 status = DDR3Init();
631 #endif
633 if (status != CSL_SOK) {
634 platform_errno = PLATFORM_ERRNO_GENERIC;
635 return ( (Platform_STATUS) Platform_EFAIL);
636 }
637 }
639 #ifdef PLATFORM_PLL_REINIT
640 if (!p_flags->pll || !p_flags->ddr) {
641 break;
642 }
644 /* Run DDR3 test */
645 if (platform_memory_test(PLL_REINIT_DDR3_TEST_START_ADDR,
646 PLL_REINIT_DDR3_TEST_END_ADDR) == Platform_EOK) {
647 break;
648 }
649 }
650 platform_init_return_code = loop_count;
652 if (loop_count == 10) {
653 platform_errno = PLATFORM_ERRNO_GENERIC;
654 return ( (Platform_STATUS) Platform_EFAIL);
655 }
656 #endif
658 /* Enable Error Correction for memory */
659 if (p_flags->ecc) {
660 enableL1PEDC();
661 enableEDCL2EDCEN();
662 enableL2EDC();
663 MSMC_enableEDC();
664 }
666 //TODO: Need to change SGMII to RGMII
667 if (p_flags->phy) {
668 //configSerdes();
669 //Init_SGMII(0);
670 //Init_SGMII(1);
671 }
673 #if (PLATFORM_GPIO_IN)
674 gpioInit(GPIO_PORT_0);
675 gpioInit(GPIO_PORT_1);
676 configSoCGpio();
677 #endif
679 #if (PLATFORM_LED_IN)
680 /* Enable GPIO mode for LED0 and LED1 */
681 pinMuxSetMode(SOC_LED0_PADCONFIG, PADCONFIG_MUX_MODE_QUATERNARY);
682 pinMuxSetMode(SOC_LED1_PADCONFIG, PADCONFIG_MUX_MODE_QUATERNARY);
684 /* Configure LED0 and LED1 GPIO pins as output */
685 gpioSetDirection(GPIO_PORT_0, SOC_LED0_GPIO, GPIO_OUT);
686 gpioSetDirection(GPIO_PORT_1, SOC_LED1_GPIO, GPIO_OUT);
687 #endif
689 #if (PLATFORM_I2C_IN)
690 /* Initialize all the I2C ports - Needed for different I2C devices on the board */
691 evmI2CInit(I2C_PORT_0);
692 evmI2CInit(I2C_PORT_1);
693 evmI2CInit(I2C_PORT_2);
694 //status = i2cProbe (0x0, 0x5C, 0x0900, pData, 0x2 );
695 //status = i2cProbe (0x0, 0x5C, 0x0000, pData, 0x2 );
696 #endif
698 #if (PLATFORM_I2C_IO_EXP_IN)
699 /* Initialize IO expander */
700 i2cIoExpanderInit();
701 #endif
703 return Platform_EOK;
704 }
705 #endif
707 /******************************************************************************
708 * platform_get_coreid
709 ******************************************************************************/
710 #if (PLATFORM_GETCOREID_IN)
711 uint32_t platform_get_coreid(void)
712 {
713 return (CSL_chipReadDNUM());
714 }
715 #endif
717 uint32_t platform_get_clksel(void)
718 {
719 return (gSysClkSel);
720 }
722 /******************************************************************************
723 * platform_getmacaddr
724 ******************************************************************************/
725 #if (PLATFORM_GETMACADDR_IN)
726 Platform_STATUS platform_get_emac_info(uint32_t port_num, PLATFORM_EMAC_EXT_info * emac_info)
727 {
728 uint32_t mac_addr2, mac_addr1;
730 IFPRINT(platform_write("platform_get_emac_info called \n"));
732 emac_info->port_num = port_num;
733 emac_info->mode = emac_port_mode[port_num];
735 CSL_BootCfgGetMacIdentifier(&mac_addr1, &mac_addr2);
736 emac_info->mac_address[0] = ((mac_addr2 & 0x0000ff00) >> 8);
737 emac_info->mac_address[1] = (mac_addr2 & 0x000000ff);
739 emac_info->mac_address[2] = ((mac_addr1 & 0xff000000) >> 24);
740 emac_info->mac_address[3] = ((mac_addr1 & 0x00ff0000) >> 16);
741 emac_info->mac_address[4] = ((mac_addr1 & 0x0000ff00) >> 8);
742 emac_info->mac_address[5] = (mac_addr1 & 0x000000ff);
744 return Platform_EOK;
745 }
747 /*
748 * August 15, 2011 - platform_get_macaddr() is deprecated, application needs to call
749 * the new API platform_get_emac_info() to get the MAC address of the port
750 */
751 Platform_STATUS platform_get_macaddr(PLATFORM_MAC_TYPE type, uint8_t * p_mac_address)
752 {
753 IFPRINT(platform_write("platform_get_macaddr called \n"));
755 switch (type) {
757 case PLATFORM_MAC_TYPE_EFUSE:
758 {
759 uint32_t mac_addr2, mac_addr1;
761 CSL_BootCfgGetMacIdentifier(&mac_addr1, &mac_addr2);
762 p_mac_address[0] = ((mac_addr2 & 0x0000ff00) >> 8);
763 p_mac_address[1] = (mac_addr2 & 0x000000ff);
765 p_mac_address[2] = ((mac_addr1 & 0xff000000) >> 24);
766 p_mac_address[3] = ((mac_addr1 & 0x00ff0000) >> 16);
767 p_mac_address[4] = ((mac_addr1 & 0x0000ff00) >> 8);
768 p_mac_address[5] = (mac_addr1 & 0x000000ff);
770 return Platform_EOK;
771 }
773 default:
774 case PLATFORM_MAC_TYPE_EEPROM:
775 {
776 memset(p_mac_address, 0, 6);
777 return ((Platform_STATUS) Platform_EUNSUPPORTED);
778 }
779 }
780 }
781 #endif
783 /******************************************************************************
784 * platform_get_phy_addr
785 ******************************************************************************/
786 #if (PLATFORM_GETPHYADDR_IN)
787 int32_t platform_get_phy_addr(uint32_t port_num)
788 {
789 IFPRINT(platform_write("platform_get_phy_addr called \n"));
791 return port_num;
792 }
793 #endif
795 /******************************************************************************
796 * platform_phy_link_status
797 ******************************************************************************/
798 #if (PLATFORM_PHYLINKSTATUS_IN)
799 Platform_STATUS platform_phy_link_status(uint32_t port_num)
800 {
801 uint32_t phy_addr;
802 CSL_MDIO_USERACCESS user_access_reg;
804 IFPRINT(platform_write("platform_get_phy_link_status (portnum = %d) called \n", port_num));
806 phy_addr = platform_get_phy_addr( port_num);
808 CSL_MDIO_getUserAccessRegister(port_num, &user_access_reg);
810 user_access_reg.phyAddr = phy_addr;
811 user_access_reg.regAddr = 24; //The LED Control Reg address
812 user_access_reg.data &= 0xFFBE; // Need to check this in ?
813 user_access_reg.data |= 1;
815 CSL_MDIO_setUserAccessRegister(port_num, &user_access_reg);
817 return Platform_EOK;
818 }
819 #endif
821 /******************************************************************************
822 * platform_get_switch_state
823 ******************************************************************************/
824 #if (PLATFORM_GETSWITCHSTATE_IN)
825 uint32_t platform_get_switch_state(uint32_t id)
826 {
827 IFPRINT(platform_write("platform_get_switch_state(id=%d) called \n", id));
829 return (bmcGetUserSwitch(id));
830 }
831 #endif
834 /******************************************************************************
835 * platform_uart_read
836 ******************************************************************************/
837 #if (PLATFORM_UART_IN)
838 Platform_STATUS platform_uart_read(uint8_t *buf, uint32_t delay)
839 {
840 uint32_t delayCount = delay;
842 if (buf == NULL){
843 return ((Platform_STATUS) Platform_EINVALID);
844 }
846 while( (UartIsDataReady(uart_port_num)) != 1)
847 {
848 if (delayCount--)
849 {
850 platform_delay(1);
851 }
852 else
853 {
854 IFPRINT(platform_write("platform_uart_read: Read timeout\n"));
855 platform_errno = PLATFORM_ERRNO_READTO;
856 *buf = UartReadData(uart_port_num);
857 return ( (Platform_STATUS) Platform_EFAIL);
858 }
859 }
861 *buf = UartReadData (uart_port_num);
863 return Platform_EOK;
864 }
866 /******************************************************************************
867 * platform_uart_write
868 ******************************************************************************/
869 Platform_STATUS platform_uart_write(uint8_t buf)
870 {
871 UART_RET ret;
873 ret = UartWriteData(uart_port_num, buf);
874 if(ret != UART_RET_OK)
875 {
876 platform_errno = PLATFORM_ERRNO_DEV_FAIL;
877 return Platform_EFAIL;
878 }
880 return Platform_EOK;
881 }
883 /******************************************************************************
884 * platform_uart_set_baudrate
885 ******************************************************************************/
886 Platform_STATUS platform_uart_set_baudrate(uint32_t baudrate)
887 {
888 uint16_t brate;
889 UART_RET ret;
891 IFPRINT(platform_write("platform_uart_set_baudrate(baudrate=%d) called \n", baudrate));
893 brate = ((uint16_t) (PLATFORM_UART_INPUT_CLOCK_RATE/(baudrate * 16)));
895 ret = UartSetBaudRate(uart_port_num, brate);
896 if(ret != UART_RET_OK)
897 {
898 IFPRINT(platform_write("platform_uart_set_baudrate: Failed with error - %d\n", ret));
899 platform_errno = PLATFORM_ERRNO_DEV_FAIL;
900 return Platform_EFAIL;
901 }
903 return Platform_EOK;
904 }
906 /******************************************************************************
907 * platform_uart_init
908 ******************************************************************************/
909 Platform_STATUS platform_uart_init(void) {
911 UART_RET ret;
912 Platform_STATUS staus;
913 IFPRINT(platform_write("platform_uart_init called \n"));
915 ret = UartInit(uart_port_num);
916 if(ret != UART_RET_OK)
917 {
918 platform_errno = PLATFORM_ERRNO_DEV_FAIL;
919 return Platform_EFAIL;
920 }
922 staus = platform_uart_set_baudrate(115200);
924 return (staus);
925 }
927 /******************************************************************************
928 * platform_uart_set_params
929 *
930 * UART platform library supports three HW instances of UART controller but
931 * platform uart APIs does not provide choose UART port number.
932 * Set UART port number using this function and subsequent calls to platform
933 * uart APIs will use the uart port number set.
934 ******************************************************************************/
935 Platform_STATUS platform_uart_set_params(PLATFORM_UART_Params *params) {
937 IFPRINT(platform_write("platform_uart_set_params called \n"));
939 if(params->uart_port <= PLATFORM_UART_PORT_2)
940 {
941 uart_port_num = params->uart_port;
942 }
943 else
944 {
945 return Platform_EFAIL;
946 }
948 return Platform_EOK;
949 }
951 #endif
954 #if (PLATFORM_LED_IN)
956 uint8_t soc_led_pin_num [PLATFORM_SOC_LED_COUNT] = {SOC_LED0_GPIO, SOC_LED1_GPIO, IO_EXP_SOC_LED2, IO_EXP_SOC_LED3, IO_EXP_SOC_LED4};
957 uint8_t soc_led_gpio_port [2] = {GPIO_PORT_0, GPIO_PORT_1};
959 /******************************************************************************
960 * platform_user_led_ctrl
961 ******************************************************************************/
962 static Platform_STATUS platform_user_led_ctrl(uint32_t led_id, PLATFORM_LED_OP operation)
963 {
964 GPIO_RET gpioRet;
965 I2C_RET i2cRet;
966 Platform_STATUS status;
968 status = Platform_EOK;
970 IFPRINT(platform_write("platform_user_led_ctrl called \n"));
972 switch(led_id) {
973 case PLATFORM_SOC_LED0:
974 case PLATFORM_SOC_LED1:
975 if (operation == PLATFORM_LED_OFF) {
976 gpioRet = gpioClearOutput(soc_led_gpio_port[led_id],
977 soc_led_pin_num[led_id]);
978 }
979 else {
980 gpioRet = gpioSetOutput(soc_led_gpio_port[led_id],
981 soc_led_pin_num[led_id]);
982 }
984 if(gpioRet != GPIO_RET_OK)
985 {
986 IFPRINT(platform_write("platform_user_led_ctrl: Configuring LED %d Failed!\n", led_id));
987 platform_errno = PLATFORM_ERRNO_DEV_FAIL;
988 status = Platform_EFAIL;
989 }
991 break;
993 case PLATFORM_SOC_LED2:
994 case PLATFORM_SOC_LED3:
995 case PLATFORM_SOC_LED4:
996 if (operation == PLATFORM_LED_ON) {
997 i2cRet = i2cIoExpanderWritePin(
998 (I2cIoExpPins) soc_led_pin_num[led_id],
999 I2C_IO_EXP_PIN_LOW); // LOW to LED ON
1000 }
1001 else {
1002 i2cRet = i2cIoExpanderWritePin(
1003 (I2cIoExpPins) soc_led_pin_num[led_id],
1004 I2C_IO_EXP_PIN_HIGH); // HIGH to LED OFF
1005 }
1007 if(i2cRet != I2C_RET_OK)
1008 {
1009 IFPRINT(platform_write("platform_user_led_ctrl: Configuring LED %d Failed!\n", led_id));
1010 platform_errno = PLATFORM_ERRNO_DEV_FAIL;
1011 status = Platform_EFAIL;
1012 }
1014 break;
1016 default:
1017 IFPRINT(platform_write("platform_user_led_ctrl: Invalid led_id %d\n", led_id));
1018 platform_errno = PLATFORM_ERRNO_INVALID_ARGUMENT;
1019 return ( (Platform_STATUS) Platform_EUNSUPPORTED);
1020 }
1022 return (status);
1023 }
1025 /******************************************************************************
1026 * platform_led
1027 ******************************************************************************/
1028 Platform_STATUS platform_led(uint32_t led_id, PLATFORM_LED_OP operation, LED_CLASS_E led_class)
1029 {
1030 Platform_STATUS status;
1032 IFPRINT(platform_write("platform_led(ledid=%d,operation=%d,class=%d) called \n", led_id, operation, led_class));
1034 switch (led_class) {
1035 case PLATFORM_USER_LED_CLASS:
1036 status = platform_user_led_ctrl(led_id, operation);
1037 break;
1038 case PLATFORM_SYSTEM_LED_CLASS:
1039 return ( (Platform_STATUS) Platform_EUNSUPPORTED);
1040 default:
1041 IFPRINT(platform_write("platform_led: Invalid led_class %d\n", led_class));
1042 platform_errno = PLATFORM_ERRNO_INVALID_ARGUMENT;
1043 return ( (Platform_STATUS) Platform_EUNSUPPORTED);
1044 }
1046 return (status);
1047 }
1048 #endif
1050 /******************************************************************************
1051 * platform_delay
1052 ******************************************************************************/
1053 #if (PLATFORM_DELAY_IN)
1054 Platform_STATUS platform_delay(uint32_t usecs)
1055 {
1056 int32_t delayCount = (int32_t) usecs * platform_mcb.frequency;
1057 int32_t start_val = (int32_t) CSL_chipReadTSCL();
1059 while (((int32_t)CSL_chipReadTSCL() - start_val) < delayCount);
1061 return Platform_EOK;
1062 }
1064 void platform_delaycycles(uint32_t cycles)
1065 {
1066 uint32_t start_val = CSL_chipReadTSCL();
1068 while ((CSL_chipReadTSCL() - start_val) < cycles);
1070 return;
1071 }
1072 #endif
1074 /******************************************************************************
1075 * platform_memory_test
1076 ******************************************************************************/
1077 #if (PLATFORM_EXTMEMTEST_IN)
1078 static inline int32_t platform_memory_test (uint32_t start_address, uint32_t end_address)
1079 {
1080 uint32_t index, value;
1082 /* Write a pattern */
1083 for (index = start_address; index < end_address; index += 4) {
1084 *(volatile uint32_t *) index = (uint32_t)index;
1085 }
1087 /* Read and check the pattern */
1088 for (index = start_address; index < end_address; index += 4) {
1090 value = *(uint32_t *) index;
1092 if (value != index) {
1093 IFPRINT(platform_write("platform_memory_test: Failed at address index = 0x%x value = 0x%x *(index) = 0x%x\n",
1094 index, value, *(volatile uint32_t *) index));
1095 platform_errno = index;
1096 return (Platform_EFAIL);
1097 }
1098 }
1100 /* Write a pattern for complementary values */
1101 for (index = start_address; index < end_address; index += 4) {
1102 *(volatile uint32_t *) index = (uint32_t)~index;
1103 }
1105 /* Read and check the pattern */
1106 for (index = start_address; index < end_address; index += 4) {
1108 value = *(uint32_t *) index;
1110 if (value != ~index) {
1111 IFPRINT(platform_write("platform_memory_test: Failed at address index = 0x%x value = 0x%x *(index) = 0x%x\n",
1112 index, value, *(volatile uint32_t *) index));
1113 platform_errno = index;
1114 return (Platform_EFAIL);
1115 }
1116 }
1118 return Platform_EOK;
1119 }
1120 #endif
1122 /******************************************************************************
1123 * platform_external_memory_test
1124 ******************************************************************************/
1125 #if (PLATFORM_EXTMEMTEST_IN)
1126 Platform_STATUS platform_external_memory_test(uint32_t start_address, uint32_t end_address)
1127 {
1128 IFPRINT(platform_write("platform_external_memory_test(start=0x%x,end=0x%x) called \n", start_address, end_address));
1130 if((start_address == 0) && (end_address == 0)) {
1131 start_address = PLATFORM_DDR3_SDRAM_START;
1132 end_address = PLATFORM_DDR3_SDRAM_END - 1;
1133 }
1135 if ((start_address < PLATFORM_DDR3_SDRAM_START) ||
1136 (end_address > PLATFORM_DDR3_SDRAM_END) ||
1137 (start_address >= end_address)){
1138 IFPRINT(platform_write("platform_external_memory_test: Start address (0x%08x) or end address (0x%08x)\n",
1139 start_address, end_address));
1140 platform_errno = PLATFORM_ERRNO_INVALID_ARGUMENT;
1141 return ((Platform_STATUS) Platform_EINVALID);
1142 }
1144 return platform_memory_test(start_address, end_address);
1145 }
1146 #endif
1148 /******************************************************************************
1149 * platform_write - Printf or echo to UART or both
1150 ******************************************************************************/
1151 #if (PLATFORM_WRITE_IN)
1152 WRITE_info platform_write_configure (WRITE_info wtype) {
1153 WRITE_info original;
1154 IFPRINT(platform_write("platform_write_configure(write_type=%d) called \n", wtype));
1155 original = write_type;
1156 write_type = wtype;
1157 return original;
1158 }
1160 void platform_write(const char *fmt, ... )
1161 {
1162 va_list arg_ptr;
1163 uint32_t i, length;
1165 /* Initial platform_write to temporary buffer.. at least try some sort of sanity check so we don't write all over
1166 * memory if the print is too large.
1167 */
1168 if (strlen(fmt) > MAX_WRITE_LEN) {platform_errno = PLATFORM_ERRNO_INVALID_ARGUMENT; return;}
1170 va_start( arg_ptr, fmt );
1171 length = vsprintf( (char *)write_buffer, fmt, arg_ptr );
1172 va_end( arg_ptr );
1174 if ((write_type == PLATFORM_WRITE_PRINTF) || (write_type == PLATFORM_WRITE_ALL)) {
1175 printf( "%s", write_buffer );
1176 fflush(stdout);
1177 }
1179 if ((write_type == PLATFORM_WRITE_UART) || (write_type == PLATFORM_WRITE_ALL)) {
1180 /* Log to console port (routine only sends a byte at a time) */
1181 for (i=0; i < length; i++) {
1182 if (write_buffer[i] == '\n') {
1183 UartWriteData(PLATFORM_UART_DBG_PORT, (uint8_t)0x0D);
1184 UartWriteData(PLATFORM_UART_DBG_PORT, (uint8_t)0x0A);
1185 }
1186 else {
1187 UartWriteData(PLATFORM_UART_DBG_PORT, (uint8_t)write_buffer[i]);
1188 }
1189 }
1190 }
1192 return;
1193 }
1194 #endif
1196 /******************************************************************************
1197 * platform_read_configure - Connfigures the input source for platform_read
1198 ******************************************************************************/
1199 #if (PLATFORM_READ_IN)
1200 READ_info platform_read_configure (READ_info rdype) {
1201 READ_info original;
1203 IFPRINT(platform_write("platform_read_configure(read_type=%d) called \n", rdype));
1205 original = read_type;
1206 read_type = rdype;
1208 return original;
1209 }
1211 /******************************************************************************
1212 * platform_read - scanf or read from UART
1213 ******************************************************************************/
1214 uint32_t platform_read(uint8_t *data, uint32_t length)
1215 {
1216 Platform_STATUS status = Platform_EOK;
1217 uint32_t count = 0;
1219 if (read_type == PLATFORM_READ_UART)
1220 {
1221 /* Wait till an input is provided */
1222 do
1223 {
1224 status = platform_uart_read(data, PLATFORM_READ_DELAY);
1225 if(status == Platform_EOK)
1226 {
1227 /* Check if user pressed enter */
1228 if((*data == 0xD) || (*data == 0x1B))
1229 {
1230 *data = '\0';
1231 break;
1232 }
1234 platform_uart_write(*data);
1236 count++;
1237 data++;
1238 }
1240 } while ((status != Platform_EOK) || (count != length));
1241 }
1243 if (read_type == PLATFORM_READ_SCANF)
1244 {
1245 count = scanf("%s", data);
1246 }
1248 return (count);
1249 }
1250 #endif /* #if (PLATFORM_READ_IN) */
1252 /******************************************************************************
1253 * platform_device_open
1254 ******************************************************************************/
1255 #if (PLATFORM_NAND_IN) || (PLATFORM_NOR_IN) || (PLATFORM_I2C_EEPROM_IN) || (PLATFORM_MMCHS_IN) || (PLATFORM_QSPI_FLASH_IN)
1256 PLATFORM_DEVICE_info *platform_device_open(uint32_t deviceid, uint32_t flags ) {
1258 PLATFORM_DEVICE_info *p_info;
1260 IFPRINT(platform_write("platform_device_open(deviceid=0x%x,flags=0x%x) called \n", deviceid, flags));
1262 #if (PLATFORM_NAND_IN)
1264 if (deviceid == PLATFORM_DEVID_MT29F2G16ABAFA) {
1265 /* Disable Write protect in NAND */
1266 if (nandInit() != SUCCESS) {
1267 IFPRINT(platform_write("platform_dveice_open: Initialization failed.\n"));
1268 return NULL;
1269 }
1271 /* Store the open flags */
1272 gDeviceNand.flags = flags;
1274 /* Set the device to point to its bad block list */
1275 gDeviceNand.bblist = (uint8_t *)&gDeviceNandBBlist;
1277 p_info = &gDeviceNand;
1279 if (NandGetDetails(p_info) != SUCCESS) {
1280 IFPRINT(platform_write("platform_device_open: Unable to read device information.\n"));
1281 platform_errno = PLATFORM_ERRNO_BADFLASHDEV;
1282 return NULL;
1283 }
1285 p_info->handle = deviceid;
1287 return p_info;
1288 }
1290 #endif
1292 #if (PLATFORM_NOR_IN)
1294 NOR_STATUS nor_status;
1296 if (deviceid == PLATFORM_DEVID_NORN25Q128A13ESF40F) {
1298 /* Disable Write protect in NOR */
1299 nor_status = nor_init();
1300 if (nor_status != NOR_EOK) {
1301 IFPRINT(platform_write("platform_device_open: Initialization failed.\n"));
1302 return NULL;
1303 }
1305 /* Store the open flags */
1306 gDeviceNor.flags = flags;
1308 p_info = &gDeviceNor;
1310 if (nor_get_details(p_info) != SUCCESS) {
1311 IFPRINT(platform_write("platform_device_open: Unable to read device information.\n"));
1312 platform_errno = PLATFORM_ERRNO_BADFLASHDEV;
1313 return NULL;
1314 }
1316 p_info->handle = deviceid;
1318 return p_info;
1319 }
1320 #endif
1322 #if (PLATFORM_I2C_EEPROM_IN)
1323 uint8_t i2cportnumber=0;
1324 if (deviceid == PLATFORM_DEVID_EEPROM50) {
1325 /* Store the open flags */
1326 gDeviceEeprom0.flags = flags;
1328 evmI2CInit(i2cportnumber);
1329 p_info = &gDeviceEeprom0;
1330 p_info->handle = deviceid;
1331 return p_info;
1332 }
1334 if (deviceid == PLATFORM_DEVID_EEPROM51) {
1335 /* Store the open flags */
1336 gDeviceEeprom1.flags = flags;
1337 evmI2CInit(i2cportnumber);
1338 p_info = &gDeviceEeprom1;
1339 p_info->handle = deviceid;
1340 return p_info;
1341 }
1343 #endif
1345 #if (PLATFORM_MMCHS_IN)
1347 if (deviceid == PLATFORM_DEVID_EMMC) {
1348 mmcInfo = mmchsInit(MMCHS_MMC_INST);
1349 if (mmcInfo == NULL) {
1350 IFPRINT(platform_write("platform_device_open: Initialization failed.\n"));
1351 return NULL;
1352 }
1354 /* Store the open flags */
1355 gDeviceEmmc.flags = flags;
1356 mmcCard = mmcInfo->card;
1358 p_info = &gDeviceEmmc;
1359 p_info->handle = deviceid;
1361 if (mmcCard->cardType == MMCHS_MMC)
1362 {
1363 p_info->type = PLATFORM_DEVICE_EMMC;
1364 p_info->manufacturer_id = mmcCard->cid.manfid;
1365 p_info->device_id = mmcCard->cid.oemid;
1366 p_info->width = mmcCard->busWidth;
1367 p_info->block_count = mmcCard->nBlks;
1368 p_info->page_size = mmcCard->blkLen;
1369 }
1370 return p_info;
1371 }
1373 if (deviceid == PLATFORM_DEVID_SD) {
1374 sdInfo = mmchsInit(MMCHS_SD_CARD_INST);
1375 if (sdInfo == NULL) {
1376 IFPRINT(platform_write("platform_device_open: Initialization failed.\n"));
1377 return NULL;
1378 }
1380 /* Store the open flags */
1381 gDeviceSd.flags = flags;
1382 sdCard = sdInfo->card;
1384 p_info = &gDeviceSd;
1385 p_info->handle = deviceid;
1387 if (sdCard->cardType == MMCHS_SD_CARD)
1388 {
1389 p_info->type = PLATFORM_DEVICE_SD;
1390 p_info->manufacturer_id = sdCard->cid.manfid;
1391 p_info->device_id = sdCard->cid.oemid;
1392 p_info->width = sdCard->busWidth;
1393 p_info->block_count = sdCard->nBlks;
1394 p_info->page_size = sdCard->blkLen;
1396 }
1397 return p_info;
1398 }
1400 #endif
1402 #if (PLATFORM_QSPI_FLASH_IN)
1403 QSPI_STATUS qspiStatus;
1405 if (deviceid == PLATFORM_DEVID_QSPIFLASH_S25FL512S) {
1407 /* Initialize the qspi flash */
1408 qspiStatus = qspiFlashInit(&gDeviceQspiFlash);
1409 if (qspiStatus != QSPI_SUCCESS) {
1410 IFPRINT(platform_write("platform_device_open: QSPI Flash Initialization failed.\n"));
1411 return NULL;
1412 }
1414 /* Store the open flags */
1415 gDeviceQspiFlash.flags = flags;
1417 p_info = &gDeviceQspiFlash;
1419 if (qspiFlashReadId(p_info) != SUCCESS) {
1420 IFPRINT(platform_write("platform_device_open: Unable to read device information.\n"));
1421 platform_errno = PLATFORM_ERRNO_BADFLASHDEV;
1422 return NULL;
1423 }
1425 p_info->handle = deviceid;
1427 return p_info;
1428 }
1429 #endif
1431 platform_errno = PLATFORM_ERRNO_UNSUPPORTED;
1433 return NULL;
1434 }
1435 #endif
1437 /******************************************************************************
1438 * platform_flash_close
1439 ******************************************************************************/
1440 #if (PLATFORM_NAND_IN) || (PLATFORM_NOR_IN) || (PLATFORM_I2C_EEPROM_IN) || (PLATFORM_MMCHS_IN) || (PLATFORM_QSPI_FLASH_IN)
1441 Platform_STATUS platform_device_close(PLATFORM_DEVHANDLE deviceid) {
1443 IFPRINT(platform_write("platform_device_close(handle=0x%x) called \n", deviceid));
1445 #if (PLATFORM_NAND_IN)
1446 if (deviceid == PLATFORM_DEVID_MT29F2G16ABAFA) {
1447 gDeviceNand.handle = 0;
1448 return Platform_EOK;
1449 }
1450 #endif
1452 #if (PLATFORM_NOR_IN)
1453 if (deviceid == PLATFORM_DEVID_NORN25Q128A13ESF40F) {
1454 gDeviceNor.handle = 0;
1455 return Platform_EOK;
1456 }
1457 #endif
1459 #if (PLATFORM_I2C_EEPROM_IN)
1461 if (deviceid == PLATFORM_DEVID_EEPROM50) {
1462 gDeviceEeprom0.handle = 0;
1463 return Platform_EOK;
1464 }
1466 if (deviceid == PLATFORM_DEVID_EEPROM51) {
1467 gDeviceEeprom1.handle = 0;
1468 return Platform_EOK;
1469 }
1471 #endif
1473 #if (PLATFORM_MMCHS_IN)
1475 if (deviceid == PLATFORM_DEVID_EMMC) {
1476 gDeviceEmmc.handle = 0;
1477 return Platform_EOK;
1478 }
1480 if (deviceid == PLATFORM_DEVID_SD) {
1481 gDeviceSd.handle = 0;
1482 return Platform_EOK;
1483 }
1485 #endif
1487 #if (PLATFORM_QSPI_FLASH_IN)
1488 if (deviceid == PLATFORM_DEVID_QSPIFLASH_S25FL512S) {
1489 gDeviceQspiFlash.handle = 0;
1490 return Platform_EOK;
1491 }
1492 #endif
1494 return Platform_EUNSUPPORTED;
1495 }
1496 #endif
1498 /******************************************************************************
1499 * platform_flash_read_spare_data
1500 ******************************************************************************/
1501 #if (PLATFORM_NAND_IN) || (PLATFORM_NOR_IN) || (PLATFORM_I2C_EEPROM_IN)
1502 Platform_STATUS platform_device_read_spare_data(PLATFORM_DEVHANDLE deviceid,
1503 uint32_t block_number,
1504 uint32_t page_number,
1505 uint8_t *buf) {
1507 IFPRINT(platform_write("platform_device_read_spare_data(handle=0x%x, block=%d, page=%d,buf=0x%x) called \n",
1508 deviceid, block_number, page_number, buf));
1510 if (buf == NULL) {
1511 platform_errno = PLATFORM_ERRNO_INVALID_ARGUMENT;
1512 return Platform_EINVALID;
1513 }
1515 #if (PLATFORM_NAND_IN)
1516 if (deviceid == PLATFORM_DEVID_MT29F2G16ABAFA) {
1517 if ((block_number >= gDeviceNand.block_count) || (page_number >= gDeviceNand.page_count))
1518 {
1519 platform_errno = PLATFORM_ERRNO_INVALID_ARGUMENT;
1520 return Platform_EINVALID;
1521 }
1523 if (NandReadSpareArea (&gDeviceNand, block_number, page_number, buf) != SUCCESS) {
1524 return ( (Platform_STATUS) Platform_EFAIL);
1525 }
1526 return Platform_EOK;
1527 }
1528 #endif
1530 return Platform_EUNSUPPORTED;
1532 }
1533 #endif
1535 /******************************************************************************
1536 * platform_device_mark_block_bad
1537 ******************************************************************************/
1538 #if PLATFORM_NAND_WRITE_IN
1539 Platform_STATUS platform_device_mark_block_bad(PLATFORM_DEVHANDLE deviceid,
1540 uint32_t block_number) {
1542 uint8_t *buf = NULL;
1543 PLATFORM_DEVICE_info *p_device;
1545 if (deviceid == PLATFORM_DEVID_MT29F2G16ABAFA) {
1546 p_device = &gDeviceNand;
1547 }
1548 else {
1549 p_device = NULL;
1550 }
1552 if (p_device == NULL) {
1553 platform_errno = PLATFORM_ERRNO_INVALID_ARGUMENT;
1554 return Platform_EINVALID;
1555 }
1557 buf = (uint8_t *) Osal_platformMalloc(platform_roundup(p_device->spare_size, PLATFORM_CACHE_LINE_SIZE),
1558 PLATFORM_CACHE_LINE_SIZE);
1560 platform_device_read_spare_data(deviceid, block_number, 0, buf);
1562 buf[p_device->bboffset] = 0xA5; /* BI indicator byte*/
1564 if ( block_number >= gDeviceNand.block_count ) {
1565 platform_errno = PLATFORM_ERRNO_INVALID_ARGUMENT;
1566 Osal_platformFree(buf, platform_roundup(p_device->spare_size, PLATFORM_CACHE_LINE_SIZE));
1567 return Platform_EINVALID;
1568 }
1570 if (NandWriteSpareArea (p_device, block_number, 0, buf) != SUCCESS) {
1571 Osal_platformFree(buf, platform_roundup(p_device->spare_size, PLATFORM_CACHE_LINE_SIZE));
1572 return ( (Platform_STATUS) Platform_EFAIL);
1573 }
1575 Osal_platformFree(buf, platform_roundup(p_device->spare_size, PLATFORM_CACHE_LINE_SIZE));
1577 return Platform_EOK;
1579 }
1580 #endif
1582 /******************************************************************************
1583 * platform_flash_write_spare_data
1584 ******************************************************************************/
1585 #if (PLATFORM_NAND_IN) || (PLATFORM_NOR_IN) || (PLATFORM_I2C_EEPROM_IN)
1586 Platform_STATUS platform_device_write_spare_data(PLATFORM_DEVHANDLE deviceid,
1587 uint32_t block_number,
1588 uint32_t page_number,
1589 uint8_t *buf) {
1591 IFPRINT(platform_write("platform_device_write_spare_data(handle=0x%x, block=%d, page=%d,buf=0x%x) called \n",
1592 deviceid, block_number, page_number, buf));
1594 if (buf == NULL) {
1595 platform_errno = PLATFORM_ERRNO_INVALID_ARGUMENT;
1596 return Platform_EINVALID;
1597 }
1599 #if (PLATFORM_NAND_WRITE_IN)
1600 if (deviceid == PLATFORM_DEVID_MT29F2G16ABAFA) {
1601 if ((block_number >= gDeviceNand.block_count) || (page_number >= gDeviceNand.page_count))
1602 {
1603 platform_errno = PLATFORM_ERRNO_INVALID_ARGUMENT;
1604 return Platform_EINVALID;
1605 }
1607 if (NandWriteSpareArea (&gDeviceNand, block_number, page_number, buf) != SUCCESS) {
1608 return ( (Platform_STATUS) Platform_EFAIL);
1609 }
1610 return Platform_EOK;
1611 }
1612 #endif
1614 return Platform_EUNSUPPORTED;
1616 }
1617 #endif
1619 /******************************************************************************
1620 * platform_device_read
1621 ******************************************************************************/
1622 #if (PLATFORM_NAND_IN) || (PLATFORM_NOR_IN) || (PLATFORM_I2C_EEPROM_IN) || (PLATFORM_MMCHS_IN) || (PLATFORM_QSPI_FLASH_IN)
1623 Platform_STATUS platform_device_read(PLATFORM_DEVHANDLE deviceid,
1624 uint32_t offset,
1625 uint8_t *buf,
1626 uint32_t len) {
1628 IFPRINT(platform_write("platform_device_read(handle=0x%x, offset=%d, len=%d, buf=0x%x) called \n",
1629 deviceid, offset, len, buf));
1631 if (buf == NULL || len == 0) {
1632 platform_errno = PLATFORM_ERRNO_INVALID_ARGUMENT;
1633 return Platform_EINVALID;
1634 }
1636 #if (PLATFORM_NAND_IN)
1637 if (deviceid == PLATFORM_DEVID_MT29F2G16ABAFA) {
1638 NAND_ADDR addr;
1639 uint32_t read_len = 0;
1641 addr.uiColumnAddr= 0;
1643 for (read_len = 0; read_len < len; read_len += gDeviceNand.page_size)
1644 {
1645 if (platform_offset_to_blocknpage(deviceid, offset+read_len, &addr.uiBlockAddr, &addr.uiPageAddr) != Platform_EOK) {
1646 return Platform_EUNSUPPORTED;
1647 }
1649 if (readNandPage (&gDeviceNand, addr, &buf[read_len]) != SUCCESS) {
1650 return ( (Platform_STATUS) Platform_EFAIL);
1651 }
1652 }
1654 return Platform_EOK;
1655 }
1656 #endif
1658 #if (PLATFORM_NOR_IN)
1659 if (deviceid == PLATFORM_DEVID_NORN25Q128A13ESF40F) {
1660 if (nor_read (&gDeviceNor, offset, len, buf) != SUCCESS) {
1661 return ( (Platform_STATUS) Platform_EFAIL);
1662 }
1663 return Platform_EOK;
1664 }
1665 #endif
1667 #if (PLATFORM_I2C_EEPROM_IN)
1668 uint8_t i2cportnumber=0;
1669 if (deviceid == PLATFORM_DEVID_EEPROM50) {
1670 if (i2cEepromRead (offset, len, buf, 0x50,i2cportnumber) != I2C_RET_OK) {
1671 IFPRINT(platform_write("platform_eeprom_read: EEPROM read failed\n"));
1672 return ( (Platform_STATUS) Platform_EFAIL);
1673 }
1674 return Platform_EOK;
1675 }
1677 if (deviceid == PLATFORM_DEVID_EEPROM51) {
1678 if (i2cEepromRead (offset, len, buf, 0x51,i2cportnumber) != I2C_RET_OK) {
1679 IFPRINT(platform_write("platform_eeprom_read: EEPROM read failed\n"));
1680 return ( (Platform_STATUS) Platform_EFAIL);
1681 }
1682 return Platform_EOK;
1683 }
1685 #endif
1687 #if (PLATFORM_MMCHS_IN)
1689 if (deviceid == PLATFORM_DEVID_EMMC){
1690 //TODO: Need to add support for reading data which is not multiple of block length
1691 if (mmchsBlockRead (mmcCard, offset, (len/MMCHS_BLK_LEN), buf) != SUCCESS) {
1692 return ( (Platform_STATUS) Platform_EFAIL);
1693 }
1695 return Platform_EOK;
1696 }
1698 if (deviceid == PLATFORM_DEVID_SD) {
1699 //TODO: Need to add support for reading data which is not multiple of block length
1700 if (mmchsBlockRead (sdCard, offset, (len/MMCHS_BLK_LEN), buf) != SUCCESS) {
1701 return ( (Platform_STATUS) Platform_EFAIL);
1702 }
1704 return Platform_EOK;
1705 }
1707 #endif
1709 #if (PLATFORM_QSPI_FLASH_IN)
1710 if (deviceid == PLATFORM_DEVID_QSPIFLASH_S25FL512S) {
1711 if (qspiFlashRead (&gDeviceQspiFlash, offset, len, buf, qspiReadMode)
1712 != SUCCESS) {
1713 return ( (Platform_STATUS) Platform_EFAIL);
1714 }
1715 return Platform_EOK;
1716 }
1717 #endif
1719 return Platform_EUNSUPPORTED;
1721 }
1722 #endif
1724 /******************************************************************************
1725 * Computes a block and page based on an offset
1726 ******************************************************************************/
1727 #if (PLATFORM_NAND_IN) || (PLATFORM_NOR_IN) || (PLATFORM_QSPI_FLASH_IN)
1729 Platform_STATUS platform_offset_to_blocknpage(PLATFORM_DEVHANDLE deviceid,
1730 uint32_t offset,
1731 uint32_t *block,
1732 uint32_t *page) {
1733 uint32_t leftover;
1734 uint32_t block_size;
1735 uint32_t block_count, page_size, page_count;
1737 IFPRINT(platform_write("platform_offset_to_blocknpage(handle=0x%x, offset=%d) called \n",
1738 deviceid, offset));
1740 if (deviceid == PLATFORM_DEVID_MT29F2G16ABAFA) {
1741 block_count = gDeviceNand.block_count;
1742 page_size = gDeviceNand.page_size;
1743 page_count = gDeviceNand.page_count;
1744 }
1745 else if (deviceid == PLATFORM_DEVID_NORN25Q128A13ESF40F) {
1746 block_count = gDeviceNor.block_count;
1747 page_size = gDeviceNor.page_size;
1748 page_count = gDeviceNor.page_count;
1749 }
1750 else if (deviceid == PLATFORM_DEVID_QSPIFLASH_S25FL512S) {
1751 block_count = gDeviceQspiFlash.block_count;
1752 page_size = gDeviceQspiFlash.page_size;
1753 page_count = gDeviceQspiFlash.page_count;
1754 }
1755 else {
1756 return Platform_EUNSUPPORTED;
1757 }
1759 block_size = (page_count * page_size);
1761 *block = offset / block_size;
1762 leftover = offset % block_size;
1763 *page = leftover / page_size;
1764 if (leftover % page_size) {
1765 /* All writes must be page aligned for now */
1766 return Platform_EUNSUPPORTED;
1767 }
1768 if (*block > block_count) {
1769 return Platform_EINVALID;
1770 }
1771 if (*page > page_count) {
1772 return Platform_EINVALID;
1773 }
1775 IFPRINT(platform_write("platform_offset_to_blocknpage: offset = %d block = %d page = %d \n", offset, *block, *page));
1777 return Platform_EOK;
1779 }
1781 #endif
1783 /******************************************************************************
1784 * Computes a block and page based on an offset
1785 ******************************************************************************/
1786 #if (PLATFORM_NAND_IN) || (PLATFORM_NOR_IN) || (PLATFORM_QSPI_FLASH_IN)
1788 Platform_STATUS platform_blocknpage_to_offset(PLATFORM_DEVHANDLE deviceid,
1789 uint32_t *offset,
1790 uint32_t block,
1791 uint32_t page) {
1793 uint32_t block_count, page_size, page_count;
1795 IFPRINT(platform_write("platform_blocknpage_to_offset(handle=0x%x, block=%d, page=%d) called \n",
1796 deviceid, block, page));
1798 if (deviceid == PLATFORM_DEVID_MT29F2G16ABAFA) {
1799 block_count = gDeviceNand.block_count;
1800 page_size = gDeviceNand.page_size;
1801 page_count = gDeviceNand.page_count;
1802 }
1803 else if (deviceid == PLATFORM_DEVID_NORN25Q128A13ESF40F) {
1804 block_count = gDeviceNor.block_count;
1805 page_size = gDeviceNor.page_size;
1806 page_count = gDeviceNor.page_count;
1807 }
1808 else if (deviceid == PLATFORM_DEVID_QSPIFLASH_S25FL512S) {
1809 block_count = gDeviceQspiFlash.block_count;
1810 page_size = gDeviceQspiFlash.page_size;
1811 page_count = gDeviceQspiFlash.page_count;
1812 }
1813 else {
1814 return Platform_EUNSUPPORTED;
1815 }
1817 if (block >block_count || page > page_count) {
1818 return Platform_EINVALID;
1819 }
1821 *offset = (block * (page_count * page_size)) + (page * page_size);
1823 IFPRINT(platform_write("platform_blocknpage_to_offset: offset = %d block = %d page = %d \n", *offset, block, page));
1825 return Platform_EOK;
1826 }
1828 #endif
1830 /******************************************************************************
1831 * platform_device_write
1832 ******************************************************************************/
1834 #if (PLATFORM_NAND_IN) || (PLATFORM_NOR_IN) || (PLATFORM_I2C_EEPROM_IN) || (PLATFORM_MMCHS_IN) || (PLATFORM_QSPI_FLASH_IN)
1836 Platform_STATUS platform_device_write(PLATFORM_DEVHANDLE deviceid,
1837 uint32_t offset,
1838 uint8_t *buf,
1839 uint32_t len) {
1841 IFPRINT(platform_write("platform_device_write(handle=0x%x, offset=%d, len=%d, buf=0x%x) called \n",
1842 deviceid, offset, len, buf));
1844 /* Check general args */
1845 if (buf == NULL || len == 0) {
1846 platform_errno = PLATFORM_ERRNO_INVALID_ARGUMENT;
1847 return Platform_EINVALID;
1848 }
1850 #if (PLATFORM_NAND_WRITE_IN || PLATFORM_NOR_WRITE_IN || PLATFORM_QSPI_FLASH_IN)
1851 if ((deviceid == PLATFORM_DEVID_MT29F2G16ABAFA) ||
1852 (deviceid == PLATFORM_DEVID_NORN25Q128A13ESF40F) ||
1853 (deviceid == PLATFORM_DEVID_QSPIFLASH_S25FL512S))
1854 {
1855 NAND_ADDR addr;
1856 NAND_ADDR StartAddress;
1857 Platform_STATUS retval = Platform_EOK;
1858 PLATFORM_DEVICE_info *p_device;
1859 int32_t block, page;
1860 int32_t bufindex;
1861 int32_t index;
1862 int32_t useable_page_size;
1863 int32_t block_size;
1864 uint32_t noraddress;
1865 uint32_t qspiflashaddress;
1866 uint8_t *pBlock = NULL;
1867 uint8_t *pPage = NULL;
1869 if (deviceid == PLATFORM_DEVID_MT29F2G16ABAFA) {
1870 p_device = &gDeviceNand;
1871 }
1872 else if (deviceid == PLATFORM_DEVID_NORN25Q128A13ESF40F) {
1873 p_device = &gDeviceNor;
1874 }
1875 else {
1876 p_device = &gDeviceQspiFlash;
1877 }
1880 #if (PLATFORM_QSPI_FLASH_WRITE_IN)
1881 if (deviceid == PLATFORM_DEVID_QSPIFLASH_S25FL512S) {
1882 if (qspiFlashWrite (&gDeviceQspiFlash, offset, len, buf, qspiWriteMode)
1883 != SUCCESS) {
1884 return ( (Platform_STATUS) Platform_EFAIL);
1885 }
1886 return Platform_EOK;
1887 }
1888 #endif
1889 /* Calculate the usable page area.. Its the size of the page */
1890 useable_page_size = p_device->page_size;
1892 /* allocate a buffer big enough to hold one block (must include spare area) */
1893 block_size = p_device->page_size * p_device->page_count;
1895 pBlock = Osal_platformMalloc(platform_roundup(block_size, PLATFORM_CACHE_LINE_SIZE),
1896 PLATFORM_CACHE_LINE_SIZE);
1898 if ( !pBlock ){
1899 platform_errno = PLATFORM_ERRNO_OOM;
1900 retval = Platform_EFAIL;
1901 goto FLASHWRITE_ERROR;
1902 }
1904 /* allocate a buffer big enough to hold one page of the flash */
1905 pPage = Osal_platformMalloc(platform_roundup(p_device->page_size, PLATFORM_CACHE_LINE_SIZE),
1906 PLATFORM_CACHE_LINE_SIZE);
1908 if ( !pPage ){
1909 platform_errno = PLATFORM_ERRNO_OOM;
1910 retval = Platform_EFAIL;
1911 goto FLASHWRITE_ERROR;
1912 }
1914 /* Get starting address */
1915 addr.uiColumnAddr= 0;
1916 if (platform_offset_to_blocknpage(deviceid, offset, &addr.uiBlockAddr, &addr.uiPageAddr) != Platform_EOK) {
1917 retval = Platform_EUNSUPPORTED;
1918 goto FLASHWRITE_ERROR;
1919 }
1921 /*
1922 * We can now write the file to flash. The basic algorithm is this:
1923 * Read the bad block table
1924 * While we have data to write do
1925 * skip block if bad
1926 * read the block (page level)
1927 * erase the block (block level)
1928 * write the block (page level)
1929 */
1931 /* set index to start of the data to write */
1932 bufindex = 0;
1934 /* Initialize the starting block we will be using */
1935 block = addr.uiBlockAddr;
1936 StartAddress.uiBlockAddr = addr.uiBlockAddr;
1937 StartAddress.uiPageAddr = addr.uiPageAddr;
1938 StartAddress.uiColumnAddr = 0;
1940 while (len) {
1942 /* Skip bad blocks */
1943 if (p_device->bblist) {
1944 if (p_device->bblist[block] == 0x00) {
1945 /* Block is bad, skip to next good one */
1946 IFPRINT(platform_write( "platform_device_write: Skipping bad block %d. \n", block));
1947 block++;
1948 while (p_device->bblist[block] == 0x00) {
1949 block++;
1950 }
1951 }
1952 }
1954 /* Make sure we didn't exceed number of blocks */
1955 if (block > p_device->block_count) {
1956 IFPRINT(platform_write( "Due to bad blocks, you have run out of room in the Flash for this image. \n"));
1957 platform_errno = PLATFORM_ERRNO_NOFREEBLOCKS;
1958 retval = Platform_EFAIL;
1959 goto FLASHWRITE_ERROR;
1960 }
1962 IFPRINT(platform_write( "platform_device_write: Writing block %d \n", block));
1964 /*
1965 * Read the block..
1966 * may need to preserve what we don't actually write out.
1967 */
1968 for (page=0, index = 0; page < p_device->page_count;
1969 page++, index +=p_device->page_size) {
1970 addr.uiBlockAddr = block;
1971 addr.uiPageAddr = page;
1972 addr.uiColumnAddr= 0;
1973 if (p_device->handle == PLATFORM_DEVID_MT29F2G16ABAFA) {
1974 #if (PLATFORM_NAND_WRITE_IN)
1976 if (readNandPage (&gDeviceNand, addr, (uint8_t *)(pBlock + index)) != SUCCESS) {
1977 retval = Platform_EFAIL;
1978 IFPRINT(platform_write( "platform_device_write: Error reading block %d page %d. \n", block, page));
1979 goto FLASHWRITE_ERROR;
1980 }
1981 #endif
1982 }
1983 else if (p_device->handle == PLATFORM_DEVID_NORN25Q128A13ESF40F) {
1984 #if (PLATFORM_NOR_WRITE_IN)
1985 (void) platform_blocknpage_to_offset(p_device->handle, &noraddress, addr.uiBlockAddr, addr.uiPageAddr);
1986 if (nor_read (&gDeviceNor, noraddress, p_device->page_size, (uint8_t *)(pBlock + index)) != SUCCESS) {
1987 retval = Platform_EFAIL;
1988 platform_write( "platform_device_write: Error reading block %d page %d. \n", block, page);
1989 goto FLASHWRITE_ERROR;
1990 }
1991 #endif
1992 }
1993 else {
1994 #if (PLATFORM_QSPI_FLASH_WRITE_IN)
1995 (void) platform_blocknpage_to_offset(p_device->handle, &qspiflashaddress, addr.uiBlockAddr, addr.uiPageAddr);
1996 if (qspiFlashRead (&gDeviceQspiFlash, qspiflashaddress, p_device->page_size, (uint8_t *)(pBlock + index), qspiReadMode) != SUCCESS) {
1997 retval = Platform_EFAIL;
1998 platform_write( "platform_device_write: Error reading block %d page %d. \n", block, page);
1999 goto FLASHWRITE_ERROR;
2000 }
2001 #endif
2002 }
2003 }
2005 /* erase the block */
2006 if (p_device->handle == PLATFORM_DEVID_MT29F2G16ABAFA) {
2007 #if (PLATFORM_NAND_WRITE_IN)
2008 if (nandFlashBlockErase (&gDeviceNand, block) != SUCCESS) {
2009 IFPRINT(platform_write( "platform_device_write: Could not erase block %d. \n", block));
2010 retval = Platform_EFAIL;
2011 goto FLASHWRITE_ERROR;
2012 }
2013 #endif
2014 }
2015 else if (p_device->handle == PLATFORM_DEVID_NORN25Q128A13ESF40F) {
2016 #if (PLATFORM_NOR_WRITE_IN)
2017 if (nor_erase (&gDeviceNor, block) != SUCCESS) {
2018 IFPRINT(platform_write( "platform_device_write: Could not erase block %d. \n", block));
2019 retval = Platform_EFAIL;
2020 goto FLASHWRITE_ERROR;
2021 }
2022 #endif
2023 }
2024 else {
2025 #if (PLATFORM_QSPI_FLASH_WRITE_IN)
2026 if (qspiFlashErase (&gDeviceQspiFlash, block) != SUCCESS) {
2027 IFPRINT(platform_write( "platform_device_write: Could not erase block %d. \n", block));
2028 retval = Platform_EFAIL;
2029 goto FLASHWRITE_ERROR;
2030 }
2031 #endif
2032 }
2034 /*
2035 * Write the block...
2036 * - Get one page of data and write out or
2037 * - if we run out of data re-write what we previously read.
2038 */
2039 for (page = 0, index = 0; page < p_device->page_count;
2040 page++, index +=p_device->page_size) {
2042 IFPRINT(platform_write( "platform_device_write: Writing to block %d page %d \n", block, page));
2044 if (block == StartAddress.uiBlockAddr && page < StartAddress.uiPageAddr) {
2045 /* if we are within the first block we are writing, then we may have a start
2046 * page other than page 0, so re-write what was there.
2047 */
2048 memcpy(pPage, (pBlock+bufindex), useable_page_size);
2049 }
2050 else
2051 if (len == 0) {
2052 /* we wrote all the data, so write back any pages we pre-read that are left */
2053 memcpy(pPage, (pBlock+bufindex), useable_page_size);
2054 }
2055 else
2056 if (len < useable_page_size) {
2057 /* we have less than a full page of data */
2058 memset(pPage, 0xFF, p_device->page_size);
2059 memcpy(pPage, (buf+bufindex), len);
2060 len = 0;
2061 }
2062 else {
2063 /* get a full page of data */
2064 memcpy(pPage, (buf+bufindex), useable_page_size);
2065 len -= useable_page_size;
2066 bufindex += useable_page_size;
2067 }
2068 /* write the page */
2069 addr.uiBlockAddr = block;
2070 addr.uiPageAddr = page;
2071 addr.uiColumnAddr= 0;
2072 if (p_device->handle == PLATFORM_DEVID_MT29F2G16ABAFA) {
2073 #if (PLATFORM_NAND_WRITE_IN)
2074 if (writeNandPage (&gDeviceNand, addr, pPage) != SUCCESS) {
2075 IFPRINT(platform_write( "platform_device_write: Error writing block %d page %d. \n", block, page));
2076 retval = Platform_EFAIL;
2077 goto FLASHWRITE_ERROR;
2078 }
2079 #endif
2080 }
2081 else if (p_device->handle == PLATFORM_DEVID_NORN25Q128A13ESF40F) {
2082 #if (PLATFORM_NOR_WRITE_IN)
2083 (void) platform_blocknpage_to_offset(p_device->handle, &noraddress, addr.uiBlockAddr, addr.uiPageAddr);
2084 if (nor_write(&gDeviceNor, noraddress, p_device->page_size, pPage) != SUCCESS) {
2085 IFPRINT(platform_write( "platform_device_write: Error writing block %d page %d. \n", block, page));
2086 retval = Platform_EFAIL;
2087 goto FLASHWRITE_ERROR;
2088 }
2089 #endif
2090 }
2091 else {
2092 #if (PLATFORM_QSPI_FLASH_WRITE_IN)
2093 (void) platform_blocknpage_to_offset(p_device->handle, &qspiflashaddress, addr.uiBlockAddr, addr.uiPageAddr);
2094 if (qspiFlashWrite(&gDeviceQspiFlash, qspiflashaddress, p_device->page_size, pPage, qspiWriteMode) != SUCCESS) {
2095 IFPRINT(platform_write( "platform_device_write: Error writing block %d page %d. \n", block, page));
2096 retval = Platform_EFAIL;
2097 goto FLASHWRITE_ERROR;
2098 }
2099 #endif
2100 }
2101 }
2103 /* increment to the next block */
2104 block++;
2105 }
2107 FLASHWRITE_ERROR:
2109 if (pBlock) {
2110 Osal_platformFree( pBlock, platform_roundup(block_size, PLATFORM_CACHE_LINE_SIZE) );
2111 }
2113 if (pPage) {
2114 Osal_platformFree( pPage, platform_roundup(p_device->page_size, PLATFORM_CACHE_LINE_SIZE));
2115 }
2117 return retval;
2118 }
2119 #endif
2121 #if (PLATFORM_I2C_EEPROM_IN) && (PLATFORM_I2C_EEPROM_WRITE_IN)
2122 uint8_t i2cportnumber=0;
2123 if (deviceid == PLATFORM_DEVID_EEPROM50) {
2124 if (i2cEepromWriteByteAddr(offset, 0x50, buf, len, I2C_RELEASE_BUS,i2cportnumber) != I2C_RET_OK) {
2125 IFPRINT(platform_write("platform_device_write: EEPROM write for address 0x%x failed\n", 0x50));
2126 platform_errno = PLATFORM_ERRNO_EEPROM;
2127 return ( (Platform_STATUS) Platform_EFAIL);
2128 }
2129 return Platform_EOK;
2130 }
2132 if (deviceid == PLATFORM_DEVID_EEPROM51) {
2133 if (i2cEepromWriteByteAddr(offset, 0x51, buf, len, I2C_RELEASE_BUS,i2cportnumber) != I2C_RET_OK) {
2134 IFPRINT(platform_write("platform_device_write: EEPROM write for address 0x%x failed\n", 0x51));
2135 platform_errno = PLATFORM_ERRNO_EEPROM;
2136 return ( (Platform_STATUS) Platform_EFAIL);
2137 }
2138 return Platform_EOK;
2139 }
2141 #endif
2143 #if (PLATFORM_MMCHS_IN)
2145 if (deviceid == PLATFORM_DEVID_EMMC){
2146 //TODO: Need to add support for writing data which is not multiple of block length
2147 if (mmchsBlockWrite (mmcCard, offset, (len/MMCHS_BLK_LEN), buf) != SUCCESS) {
2148 return ( (Platform_STATUS) Platform_EFAIL);
2149 }
2151 return Platform_EOK;
2152 }
2154 if (deviceid == PLATFORM_DEVID_SD) {
2155 //TODO: Need to add support for writing data which is not multiple of block length
2156 if (mmchsBlockWrite (sdCard, offset, (len/MMCHS_BLK_LEN), buf) != SUCCESS) {
2157 return ( (Platform_STATUS) Platform_EFAIL);
2158 }
2160 return Platform_EOK;
2161 }
2163 #endif
2165 return Platform_EUNSUPPORTED;
2167 }
2168 #endif
2170 /******************************************************************************
2171 * platform_device_erase_block
2172 ******************************************************************************/
2173 #if (PLATFORM_NAND_IN) || (PLATFORM_NOR_IN) || (PLATFORM_I2C_EEPROM_IN)
2174 Platform_STATUS platform_device_erase_block(PLATFORM_DEVHANDLE deviceid,
2175 uint32_t block_number) {
2177 IFPRINT(platform_write("platform_device_erase_block(handle=0x%x, blockt=%d) called \n",
2178 deviceid, block_number));
2180 #if (PLATFORM_NAND_IN) && (PLATFORM_NAND_WRITE_IN)
2181 if (deviceid == PLATFORM_DEVID_MT29F2G16ABAFA) {
2182 if (block_number >= gDeviceNand.block_count) {
2183 platform_errno = PLATFORM_ERRNO_INVALID_ARGUMENT;
2184 return Platform_EINVALID;
2185 }
2186 if (nandFlashBlockErase (&gDeviceNand, block_number) != SUCCESS) {
2187 return ( (Platform_STATUS) Platform_EFAIL);
2188 }
2189 return Platform_EOK;
2190 }
2191 #endif
2193 #if (PLATFORM_NOR_IN) && (PLATFORM_NOR_WRITE_IN)
2194 if (deviceid == PLATFORM_DEVID_NORN25Q128A13ESF40F) {
2195 if (block_number > gDeviceNor.block_count) {
2196 platform_errno = PLATFORM_ERRNO_INVALID_ARGUMENT;
2197 return Platform_EINVALID;
2198 }
2199 if (nor_erase (&gDeviceNor, block_number) != SUCCESS) {
2200 return ( (Platform_STATUS) Platform_EFAIL);
2201 }
2202 return Platform_EOK;
2203 }
2204 #endif
2206 #if (PLATFORM_QSPI_FLASH_IN) && (PLATFORM_QSPI_FLASH_WRITE_IN)
2207 if (deviceid == PLATFORM_DEVID_QSPIFLASH_S25FL512S) {
2208 if (block_number > gDeviceQspiFlash.block_count) {
2209 platform_errno = PLATFORM_ERRNO_INVALID_ARGUMENT;
2210 return Platform_EINVALID;
2211 }
2212 if (qspiFlashErase (&gDeviceQspiFlash, block_number) != SUCCESS) {
2213 return ( (Platform_STATUS) Platform_EFAIL);
2214 }
2215 return Platform_EOK;
2216 }
2217 #endif
2219 return Platform_EUNSUPPORTED;
2220 }
2221 #endif
2223 /******************************************************************************
2224 * platform_device_print_info
2225 ******************************************************************************/
2226 #if (PLATFORM_MMCHS_IN)
2227 Platform_STATUS platform_device_print_info(PLATFORM_DEVHANDLE deviceid) {
2229 IFPRINT(platform_write("platform_device_print_info(handle=0x%x) called \n",
2230 deviceid));
2232 #if (PLATFORM_MMCHS_IN)
2233 if (deviceid == PLATFORM_DEVID_EMMC) {
2234 mmchsPrintCardInfo(mmcCard);
2235 return Platform_EOK;
2236 }
2237 else if (deviceid == PLATFORM_DEVID_SD) {
2238 mmchsPrintCardInfo(sdCard);
2239 return Platform_EOK;
2240 }
2242 return Platform_EUNSUPPORTED;
2244 #endif
2245 }
2246 #endif
2248 /******************************************************************************
2249 * platform_device_set_speed
2250 ******************************************************************************/
2251 #if (PLATFORM_MMCHS_IN)
2252 Platform_STATUS platform_device_set_speed(PLATFORM_DEVHANDLE deviceid,
2253 uint32_t speed) {
2255 mmchsCardInfo *cardInfo = NULL;
2257 IFPRINT(platform_write("platform_device_set_speed(handle=0x%x, speed=%d) called \n",
2258 deviceid, speed));
2260 #if (PLATFORM_MMCHS_IN)
2261 if (deviceid == PLATFORM_DEVID_EMMC) {
2262 cardInfo = mmcCard;
2263 }
2264 else if (deviceid == PLATFORM_DEVID_SD) {
2265 cardInfo = sdCard;
2266 }
2268 if(cardInfo != NULL)
2269 {
2270 if (mmchsSetTranSpeed(cardInfo,speed) != SUCCESS) {
2271 return ( (Platform_STATUS) Platform_EFAIL);
2272 }
2274 return Platform_EOK;
2275 }
2277 return Platform_EUNSUPPORTED;
2279 #endif
2280 }
2281 #endif
2283 /******************************************************************************
2284 * platform_device_set_bus_width
2285 ******************************************************************************/
2286 #if (PLATFORM_MMCHS_IN)
2287 Platform_STATUS platform_device_set_bus_width(PLATFORM_DEVHANDLE deviceid,
2288 PLATFORM_MMCSD_BUS_WIDTH width) {
2290 mmchsCardInfo *cardInfo = NULL;
2292 IFPRINT(platform_write("platform_device_set_bus_width(handle=0x%x, Bus width=%d) called \n",
2293 deviceid, width));
2295 #if (PLATFORM_MMCHS_IN)
2296 if (deviceid == PLATFORM_DEVID_EMMC) {
2297 cardInfo = mmcCard;
2298 }
2299 else if (deviceid == PLATFORM_DEVID_SD) {
2300 cardInfo = sdCard;
2301 }
2303 if(cardInfo != NULL)
2304 {
2305 switch(width)
2306 {
2307 case PLATFORM_MMCSD_BUS_1BIT:
2308 mmchsSetBusWidth(cardInfo, SD_BUS_WIDTH_1BIT);
2309 break;
2311 case PLATFORM_MMCSD_BUS_4BIT:
2312 mmchsSetBusWidth(cardInfo, SD_BUS_WIDTH_4BIT);
2313 mmchsPrintCSD(cardInfo);
2314 break;
2316 case PLATFORM_MMCSD_BUS_8BIT:
2317 mmchsSetBusWidth(cardInfo, SD_BUS_WIDTH_8BIT);
2318 mmchsPrintECSD(cardInfo);
2319 break;
2320 }
2322 return Platform_EOK;
2323 }
2325 return Platform_EUNSUPPORTED;
2327 #endif
2328 }
2329 #endif
2331 /******************************************************************************
2332 * platform_device_set_params
2333 ******************************************************************************/
2334 #if (PLATFORM_QSPI_FLASH_IN)
2335 Platform_STATUS platform_device_set_params(PLATFORM_DEVHANDLE deviceid, void *params)
2336 {
2337 Platform_STATUS status;
2338 PLATFORM_DEVICE_info *p_info;
2340 if(deviceid == PLATFORM_DEVID_QSPIFLASH_S25FL512S)
2341 {
2342 qspiReadMode = ((PLATFORM_QSPI_Params *)params)->read_mode;
2343 qspiWriteMode = ((PLATFORM_QSPI_Params *)params)->write_mode;
2344 p_info = &gDeviceQspiFlash;
2345 if (qspiReadMode == PLATFORM_QSPI_IO_MODE_QUAD)
2346 {
2347 status = qspiFlashQuadModeCtrl(p_info, 1);
2348 return status;
2349 }
2350 else
2351 {
2352 status = qspiFlashQuadModeCtrl(p_info, 0);
2353 return status;
2354 }
2355 }
2357 return (Platform_EOK);
2358 }
2359 #endif
2361 #if PLATFORM_CACHE_IN
2362 uint32_t Convert_CoreLocal2GlobalAddr (uint32_t addr)
2363 {
2364 uint32_t coreNum;
2366 /* Get the core number. */
2367 #ifdef SIMULATOR_SUPPORT
2368 coreNum = CSL_chipReadDNUM();
2369 #else
2370 coreNum = platform_get_coreid();
2371 #endif
2372 /* Check if the address is a valid Local L2 address to convert */
2373 if ( (addr >= (uint32_t) 0x800000) &&
2374 (addr < (uint32_t) 0x900000) ) {
2375 /* Compute the global address. */
2376 return ((1 << 28) | (coreNum << 24) | (addr & 0x00ffffff));
2377 }
2378 else {
2379 return (addr);
2380 }
2381 }
2382 #endif