[processor-sdk/performance-audio-sr.git] / pdk_k2g_1_0_1_0_eng / packages / ti / board / diag / common / AM335x / diag_entry.S
1 @******************************************************************************
2 @
3 @ rtc_init.S - Init code routines
4 @
5 @******************************************************************************
6 @
7 @ Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
8 @
9 @
10 @ Redistribution and use in source and binary forms, with or without
11 @ modification, are permitted provided that the following conditions
12 @ are met:
13 @
14 @ Redistributions of source code must retain the above copyright
15 @ notice, this list of conditions and the following disclaimer.
16 @
17 @ Redistributions in binary form must reproduce the above copyright
18 @ notice, this list of conditions and the following disclaimer in the
19 @ documentation and/or other materials provided with the
20 @ distribution.
21 @
22 @ Neither the name of Texas Instruments Incorporated nor the names of
23 @ its contributors may be used to endorse or promote products derived
24 @ from this software without specific prior written permission.
25 @
26 @ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
27 @ "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
28 @ LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
29 @ A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
30 @ OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
31 @ SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
32 @ LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
33 @ DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
34 @ THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
35 @ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
36 @ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37 @
38 @******************************************************************************
40 @****************************** Global Symbols*********************************
41 .global Entry
42 .global _stack
43 .global _bss_start
44 .global _bss_end
45 .global start_boot
47 @************************ Internal Definitions ********************************
48 @
49 @ Define the stack sizes for different modes. The user/system mode will use
50 @ the rest of the total stack size
51 @
52 .set UND_STACK_SIZE, 0x8
53 .set ABT_STACK_SIZE, 0x8
54 .set FIQ_STACK_SIZE, 0x8
55 .set IRQ_STACK_SIZE, 0x1000
56 .set SVC_STACK_SIZE, 0x8
58 @
59 @ to set the mode bits in CPSR for different modes
60 @
61 .set MODE_USR, 0x10
62 .set MODE_FIQ, 0x11
63 .set MODE_IRQ, 0x12
64 .set MODE_SVC, 0x13
65 .set MODE_ABT, 0x17
66 .set MODE_UND, 0x1B
67 .set MODE_SYS, 0x1F
69 .equ I_F_BIT, 0xC0
71 @**************************** Code Seection ***********************************
72 .text
74 @
75 @ This code is assembled for ARM instructions
76 @
77 .code 32
79 @******************************************************************************
80 @
81 @******************************************************************************
82 @
83 @ The reset handler in StarterWare is named as 'Entry'.
84 @ The reset handler sets up the stack pointers for all the modes. The FIQ and
85 @ IRQ shall be disabled during this. Then clear the BSS sections and finally
86 @ switch to the function calling the main() function.
87 @
88 Entry:
89 @STMFD sp!, {lr} @ Store link reg
90 MOV r7, sp
91 MOV r8, lr
92 LDR r9, =0xfeedfeed
93 CMP r0, r9
94 BEQ Diag_jump
95 MOV r9, #0
97 Diag_jump:
99 @
100 @ Set up the Stack for Undefined mode
101 @
102 LDR r0, =_stack @ Read the stack address
103 MSR cpsr_c, #MODE_UND|I_F_BIT @ switch to undef mode
104 MOV sp,r0 @ write the stack pointer
105 SUB r0, r0, #UND_STACK_SIZE @ give stack space
106 @
107 @ Set up the Stack for abort mode
108 @
109 MSR cpsr_c, #MODE_ABT|I_F_BIT @ Change to abort mode
110 MOV sp, r0 @ write the stack pointer
111 SUB r0,r0, #ABT_STACK_SIZE @ give stack space
112 @
113 @ Set up the Stack for FIQ mode
114 @
115 MSR cpsr_c, #MODE_FIQ|I_F_BIT @ change to FIQ mode
116 MOV sp,r0 @ write the stack pointer
117 SUB r0,r0, #FIQ_STACK_SIZE @ give stack space
118 @
119 @ Set up the Stack for IRQ mode
120 @
121 MSR cpsr_c, #MODE_IRQ|I_F_BIT @ change to IRQ mode
122 MOV sp,r0 @ write the stack pointer
123 SUB r0,r0, #IRQ_STACK_SIZE @ give stack space
124 @
125 @ Set up the Stack for SVC mode
126 @
127 MSR cpsr_c, #MODE_SVC|I_F_BIT @ change to SVC mode
128 MOV sp,r0 @ write the stack pointer
129 SUB r0,r0, #SVC_STACK_SIZE @ give stack space
130 @
131 @ Set up the Stack for USer/System mode
132 @
133 MSR cpsr_c, #MODE_SYS|I_F_BIT @ change to system mode
134 MOV sp,r0 @ write the stack pointer
136 @ Invalidate and Enable Branch Prediction
137 MOV r0, #0
138 MCR p15, #0, r0, c7, c5, #6
139 ISB
140 MRC p15, #0, r0, c1, c0, #0
141 ORR r0, r0, #0x00000800
142 MCR p15, #0, r0, c1, c0, #0
144 @
145 @ Enable Neon/VFP Co-Processor
146 @
147 MRC p15, #0, r1, c1, c0, #2 @ r1 = Access Control Register
148 ORR r1, r1, #(0xf << 20) @ enable full access for p10,11
149 MCR p15, #0, r1, c1, c0, #2 @ Access Control Register = r1
150 MOV r1, #0
151 MCR p15, #0, r1, c7, c5, #4 @ flush prefetch buffer
152 MOV r0,#0x40000000
153 FMXR FPEXC, r0 @ Set Neon/VFP Enable bit
155 Diag_save_lr:
156 CMP r9, #0
157 BEQ Clear_Bss_Section
158 STMFD sp!, {r7, r8}
160 @
161 @ Clear the BSS section here
162 @
163 Clear_Bss_Section:
165 LDR r0, =_bss_start @ Start address of BSS
166 LDR r1, =(_bss_end - 0x04) @ End address of BSS
167 MOV r2, #0
168 Loop:
169 STR r2, [r0], #4 @ Clear one word in BSS
170 CMP r0, r1
171 BLE Loop @ Clear till BSS end
172 B Diag_return_main
174 @
175 @ Go to infinite loop.
176 @
177 loop0:
178 B loop0
180 Diag_return_main:
181 LDR r10, =main @ Get the address of main
182 MOV lr,pc @ Dummy return to main
183 BX r10 @ Branch to main
185 Diag_return:
186 MOV r9, r0
187 LDMFD sp!, {pc, sp}
189 @
190 @ End of the file
191 @
192 .end