[processor-sdk/performance-audio-sr.git] / pdk_k2g_1_0_1_0_eng / packages / ti / board / diag / gmac / src / gmac_test.h
1 /*
2 * \file cpsw_test.h
3 *
4 * \brief
5 *
6 */
8 /* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
9 * ALL RIGHTS RESERVED
10 */
12 /*****************************************************************************
13 ** MACRO DEFINITIONS
14 *****************************************************************************/
15 #define MDIO_FREQ_INPUT 125000000
16 #define MDIO_FREQ_OUTPUT 1000000
18 #define CPPI_RAM_SIZE 0x2000
19 #define BUFFER_BASE 0x88000000
20 #define BUFFER_SIZE 0x7ff
22 #define SOF_BIT (1u<<31)
23 #define EOF_BIT (1<<30)
24 #define SOF_AND_EOF_BIT (SOF_BIT|EOF_BIT)
25 #define OWNERSHIP_BIT (1<<29)
26 #define EOQ_BIT (1<<28)
27 #define PASSCRC_BIT (1<<26)
28 #define TOPORT_EN_BIT (1<<20)
29 #define SIZE_MASK 0x0000ffff
30 #define ERRORS_MASK 0x03fe0000
32 #define TX_NUM_DESC 32
33 #define RX_NUM_DESC 32
35 #define NUM_RX_SERVICE 128
36 #define NUM_TX_SERVICE 128
38 #define RX 0
39 #define TX 1
41 #define TEST_NUM_PACKETS TX_NUM_DESC
43 #define CPSW_MII_SEL_MODE 0x0
44 #define CPSW_RMII_SEL_MODE 0x1
45 #define CPSW_RGMII_SEL_MODE 0x2
46 #define CPSW_MDIO_SEL_MODE 0x0
47 #define CPSW_RMII1_REFCLK_SEL_MODE 0x0
49 //link setup speed options
50 #define SPEED_10H 0x0
51 #define SPEED_10F 0x1
52 #define SPEED_100H 0x2
53 #define SPEED_100F 0x3
54 #define SPEED_1000F 0x4
55 #define SPEED_LB 0x5 //loopback
58 //phy clock generator I2C addresses
59 #define PHY_CLK_GEN_0_I2C_ADDR 0x65 //PRU1ETH0, PRU1ETH1, ETH0GB
60 #define PHY_CLK_GEN_1_I2C_ADDR 0x65 //PRU2ETH0, PRU2ETH1, ETH1GB
62 /* Clock Synthesizer Registers*/
63 /*Generic Configuration Register*/
64 #define ID_REG 0x00
65 #define XCSEL 0x05
67 /*PLL1 Configuration Register*/
68 #define MUX_REG 0x14
69 #define PDIV2_REG 0x16
70 #define PDIV3_REG 0x17
72 //phy types
73 #define PHY_MICREL_KSZ9031RNX 0x0
74 #define PHY_ATHEROS_AR8031 0x1
75 #define PHY_TI_DP83848J 0x2
76 #define PHY_TI_TLK110 0x3
77 #define PHY_SMSC_LAN8710 0x4
79 typedef struct Desc
80 {
81 Uint32 NextDesc;
82 Uint32 BufPtr;
83 Uint32 Off_BufLen;
84 Uint32 Flags_PktLen;
86 // original queue to help keep track to return descriptor after rx/tx
87 Uint32 OrigQueue;
88 }Desc;
90 typedef struct
91 {
92 Uint16 UpperDstMac;
93 Uint32 LowerDstMac;
94 Uint16 UpperSrcMac;
95 Uint32 LowerSrcMac;
96 Uint16 Type;
97 } __attribute__ ((__packed__)) ETH_HEADER;
99 typedef struct
100 {
101 ETH_HEADER Eth;
102 Uint8 Data;
103 } __attribute__ ((__packed__)) ETH_PKT;
106 //****************************************************************************
107 // Cpsw Functions
108 //****************************************************************************
109 Uint32 LinkSetup(Uint32 port, Uint32 speed);
110 void CPSWAleWriteEntry(Uint32 entry, Uint32 w2, Uint32 w1, Uint32 w0);
111 void CPSWAleDumpTable(void);
112 void CPSWStatsDump(void);
113 void CPSWStatsClear(void);
114 void CpswInit(Uint32 base);
115 void CpgmacSlInit(Uint32 base);
116 void AleInit(Uint32 base);
117 void CpswCpdmaInit(Uint32 base);
118 void CpswWrInit(Uint32 base);
119 void DescInit(void);
120 void ServiceRx(void *arg); //unsigned int intrNum, unsigned int cpuId, unsigned int applnParam);
121 void ServiceTx(void *arg); //unsigned int intrNum, unsigned int cpuId, unsigned int applnParam);
122 void HostStats(void);
123 void TxPacket(Desc *TxDesc);
124 void CpswIntEnable(Uint32 dir);
125 int CpswIntDisable(Uint32 dir);
126 void DumpQueue(Uint32 channel);
127 void DebugStats(void);
128 void CPSWALELearnModeEnable(unsigned int baseAddr, unsigned int portNum);
129 void CPSWWrIntPacingEnable(unsigned int baseAddr, unsigned int pacFlag);
130 void CPSWWrIntTxPerMsSet(unsigned int baseAddr, unsigned int core, unsigned int txIntPerMs);
131 void CPSWWrIntRxPerMsSet(unsigned int baseAddr, unsigned int core, unsigned int rxIntPerMs);
132 void CPSWWrIntPacingDisable(unsigned int baseAddr, unsigned int pacFlag);
133 void mdioDump(void);
135 //****************************************************************************
136 // cycle counter Functions
137 //****************************************************************************
138 extern void CycleCountEnable(void);
139 extern unsigned int CycleCounterRegRead(void);