1 /********************************************************************
2 * Copyright (C) 2013-2014 Texas Instruments Incorporated.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 *
8 * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 *
11 * Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the
14 * distribution.
15 *
16 * Neither the name of Texas Instruments Incorporated nor the names of
17 * its contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 */
33 #ifndef _CSLR_BB2D_H_
34 #define _CSLR_BB2D_H_
36 #ifdef __cplusplus
37 extern "C"
38 {
39 #endif
40 #include <ti/csl/cslr.h>
41 #include <ti/csl/tistdtypes.h>
44 /**************************************************************************
45 * Register Overlay Structure for __ALL__
46 **************************************************************************/
47 typedef struct {
48 volatile Uint32 AQHICLOCKCONTROL;
49 volatile Uint32 AQHIIDLE;
50 volatile Uint32 AQAXICONFIG;
51 volatile Uint32 AQAXISTATUS;
52 volatile Uint32 AQINTRACKNOWLEDGE;
53 volatile Uint32 AQINTRENBL;
54 volatile Uint32 AQIDENT;
55 volatile Uint32 GCFEATURES;
56 volatile Uint32 GCCHIPID;
57 volatile Uint32 GCCHIPREV;
58 volatile Uint32 GCCHIPDATE;
59 volatile Uint32 GCCHIPTIME;
60 volatile Uint32 GCCHIPCUSTOMER;
61 volatile Uint32 GCMINORFEATURES0;
62 volatile Uint8 RSVD0[4];
63 volatile Uint32 GCRESETMEMCOUNTERS;
64 volatile Uint32 GCTOTALREADS;
65 volatile Uint32 GCTOTALWRITES;
66 volatile Uint32 GCCHIPSPECS;
67 volatile Uint32 GCTOTALWRITEBURSTS;
68 volatile Uint32 GCTOTALWRITEREQS;
69 volatile Uint32 GCTOTALWRITELASTS;
70 volatile Uint32 GCTOTALREADBURSTS;
71 volatile Uint32 GCTOTALREADREQS;
72 volatile Uint32 GCTOTALREADLASTS;
73 volatile Uint32 GCGPOUT0;
74 volatile Uint32 GCGPOUT1;
75 volatile Uint32 GCGPOUT2;
76 volatile Uint32 GCAXICONTROL;
77 volatile Uint32 GCMINORFEATURES1;
78 volatile Uint32 GCTOTALCYCLES;
79 volatile Uint32 GCTOTALIDLECYCLES;
80 volatile Uint32 GCCHIPSPECS2;
81 volatile Uint32 GCMINORFEATURES2;
82 volatile Uint8 RSVD1[120];
83 volatile Uint32 GCMODULEPOWERCONTROLS;
84 volatile Uint32 GCMODULEPOWERMODULECONTROL;
85 volatile Uint32 GCMODULEPOWERMODULESTATUS;
86 volatile Uint8 RSVD2[124];
87 volatile Uint32 GCREGMMUSTATUS;
88 volatile Uint32 GCREGMMUCONTROL;
89 volatile Uint32 GCREGMMUEXCEPTION0;
90 volatile Uint32 GCREGMMUEXCEPTION1;
91 volatile Uint32 GCREGMMUEXCEPTION2;
92 volatile Uint32 GCREGMMUEXCEPTION3;
93 volatile Uint8 RSVD3[628];
94 volatile Uint32 AQMEMORYDEBUG;
95 volatile Uint8 RSVD4[20];
96 volatile Uint32 AQREGISTERTIMINGCONTROL;
97 volatile Uint32 GCMEMORYRESERVED;
98 volatile Uint32 GCDISPLAYPRIORITY;
99 volatile Uint32 GCDBGCYCLECOUNTER;
100 volatile Uint32 GCOUTSTANDINGREADS0;
101 volatile Uint32 GCOUTSTANDINGREADS1;
102 volatile Uint32 GCOUTSTANDINGWRITES;
103 volatile Uint32 GCDEBUGSIGNALSRA;
104 volatile Uint32 GCDEBUGSIGNALSTX;
105 volatile Uint32 GCDEBUGSIGNALSFE;
106 volatile Uint32 GCDEBUGSIGNALSPE;
107 volatile Uint32 GCDEBUGSIGNALSDE;
108 volatile Uint32 GCDEBUGSIGNALSSH;
109 volatile Uint32 GCDEBUGSIGNALSPA;
110 volatile Uint32 GCDEBUGSIGNALSSE;
111 volatile Uint32 GCDEBUGSIGNALSMC;
112 volatile Uint32 GCDEBUGSIGNALSHI;
113 volatile Uint32 GCDEBUGCONTROL0;
114 volatile Uint32 GCDEBUGCONTROL1;
115 volatile Uint32 GCDEBUGCONTROL2;
116 volatile Uint32 GCDEBUGCONTROL3;
117 volatile Uint32 GCBUSCONTROL;
118 volatile Uint32 GCREGENDIANNESS0;
119 volatile Uint32 GCREGENDIANNESS1;
120 volatile Uint32 GCREGENDIANNESS2;
121 volatile Uint32 GCREGDRAWPRIMITIVESTARTTIMESTAMP;
122 volatile Uint32 GCREGDRAWPRIMITIVEENDTIMESTAMP;
123 volatile Uint8 RSVD5[192];
124 volatile Uint32 GCREGCONTROL0;
125 volatile Uint8 RSVD6[248];
126 volatile Uint32 AQCMDBUFFERADDR;
127 volatile Uint32 AQCMDBUFFERCTRL;
128 volatile Uint32 AQFESTATUS;
129 volatile Uint32 AQFEDEBUGSTATE;
130 volatile Uint32 AQFEDEBUGCURCMDADR;
131 volatile Uint32 AQFEDEBUGCMDLOWREG;
132 volatile Uint32 AQFEDEBUGCMDHIREG;
133 } CSL_Bb2dRegs;
136 /**************************************************************************
137 * Register Macros
138 **************************************************************************/
140 /* Description: Clock control register. */
141 #define CSL_BB2D_AQHICLOCKCONTROL (0x0U)
143 /* Description: Idle status register. */
144 #define CSL_BB2D_AQHIIDLE (0x4U)
146 /* Description: */
147 #define CSL_BB2D_AQAXICONFIG (0x8U)
149 /* Description: */
150 #define CSL_BB2D_AQAXISTATUS (0xCU)
152 /* Description: Interrupt acknowledge register. Each bit represents a
153 * corresponding event being triggered. Reading frmo this register clears the
154 * outstanding interrupt. */
155 #define CSL_BB2D_AQINTRACKNOWLEDGE (0x10U)
157 /* Description: Interrupt enable register. Each bit enables a corresponding
158 * event. */
159 #define CSL_BB2D_AQINTRENBL (0x14U)
161 /* Description: Identification register. This register has no set reset value.
162 * It varies with the implementation. */
163 #define CSL_BB2D_AQIDENT (0x18U)
165 /* Description: Shows which features are enabled in this chip. This register
166 * has no set reset value. It varies with the implementation. 0 => NONE 1 =>
167 * AVAILABLE */
168 #define CSL_BB2D_GCFEATURES (0x1CU)
170 /* Description: Shows the ID for the chip in BCD. This register has no set
171 * reset value. It varies with the implementation. */
172 #define CSL_BB2D_GCCHIPID (0x20U)
174 /* Description: Shows the revision for the chip in BCD. This register has no
175 * set reset value. It varies with the implementation. */
176 #define CSL_BB2D_GCCHIPREV (0x24U)
178 /* Description: Shows the release date for the IP. This register has no set
179 * reset value. It varies with the implementation. */
180 #define CSL_BB2D_GCCHIPDATE (0x28U)
182 /* Description: Shows the release time for the IP. This register has no set
183 * reset value. It varies with the implementation. */
184 #define CSL_BB2D_GCCHIPTIME (0x2CU)
186 /* Description: Shows the customer and group for the IP. This register has no
187 * set reset value. It varies with the implementation. */
188 #define CSL_BB2D_GCCHIPCUSTOMER (0x30U)
190 /* Description: Shows which minor features are enabled in this chip. This
191 * register has no set reset value. It varies with the implementation. 0 =>
192 * NONE 1 => AVAILABLE */
193 #define CSL_BB2D_GCMINORFEATURES0 (0x34U)
195 /* Description: Writing 1 will reset the counters and stop counting. Write 0
196 * to start counting again. This register is write only so it has no reset
197 * value. */
198 #define CSL_BB2D_GCRESETMEMCOUNTERS (0x3CU)
200 /* Description: Total reads in terms of 64bits. */
201 #define CSL_BB2D_GCTOTALREADS (0x40U)
203 /* Description: Total writes in terms of 64bits. */
204 #define CSL_BB2D_GCTOTALWRITES (0x44U)
206 /* Description: Specs for the chip. This register has no set reset value. It
207 * varies with the implementation. */
208 #define CSL_BB2D_GCCHIPSPECS (0x48U)
210 /* Description: Total write Data Count in terms of 64bits. This register has
211 * no reset value. */
212 #define CSL_BB2D_GCTOTALWRITEBURSTS (0x4CU)
214 /* Description: Total write Request Count. This register has no reset value. */
215 #define CSL_BB2D_GCTOTALWRITEREQS (0x50U)
217 /* Description: Total WLAST Count. This is used to match with
218 * GCTotalWriteReqs. This register has no reset value. */
219 #define CSL_BB2D_GCTOTALWRITELASTS (0x54U)
221 /* Description: Total Read Data Count in terms of 64bits. This register has no
222 * reset value. */
223 #define CSL_BB2D_GCTOTALREADBURSTS (0x58U)
225 /* Description: Total Read Request Count. This register has no reset value. */
226 #define CSL_BB2D_GCTOTALREADREQS (0x5CU)
228 /* Description: Total RLAST Count. This is used to match with GCTotalReadReqs.
229 * This register has no reset value. */
230 #define CSL_BB2D_GCTOTALREADLASTS (0x60U)
232 /* Description: General Purpose output register. R/W but not connected to
233 * anywhere */
234 #define CSL_BB2D_GCGPOUT0 (0x64U)
236 /* Description: General Purpose output register. R/W but not connected to
237 * anywhere */
238 #define CSL_BB2D_GCGPOUT1 (0x68U)
240 /* Description: General Purpose output register. R/W but not connected to
241 * anywhere */
242 #define CSL_BB2D_GCGPOUT2 (0x6CU)
244 /* Description: Special Handling on AXI Bus */
245 #define CSL_BB2D_GCAXICONTROL (0x70U)
247 /* Description: Shows which features are enabled in this chip. This register
248 * has no set reset value. It varies with the implementation. 0 => NONE 1 =>
249 * AVAILABLE */
250 #define CSL_BB2D_GCMINORFEATURES1 (0x74U)
252 /* Description: Total cycles. This register is a free running counter. It can
253 * be reset by writing 0 to it. */
254 #define CSL_BB2D_GCTOTALCYCLES (0x78U)
256 /* Description: Total cycles where the GPU is idle. It is reset when
257 * gcTotalCycles register is written to. It looks at all the blocks but FE
258 * when determining the IP is idle. */
259 #define CSL_BB2D_GCTOTALIDLECYCLES (0x7CU)
261 /* Description: Specs for the chip. This register has no set reset value. It
262 * varies with the implementation. */
263 #define CSL_BB2D_GCCHIPSPECS2 (0x80U)
265 /* Description: Shows which features are enabled in this chip. This register
266 * has no set reset value. It varies with the implementation. 0 => NONE 1 =>
267 * AVAILABLE */
268 #define CSL_BB2D_GCMINORFEATURES2 (0x84U)
270 /* Description: Control register for module level power controls. */
271 #define CSL_BB2D_GCMODULEPOWERCONTROLS (0x100U)
273 /* Description: Module level control registers. */
274 #define CSL_BB2D_GCMODULEPOWERMODULECONTROL (0x104U)
276 /* Description: Module level control status */
277 #define CSL_BB2D_GCMODULEPOWERMODULESTATUS (0x108U)
279 /* Description: Status register that holds which MMU generated an exception */
280 #define CSL_BB2D_GCREGMMUSTATUS (0x188U)
282 /* Description: Control register that enables the MMU (only time shot). */
283 #define CSL_BB2D_GCREGMMUCONTROL (0x18CU)
285 /* Description: Holds the original address that generated an exception */
286 #define CSL_BB2D_GCREGMMUEXCEPTION0 (0x190U)
288 /* Description: Holds the original address that generated an exception */
289 #define CSL_BB2D_GCREGMMUEXCEPTION1 (0x194U)
291 /* Description: Holds the original address that generated an exception */
292 #define CSL_BB2D_GCREGMMUEXCEPTION2 (0x198U)
294 /* Description: Holds the original address that generated an exception */
295 #define CSL_BB2D_GCREGMMUEXCEPTION3 (0x19CU)
297 /* Description: */
298 #define CSL_BB2D_AQMEMORYDEBUG (0x414U)
300 /* Description: */
301 #define CSL_BB2D_AQREGISTERTIMINGCONTROL (0x42CU)
303 /* Description: This is reserved for future expansion. */
304 #define CSL_BB2D_GCMEMORYRESERVED (0x430U)
306 /* Description: Controls the priority of the display controller requests. This
307 * works like a PWM. One register gives the period, and the other gives the ON
308 * time. When PWM is ON, display requests are accepted if both display and the
309 * other request is valid. If it is OFF, the other request will be accepted.
310 * If only one request is valid, it takes the bus regardless of the PWM bit. */
311 #define CSL_BB2D_GCDISPLAYPRIORITY (0x434U)
313 /* Description: Increments every cycle. */
314 #define CSL_BB2D_GCDBGCYCLECOUNTER (0x438U)
316 /* Description: Number of outstanding reads per client in multiples of 8B. */
317 #define CSL_BB2D_GCOUTSTANDINGREADS0 (0x43CU)
319 /* Description: Number of outstanding reads per client in multiples of 8B. */
320 #define CSL_BB2D_GCOUTSTANDINGREADS1 (0x440U)
322 /* Description: Number of outstanding writes per client. */
323 #define CSL_BB2D_GCOUTSTANDINGWRITES (0x444U)
325 /* Description: 32 bit debug signal from Ra. This register has no reset value. */
326 #define CSL_BB2D_GCDEBUGSIGNALSRA (0x448U)
328 /* Description: 32 bit debug signal from Tx. This register has no reset value. */
329 #define CSL_BB2D_GCDEBUGSIGNALSTX (0x44CU)
331 /* Description: 32 bit debug signal from Fe. This register has no reset value. */
332 #define CSL_BB2D_GCDEBUGSIGNALSFE (0x450U)
334 /* Description: 32 bit debug signal from Pe. This register has no reset value. */
335 #define CSL_BB2D_GCDEBUGSIGNALSPE (0x454U)
337 /* Description: 32 bit debug signal from De. This register has no reset value. */
338 #define CSL_BB2D_GCDEBUGSIGNALSDE (0x458U)
340 /* Description: 32 bit debug signal from Sh. This register has no reset value. */
341 #define CSL_BB2D_GCDEBUGSIGNALSSH (0x45CU)
343 /* Description: 32 bit debug signal from Pa. This register has no reset value. */
344 #define CSL_BB2D_GCDEBUGSIGNALSPA (0x460U)
346 /* Description: 32 bit debug signal from Se. This register has no reset value. */
347 #define CSL_BB2D_GCDEBUGSIGNALSSE (0x464U)
349 /* Description: 32 bit debug signal from Mc. This register has no reset value. */
350 #define CSL_BB2D_GCDEBUGSIGNALSMC (0x468U)
352 /* Description: 32 bit debug signal from Hi. This register has no reset value. */
353 #define CSL_BB2D_GCDEBUGSIGNALSHI (0x46CU)
355 /* Description: */
356 #define CSL_BB2D_GCDEBUGCONTROL0 (0x470U)
358 /* Description: */
359 #define CSL_BB2D_GCDEBUGCONTROL1 (0x474U)
361 /* Description: */
362 #define CSL_BB2D_GCDEBUGCONTROL2 (0x478U)
364 /* Description: */
365 #define CSL_BB2D_GCDEBUGCONTROL3 (0x47CU)
367 /* Description: Shows which features are enabled in this chip. This register
368 * has no set reset value. It varies with the implementation. 0 => NONE 1 =>
369 * AVAILABLE */
370 #define CSL_BB2D_GCBUSCONTROL (0x480U)
372 /* Description: */
373 #define CSL_BB2D_GCREGENDIANNESS0 (0x484U)
375 /* Description: */
376 #define CSL_BB2D_GCREGENDIANNESS1 (0x488U)
378 /* Description: */
379 #define CSL_BB2D_GCREGENDIANNESS2 (0x48CU)
381 /* Description: */
382 #define CSL_BB2D_GCREGDRAWPRIMITIVESTARTTIMESTAMP (0x490U)
384 /* Description: */
385 #define CSL_BB2D_GCREGDRAWPRIMITIVEENDTIMESTAMP (0x494U)
387 /* Description: Composition trigger. */
388 #define CSL_BB2D_GCREGCONTROL0 (0x558U)
390 /* Description: Base address for the command buffer. The address must be
391 * 64-bit aligned and it is always physical. To use addresses above
392 * 0x8000_0000, program AQMemoryFE with the appropriate offset. Also, this
393 * register cannot be read. To check the value of the current fetch address
394 * use AQFEDebugCurCmdAdr. Since this is a write only register is has no reset
395 * value. */
396 #define CSL_BB2D_AQCMDBUFFERADDR (0x654U)
398 /* Description: Since this is a write only register is has no reset value. */
399 #define CSL_BB2D_AQCMDBUFFERCTRL (0x658U)
401 /* Description: */
402 #define CSL_BB2D_AQFESTATUS (0x65CU)
404 /* Description: Reserved. */
405 #define CSL_BB2D_AQFEDEBUGSTATE (0x660U)
407 /* Description: This is the command decoder address. The address is always
408 * physical so the MSB should always be 0. It has no reset value. */
409 #define CSL_BB2D_AQFEDEBUGCURCMDADR (0x664U)
411 /* Description: Reserved. No reset value */
412 #define CSL_BB2D_AQFEDEBUGCMDLOWREG (0x668U)
414 /* Description: Reserved. No reset value */
415 #define CSL_BB2D_AQFEDEBUGCMDHIREG (0x66CU)
418 /**************************************************************************
419 * Field Definition Macros
420 **************************************************************************/
422 /* AQHICLOCKCONTROL */
424 #define CSL_BB2D_AQHICLOCKCONTROL_DISABLE_RAM_CLOCK_GATING_MASK (0x00000400U)
425 #define CSL_BB2D_AQHICLOCKCONTROL_DISABLE_RAM_CLOCK_GATING_SHIFT (10U)
426 #define CSL_BB2D_AQHICLOCKCONTROL_DISABLE_RAM_CLOCK_GATING_RESETVAL (0x00000000U)
427 #define CSL_BB2D_AQHICLOCKCONTROL_DISABLE_RAM_CLOCK_GATING_MAX (0x00000001U)
429 #define CSL_BB2D_AQHICLOCKCONTROL_IDLE2_D_MASK (0x00020000U)
430 #define CSL_BB2D_AQHICLOCKCONTROL_IDLE2_D_SHIFT (17U)
431 #define CSL_BB2D_AQHICLOCKCONTROL_IDLE2_D_RESETVAL (0x00000001U)
432 #define CSL_BB2D_AQHICLOCKCONTROL_IDLE2_D_MAX (0x00000001U)
434 #define CSL_BB2D_AQHICLOCKCONTROL_MULTI_PIPE_REG_SELECT_MASK (0x00F00000U)
435 #define CSL_BB2D_AQHICLOCKCONTROL_MULTI_PIPE_REG_SELECT_SHIFT (20U)
436 #define CSL_BB2D_AQHICLOCKCONTROL_MULTI_PIPE_REG_SELECT_RESETVAL (0x00000000U)
437 #define CSL_BB2D_AQHICLOCKCONTROL_MULTI_PIPE_REG_SELECT_MAX (0x0000000fU)
439 #define CSL_BB2D_AQHICLOCKCONTROL_MULTI_PIPE_USE_SINGLE_AXI_MASK (0x0F000000U)
440 #define CSL_BB2D_AQHICLOCKCONTROL_MULTI_PIPE_USE_SINGLE_AXI_SHIFT (24U)
441 #define CSL_BB2D_AQHICLOCKCONTROL_MULTI_PIPE_USE_SINGLE_AXI_RESETVAL (0x00000000U)
442 #define CSL_BB2D_AQHICLOCKCONTROL_MULTI_PIPE_USE_SINGLE_AXI_MAX (0x0000000fU)
444 #define CSL_BB2D_AQHICLOCKCONTROL_IDLE3_D_MASK (0x00010000U)
445 #define CSL_BB2D_AQHICLOCKCONTROL_IDLE3_D_SHIFT (16U)
446 #define CSL_BB2D_AQHICLOCKCONTROL_IDLE3_D_RESETVAL (0x00000001U)
447 #define CSL_BB2D_AQHICLOCKCONTROL_IDLE3_D_MAX (0x00000001U)
449 #define CSL_BB2D_AQHICLOCKCONTROL_ISOLATE_GPU_MASK (0x00080000U)
450 #define CSL_BB2D_AQHICLOCKCONTROL_ISOLATE_GPU_SHIFT (19U)
451 #define CSL_BB2D_AQHICLOCKCONTROL_ISOLATE_GPU_RESETVAL (0x00000000U)
452 #define CSL_BB2D_AQHICLOCKCONTROL_ISOLATE_GPU_MAX (0x00000001U)
454 #define CSL_BB2D_AQHICLOCKCONTROL_CLK3D_DIS_MASK (0x00000001U)
455 #define CSL_BB2D_AQHICLOCKCONTROL_CLK3D_DIS_SHIFT (0U)
456 #define CSL_BB2D_AQHICLOCKCONTROL_CLK3D_DIS_RESETVAL (0x00000000U)
457 #define CSL_BB2D_AQHICLOCKCONTROL_CLK3D_DIS_MAX (0x00000001U)
459 #define CSL_BB2D_AQHICLOCKCONTROL_CLK2D_DIS_MASK (0x00000002U)
460 #define CSL_BB2D_AQHICLOCKCONTROL_CLK2D_DIS_SHIFT (1U)
461 #define CSL_BB2D_AQHICLOCKCONTROL_CLK2D_DIS_RESETVAL (0x00000000U)
462 #define CSL_BB2D_AQHICLOCKCONTROL_CLK2D_DIS_MAX (0x00000001U)
464 #define CSL_BB2D_AQHICLOCKCONTROL_FSCALE_VAL_MASK (0x000001FCU)
465 #define CSL_BB2D_AQHICLOCKCONTROL_FSCALE_VAL_SHIFT (2U)
466 #define CSL_BB2D_AQHICLOCKCONTROL_FSCALE_VAL_RESETVAL (0x00000040U)
467 #define CSL_BB2D_AQHICLOCKCONTROL_FSCALE_VAL_MAX (0x0000007fU)
469 #define CSL_BB2D_AQHICLOCKCONTROL_IDLE_VG_MASK (0x00040000U)
470 #define CSL_BB2D_AQHICLOCKCONTROL_IDLE_VG_SHIFT (18U)
471 #define CSL_BB2D_AQHICLOCKCONTROL_IDLE_VG_RESETVAL (0x00000001U)
472 #define CSL_BB2D_AQHICLOCKCONTROL_IDLE_VG_MAX (0x00000001U)
474 #define CSL_BB2D_AQHICLOCKCONTROL_FSCALE_CMD_LOAD_MASK (0x00000200U)
475 #define CSL_BB2D_AQHICLOCKCONTROL_FSCALE_CMD_LOAD_SHIFT (9U)
476 #define CSL_BB2D_AQHICLOCKCONTROL_FSCALE_CMD_LOAD_RESETVAL (0x00000000U)
477 #define CSL_BB2D_AQHICLOCKCONTROL_FSCALE_CMD_LOAD_MAX (0x00000001U)
479 #define CSL_BB2D_AQHICLOCKCONTROL_DISABLE_DEBUG_REGISTERS_MASK (0x00000800U)
480 #define CSL_BB2D_AQHICLOCKCONTROL_DISABLE_DEBUG_REGISTERS_SHIFT (11U)
481 #define CSL_BB2D_AQHICLOCKCONTROL_DISABLE_DEBUG_REGISTERS_RESETVAL (0x00000000U)
482 #define CSL_BB2D_AQHICLOCKCONTROL_DISABLE_DEBUG_REGISTERS_MAX (0x00000001U)
484 #define CSL_BB2D_AQHICLOCKCONTROL_SOFT_RESET_MASK (0x00001000U)
485 #define CSL_BB2D_AQHICLOCKCONTROL_SOFT_RESET_SHIFT (12U)
486 #define CSL_BB2D_AQHICLOCKCONTROL_SOFT_RESET_RESETVAL (0x00000000U)
487 #define CSL_BB2D_AQHICLOCKCONTROL_SOFT_RESET_MAX (0x00000001U)
489 #define CSL_BB2D_AQHICLOCKCONTROL_RESETVAL (0x00070100U)
491 /* AQHIIDLE */
493 #define CSL_BB2D_AQHIIDLE_IDLE_FP_MASK (0x00000400U)
494 #define CSL_BB2D_AQHIIDLE_IDLE_FP_SHIFT (10U)
495 #define CSL_BB2D_AQHIIDLE_IDLE_FP_RESETVAL (0x00000001U)
496 #define CSL_BB2D_AQHIIDLE_IDLE_FP_MAX (0x00000001U)
498 #define CSL_BB2D_AQHIIDLE_IDLE_PA_MASK (0x00000010U)
499 #define CSL_BB2D_AQHIIDLE_IDLE_PA_SHIFT (4U)
500 #define CSL_BB2D_AQHIIDLE_IDLE_PA_RESETVAL (0x00000001U)
501 #define CSL_BB2D_AQHIIDLE_IDLE_PA_MAX (0x00000001U)
503 #define CSL_BB2D_AQHIIDLE_IDLE_PE_MASK (0x00000004U)
504 #define CSL_BB2D_AQHIIDLE_IDLE_PE_SHIFT (2U)
505 #define CSL_BB2D_AQHIIDLE_IDLE_PE_RESETVAL (0x00000001U)
506 #define CSL_BB2D_AQHIIDLE_IDLE_PE_MAX (0x00000001U)
508 #define CSL_BB2D_AQHIIDLE_UNUSED_MASK (0x7FFFF000U)
509 #define CSL_BB2D_AQHIIDLE_UNUSED_SHIFT (12U)
510 #define CSL_BB2D_AQHIIDLE_UNUSED_RESETVAL (0x0007ffffU)
511 #define CSL_BB2D_AQHIIDLE_UNUSED_MAX (0x0007ffffU)
513 #define CSL_BB2D_AQHIIDLE_IDLE_SE_MASK (0x00000020U)
514 #define CSL_BB2D_AQHIIDLE_IDLE_SE_SHIFT (5U)
515 #define CSL_BB2D_AQHIIDLE_IDLE_SE_RESETVAL (0x00000001U)
516 #define CSL_BB2D_AQHIIDLE_IDLE_SE_MAX (0x00000001U)
518 #define CSL_BB2D_AQHIIDLE_IDLE_IM_MASK (0x00000200U)
519 #define CSL_BB2D_AQHIIDLE_IDLE_IM_SHIFT (9U)
520 #define CSL_BB2D_AQHIIDLE_IDLE_IM_RESETVAL (0x00000001U)
521 #define CSL_BB2D_AQHIIDLE_IDLE_IM_MAX (0x00000001U)
523 #define CSL_BB2D_AQHIIDLE_AXI_LP_MASK (0x80000000U)
524 #define CSL_BB2D_AQHIIDLE_AXI_LP_SHIFT (31U)
525 #define CSL_BB2D_AQHIIDLE_AXI_LP_RESETVAL (0x00000000U)
526 #define CSL_BB2D_AQHIIDLE_AXI_LP_MAX (0x00000001U)
528 #define CSL_BB2D_AQHIIDLE_IDLE_TS_MASK (0x00000800U)
529 #define CSL_BB2D_AQHIIDLE_IDLE_TS_SHIFT (11U)
530 #define CSL_BB2D_AQHIIDLE_IDLE_TS_RESETVAL (0x00000001U)
531 #define CSL_BB2D_AQHIIDLE_IDLE_TS_MAX (0x00000001U)
533 #define CSL_BB2D_AQHIIDLE_IDLE_VG_MASK (0x00000100U)
534 #define CSL_BB2D_AQHIIDLE_IDLE_VG_SHIFT (8U)
535 #define CSL_BB2D_AQHIIDLE_IDLE_VG_RESETVAL (0x00000001U)
536 #define CSL_BB2D_AQHIIDLE_IDLE_VG_MAX (0x00000001U)
538 #define CSL_BB2D_AQHIIDLE_IDLE_RA_MASK (0x00000040U)
539 #define CSL_BB2D_AQHIIDLE_IDLE_RA_SHIFT (6U)
540 #define CSL_BB2D_AQHIIDLE_IDLE_RA_RESETVAL (0x00000001U)
541 #define CSL_BB2D_AQHIIDLE_IDLE_RA_MAX (0x00000001U)
543 #define CSL_BB2D_AQHIIDLE_IDLE_SH_MASK (0x00000008U)
544 #define CSL_BB2D_AQHIIDLE_IDLE_SH_SHIFT (3U)
545 #define CSL_BB2D_AQHIIDLE_IDLE_SH_RESETVAL (0x00000001U)
546 #define CSL_BB2D_AQHIIDLE_IDLE_SH_MAX (0x00000001U)
548 #define CSL_BB2D_AQHIIDLE_IDLE_TX_MASK (0x00000080U)
549 #define CSL_BB2D_AQHIIDLE_IDLE_TX_SHIFT (7U)
550 #define CSL_BB2D_AQHIIDLE_IDLE_TX_RESETVAL (0x00000001U)
551 #define CSL_BB2D_AQHIIDLE_IDLE_TX_MAX (0x00000001U)
553 #define CSL_BB2D_AQHIIDLE_IDLE_FE_MASK (0x00000001U)
554 #define CSL_BB2D_AQHIIDLE_IDLE_FE_SHIFT (0U)
555 #define CSL_BB2D_AQHIIDLE_IDLE_FE_RESETVAL (0x00000001U)
556 #define CSL_BB2D_AQHIIDLE_IDLE_FE_MAX (0x00000001U)
558 #define CSL_BB2D_AQHIIDLE_IDLE_DE_MASK (0x00000002U)
559 #define CSL_BB2D_AQHIIDLE_IDLE_DE_SHIFT (1U)
560 #define CSL_BB2D_AQHIIDLE_IDLE_DE_RESETVAL (0x00000001U)
561 #define CSL_BB2D_AQHIIDLE_IDLE_DE_MAX (0x00000001U)
563 #define CSL_BB2D_AQHIIDLE_RESETVAL (0x7fffffffU)
565 /* AQAXICONFIG */
567 #define CSL_BB2D_AQAXICONFIG_ARCACHE_MASK (0x0000F000U)
568 #define CSL_BB2D_AQAXICONFIG_ARCACHE_SHIFT (12U)
569 #define CSL_BB2D_AQAXICONFIG_ARCACHE_RESETVAL (0x00000000U)
570 #define CSL_BB2D_AQAXICONFIG_ARCACHE_MAX (0x0000000fU)
572 #define CSL_BB2D_AQAXICONFIG_AWCACHE_MASK (0x00000F00U)
573 #define CSL_BB2D_AQAXICONFIG_AWCACHE_SHIFT (8U)
574 #define CSL_BB2D_AQAXICONFIG_AWCACHE_RESETVAL (0x00000000U)
575 #define CSL_BB2D_AQAXICONFIG_AWCACHE_MAX (0x0000000fU)
577 #define CSL_BB2D_AQAXICONFIG_AWID_MASK (0x0000000FU)
578 #define CSL_BB2D_AQAXICONFIG_AWID_SHIFT (0U)
579 #define CSL_BB2D_AQAXICONFIG_AWID_RESETVAL (0x00000000U)
580 #define CSL_BB2D_AQAXICONFIG_AWID_MAX (0x0000000fU)
582 #define CSL_BB2D_AQAXICONFIG_ARID_MASK (0x000000F0U)
583 #define CSL_BB2D_AQAXICONFIG_ARID_SHIFT (4U)
584 #define CSL_BB2D_AQAXICONFIG_ARID_RESETVAL (0x00000000U)
585 #define CSL_BB2D_AQAXICONFIG_ARID_MAX (0x0000000fU)
587 #define CSL_BB2D_AQAXICONFIG_RESETVAL (0x00000000U)
589 /* AQAXISTATUS */
591 #define CSL_BB2D_AQAXISTATUS_WR_ERR_ID_MASK (0x0000000FU)
592 #define CSL_BB2D_AQAXISTATUS_WR_ERR_ID_SHIFT (0U)
593 #define CSL_BB2D_AQAXISTATUS_WR_ERR_ID_RESETVAL (0x00000000U)
594 #define CSL_BB2D_AQAXISTATUS_WR_ERR_ID_MAX (0x0000000fU)
596 #define CSL_BB2D_AQAXISTATUS_DET_WR_ERR_MASK (0x00000100U)
597 #define CSL_BB2D_AQAXISTATUS_DET_WR_ERR_SHIFT (8U)
598 #define CSL_BB2D_AQAXISTATUS_DET_WR_ERR_RESETVAL (0x00000000U)
599 #define CSL_BB2D_AQAXISTATUS_DET_WR_ERR_MAX (0x00000001U)
601 #define CSL_BB2D_AQAXISTATUS_DET_RD_ERR_MASK (0x00000200U)
602 #define CSL_BB2D_AQAXISTATUS_DET_RD_ERR_SHIFT (9U)
603 #define CSL_BB2D_AQAXISTATUS_DET_RD_ERR_RESETVAL (0x00000000U)
604 #define CSL_BB2D_AQAXISTATUS_DET_RD_ERR_MAX (0x00000001U)
606 #define CSL_BB2D_AQAXISTATUS_RD_ERR_ID_MASK (0x000000F0U)
607 #define CSL_BB2D_AQAXISTATUS_RD_ERR_ID_SHIFT (4U)
608 #define CSL_BB2D_AQAXISTATUS_RD_ERR_ID_RESETVAL (0x00000000U)
609 #define CSL_BB2D_AQAXISTATUS_RD_ERR_ID_MAX (0x0000000fU)
611 #define CSL_BB2D_AQAXISTATUS_RESETVAL (0x00000000U)
613 /* AQINTRACKNOWLEDGE */
615 #define CSL_BB2D_AQINTRACKNOWLEDGE_INTR_VEC_MASK (0xFFFFFFFFU)
616 #define CSL_BB2D_AQINTRACKNOWLEDGE_INTR_VEC_SHIFT (0U)
617 #define CSL_BB2D_AQINTRACKNOWLEDGE_INTR_VEC_RESETVAL (0x00000000U)
618 #define CSL_BB2D_AQINTRACKNOWLEDGE_INTR_VEC_MAX (0xffffffffU)
620 #define CSL_BB2D_AQINTRACKNOWLEDGE_RESETVAL (0x00000000U)
622 /* AQINTRENBL */
624 #define CSL_BB2D_AQINTRENBL_INTR_ENBL_VEC_MASK (0xFFFFFFFFU)
625 #define CSL_BB2D_AQINTRENBL_INTR_ENBL_VEC_SHIFT (0U)
626 #define CSL_BB2D_AQINTRENBL_INTR_ENBL_VEC_RESETVAL (0x00000000U)
627 #define CSL_BB2D_AQINTRENBL_INTR_ENBL_VEC_MAX (0xffffffffU)
629 #define CSL_BB2D_AQINTRENBL_RESETVAL (0x00000000U)
631 /* AQIDENT */
633 #define CSL_BB2D_AQIDENT_PRODUCT_MASK (0x00FF0000U)
634 #define CSL_BB2D_AQIDENT_PRODUCT_SHIFT (16U)
635 #define CSL_BB2D_AQIDENT_PRODUCT_RESETVAL (0x00000001U)
636 #define CSL_BB2D_AQIDENT_PRODUCT_MAX (0x000000ffU)
638 #define CSL_BB2D_AQIDENT_TECHNOLOGY_MASK (0x00000F00U)
639 #define CSL_BB2D_AQIDENT_TECHNOLOGY_SHIFT (8U)
640 #define CSL_BB2D_AQIDENT_TECHNOLOGY_RESETVAL (0x00000000U)
641 #define CSL_BB2D_AQIDENT_TECHNOLOGY_MAX (0x0000000fU)
643 #define CSL_BB2D_AQIDENT_REVISION_MASK (0x0000F000U)
644 #define CSL_BB2D_AQIDENT_REVISION_SHIFT (12U)
645 #define CSL_BB2D_AQIDENT_REVISION_RESETVAL (0x00000000U)
646 #define CSL_BB2D_AQIDENT_REVISION_MAX (0x0000000fU)
648 #define CSL_BB2D_AQIDENT_CUSTOMER_MASK (0x000000FFU)
649 #define CSL_BB2D_AQIDENT_CUSTOMER_SHIFT (0U)
650 #define CSL_BB2D_AQIDENT_CUSTOMER_RESETVAL (0x00000000U)
651 #define CSL_BB2D_AQIDENT_CUSTOMER_MAX (0x000000ffU)
653 #define CSL_BB2D_AQIDENT_FAMILY_MASK (0xFF000000U)
654 #define CSL_BB2D_AQIDENT_FAMILY_SHIFT (24U)
655 #define CSL_BB2D_AQIDENT_FAMILY_RESETVAL (0x00000014U)
656 #define CSL_BB2D_AQIDENT_FAMILY_MAX (0x000000ffU)
658 #define CSL_BB2D_AQIDENT_RESETVAL (0x14010000U)
660 /* GCFEATURES */
662 #define CSL_BB2D_GCFEATURES_ETC1_TEXTURE_COMPRESSION_MASK (0x00000400U)
663 #define CSL_BB2D_GCFEATURES_ETC1_TEXTURE_COMPRESSION_SHIFT (10U)
664 #define CSL_BB2D_GCFEATURES_ETC1_TEXTURE_COMPRESSION_RESETVAL (0x00000001U)
665 #define CSL_BB2D_GCFEATURES_ETC1_TEXTURE_COMPRESSION_MAX (0x00000001U)
667 #define CSL_BB2D_GCFEATURES_HIGH_DYNAMIC_RANGE_MASK (0x00001000U)
668 #define CSL_BB2D_GCFEATURES_HIGH_DYNAMIC_RANGE_SHIFT (12U)
669 #define CSL_BB2D_GCFEATURES_HIGH_DYNAMIC_RANGE_RESETVAL (0x00000001U)
670 #define CSL_BB2D_GCFEATURES_HIGH_DYNAMIC_RANGE_MAX (0x00000001U)
672 #define CSL_BB2D_GCFEATURES_SPECIAL_ANTI_ALIASING_MASK (0x00000002U)
673 #define CSL_BB2D_GCFEATURES_SPECIAL_ANTI_ALIASING_SHIFT (1U)
674 #define CSL_BB2D_GCFEATURES_SPECIAL_ANTI_ALIASING_RESETVAL (0x00000001U)
675 #define CSL_BB2D_GCFEATURES_SPECIAL_ANTI_ALIASING_MAX (0x00000001U)
677 #define CSL_BB2D_GCFEATURES_BUFFER_INTERLEAVING_MASK (0x00040000U)
678 #define CSL_BB2D_GCFEATURES_BUFFER_INTERLEAVING_SHIFT (18U)
679 #define CSL_BB2D_GCFEATURES_BUFFER_INTERLEAVING_RESETVAL (0x00000001U)
680 #define CSL_BB2D_GCFEATURES_BUFFER_INTERLEAVING_MAX (0x00000001U)
682 #define CSL_BB2D_GCFEATURES_NO_EZ_MASK (0x00010000U)
683 #define CSL_BB2D_GCFEATURES_NO_EZ_SHIFT (16U)
684 #define CSL_BB2D_GCFEATURES_NO_EZ_RESETVAL (0x00000000U)
685 #define CSL_BB2D_GCFEATURES_NO_EZ_MAX (0x00000001U)
687 #define CSL_BB2D_GCFEATURES_DEBUG_MODE_MASK (0x00000010U)
688 #define CSL_BB2D_GCFEATURES_DEBUG_MODE_SHIFT (4U)
689 #define CSL_BB2D_GCFEATURES_DEBUG_MODE_RESETVAL (0x00000000U)
690 #define CSL_BB2D_GCFEATURES_DEBUG_MODE_MAX (0x00000001U)
692 #define CSL_BB2D_GCFEATURES_HALF_TX_CACHE_MASK (0x00800000U)
693 #define CSL_BB2D_GCFEATURES_HALF_TX_CACHE_SHIFT (23U)
694 #define CSL_BB2D_GCFEATURES_HALF_TX_CACHE_RESETVAL (0x00000000U)
695 #define CSL_BB2D_GCFEATURES_HALF_TX_CACHE_MAX (0x00000001U)
697 #define CSL_BB2D_GCFEATURES_DC_MASK (0x00000100U)
698 #define CSL_BB2D_GCFEATURES_DC_SHIFT (8U)
699 #define CSL_BB2D_GCFEATURES_DC_RESETVAL (0x00000000U)
700 #define CSL_BB2D_GCFEATURES_DC_MAX (0x00000001U)
702 #define CSL_BB2D_GCFEATURES_BYTE_WRITE_3D_MASK (0x20000000U)
703 #define CSL_BB2D_GCFEATURES_BYTE_WRITE_3D_SHIFT (29U)
704 #define CSL_BB2D_GCFEATURES_BYTE_WRITE_3D_RESETVAL (0x00000001U)
705 #define CSL_BB2D_GCFEATURES_BYTE_WRITE_3D_MAX (0x00000001U)
707 #define CSL_BB2D_GCFEATURES_MSAA_MASK (0x00000080U)
708 #define CSL_BB2D_GCFEATURES_MSAA_SHIFT (7U)
709 #define CSL_BB2D_GCFEATURES_MSAA_RESETVAL (0x00000001U)
710 #define CSL_BB2D_GCFEATURES_MSAA_MAX (0x00000001U)
712 #define CSL_BB2D_GCFEATURES_NO422_TEXTURE_MASK (0x00020000U)
713 #define CSL_BB2D_GCFEATURES_NO422_TEXTURE_SHIFT (17U)
714 #define CSL_BB2D_GCFEATURES_NO422_TEXTURE_RESETVAL (0x00000000U)
715 #define CSL_BB2D_GCFEATURES_NO422_TEXTURE_MAX (0x00000001U)
717 #define CSL_BB2D_GCFEATURES_YUY2_RENDER_TARGET_MASK (0x01000000U)
718 #define CSL_BB2D_GCFEATURES_YUY2_RENDER_TARGET_SHIFT (24U)
719 #define CSL_BB2D_GCFEATURES_YUY2_RENDER_TARGET_RESETVAL (0x00000000U)
720 #define CSL_BB2D_GCFEATURES_YUY2_RENDER_TARGET_MAX (0x00000001U)
722 #define CSL_BB2D_GCFEATURES_FE20_MASK (0x10000000U)
723 #define CSL_BB2D_GCFEATURES_FE20_SHIFT (28U)
724 #define CSL_BB2D_GCFEATURES_FE20_RESETVAL (0x00000000U)
725 #define CSL_BB2D_GCFEATURES_FE20_MAX (0x00000001U)
727 #define CSL_BB2D_GCFEATURES_RS_YUV_TARGET_MASK (0x40000000U)
728 #define CSL_BB2D_GCFEATURES_RS_YUV_TARGET_SHIFT (30U)
729 #define CSL_BB2D_GCFEATURES_RS_YUV_TARGET_RESETVAL (0x00000001U)
730 #define CSL_BB2D_GCFEATURES_RS_YUV_TARGET_MAX (0x00000001U)
732 #define CSL_BB2D_GCFEATURES_DXT_TEXTURE_COMPRESSION_MASK (0x00000008U)
733 #define CSL_BB2D_GCFEATURES_DXT_TEXTURE_COMPRESSION_SHIFT (3U)
734 #define CSL_BB2D_GCFEATURES_DXT_TEXTURE_COMPRESSION_RESETVAL (0x00000001U)
735 #define CSL_BB2D_GCFEATURES_DXT_TEXTURE_COMPRESSION_MAX (0x00000001U)
737 #define CSL_BB2D_GCFEATURES_FAST_SCALER_MASK (0x00000800U)
738 #define CSL_BB2D_GCFEATURES_FAST_SCALER_SHIFT (11U)
739 #define CSL_BB2D_GCFEATURES_FAST_SCALER_RESETVAL (0x00000001U)
740 #define CSL_BB2D_GCFEATURES_FAST_SCALER_MAX (0x00000001U)
742 #define CSL_BB2D_GCFEATURES_MIN_AREA_MASK (0x00008000U)
743 #define CSL_BB2D_GCFEATURES_MIN_AREA_SHIFT (15U)
744 #define CSL_BB2D_GCFEATURES_MIN_AREA_RESETVAL (0x00000000U)
745 #define CSL_BB2D_GCFEATURES_MIN_AREA_MAX (0x00000001U)
747 #define CSL_BB2D_GCFEATURES_HALF_PE_CACHE_MASK (0x00400000U)
748 #define CSL_BB2D_GCFEATURES_HALF_PE_CACHE_SHIFT (22U)
749 #define CSL_BB2D_GCFEATURES_HALF_PE_CACHE_RESETVAL (0x00000000U)
750 #define CSL_BB2D_GCFEATURES_HALF_PE_CACHE_MAX (0x00000001U)
752 #define CSL_BB2D_GCFEATURES_PIPE_2D_MASK (0x00000200U)
753 #define CSL_BB2D_GCFEATURES_PIPE_2D_SHIFT (9U)
754 #define CSL_BB2D_GCFEATURES_PIPE_2D_RESETVAL (0x00000001U)
755 #define CSL_BB2D_GCFEATURES_PIPE_2D_MAX (0x00000001U)
757 #define CSL_BB2D_GCFEATURES_PIPE_VG_MASK (0x04000000U)
758 #define CSL_BB2D_GCFEATURES_PIPE_VG_SHIFT (26U)
759 #define CSL_BB2D_GCFEATURES_PIPE_VG_RESETVAL (0x00000000U)
760 #define CSL_BB2D_GCFEATURES_PIPE_VG_MAX (0x00000001U)
762 #define CSL_BB2D_GCFEATURES_FAST_CLEAR_MASK (0x00000001U)
763 #define CSL_BB2D_GCFEATURES_FAST_CLEAR_SHIFT (0U)
764 #define CSL_BB2D_GCFEATURES_FAST_CLEAR_RESETVAL (0x00000000U)
765 #define CSL_BB2D_GCFEATURES_FAST_CLEAR_MAX (0x00000001U)
767 #define CSL_BB2D_GCFEATURES_FE20_BIT_INDEX_MASK (0x80000000U)
768 #define CSL_BB2D_GCFEATURES_FE20_BIT_INDEX_SHIFT (31U)
769 #define CSL_BB2D_GCFEATURES_FE20_BIT_INDEX_RESETVAL (0x00000001U)
770 #define CSL_BB2D_GCFEATURES_FE20_BIT_INDEX_MAX (0x00000001U)
772 #define CSL_BB2D_GCFEATURES_YUY2_AVERAGING_MASK (0x00200000U)
773 #define CSL_BB2D_GCFEATURES_YUY2_AVERAGING_SHIFT (21U)
774 #define CSL_BB2D_GCFEATURES_YUY2_AVERAGING_RESETVAL (0x00000001U)
775 #define CSL_BB2D_GCFEATURES_YUY2_AVERAGING_MAX (0x00000001U)
777 #define CSL_BB2D_GCFEATURES_YUV420_FILTER_MASK (0x00000040U)
778 #define CSL_BB2D_GCFEATURES_YUV420_FILTER_SHIFT (6U)
779 #define CSL_BB2D_GCFEATURES_YUV420_FILTER_RESETVAL (0x00000001U)
780 #define CSL_BB2D_GCFEATURES_YUV420_FILTER_MAX (0x00000001U)
782 #define CSL_BB2D_GCFEATURES_NO_SCALER_MASK (0x00100000U)
783 #define CSL_BB2D_GCFEATURES_NO_SCALER_SHIFT (20U)
784 #define CSL_BB2D_GCFEATURES_NO_SCALER_RESETVAL (0x00000000U)
785 #define CSL_BB2D_GCFEATURES_NO_SCALER_MAX (0x00000001U)
787 #define CSL_BB2D_GCFEATURES_MODULE_CG_MASK (0x00004000U)
788 #define CSL_BB2D_GCFEATURES_MODULE_CG_SHIFT (14U)
789 #define CSL_BB2D_GCFEATURES_MODULE_CG_RESETVAL (0x00000001U)
790 #define CSL_BB2D_GCFEATURES_MODULE_CG_MAX (0x00000001U)
792 #define CSL_BB2D_GCFEATURES_MEM32_BIT_SUPPORT_MASK (0x02000000U)
793 #define CSL_BB2D_GCFEATURES_MEM32_BIT_SUPPORT_SHIFT (25U)
794 #define CSL_BB2D_GCFEATURES_MEM32_BIT_SUPPORT_RESETVAL (0x00000000U)
795 #define CSL_BB2D_GCFEATURES_MEM32_BIT_SUPPORT_MAX (0x00000001U)
797 #define CSL_BB2D_GCFEATURES_ZCOMPRESSION_MASK (0x00000020U)
798 #define CSL_BB2D_GCFEATURES_ZCOMPRESSION_SHIFT (5U)
799 #define CSL_BB2D_GCFEATURES_ZCOMPRESSION_RESETVAL (0x00000000U)
800 #define CSL_BB2D_GCFEATURES_ZCOMPRESSION_MAX (0x00000001U)
802 #define CSL_BB2D_GCFEATURES_YUV420_TILER_MASK (0x00002000U)
803 #define CSL_BB2D_GCFEATURES_YUV420_TILER_SHIFT (13U)
804 #define CSL_BB2D_GCFEATURES_YUV420_TILER_RESETVAL (0x00000001U)
805 #define CSL_BB2D_GCFEATURES_YUV420_TILER_MAX (0x00000001U)
807 #define CSL_BB2D_GCFEATURES_BYTE_WRITE_2D_MASK (0x00080000U)
808 #define CSL_BB2D_GCFEATURES_BYTE_WRITE_2D_SHIFT (19U)
809 #define CSL_BB2D_GCFEATURES_BYTE_WRITE_2D_RESETVAL (0x00000001U)
810 #define CSL_BB2D_GCFEATURES_BYTE_WRITE_2D_MAX (0x00000001U)
812 #define CSL_BB2D_GCFEATURES_PIPE_3D_MASK (0x00000004U)
813 #define CSL_BB2D_GCFEATURES_PIPE_3D_SHIFT (2U)
814 #define CSL_BB2D_GCFEATURES_PIPE_3D_RESETVAL (0x00000000U)
815 #define CSL_BB2D_GCFEATURES_PIPE_3D_MAX (0x00000001U)
817 #define CSL_BB2D_GCFEATURES_VGTS_MASK (0x08000000U)
818 #define CSL_BB2D_GCFEATURES_VGTS_SHIFT (27U)
819 #define CSL_BB2D_GCFEATURES_VGTS_RESETVAL (0x00000000U)
820 #define CSL_BB2D_GCFEATURES_VGTS_MAX (0x00000001U)
822 #define CSL_BB2D_GCFEATURES_RESETVAL (0xe02c7ecaU)
824 /* GCCHIPID */
826 #define CSL_BB2D_GCCHIPID_ID_MASK (0xFFFFFFFFU)
827 #define CSL_BB2D_GCCHIPID_ID_SHIFT (0U)
828 #define CSL_BB2D_GCCHIPID_ID_RESETVAL (0x00000320U)
829 #define CSL_BB2D_GCCHIPID_ID_MAX (0xffffffffU)
831 #define CSL_BB2D_GCCHIPID_RESETVAL (0x00000320U)
833 /* GCCHIPREV */
835 #define CSL_BB2D_GCCHIPREV_REV_MASK (0xFFFFFFFFU)
836 #define CSL_BB2D_GCCHIPREV_REV_SHIFT (0U)
837 #define CSL_BB2D_GCCHIPREV_REV_RESETVAL (0x00005301U)
838 #define CSL_BB2D_GCCHIPREV_REV_MAX (0xffffffffU)
840 #define CSL_BB2D_GCCHIPREV_RESETVAL (0x00005301U)
842 /* GCCHIPDATE */
844 #define CSL_BB2D_GCCHIPDATE_DATE_MASK (0xFFFFFFFFU)
845 #define CSL_BB2D_GCCHIPDATE_DATE_SHIFT (0U)
846 #define CSL_BB2D_GCCHIPDATE_DATE_RESETVAL (0x20111103U)
847 #define CSL_BB2D_GCCHIPDATE_DATE_MAX (0xffffffffU)
849 #define CSL_BB2D_GCCHIPDATE_RESETVAL (0x20111103U)
851 /* GCCHIPTIME */
853 #define CSL_BB2D_GCCHIPTIME_TIME_MASK (0xFFFFFFFFU)
854 #define CSL_BB2D_GCCHIPTIME_TIME_SHIFT (0U)
855 #define CSL_BB2D_GCCHIPTIME_TIME_RESETVAL (0x00140300U)
856 #define CSL_BB2D_GCCHIPTIME_TIME_MAX (0xffffffffU)
858 #define CSL_BB2D_GCCHIPTIME_RESETVAL (0x00140300U)
860 /* GCCHIPCUSTOMER */
862 #define CSL_BB2D_GCCHIPCUSTOMER_GROUP_MASK (0x0000FFFFU)
863 #define CSL_BB2D_GCCHIPCUSTOMER_GROUP_SHIFT (0U)
864 #define CSL_BB2D_GCCHIPCUSTOMER_GROUP_RESETVAL (0x00000000U)
865 #define CSL_BB2D_GCCHIPCUSTOMER_GROUP_MAX (0x0000ffffU)
867 #define CSL_BB2D_GCCHIPCUSTOMER_COMPANY_MASK (0xFFFF0000U)
868 #define CSL_BB2D_GCCHIPCUSTOMER_COMPANY_SHIFT (16U)
869 #define CSL_BB2D_GCCHIPCUSTOMER_COMPANY_RESETVAL (0x00000000U)
870 #define CSL_BB2D_GCCHIPCUSTOMER_COMPANY_MAX (0x0000ffffU)
872 #define CSL_BB2D_GCCHIPCUSTOMER_RESETVAL (0x00000000U)
874 /* GCMINORFEATURES0 */
876 #define CSL_BB2D_GCMINORFEATURES0_EXTRA_SHADER_INSTRUCTIONS1_MASK (0x00100000U)
877 #define CSL_BB2D_GCMINORFEATURES0_EXTRA_SHADER_INSTRUCTIONS1_SHIFT (20U)
878 #define CSL_BB2D_GCMINORFEATURES0_EXTRA_SHADER_INSTRUCTIONS1_RESETVAL (0x00000001U)
879 #define CSL_BB2D_GCMINORFEATURES0_EXTRA_SHADER_INSTRUCTIONS1_MAX (0x00000001U)
881 #define CSL_BB2D_GCMINORFEATURES0_VG_FILTER_MASK (0x00020000U)
882 #define CSL_BB2D_GCMINORFEATURES0_VG_FILTER_SHIFT (17U)
883 #define CSL_BB2D_GCMINORFEATURES0_VG_FILTER_RESETVAL (0x00000000U)
884 #define CSL_BB2D_GCMINORFEATURES0_VG_FILTER_MAX (0x00000001U)
886 #define CSL_BB2D_GCMINORFEATURES0_SHADER_MSAA_SIDEBAND_MASK (0x00800000U)
887 #define CSL_BB2D_GCMINORFEATURES0_SHADER_MSAA_SIDEBAND_SHIFT (23U)
888 #define CSL_BB2D_GCMINORFEATURES0_SHADER_MSAA_SIDEBAND_RESETVAL (0x00000000U)
889 #define CSL_BB2D_GCMINORFEATURES0_SHADER_MSAA_SIDEBAND_MAX (0x00000001U)
891 #define CSL_BB2D_GCMINORFEATURES0_EXTRA_SHADER_INSTRUCTIONS0_MASK (0x00010000U)
892 #define CSL_BB2D_GCMINORFEATURES0_EXTRA_SHADER_INSTRUCTIONS0_SHIFT (16U)
893 #define CSL_BB2D_GCMINORFEATURES0_EXTRA_SHADER_INSTRUCTIONS0_RESETVAL (0x00000001U)
894 #define CSL_BB2D_GCMINORFEATURES0_EXTRA_SHADER_INSTRUCTIONS0_MAX (0x00000001U)
896 #define CSL_BB2D_GCMINORFEATURES0_MC_20_MASK (0x00400000U)
897 #define CSL_BB2D_GCMINORFEATURES0_MC_20_SHIFT (22U)
898 #define CSL_BB2D_GCMINORFEATURES0_MC_20_RESETVAL (0x00000000U)
899 #define CSL_BB2D_GCMINORFEATURES0_MC_20_MAX (0x00000001U)
901 #define CSL_BB2D_GCMINORFEATURES0_COMPRESSION_FIFO_FIXED_MASK (0x00008000U)
902 #define CSL_BB2D_GCMINORFEATURES0_COMPRESSION_FIFO_FIXED_SHIFT (15U)
903 #define CSL_BB2D_GCMINORFEATURES0_COMPRESSION_FIFO_FIXED_RESETVAL (0x00000001U)
904 #define CSL_BB2D_GCMINORFEATURES0_COMPRESSION_FIFO_FIXED_MAX (0x00000001U)
906 #define CSL_BB2D_GCMINORFEATURES0_VG_20_MASK (0x00002000U)
907 #define CSL_BB2D_GCMINORFEATURES0_VG_20_SHIFT (13U)
908 #define CSL_BB2D_GCMINORFEATURES0_VG_20_RESETVAL (0x00000000U)
909 #define CSL_BB2D_GCMINORFEATURES0_VG_20_MAX (0x00000001U)
911 #define CSL_BB2D_GCMINORFEATURES0_RENDER_8K_MASK (0x00000200U)
912 #define CSL_BB2D_GCMINORFEATURES0_RENDER_8K_SHIFT (9U)
913 #define CSL_BB2D_GCMINORFEATURES0_RENDER_8K_RESETVAL (0x00000001U)
914 #define CSL_BB2D_GCMINORFEATURES0_RENDER_8K_MAX (0x00000001U)
916 #define CSL_BB2D_GCMINORFEATURES0_CORRECT_STENCIL_MASK (0x40000000U)
917 #define CSL_BB2D_GCMINORFEATURES0_CORRECT_STENCIL_SHIFT (30U)
918 #define CSL_BB2D_GCMINORFEATURES0_CORRECT_STENCIL_RESETVAL (0x00000001U)
919 #define CSL_BB2D_GCMINORFEATURES0_CORRECT_STENCIL_MAX (0x00000001U)
921 #define CSL_BB2D_GCMINORFEATURES0_TS_EXTENDED_COMMANDS_MASK (0x00004000U)
922 #define CSL_BB2D_GCMINORFEATURES0_TS_EXTENDED_COMMANDS_SHIFT (14U)
923 #define CSL_BB2D_GCMINORFEATURES0_TS_EXTENDED_COMMANDS_RESETVAL (0x00000000U)
924 #define CSL_BB2D_GCMINORFEATURES0_TS_EXTENDED_COMMANDS_MAX (0x00000001U)
926 #define CSL_BB2D_GCMINORFEATURES0_DEFAULT_REG0_MASK (0x00200000U)
927 #define CSL_BB2D_GCMINORFEATURES0_DEFAULT_REG0_SHIFT (21U)
928 #define CSL_BB2D_GCMINORFEATURES0_DEFAULT_REG0_RESETVAL (0x00000001U)
929 #define CSL_BB2D_GCMINORFEATURES0_DEFAULT_REG0_MAX (0x00000001U)
931 #define CSL_BB2D_GCMINORFEATURES0_HIERARCHICAL_Z_MASK (0x08000000U)
932 #define CSL_BB2D_GCMINORFEATURES0_HIERARCHICAL_Z_SHIFT (27U)
933 #define CSL_BB2D_GCMINORFEATURES0_HIERARCHICAL_Z_RESETVAL (0x00000001U)
934 #define CSL_BB2D_GCMINORFEATURES0_HIERARCHICAL_Z_MAX (0x00000001U)
936 #define CSL_BB2D_GCMINORFEATURES0_DUAL_RETURN_BUS_MASK (0x00000002U)
937 #define CSL_BB2D_GCMINORFEATURES0_DUAL_RETURN_BUS_SHIFT (1U)
938 #define CSL_BB2D_GCMINORFEATURES0_DUAL_RETURN_BUS_RESETVAL (0x00000001U)
939 #define CSL_BB2D_GCMINORFEATURES0_DUAL_RETURN_BUS_MAX (0x00000001U)
941 #define CSL_BB2D_GCMINORFEATURES0_PE20_2D_MASK (0x00000080U)
942 #define CSL_BB2D_GCMINORFEATURES0_PE20_2D_SHIFT (7U)
943 #define CSL_BB2D_GCMINORFEATURES0_PE20_2D_RESETVAL (0x00000001U)
944 #define CSL_BB2D_GCMINORFEATURES0_PE20_2D_MAX (0x00000001U)
946 #define CSL_BB2D_GCMINORFEATURES0_ENHANCE_VR_MASK (0x80000000U)
947 #define CSL_BB2D_GCMINORFEATURES0_ENHANCE_VR_SHIFT (31U)
948 #define CSL_BB2D_GCMINORFEATURES0_ENHANCE_VR_RESETVAL (0x00000001U)
949 #define CSL_BB2D_GCMINORFEATURES0_ENHANCE_VR_MAX (0x00000001U)
951 #define CSL_BB2D_GCMINORFEATURES0_TEXTURE8_K_MASK (0x00000008U)
952 #define CSL_BB2D_GCMINORFEATURES0_TEXTURE8_K_SHIFT (3U)
953 #define CSL_BB2D_GCMINORFEATURES0_TEXTURE8_K_RESETVAL (0x00000001U)
954 #define CSL_BB2D_GCMINORFEATURES0_TEXTURE8_K_MAX (0x00000001U)
956 #define CSL_BB2D_GCMINORFEATURES0_SHADER_GETS_W_MASK (0x00080000U)
957 #define CSL_BB2D_GCMINORFEATURES0_SHADER_GETS_W_SHIFT (19U)
958 #define CSL_BB2D_GCMINORFEATURES0_SHADER_GETS_W_RESETVAL (0x00000001U)
959 #define CSL_BB2D_GCMINORFEATURES0_SHADER_GETS_W_MAX (0x00000001U)
961 #define CSL_BB2D_GCMINORFEATURES0_TILE_STATUS_2BITS_MASK (0x00000400U)
962 #define CSL_BB2D_GCMINORFEATURES0_TILE_STATUS_2BITS_SHIFT (10U)
963 #define CSL_BB2D_GCMINORFEATURES0_TILE_STATUS_2BITS_RESETVAL (0x00000001U)
964 #define CSL_BB2D_GCMINORFEATURES0_TILE_STATUS_2BITS_MAX (0x00000001U)
966 #define CSL_BB2D_GCMINORFEATURES0_FLIP_Y_MASK (0x00000001U)
967 #define CSL_BB2D_GCMINORFEATURES0_FLIP_Y_SHIFT (0U)
968 #define CSL_BB2D_GCMINORFEATURES0_FLIP_Y_RESETVAL (0x00000001U)
969 #define CSL_BB2D_GCMINORFEATURES0_FLIP_Y_MAX (0x00000001U)
971 #define CSL_BB2D_GCMINORFEATURES0_VAA_MASK (0x02000000U)
972 #define CSL_BB2D_GCMINORFEATURES0_VAA_SHIFT (25U)
973 #define CSL_BB2D_GCMINORFEATURES0_VAA_RESETVAL (0x00000000U)
974 #define CSL_BB2D_GCMINORFEATURES0_VAA_MAX (0x00000001U)
976 #define CSL_BB2D_GCMINORFEATURES0_SUPER_TILED_32X32_MASK (0x00001000U)
977 #define CSL_BB2D_GCMINORFEATURES0_SUPER_TILED_32X32_SHIFT (12U)
978 #define CSL_BB2D_GCMINORFEATURES0_SUPER_TILED_32X32_RESETVAL (0x00000001U)
979 #define CSL_BB2D_GCMINORFEATURES0_SUPER_TILED_32X32_MAX (0x00000001U)
981 #define CSL_BB2D_GCMINORFEATURES0_BYPASS_IN_MSAA_MASK (0x04000000U)
982 #define CSL_BB2D_GCMINORFEATURES0_BYPASS_IN_MSAA_SHIFT (26U)
983 #define CSL_BB2D_GCMINORFEATURES0_BYPASS_IN_MSAA_RESETVAL (0x00000000U)
984 #define CSL_BB2D_GCMINORFEATURES0_BYPASS_IN_MSAA_MAX (0x00000001U)
986 #define CSL_BB2D_GCMINORFEATURES0_VG_21_MASK (0x00040000U)
987 #define CSL_BB2D_GCMINORFEATURES0_VG_21_SHIFT (18U)
988 #define CSL_BB2D_GCMINORFEATURES0_VG_21_RESETVAL (0x00000000U)
989 #define CSL_BB2D_GCMINORFEATURES0_VG_21_MAX (0x00000001U)
991 #define CSL_BB2D_GCMINORFEATURES0_CORRECT_TEXTURE_CONVERTER_MASK (0x00000010U)
992 #define CSL_BB2D_GCMINORFEATURES0_CORRECT_TEXTURE_CONVERTER_SHIFT (4U)
993 #define CSL_BB2D_GCMINORFEATURES0_CORRECT_TEXTURE_CONVERTER_RESETVAL (0x00000001U)
994 #define CSL_BB2D_GCMINORFEATURES0_CORRECT_TEXTURE_CONVERTER_MAX (0x00000001U)
996 #define CSL_BB2D_GCMINORFEATURES0_FAST_CLEAR_FLUSH_MASK (0x00000040U)
997 #define CSL_BB2D_GCMINORFEATURES0_FAST_CLEAR_FLUSH_SHIFT (6U)
998 #define CSL_BB2D_GCMINORFEATURES0_FAST_CLEAR_FLUSH_RESETVAL (0x00000001U)
999 #define CSL_BB2D_GCMINORFEATURES0_FAST_CLEAR_FLUSH_MAX (0x00000001U)
1001 #define CSL_BB2D_GCMINORFEATURES0_CORRECT_AUTO_DISABLE_MASK (0x00000100U)
1002 #define CSL_BB2D_GCMINORFEATURES0_CORRECT_AUTO_DISABLE_SHIFT (8U)
1003 #define CSL_BB2D_GCMINORFEATURES0_CORRECT_AUTO_DISABLE_RESETVAL (0x00000000U)
1004 #define CSL_BB2D_GCMINORFEATURES0_CORRECT_AUTO_DISABLE_MAX (0x00000001U)
1006 #define CSL_BB2D_GCMINORFEATURES0_SEPARATE_TILE_STATUS_WHEN_INTERLEAVED_MASK (0x00000800U)
1007 #define CSL_BB2D_GCMINORFEATURES0_SEPARATE_TILE_STATUS_WHEN_INTERLEAVED_SHIFT (11U)
1008 #define CSL_BB2D_GCMINORFEATURES0_SEPARATE_TILE_STATUS_WHEN_INTERLEAVED_RESETVAL (0x00000001U)
1009 #define CSL_BB2D_GCMINORFEATURES0_SEPARATE_TILE_STATUS_WHEN_INTERLEAVED_MAX (0x00000001U)
1011 #define CSL_BB2D_GCMINORFEATURES0_NEW_TEXTURE_MASK (0x10000000U)
1012 #define CSL_BB2D_GCMINORFEATURES0_NEW_TEXTURE_SHIFT (28U)
1013 #define CSL_BB2D_GCMINORFEATURES0_NEW_TEXTURE_RESETVAL (0x00000000U)
1014 #define CSL_BB2D_GCMINORFEATURES0_NEW_TEXTURE_MAX (0x00000001U)
1016 #define CSL_BB2D_GCMINORFEATURES0_A8_TARGET_SUPPORT_MASK (0x20000000U)
1017 #define CSL_BB2D_GCMINORFEATURES0_A8_TARGET_SUPPORT_SHIFT (29U)
1018 #define CSL_BB2D_GCMINORFEATURES0_A8_TARGET_SUPPORT_RESETVAL (0x00000000U)
1019 #define CSL_BB2D_GCMINORFEATURES0_A8_TARGET_SUPPORT_MAX (0x00000001U)
1021 #define CSL_BB2D_GCMINORFEATURES0_ENDIANNESS_CONFIG_MASK (0x00000004U)
1022 #define CSL_BB2D_GCMINORFEATURES0_ENDIANNESS_CONFIG_SHIFT (2U)
1023 #define CSL_BB2D_GCMINORFEATURES0_ENDIANNESS_CONFIG_RESETVAL (0x00000001U)
1024 #define CSL_BB2D_GCMINORFEATURES0_ENDIANNESS_CONFIG_MAX (0x00000001U)
1026 #define CSL_BB2D_GCMINORFEATURES0_SPECIAL_MSAA_LOD_MASK (0x00000020U)
1027 #define CSL_BB2D_GCMINORFEATURES0_SPECIAL_MSAA_LOD_SHIFT (5U)
1028 #define CSL_BB2D_GCMINORFEATURES0_SPECIAL_MSAA_LOD_RESETVAL (0x00000001U)
1029 #define CSL_BB2D_GCMINORFEATURES0_SPECIAL_MSAA_LOD_MAX (0x00000001U)
1031 #define CSL_BB2D_GCMINORFEATURES0_BUG_FIXES0_MASK (0x01000000U)
1032 #define CSL_BB2D_GCMINORFEATURES0_BUG_FIXES0_SHIFT (24U)
1033 #define CSL_BB2D_GCMINORFEATURES0_BUG_FIXES0_RESETVAL (0x00000001U)
1034 #define CSL_BB2D_GCMINORFEATURES0_BUG_FIXES0_MAX (0x00000001U)
1036 #define CSL_BB2D_GCMINORFEATURES0_RESETVAL (0xc9399effU)
1038 /* GCRESETMEMCOUNTERS */
1040 #define CSL_BB2D_GCRESETMEMCOUNTERS_RESET_MASK (0x00000001U)
1041 #define CSL_BB2D_GCRESETMEMCOUNTERS_RESET_SHIFT (0U)
1042 #define CSL_BB2D_GCRESETMEMCOUNTERS_RESET_RESETVAL (0x00000001U)
1043 #define CSL_BB2D_GCRESETMEMCOUNTERS_RESET_MAX (0x00000001U)
1045 #define CSL_BB2D_GCRESETMEMCOUNTERS_RESETVAL (0xc9399effU)
1047 /* GCTOTALREADS */
1049 #define CSL_BB2D_GCTOTALREADS_COUNT_MASK (0xFFFFFFFFU)
1050 #define CSL_BB2D_GCTOTALREADS_COUNT_SHIFT (0U)
1051 #define CSL_BB2D_GCTOTALREADS_COUNT_RESETVAL (0x00000000U)
1052 #define CSL_BB2D_GCTOTALREADS_COUNT_MAX (0xffffffffU)
1054 #define CSL_BB2D_GCTOTALREADS_RESETVAL (0x00000000U)
1056 /* GCTOTALWRITES */
1058 #define CSL_BB2D_GCTOTALWRITES_COUNT_MASK (0xFFFFFFFFU)
1059 #define CSL_BB2D_GCTOTALWRITES_COUNT_SHIFT (0U)
1060 #define CSL_BB2D_GCTOTALWRITES_COUNT_RESETVAL (0x00000000U)
1061 #define CSL_BB2D_GCTOTALWRITES_COUNT_MAX (0xffffffffU)
1063 #define CSL_BB2D_GCTOTALWRITES_RESETVAL (0x00000000U)
1065 /* GCCHIPSPECS */
1067 #define CSL_BB2D_GCCHIPSPECS_THREAD_COUNT_MASK (0x00000F00U)
1068 #define CSL_BB2D_GCCHIPSPECS_THREAD_COUNT_SHIFT (8U)
1069 #define CSL_BB2D_GCCHIPSPECS_THREAD_COUNT_RESETVAL (0x00000000U)
1070 #define CSL_BB2D_GCCHIPSPECS_THREAD_COUNT_MAX (0x0000000fU)
1072 #define CSL_BB2D_GCCHIPSPECS_TEMP_REGISTERS_MASK (0x000000F0U)
1073 #define CSL_BB2D_GCCHIPSPECS_TEMP_REGISTERS_SHIFT (4U)
1074 #define CSL_BB2D_GCCHIPSPECS_TEMP_REGISTERS_RESETVAL (0x00000000U)
1075 #define CSL_BB2D_GCCHIPSPECS_TEMP_REGISTERS_MAX (0x0000000fU)
1077 #define CSL_BB2D_GCCHIPSPECS_NUM_PIXEL_PIPES_MASK (0x0E000000U)
1078 #define CSL_BB2D_GCCHIPSPECS_NUM_PIXEL_PIPES_SHIFT (25U)
1079 #define CSL_BB2D_GCCHIPSPECS_NUM_PIXEL_PIPES_RESETVAL (0x00000000U)
1080 #define CSL_BB2D_GCCHIPSPECS_NUM_PIXEL_PIPES_MAX (0x00000007U)
1082 #define CSL_BB2D_GCCHIPSPECS_VERTEX_CACHE_SIZE_MASK (0x0001F000U)
1083 #define CSL_BB2D_GCCHIPSPECS_VERTEX_CACHE_SIZE_SHIFT (12U)
1084 #define CSL_BB2D_GCCHIPSPECS_VERTEX_CACHE_SIZE_RESETVAL (0x00000000U)
1085 #define CSL_BB2D_GCCHIPSPECS_VERTEX_CACHE_SIZE_MAX (0x0000001fU)
1087 #define CSL_BB2D_GCCHIPSPECS_NUM_SHADER_CORES_MASK (0x01F00000U)
1088 #define CSL_BB2D_GCCHIPSPECS_NUM_SHADER_CORES_SHIFT (20U)
1089 #define CSL_BB2D_GCCHIPSPECS_NUM_SHADER_CORES_RESETVAL (0x00000000U)
1090 #define CSL_BB2D_GCCHIPSPECS_NUM_SHADER_CORES_MAX (0x0000001fU)
1092 #define CSL_BB2D_GCCHIPSPECS_STREAMS_MASK (0x0000000FU)
1093 #define CSL_BB2D_GCCHIPSPECS_STREAMS_SHIFT (0U)
1094 #define CSL_BB2D_GCCHIPSPECS_STREAMS_RESETVAL (0x00000000U)
1095 #define CSL_BB2D_GCCHIPSPECS_STREAMS_MAX (0x0000000fU)
1097 #define CSL_BB2D_GCCHIPSPECS_VERTEX_OUTPUT_BUFFER_SIZE_MASK (0xF0000000U)
1098 #define CSL_BB2D_GCCHIPSPECS_VERTEX_OUTPUT_BUFFER_SIZE_SHIFT (28U)
1099 #define CSL_BB2D_GCCHIPSPECS_VERTEX_OUTPUT_BUFFER_SIZE_RESETVAL (0x00000000U)
1100 #define CSL_BB2D_GCCHIPSPECS_VERTEX_OUTPUT_BUFFER_SIZE_MAX (0x0000000fU)
1102 #define CSL_BB2D_GCCHIPSPECS_RESETVAL (0x00000000U)
1104 /* GCTOTALWRITEBURSTS */
1106 #define CSL_BB2D_GCTOTALWRITEBURSTS_COUNT_MASK (0xFFFFFFFFU)
1107 #define CSL_BB2D_GCTOTALWRITEBURSTS_COUNT_SHIFT (0U)
1108 #define CSL_BB2D_GCTOTALWRITEBURSTS_COUNT_RESETVAL (0x00000000U)
1109 #define CSL_BB2D_GCTOTALWRITEBURSTS_COUNT_MAX (0xffffffffU)
1111 #define CSL_BB2D_GCTOTALWRITEBURSTS_RESETVAL (0x00000000U)
1113 /* GCTOTALWRITEREQS */
1115 #define CSL_BB2D_GCTOTALWRITEREQS_COUNT_MASK (0xFFFFFFFFU)
1116 #define CSL_BB2D_GCTOTALWRITEREQS_COUNT_SHIFT (0U)
1117 #define CSL_BB2D_GCTOTALWRITEREQS_COUNT_RESETVAL (0x00000000U)
1118 #define CSL_BB2D_GCTOTALWRITEREQS_COUNT_MAX (0xffffffffU)
1120 #define CSL_BB2D_GCTOTALWRITEREQS_RESETVAL (0x00000000U)
1122 /* GCTOTALWRITELASTS */
1124 #define CSL_BB2D_GCTOTALWRITELASTS_COUNT_MASK (0xFFFFFFFFU)
1125 #define CSL_BB2D_GCTOTALWRITELASTS_COUNT_SHIFT (0U)
1126 #define CSL_BB2D_GCTOTALWRITELASTS_COUNT_RESETVAL (0x00000000U)
1127 #define CSL_BB2D_GCTOTALWRITELASTS_COUNT_MAX (0xffffffffU)
1129 #define CSL_BB2D_GCTOTALWRITELASTS_RESETVAL (0x00000000U)
1131 /* GCTOTALREADBURSTS */
1133 #define CSL_BB2D_GCTOTALREADBURSTS_COUNT_MASK (0xFFFFFFFFU)
1134 #define CSL_BB2D_GCTOTALREADBURSTS_COUNT_SHIFT (0U)
1135 #define CSL_BB2D_GCTOTALREADBURSTS_COUNT_RESETVAL (0x00000000U)
1136 #define CSL_BB2D_GCTOTALREADBURSTS_COUNT_MAX (0xffffffffU)
1138 #define CSL_BB2D_GCTOTALREADBURSTS_RESETVAL (0x00000000U)
1140 /* GCTOTALREADREQS */
1142 #define CSL_BB2D_GCTOTALREADREQS_COUNT_MASK (0xFFFFFFFFU)
1143 #define CSL_BB2D_GCTOTALREADREQS_COUNT_SHIFT (0U)
1144 #define CSL_BB2D_GCTOTALREADREQS_COUNT_RESETVAL (0x00000000U)
1145 #define CSL_BB2D_GCTOTALREADREQS_COUNT_MAX (0xffffffffU)
1147 #define CSL_BB2D_GCTOTALREADREQS_RESETVAL (0x00000000U)
1149 /* GCTOTALREADLASTS */
1151 #define CSL_BB2D_GCTOTALREADLASTS_COUNT_MASK (0xFFFFFFFFU)
1152 #define CSL_BB2D_GCTOTALREADLASTS_COUNT_SHIFT (0U)
1153 #define CSL_BB2D_GCTOTALREADLASTS_COUNT_RESETVAL (0x00000000U)
1154 #define CSL_BB2D_GCTOTALREADLASTS_COUNT_MAX (0xffffffffU)
1156 #define CSL_BB2D_GCTOTALREADLASTS_RESETVAL (0x00000000U)
1158 /* GCGPOUT0 */
1160 #define CSL_BB2D_GCGPOUT0_COUNT_MASK (0xFFFFFFFEU)
1161 #define CSL_BB2D_GCGPOUT0_COUNT_SHIFT (1U)
1162 #define CSL_BB2D_GCGPOUT0_COUNT_RESETVAL (0x00000000U)
1163 #define CSL_BB2D_GCGPOUT0_COUNT_MAX (0x7fffffffU)
1165 #define CSL_BB2D_GCGPOUT0_GCHOLD_MASK (0x00000001U)
1166 #define CSL_BB2D_GCGPOUT0_GCHOLD_SHIFT (0U)
1167 #define CSL_BB2D_GCGPOUT0_GCHOLD_RESETVAL (0x00000000U)
1168 #define CSL_BB2D_GCGPOUT0_GCHOLD_MAX (0x00000001U)
1170 #define CSL_BB2D_GCGPOUT0_RESETVAL (0x00000000U)
1172 /* GCGPOUT1 */
1174 #define CSL_BB2D_GCGPOUT1_COUNT_MASK (0xFFFFFFFFU)
1175 #define CSL_BB2D_GCGPOUT1_COUNT_SHIFT (0U)
1176 #define CSL_BB2D_GCGPOUT1_COUNT_RESETVAL (0x00000000U)
1177 #define CSL_BB2D_GCGPOUT1_COUNT_MAX (0xffffffffU)
1179 #define CSL_BB2D_GCGPOUT1_RESETVAL (0x00000000U)
1181 /* GCGPOUT2 */
1183 #define CSL_BB2D_GCGPOUT2_COUNT_MASK (0xFFFFFFFFU)
1184 #define CSL_BB2D_GCGPOUT2_COUNT_SHIFT (0U)
1185 #define CSL_BB2D_GCGPOUT2_COUNT_RESETVAL (0x00000000U)
1186 #define CSL_BB2D_GCGPOUT2_COUNT_MAX (0xffffffffU)
1188 #define CSL_BB2D_GCGPOUT2_RESETVAL (0x00000000U)
1190 /* GCAXICONTROL */
1192 #define CSL_BB2D_GCAXICONTROL_WR_FULL_BURST_MODE_MASK (0x00000001U)
1193 #define CSL_BB2D_GCAXICONTROL_WR_FULL_BURST_MODE_SHIFT (0U)
1194 #define CSL_BB2D_GCAXICONTROL_WR_FULL_BURST_MODE_RESETVAL (0x00000000U)
1195 #define CSL_BB2D_GCAXICONTROL_WR_FULL_BURST_MODE_MAX (0x00000001U)
1197 #define CSL_BB2D_GCAXICONTROL_RESETVAL (0x00000000U)
1199 /* GCMINORFEATURES1 */
1201 #define CSL_BB2D_GCMINORFEATURES1_CORRECT_OVERFLOW_VG_MASK (0x01000000U)
1202 #define CSL_BB2D_GCMINORFEATURES1_CORRECT_OVERFLOW_VG_SHIFT (24U)
1203 #define CSL_BB2D_GCMINORFEATURES1_CORRECT_OVERFLOW_VG_RESETVAL (0x00000000U)
1204 #define CSL_BB2D_GCMINORFEATURES1_CORRECT_OVERFLOW_VG_MAX (0x00000001U)
1206 #define CSL_BB2D_GCMINORFEATURES1_LINEAR_TEXTURE_SUPPORT_MASK (0x00400000U)
1207 #define CSL_BB2D_GCMINORFEATURES1_LINEAR_TEXTURE_SUPPORT_SHIFT (22U)
1208 #define CSL_BB2D_GCMINORFEATURES1_LINEAR_TEXTURE_SUPPORT_RESETVAL (0x00000000U)
1209 #define CSL_BB2D_GCMINORFEATURES1_LINEAR_TEXTURE_SUPPORT_MAX (0x00000001U)
1211 #define CSL_BB2D_GCMINORFEATURES1_PIXEL_DITHER_MASK (0x00001000U)
1212 #define CSL_BB2D_GCMINORFEATURES1_PIXEL_DITHER_SHIFT (12U)
1213 #define CSL_BB2D_GCMINORFEATURES1_PIXEL_DITHER_RESETVAL (0x00000001U)
1214 #define CSL_BB2D_GCMINORFEATURES1_PIXEL_DITHER_MAX (0x00000001U)
1216 #define CSL_BB2D_GCMINORFEATURES1_TWO_STENCIL_REFERENCE_MASK (0x00002000U)
1217 #define CSL_BB2D_GCMINORFEATURES1_TWO_STENCIL_REFERENCE_SHIFT (13U)
1218 #define CSL_BB2D_GCMINORFEATURES1_TWO_STENCIL_REFERENCE_RESETVAL (0x00000001U)
1219 #define CSL_BB2D_GCMINORFEATURES1_TWO_STENCIL_REFERENCE_MAX (0x00000001U)
1221 #define CSL_BB2D_GCMINORFEATURES1_FC_FLUSH_STALL_MASK (0x80000000U)
1222 #define CSL_BB2D_GCMINORFEATURES1_FC_FLUSH_STALL_SHIFT (31U)
1223 #define CSL_BB2D_GCMINORFEATURES1_FC_FLUSH_STALL_RESETVAL (0x00000001U)
1224 #define CSL_BB2D_GCMINORFEATURES1_FC_FLUSH_STALL_MAX (0x00000001U)
1226 #define CSL_BB2D_GCMINORFEATURES1_AUTO_RESTART_TS_MASK (0x00000100U)
1227 #define CSL_BB2D_GCMINORFEATURES1_AUTO_RESTART_TS_SHIFT (8U)
1228 #define CSL_BB2D_GCMINORFEATURES1_AUTO_RESTART_TS_RESETVAL (0x00000000U)
1229 #define CSL_BB2D_GCMINORFEATURES1_AUTO_RESTART_TS_MAX (0x00000001U)
1231 #define CSL_BB2D_GCMINORFEATURES1_DITHER_AND_FILTER_PLUS_ALPHA_2D_MASK (0x00010000U)
1232 #define CSL_BB2D_GCMINORFEATURES1_DITHER_AND_FILTER_PLUS_ALPHA_2D_SHIFT (16U)
1233 #define CSL_BB2D_GCMINORFEATURES1_DITHER_AND_FILTER_PLUS_ALPHA_2D_RESETVAL (0x00000001U)
1234 #define CSL_BB2D_GCMINORFEATURES1_DITHER_AND_FILTER_PLUS_ALPHA_2D_MAX (0x00000001U)
1236 #define CSL_BB2D_GCMINORFEATURES1_VG_DOUBLE_BUFFER_MASK (0x00000004U)
1237 #define CSL_BB2D_GCMINORFEATURES1_VG_DOUBLE_BUFFER_SHIFT (2U)
1238 #define CSL_BB2D_GCMINORFEATURES1_VG_DOUBLE_BUFFER_RESETVAL (0x00000000U)
1239 #define CSL_BB2D_GCMINORFEATURES1_VG_DOUBLE_BUFFER_MAX (0x00000001U)
1241 #define CSL_BB2D_GCMINORFEATURES1_CORRECT_MIN_MAX_DEPTH_MASK (0x00008000U)
1242 #define CSL_BB2D_GCMINORFEATURES1_CORRECT_MIN_MAX_DEPTH_SHIFT (15U)
1243 #define CSL_BB2D_GCMINORFEATURES1_CORRECT_MIN_MAX_DEPTH_RESETVAL (0x00000001U)
1244 #define CSL_BB2D_GCMINORFEATURES1_CORRECT_MIN_MAX_DEPTH_MAX (0x00000001U)
1246 #define CSL_BB2D_GCMINORFEATURES1_BUG_FIXES5_MASK (0x00020000U)
1247 #define CSL_BB2D_GCMINORFEATURES1_BUG_FIXES5_SHIFT (17U)
1248 #define CSL_BB2D_GCMINORFEATURES1_BUG_FIXES5_RESETVAL (0x00000001U)
1249 #define CSL_BB2D_GCMINORFEATURES1_BUG_FIXES5_MAX (0x00000001U)
1251 #define CSL_BB2D_GCMINORFEATURES1_RSUV_SWIZZLE_MASK (0x00000001U)
1252 #define CSL_BB2D_GCMINORFEATURES1_RSUV_SWIZZLE_SHIFT (0U)
1253 #define CSL_BB2D_GCMINORFEATURES1_RSUV_SWIZZLE_RESETVAL (0x00000001U)
1254 #define CSL_BB2D_GCMINORFEATURES1_RSUV_SWIZZLE_MAX (0x00000001U)
1256 #define CSL_BB2D_GCMINORFEATURES1_RESOLVE_OFFSET_MASK (0x04000000U)
1257 #define CSL_BB2D_GCMINORFEATURES1_RESOLVE_OFFSET_SHIFT (26U)
1258 #define CSL_BB2D_GCMINORFEATURES1_RESOLVE_OFFSET_RESETVAL (0x00000001U)
1259 #define CSL_BB2D_GCMINORFEATURES1_RESOLVE_OFFSET_MAX (0x00000001U)
1261 #define CSL_BB2D_GCMINORFEATURES1_BUG_FIXES2_MASK (0x00000010U)
1262 #define CSL_BB2D_GCMINORFEATURES1_BUG_FIXES2_SHIFT (4U)
1263 #define CSL_BB2D_GCMINORFEATURES1_BUG_FIXES2_RESETVAL (0x00000001U)
1264 #define CSL_BB2D_GCMINORFEATURES1_BUG_FIXES2_MAX (0x00000001U)
1266 #define CSL_BB2D_GCMINORFEATURES1_HALTI0_MASK (0x00800000U)
1267 #define CSL_BB2D_GCMINORFEATURES1_HALTI0_SHIFT (23U)
1268 #define CSL_BB2D_GCMINORFEATURES1_HALTI0_RESETVAL (0x00000000U)
1269 #define CSL_BB2D_GCMINORFEATURES1_HALTI0_MAX (0x00000001U)
1271 #define CSL_BB2D_GCMINORFEATURES1_BUG_FIXES3_MASK (0x00000040U)
1272 #define CSL_BB2D_GCMINORFEATURES1_BUG_FIXES3_SHIFT (6U)
1273 #define CSL_BB2D_GCMINORFEATURES1_BUG_FIXES3_RESETVAL (0x00000001U)
1274 #define CSL_BB2D_GCMINORFEATURES1_BUG_FIXES3_MAX (0x00000001U)
1276 #define CSL_BB2D_GCMINORFEATURES1_NEW_FLOATING_POINT_ARITHMETIC_MASK (0x00080000U)
1277 #define CSL_BB2D_GCMINORFEATURES1_NEW_FLOATING_POINT_ARITHMETIC_SHIFT (19U)
1278 #define CSL_BB2D_GCMINORFEATURES1_NEW_FLOATING_POINT_ARITHMETIC_RESETVAL (0x00000001U)
1279 #define CSL_BB2D_GCMINORFEATURES1_NEW_FLOATING_POINT_ARITHMETIC_MAX (0x00000001U)
1281 #define CSL_BB2D_GCMINORFEATURES1_TEXTURE_STRIDE_MASK (0x00000020U)
1282 #define CSL_BB2D_GCMINORFEATURES1_TEXTURE_STRIDE_SHIFT (5U)
1283 #define CSL_BB2D_GCMINORFEATURES1_TEXTURE_STRIDE_RESETVAL (0x00000000U)
1284 #define CSL_BB2D_GCMINORFEATURES1_TEXTURE_STRIDE_MAX (0x00000001U)
1286 #define CSL_BB2D_GCMINORFEATURES1_NEW_2D_MASK (0x00040000U)
1287 #define CSL_BB2D_GCMINORFEATURES1_NEW_2D_SHIFT (18U)
1288 #define CSL_BB2D_GCMINORFEATURES1_NEW_2D_RESETVAL (0x00000001U)
1289 #define CSL_BB2D_GCMINORFEATURES1_NEW_2D_MAX (0x00000001U)
1291 #define CSL_BB2D_GCMINORFEATURES1_BUG_FIXES4_MASK (0x00000200U)
1292 #define CSL_BB2D_GCMINORFEATURES1_BUG_FIXES4_SHIFT (9U)
1293 #define CSL_BB2D_GCMINORFEATURES1_BUG_FIXES4_RESETVAL (0x00000001U)
1294 #define CSL_BB2D_GCMINORFEATURES1_BUG_FIXES4_MAX (0x00000001U)
1296 #define CSL_BB2D_GCMINORFEATURES1_MMU_MASK (0x10000000U)
1297 #define CSL_BB2D_GCMINORFEATURES1_MMU_SHIFT (28U)
1298 #define CSL_BB2D_GCMINORFEATURES1_MMU_RESETVAL (0x00000001U)
1299 #define CSL_BB2D_GCMINORFEATURES1_MMU_MAX (0x00000001U)
1301 #define CSL_BB2D_GCMINORFEATURES1_OK_TO_GATE_AXI_CLOCK_MASK (0x08000000U)
1302 #define CSL_BB2D_GCMINORFEATURES1_OK_TO_GATE_AXI_CLOCK_SHIFT (27U)
1303 #define CSL_BB2D_GCMINORFEATURES1_OK_TO_GATE_AXI_CLOCK_RESETVAL (0x00000001U)
1304 #define CSL_BB2D_GCMINORFEATURES1_OK_TO_GATE_AXI_CLOCK_MAX (0x00000001U)
1306 #define CSL_BB2D_GCMINORFEATURES1_NON_POWER_OF_TWO_MASK (0x00200000U)
1307 #define CSL_BB2D_GCMINORFEATURES1_NON_POWER_OF_TWO_SHIFT (21U)
1308 #define CSL_BB2D_GCMINORFEATURES1_NON_POWER_OF_TWO_RESETVAL (0x00000000U)
1309 #define CSL_BB2D_GCMINORFEATURES1_NON_POWER_OF_TWO_MAX (0x00000001U)
1311 #define CSL_BB2D_GCMINORFEATURES1_EXTENDED_PIXEL_FORMAT_MASK (0x00004000U)
1312 #define CSL_BB2D_GCMINORFEATURES1_EXTENDED_PIXEL_FORMAT_SHIFT (14U)
1313 #define CSL_BB2D_GCMINORFEATURES1_EXTENDED_PIXEL_FORMAT_RESETVAL (0x00000000U)
1314 #define CSL_BB2D_GCMINORFEATURES1_EXTENDED_PIXEL_FORMAT_MAX (0x00000001U)
1316 #define CSL_BB2D_GCMINORFEATURES1_TEXTURE_HORIZONTAL_ALIGNMENT_SELECT_MASK (0x00100000U)
1317 #define CSL_BB2D_GCMINORFEATURES1_TEXTURE_HORIZONTAL_ALIGNMENT_SELECT_SHIFT (20U)
1318 #define CSL_BB2D_GCMINORFEATURES1_TEXTURE_HORIZONTAL_ALIGNMENT_SELECT_RESETVAL (0x00000001U)
1319 #define CSL_BB2D_GCMINORFEATURES1_TEXTURE_HORIZONTAL_ALIGNMENT_SELECT_MAX (0x00000001U)
1321 #define CSL_BB2D_GCMINORFEATURES1_BUG_FIXES1_MASK (0x00000008U)
1322 #define CSL_BB2D_GCMINORFEATURES1_BUG_FIXES1_SHIFT (3U)
1323 #define CSL_BB2D_GCMINORFEATURES1_BUG_FIXES1_RESETVAL (0x00000001U)
1324 #define CSL_BB2D_GCMINORFEATURES1_BUG_FIXES1_MAX (0x00000001U)
1326 #define CSL_BB2D_GCMINORFEATURES1_BUG_FIXES6_MASK (0x40000000U)
1327 #define CSL_BB2D_GCMINORFEATURES1_BUG_FIXES6_SHIFT (30U)
1328 #define CSL_BB2D_GCMINORFEATURES1_BUG_FIXES6_RESETVAL (0x00000001U)
1329 #define CSL_BB2D_GCMINORFEATURES1_BUG_FIXES6_MAX (0x00000001U)
1331 #define CSL_BB2D_GCMINORFEATURES1_V2_COMPRESSION_MASK (0x00000002U)
1332 #define CSL_BB2D_GCMINORFEATURES1_V2_COMPRESSION_SHIFT (1U)
1333 #define CSL_BB2D_GCMINORFEATURES1_V2_COMPRESSION_RESETVAL (0x00000001U)
1334 #define CSL_BB2D_GCMINORFEATURES1_V2_COMPRESSION_MAX (0x00000001U)
1336 #define CSL_BB2D_GCMINORFEATURES1_L2_WINDOWING_MASK (0x00000400U)
1337 #define CSL_BB2D_GCMINORFEATURES1_L2_WINDOWING_SHIFT (10U)
1338 #define CSL_BB2D_GCMINORFEATURES1_L2_WINDOWING_RESETVAL (0x00000000U)
1339 #define CSL_BB2D_GCMINORFEATURES1_L2_WINDOWING_MAX (0x00000001U)
1341 #define CSL_BB2D_GCMINORFEATURES1_HALF_FLOAT_PIPE_MASK (0x00000800U)
1342 #define CSL_BB2D_GCMINORFEATURES1_HALF_FLOAT_PIPE_SHIFT (11U)
1343 #define CSL_BB2D_GCMINORFEATURES1_HALF_FLOAT_PIPE_RESETVAL (0x00000000U)
1344 #define CSL_BB2D_GCMINORFEATURES1_HALF_FLOAT_PIPE_MAX (0x00000001U)
1346 #define CSL_BB2D_GCMINORFEATURES1_WIDE_LINE_MASK (0x20000000U)
1347 #define CSL_BB2D_GCMINORFEATURES1_WIDE_LINE_SHIFT (29U)
1348 #define CSL_BB2D_GCMINORFEATURES1_WIDE_LINE_RESETVAL (0x00000001U)
1349 #define CSL_BB2D_GCMINORFEATURES1_WIDE_LINE_MAX (0x00000001U)
1351 #define CSL_BB2D_GCMINORFEATURES1_CORRECT_AUTO_DISABLE_MASK (0x00000080U)
1352 #define CSL_BB2D_GCMINORFEATURES1_CORRECT_AUTO_DISABLE_SHIFT (7U)
1353 #define CSL_BB2D_GCMINORFEATURES1_CORRECT_AUTO_DISABLE_RESETVAL (0x00000001U)
1354 #define CSL_BB2D_GCMINORFEATURES1_CORRECT_AUTO_DISABLE_MAX (0x00000001U)
1356 #define CSL_BB2D_GCMINORFEATURES1_NEGATIVE_LOG_FIX_MASK (0x02000000U)
1357 #define CSL_BB2D_GCMINORFEATURES1_NEGATIVE_LOG_FIX_SHIFT (25U)
1358 #define CSL_BB2D_GCMINORFEATURES1_NEGATIVE_LOG_FIX_RESETVAL (0x00000001U)
1359 #define CSL_BB2D_GCMINORFEATURES1_NEGATIVE_LOG_FIX_MAX (0x00000001U)
1361 #define CSL_BB2D_GCMINORFEATURES1_RESETVAL (0xfe1fb2dbU)
1363 /* GCTOTALCYCLES */
1365 #define CSL_BB2D_GCTOTALCYCLES_CYCLES_MASK (0xFFFFFFFFU)
1366 #define CSL_BB2D_GCTOTALCYCLES_CYCLES_SHIFT (0U)
1367 #define CSL_BB2D_GCTOTALCYCLES_CYCLES_RESETVAL (0x00001de2U)
1368 #define CSL_BB2D_GCTOTALCYCLES_CYCLES_MAX (0xffffffffU)
1370 #define CSL_BB2D_GCTOTALCYCLES_RESETVAL (0x00001de2U)
1372 /* GCTOTALIDLECYCLES */
1374 #define CSL_BB2D_GCTOTALIDLECYCLES_CYCLES_MASK (0xFFFFFFFFU)
1375 #define CSL_BB2D_GCTOTALIDLECYCLES_CYCLES_SHIFT (0U)
1376 #define CSL_BB2D_GCTOTALIDLECYCLES_CYCLES_RESETVAL (0x00001e08U)
1377 #define CSL_BB2D_GCTOTALIDLECYCLES_CYCLES_MAX (0xffffffffU)
1379 #define CSL_BB2D_GCTOTALIDLECYCLES_RESETVAL (0x00001e08U)
1381 /* GCCHIPSPECS2 */
1383 #define CSL_BB2D_GCCHIPSPECS2_NUMBER_OF_CONSTANTS_MASK (0xFFFF0000U)
1384 #define CSL_BB2D_GCCHIPSPECS2_NUMBER_OF_CONSTANTS_SHIFT (16U)
1385 #define CSL_BB2D_GCCHIPSPECS2_NUMBER_OF_CONSTANTS_RESETVAL (0x00000000U)
1386 #define CSL_BB2D_GCCHIPSPECS2_NUMBER_OF_CONSTANTS_MAX (0x0000ffffU)
1388 #define CSL_BB2D_GCCHIPSPECS2_INSTRUCTION_COUNT_MASK (0x0000FF00U)
1389 #define CSL_BB2D_GCCHIPSPECS2_INSTRUCTION_COUNT_SHIFT (8U)
1390 #define CSL_BB2D_GCCHIPSPECS2_INSTRUCTION_COUNT_RESETVAL (0x00000000U)
1391 #define CSL_BB2D_GCCHIPSPECS2_INSTRUCTION_COUNT_MAX (0x000000ffU)
1393 #define CSL_BB2D_GCCHIPSPECS2_BUFFER_SIZE_MASK (0x000000FFU)
1394 #define CSL_BB2D_GCCHIPSPECS2_BUFFER_SIZE_SHIFT (0U)
1395 #define CSL_BB2D_GCCHIPSPECS2_BUFFER_SIZE_RESETVAL (0x00000000U)
1396 #define CSL_BB2D_GCCHIPSPECS2_BUFFER_SIZE_MAX (0x000000ffU)
1398 #define CSL_BB2D_GCCHIPSPECS2_RESETVAL (0x00000000U)
1400 /* GCMINORFEATURES2 */
1402 #define CSL_BB2D_GCMINORFEATURES2_BUG_FIXES8_MASK (0x80000000U)
1403 #define CSL_BB2D_GCMINORFEATURES2_BUG_FIXES8_SHIFT (31U)
1404 #define CSL_BB2D_GCMINORFEATURES2_BUG_FIXES8_RESETVAL (0x00000001U)
1405 #define CSL_BB2D_GCMINORFEATURES2_BUG_FIXES8_MAX (0x00000001U)
1407 #define CSL_BB2D_GCMINORFEATURES2_END_EVENT_MASK (0x00000200U)
1408 #define CSL_BB2D_GCMINORFEATURES2_END_EVENT_SHIFT (9U)
1409 #define CSL_BB2D_GCMINORFEATURES2_END_EVENT_RESETVAL (0x00000000U)
1410 #define CSL_BB2D_GCMINORFEATURES2_END_EVENT_MAX (0x00000001U)
1412 #define CSL_BB2D_GCMINORFEATURES2_INTERLEAVER_MASK (0x01000000U)
1413 #define CSL_BB2D_GCMINORFEATURES2_INTERLEAVER_SHIFT (24U)
1414 #define CSL_BB2D_GCMINORFEATURES2_INTERLEAVER_RESETVAL (0x00000000U)
1415 #define CSL_BB2D_GCMINORFEATURES2_INTERLEAVER_MAX (0x00000001U)
1417 #define CSL_BB2D_GCMINORFEATURES2_PE_SWIZZLE_MASK (0x00000100U)
1418 #define CSL_BB2D_GCMINORFEATURES2_PE_SWIZZLE_SHIFT (8U)
1419 #define CSL_BB2D_GCMINORFEATURES2_PE_SWIZZLE_RESETVAL (0x00000000U)
1420 #define CSL_BB2D_GCMINORFEATURES2_PE_SWIZZLE_MAX (0x00000001U)
1422 #define CSL_BB2D_GCMINORFEATURES2_MIXED_STREAMS_MASK (0x02000000U)
1423 #define CSL_BB2D_GCMINORFEATURES2_MIXED_STREAMS_SHIFT (25U)
1424 #define CSL_BB2D_GCMINORFEATURES2_MIXED_STREAMS_RESETVAL (0x00000001U)
1425 #define CSL_BB2D_GCMINORFEATURES2_MIXED_STREAMS_MAX (0x00000001U)
1427 #define CSL_BB2D_GCMINORFEATURES2_FLUSH_FIXED_2D_MASK (0x00800000U)
1428 #define CSL_BB2D_GCMINORFEATURES2_FLUSH_FIXED_2D_SHIFT (23U)
1429 #define CSL_BB2D_GCMINORFEATURES2_FLUSH_FIXED_2D_RESETVAL (0x00000001U)
1430 #define CSL_BB2D_GCMINORFEATURES2_FLUSH_FIXED_2D_MAX (0x00000001U)
1432 #define CSL_BB2D_GCMINORFEATURES2_TX_YUV_ASSEMBLER_MASK (0x00002000U)
1433 #define CSL_BB2D_GCMINORFEATURES2_TX_YUV_ASSEMBLER_SHIFT (13U)
1434 #define CSL_BB2D_GCMINORFEATURES2_TX_YUV_ASSEMBLER_RESETVAL (0x00000000U)
1435 #define CSL_BB2D_GCMINORFEATURES2_TX_YUV_ASSEMBLER_MAX (0x00000001U)
1437 #define CSL_BB2D_GCMINORFEATURES2_ONE_PASS_2D_FILTER_MASK (0x00020000U)
1438 #define CSL_BB2D_GCMINORFEATURES2_ONE_PASS_2D_FILTER_SHIFT (17U)
1439 #define CSL_BB2D_GCMINORFEATURES2_ONE_PASS_2D_FILTER_RESETVAL (0x00000001U)
1440 #define CSL_BB2D_GCMINORFEATURES2_ONE_PASS_2D_FILTER_MAX (0x00000001U)
1442 #define CSL_BB2D_GCMINORFEATURES2_SUPER_TILED_TEXTURE_MASK (0x00000008U)
1443 #define CSL_BB2D_GCMINORFEATURES2_SUPER_TILED_TEXTURE_SHIFT (3U)
1444 #define CSL_BB2D_GCMINORFEATURES2_SUPER_TILED_TEXTURE_RESETVAL (0x00000000U)
1445 #define CSL_BB2D_GCMINORFEATURES2_SUPER_TILED_TEXTURE_MAX (0x00000001U)
1447 #define CSL_BB2D_GCMINORFEATURES2_HALTI1_MASK (0x00000800U)
1448 #define CSL_BB2D_GCMINORFEATURES2_HALTI1_SHIFT (11U)
1449 #define CSL_BB2D_GCMINORFEATURES2_HALTI1_RESETVAL (0x00000000U)
1450 #define CSL_BB2D_GCMINORFEATURES2_HALTI1_MAX (0x00000001U)
1452 #define CSL_BB2D_GCMINORFEATURES2_S1S8_MASK (0x00000400U)
1453 #define CSL_BB2D_GCMINORFEATURES2_S1S8_SHIFT (10U)
1454 #define CSL_BB2D_GCMINORFEATURES2_S1S8_RESETVAL (0x00000000U)
1455 #define CSL_BB2D_GCMINORFEATURES2_S1S8_MAX (0x00000001U)
1457 #define CSL_BB2D_GCMINORFEATURES2_SEAMLESS_CUBE_MAP_MASK (0x00000004U)
1458 #define CSL_BB2D_GCMINORFEATURES2_SEAMLESS_CUBE_MAP_SHIFT (2U)
1459 #define CSL_BB2D_GCMINORFEATURES2_SEAMLESS_CUBE_MAP_RESETVAL (0x00000000U)
1460 #define CSL_BB2D_GCMINORFEATURES2_SEAMLESS_CUBE_MAP_MAX (0x00000001U)
1462 #define CSL_BB2D_GCMINORFEATURES2_RGB888_MASK (0x00001000U)
1463 #define CSL_BB2D_GCMINORFEATURES2_RGB888_SHIFT (12U)
1464 #define CSL_BB2D_GCMINORFEATURES2_RGB888_RESETVAL (0x00000000U)
1465 #define CSL_BB2D_GCMINORFEATURES2_RGB888_MAX (0x00000001U)
1467 #define CSL_BB2D_GCMINORFEATURES2_CORRECT_AUTO_DISABLE_COUNT_WIDTH_MASK (0x00000080U)
1468 #define CSL_BB2D_GCMINORFEATURES2_CORRECT_AUTO_DISABLE_COUNT_WIDTH_SHIFT (7U)
1469 #define CSL_BB2D_GCMINORFEATURES2_CORRECT_AUTO_DISABLE_COUNT_WIDTH_RESETVAL (0x00000001U)
1470 #define CSL_BB2D_GCMINORFEATURES2_CORRECT_AUTO_DISABLE_COUNT_WIDTH_MAX (0x00000001U)
1472 #define CSL_BB2D_GCMINORFEATURES2_TILE_FILLER_MASK (0x00080000U)
1473 #define CSL_BB2D_GCMINORFEATURES2_TILE_FILLER_SHIFT (19U)
1474 #define CSL_BB2D_GCMINORFEATURES2_TILE_FILLER_RESETVAL (0x00000001U)
1475 #define CSL_BB2D_GCMINORFEATURES2_TILE_FILLER_MAX (0x00000001U)
1477 #define CSL_BB2D_GCMINORFEATURES2_NO_INDEX_PATTERN_MASK (0x10000000U)
1478 #define CSL_BB2D_GCMINORFEATURES2_NO_INDEX_PATTERN_SHIFT (28U)
1479 #define CSL_BB2D_GCMINORFEATURES2_NO_INDEX_PATTERN_RESETVAL (0x00000001U)
1480 #define CSL_BB2D_GCMINORFEATURES2_NO_INDEX_PATTERN_MAX (0x00000001U)
1482 #define CSL_BB2D_GCMINORFEATURES2_TEXTURE_TILE_STATUS_MASK (0x20000000U)
1483 #define CSL_BB2D_GCMINORFEATURES2_TEXTURE_TILE_STATUS_SHIFT (29U)
1484 #define CSL_BB2D_GCMINORFEATURES2_TEXTURE_TILE_STATUS_RESETVAL (0x00000000U)
1485 #define CSL_BB2D_GCMINORFEATURES2_TEXTURE_TILE_STATUS_MAX (0x00000001U)
1487 #define CSL_BB2D_GCMINORFEATURES2_MULTI_SOURCE_BLT_MASK (0x00200000U)
1488 #define CSL_BB2D_GCMINORFEATURES2_MULTI_SOURCE_BLT_SHIFT (21U)
1489 #define CSL_BB2D_GCMINORFEATURES2_MULTI_SOURCE_BLT_RESETVAL (0x00000001U)
1490 #define CSL_BB2D_GCMINORFEATURES2_MULTI_SOURCE_BLT_MAX (0x00000001U)
1492 #define CSL_BB2D_GCMINORFEATURES2_TX_FILTER_MASK (0x00008000U)
1493 #define CSL_BB2D_GCMINORFEATURES2_TX_FILTER_SHIFT (15U)
1494 #define CSL_BB2D_GCMINORFEATURES2_TX_FILTER_RESETVAL (0x00000000U)
1495 #define CSL_BB2D_GCMINORFEATURES2_TX_FILTER_MAX (0x00000001U)
1497 #define CSL_BB2D_GCMINORFEATURES2_THREAD_WALKER_IN_PS_MASK (0x00040000U)
1498 #define CSL_BB2D_GCMINORFEATURES2_THREAD_WALKER_IN_PS_SHIFT (18U)
1499 #define CSL_BB2D_GCMINORFEATURES2_THREAD_WALKER_IN_PS_RESETVAL (0x00000001U)
1500 #define CSL_BB2D_GCMINORFEATURES2_THREAD_WALKER_IN_PS_MAX (0x00000001U)
1502 #define CSL_BB2D_GCMINORFEATURES2_LINEAR_PE_MASK (0x00000010U)
1503 #define CSL_BB2D_GCMINORFEATURES2_LINEAR_PE_SHIFT (4U)
1504 #define CSL_BB2D_GCMINORFEATURES2_LINEAR_PE_RESETVAL (0x00000000U)
1505 #define CSL_BB2D_GCMINORFEATURES2_LINEAR_PE_MAX (0x00000001U)
1507 #define CSL_BB2D_GCMINORFEATURES2_NOT_USED_MASK (0x04000000U)
1508 #define CSL_BB2D_GCMINORFEATURES2_NOT_USED_SHIFT (26U)
1509 #define CSL_BB2D_GCMINORFEATURES2_NOT_USED_RESETVAL (0x00000001U)
1510 #define CSL_BB2D_GCMINORFEATURES2_NOT_USED_MAX (0x00000001U)
1512 #define CSL_BB2D_GCMINORFEATURES2_YUV_CONVERSION_MASK (0x00400000U)
1513 #define CSL_BB2D_GCMINORFEATURES2_YUV_CONVERSION_SHIFT (22U)
1514 #define CSL_BB2D_GCMINORFEATURES2_YUV_CONVERSION_RESETVAL (0x00000001U)
1515 #define CSL_BB2D_GCMINORFEATURES2_YUV_CONVERSION_MAX (0x00000001U)
1517 #define CSL_BB2D_GCMINORFEATURES2_RECT_PRIMITIVE_MASK (0x00000020U)
1518 #define CSL_BB2D_GCMINORFEATURES2_RECT_PRIMITIVE_SHIFT (5U)
1519 #define CSL_BB2D_GCMINORFEATURES2_RECT_PRIMITIVE_RESETVAL (0x00000000U)
1520 #define CSL_BB2D_GCMINORFEATURES2_RECT_PRIMITIVE_MAX (0x00000001U)
1522 #define CSL_BB2D_GCMINORFEATURES2_YUV_STANDARD_MASK (0x00100000U)
1523 #define CSL_BB2D_GCMINORFEATURES2_YUV_STANDARD_SHIFT (20U)
1524 #define CSL_BB2D_GCMINORFEATURES2_YUV_STANDARD_RESETVAL (0x00000001U)
1525 #define CSL_BB2D_GCMINORFEATURES2_YUV_STANDARD_MAX (0x00000001U)
1527 #define CSL_BB2D_GCMINORFEATURES2_LINE_LOOP_MASK (0x00000001U)
1528 #define CSL_BB2D_GCMINORFEATURES2_LINE_LOOP_SHIFT (0U)
1529 #define CSL_BB2D_GCMINORFEATURES2_LINE_LOOP_RESETVAL (0x00000000U)
1530 #define CSL_BB2D_GCMINORFEATURES2_LINE_LOOP_MAX (0x00000001U)
1532 #define CSL_BB2D_GCMINORFEATURES2_DYNAMIC_FREQUENCY_SCALING_MASK (0x00004000U)
1533 #define CSL_BB2D_GCMINORFEATURES2_DYNAMIC_FREQUENCY_SCALING_SHIFT (14U)
1534 #define CSL_BB2D_GCMINORFEATURES2_DYNAMIC_FREQUENCY_SCALING_RESETVAL (0x00000000U)
1535 #define CSL_BB2D_GCMINORFEATURES2_DYNAMIC_FREQUENCY_SCALING_MAX (0x00000001U)
1537 #define CSL_BB2D_GCMINORFEATURES2_COMPOSITION_MASK (0x00000040U)
1538 #define CSL_BB2D_GCMINORFEATURES2_COMPOSITION_SHIFT (6U)
1539 #define CSL_BB2D_GCMINORFEATURES2_COMPOSITION_RESETVAL (0x00000000U)
1540 #define CSL_BB2D_GCMINORFEATURES2_COMPOSITION_MAX (0x00000001U)
1542 #define CSL_BB2D_GCMINORFEATURES2_FULL_DIRECT_FB_MASK (0x00010000U)
1543 #define CSL_BB2D_GCMINORFEATURES2_FULL_DIRECT_FB_SHIFT (16U)
1544 #define CSL_BB2D_GCMINORFEATURES2_FULL_DIRECT_FB_RESETVAL (0x00000001U)
1545 #define CSL_BB2D_GCMINORFEATURES2_FULL_DIRECT_FB_MAX (0x00000001U)
1547 #define CSL_BB2D_GCMINORFEATURES2_DECOMPRESS_Z16_MASK (0x40000000U)
1548 #define CSL_BB2D_GCMINORFEATURES2_DECOMPRESS_Z16_SHIFT (30U)
1549 #define CSL_BB2D_GCMINORFEATURES2_DECOMPRESS_Z16_RESETVAL (0x00000001U)
1550 #define CSL_BB2D_GCMINORFEATURES2_DECOMPRESS_Z16_MAX (0x00000001U)
1552 #define CSL_BB2D_GCMINORFEATURES2_LOGIC_OP_MASK (0x00000002U)
1553 #define CSL_BB2D_GCMINORFEATURES2_LOGIC_OP_SHIFT (1U)
1554 #define CSL_BB2D_GCMINORFEATURES2_LOGIC_OP_RESETVAL (0x00000000U)
1555 #define CSL_BB2D_GCMINORFEATURES2_LOGIC_OP_MAX (0x00000001U)
1557 #define CSL_BB2D_GCMINORFEATURES2_RESETVAL (0xdeff0080U)
1559 /* GCMODULEPOWERCONTROLS */
1561 #define CSL_BB2D_GCMODULEPOWERCONTROLS_TURN_OFF_COUNTER_MASK (0xFFFF0000U)
1562 #define CSL_BB2D_GCMODULEPOWERCONTROLS_TURN_OFF_COUNTER_SHIFT (16U)
1563 #define CSL_BB2D_GCMODULEPOWERCONTROLS_TURN_OFF_COUNTER_RESETVAL (0x00000014U)
1564 #define CSL_BB2D_GCMODULEPOWERCONTROLS_TURN_OFF_COUNTER_MAX (0x0000ffffU)
1566 #define CSL_BB2D_GCMODULEPOWERCONTROLS_TURN_ON_COUNTER_MASK (0x000000F0U)
1567 #define CSL_BB2D_GCMODULEPOWERCONTROLS_TURN_ON_COUNTER_SHIFT (4U)
1568 #define CSL_BB2D_GCMODULEPOWERCONTROLS_TURN_ON_COUNTER_RESETVAL (0x00000002U)
1569 #define CSL_BB2D_GCMODULEPOWERCONTROLS_TURN_ON_COUNTER_MAX (0x0000000fU)
1571 #define CSL_BB2D_GCMODULEPOWERCONTROLS_DISABLE_STARVE_MODULE_CLOCK_GATING_MASK (0x00000004U)
1572 #define CSL_BB2D_GCMODULEPOWERCONTROLS_DISABLE_STARVE_MODULE_CLOCK_GATING_SHIFT (2U)
1573 #define CSL_BB2D_GCMODULEPOWERCONTROLS_DISABLE_STARVE_MODULE_CLOCK_GATING_RESETVAL (0x00000000U)
1574 #define CSL_BB2D_GCMODULEPOWERCONTROLS_DISABLE_STARVE_MODULE_CLOCK_GATING_MAX (0x00000001U)
1576 #define CSL_BB2D_GCMODULEPOWERCONTROLS_DISABLE_STALL_MODULE_CLOCK_GATING_MASK (0x00000002U)
1577 #define CSL_BB2D_GCMODULEPOWERCONTROLS_DISABLE_STALL_MODULE_CLOCK_GATING_SHIFT (1U)
1578 #define CSL_BB2D_GCMODULEPOWERCONTROLS_DISABLE_STALL_MODULE_CLOCK_GATING_RESETVAL (0x00000000U)
1579 #define CSL_BB2D_GCMODULEPOWERCONTROLS_DISABLE_STALL_MODULE_CLOCK_GATING_MAX (0x00000001U)
1581 #define CSL_BB2D_GCMODULEPOWERCONTROLS_ENABLE_MODULE_CLOCK_GATING_MASK (0x00000001U)
1582 #define CSL_BB2D_GCMODULEPOWERCONTROLS_ENABLE_MODULE_CLOCK_GATING_SHIFT (0U)
1583 #define CSL_BB2D_GCMODULEPOWERCONTROLS_ENABLE_MODULE_CLOCK_GATING_RESETVAL (0x00000000U)
1584 #define CSL_BB2D_GCMODULEPOWERCONTROLS_ENABLE_MODULE_CLOCK_GATING_MAX (0x00000001U)
1586 #define CSL_BB2D_GCMODULEPOWERCONTROLS_RESETVAL (0x00140020U)
1588 /* GCMODULEPOWERMODULECONTROL */
1590 #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_SE_MASK (0x00000020U)
1591 #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_SE_SHIFT (5U)
1592 #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_SE_RESETVAL (0x00000000U)
1593 #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_SE_MAX (0x00000001U)
1595 #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_PE_MASK (0x00000004U)
1596 #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_PE_SHIFT (2U)
1597 #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_PE_RESETVAL (0x00000000U)
1598 #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_PE_MAX (0x00000001U)
1600 #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_SH_MASK (0x00000008U)
1601 #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_SH_SHIFT (3U)
1602 #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_SH_RESETVAL (0x00000000U)
1603 #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_SH_MAX (0x00000001U)
1605 #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_PA_MASK (0x00000010U)
1606 #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_PA_SHIFT (4U)
1607 #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_PA_RESETVAL (0x00000000U)
1608 #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_PA_MAX (0x00000001U)
1610 #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_TX_MASK (0x00000080U)
1611 #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_TX_SHIFT (7U)
1612 #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_TX_RESETVAL (0x00000000U)
1613 #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_TX_MAX (0x00000001U)
1615 #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_RA_MASK (0x00000040U)
1616 #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_RA_SHIFT (6U)
1617 #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_RA_RESETVAL (0x00000000U)
1618 #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_RA_MAX (0x00000001U)
1620 #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_FE_MASK (0x00000001U)
1621 #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_FE_SHIFT (0U)
1622 #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_FE_RESETVAL (0x00000000U)
1623 #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_FE_MAX (0x00000001U)
1625 #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_DE_MASK (0x00000002U)
1626 #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_DE_SHIFT (1U)
1627 #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_DE_RESETVAL (0x00000000U)
1628 #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_DE_MAX (0x00000001U)
1630 #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_RESETVAL (0x00000000U)
1632 /* GCMODULEPOWERMODULESTATUS */
1634 #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_DE_MASK (0x00000002U)
1635 #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_DE_SHIFT (1U)
1636 #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_DE_RESETVAL (0x00000000U)
1637 #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_DE_MAX (0x00000001U)
1639 #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_SE_MASK (0x00000020U)
1640 #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_SE_SHIFT (5U)
1641 #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_SE_RESETVAL (0x00000000U)
1642 #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_SE_MAX (0x00000001U)
1644 #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_SH_MASK (0x00000008U)
1645 #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_SH_SHIFT (3U)
1646 #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_SH_RESETVAL (0x00000000U)
1647 #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_SH_MAX (0x00000001U)
1649 #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_PE_MASK (0x00000004U)
1650 #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_PE_SHIFT (2U)
1651 #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_PE_RESETVAL (0x00000000U)
1652 #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_PE_MAX (0x00000001U)
1654 #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_PA_MASK (0x00000010U)
1655 #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_PA_SHIFT (4U)
1656 #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_PA_RESETVAL (0x00000000U)
1657 #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_PA_MAX (0x00000001U)
1659 #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_RA_MASK (0x00000040U)
1660 #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_RA_SHIFT (6U)
1661 #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_RA_RESETVAL (0x00000000U)
1662 #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_RA_MAX (0x00000001U)
1664 #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_TX_MASK (0x00000080U)
1665 #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_TX_SHIFT (7U)
1666 #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_TX_RESETVAL (0x00000000U)
1667 #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_TX_MAX (0x00000001U)
1669 #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_FE_MASK (0x00000001U)
1670 #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_FE_SHIFT (0U)
1671 #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_FE_RESETVAL (0x00000000U)
1672 #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_FE_MAX (0x00000001U)
1674 #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_RESETVAL (0x00000000U)
1676 /* GCREGMMUSTATUS */
1678 #define CSL_BB2D_GCREGMMUSTATUS_NA3_MASK (0xFFFFC000U)
1679 #define CSL_BB2D_GCREGMMUSTATUS_NA3_SHIFT (14U)
1680 #define CSL_BB2D_GCREGMMUSTATUS_NA3_RESETVAL (0x00000000U)
1681 #define CSL_BB2D_GCREGMMUSTATUS_NA3_MAX (0x0003ffffU)
1683 #define CSL_BB2D_GCREGMMUSTATUS_EXCEPTION0_MASK (0x00000003U)
1684 #define CSL_BB2D_GCREGMMUSTATUS_EXCEPTION0_SHIFT (0U)
1685 #define CSL_BB2D_GCREGMMUSTATUS_EXCEPTION0_RESETVAL (0x00000000U)
1686 #define CSL_BB2D_GCREGMMUSTATUS_EXCEPTION0_MAX (0x00000003U)
1688 #define CSL_BB2D_GCREGMMUSTATUS_NA2_MASK (0x00000C00U)
1689 #define CSL_BB2D_GCREGMMUSTATUS_NA2_SHIFT (10U)
1690 #define CSL_BB2D_GCREGMMUSTATUS_NA2_RESETVAL (0x00000000U)
1691 #define CSL_BB2D_GCREGMMUSTATUS_NA2_MAX (0x00000003U)
1693 #define CSL_BB2D_GCREGMMUSTATUS_NA0_MASK (0x0000000CU)
1694 #define CSL_BB2D_GCREGMMUSTATUS_NA0_SHIFT (2U)
1695 #define CSL_BB2D_GCREGMMUSTATUS_NA0_RESETVAL (0x00000000U)
1696 #define CSL_BB2D_GCREGMMUSTATUS_NA0_MAX (0x00000003U)
1698 #define CSL_BB2D_GCREGMMUSTATUS_EXCEPTION1_MASK (0x00000030U)
1699 #define CSL_BB2D_GCREGMMUSTATUS_EXCEPTION1_SHIFT (4U)
1700 #define CSL_BB2D_GCREGMMUSTATUS_EXCEPTION1_RESETVAL (0x00000000U)
1701 #define CSL_BB2D_GCREGMMUSTATUS_EXCEPTION1_MAX (0x00000003U)
1703 #define CSL_BB2D_GCREGMMUSTATUS_NA1_MASK (0x000000C0U)
1704 #define CSL_BB2D_GCREGMMUSTATUS_NA1_SHIFT (6U)
1705 #define CSL_BB2D_GCREGMMUSTATUS_NA1_RESETVAL (0x00000000U)
1706 #define CSL_BB2D_GCREGMMUSTATUS_NA1_MAX (0x00000003U)
1708 #define CSL_BB2D_GCREGMMUSTATUS_EXCEPTION2_MASK (0x00000300U)
1709 #define CSL_BB2D_GCREGMMUSTATUS_EXCEPTION2_SHIFT (8U)
1710 #define CSL_BB2D_GCREGMMUSTATUS_EXCEPTION2_RESETVAL (0x00000000U)
1711 #define CSL_BB2D_GCREGMMUSTATUS_EXCEPTION2_MAX (0x00000003U)
1713 #define CSL_BB2D_GCREGMMUSTATUS_EXCEPTION3_MASK (0x00003000U)
1714 #define CSL_BB2D_GCREGMMUSTATUS_EXCEPTION3_SHIFT (12U)
1715 #define CSL_BB2D_GCREGMMUSTATUS_EXCEPTION3_RESETVAL (0x00000000U)
1716 #define CSL_BB2D_GCREGMMUSTATUS_EXCEPTION3_MAX (0x00000003U)
1718 #define CSL_BB2D_GCREGMMUSTATUS_RESETVAL (0x00000000U)
1720 /* GCREGMMUCONTROL */
1722 #define CSL_BB2D_GCREGMMUCONTROL_ENABLE_MASK (0x00000001U)
1723 #define CSL_BB2D_GCREGMMUCONTROL_ENABLE_SHIFT (0U)
1724 #define CSL_BB2D_GCREGMMUCONTROL_ENABLE_RESETVAL (0x00000000U)
1725 #define CSL_BB2D_GCREGMMUCONTROL_ENABLE_MAX (0x00000001U)
1727 #define CSL_BB2D_GCREGMMUCONTROL_NA_MASK (0xFFFFFFFEU)
1728 #define CSL_BB2D_GCREGMMUCONTROL_NA_SHIFT (1U)
1729 #define CSL_BB2D_GCREGMMUCONTROL_NA_RESETVAL (0x00000000U)
1730 #define CSL_BB2D_GCREGMMUCONTROL_NA_MAX (0x7fffffffU)
1732 #define CSL_BB2D_GCREGMMUCONTROL_RESETVAL (0x00000000U)
1734 /* GCREGMMUEXCEPTION0 */
1736 #define CSL_BB2D_GCREGMMUEXCEPTION0_ADDRESS_MASK (0xFFFFFFFFU)
1737 #define CSL_BB2D_GCREGMMUEXCEPTION0_ADDRESS_SHIFT (0U)
1738 #define CSL_BB2D_GCREGMMUEXCEPTION0_ADDRESS_RESETVAL (0x00000000U)
1739 #define CSL_BB2D_GCREGMMUEXCEPTION0_ADDRESS_MAX (0xffffffffU)
1741 #define CSL_BB2D_GCREGMMUEXCEPTION0_RESETVAL (0x00000000U)
1743 /* GCREGMMUEXCEPTION1 */
1745 #define CSL_BB2D_GCREGMMUEXCEPTION1_ADDRESS_MASK (0xFFFFFFFFU)
1746 #define CSL_BB2D_GCREGMMUEXCEPTION1_ADDRESS_SHIFT (0U)
1747 #define CSL_BB2D_GCREGMMUEXCEPTION1_ADDRESS_RESETVAL (0x00000000U)
1748 #define CSL_BB2D_GCREGMMUEXCEPTION1_ADDRESS_MAX (0xffffffffU)
1750 #define CSL_BB2D_GCREGMMUEXCEPTION1_RESETVAL (0x00000000U)
1752 /* GCREGMMUEXCEPTION2 */
1754 #define CSL_BB2D_GCREGMMUEXCEPTION2_ADDRESS_MASK (0xFFFFFFFFU)
1755 #define CSL_BB2D_GCREGMMUEXCEPTION2_ADDRESS_SHIFT (0U)
1756 #define CSL_BB2D_GCREGMMUEXCEPTION2_ADDRESS_RESETVAL (0x00000000U)
1757 #define CSL_BB2D_GCREGMMUEXCEPTION2_ADDRESS_MAX (0xffffffffU)
1759 #define CSL_BB2D_GCREGMMUEXCEPTION2_RESETVAL (0x00000000U)
1761 /* GCREGMMUEXCEPTION3 */
1763 #define CSL_BB2D_GCREGMMUEXCEPTION3_ADDRESS_MASK (0xFFFFFFFFU)
1764 #define CSL_BB2D_GCREGMMUEXCEPTION3_ADDRESS_SHIFT (0U)
1765 #define CSL_BB2D_GCREGMMUEXCEPTION3_ADDRESS_RESETVAL (0x00000000U)
1766 #define CSL_BB2D_GCREGMMUEXCEPTION3_ADDRESS_MAX (0xffffffffU)
1768 #define CSL_BB2D_GCREGMMUEXCEPTION3_RESETVAL (0x00000000U)
1770 /* AQMEMORYDEBUG */
1772 #define CSL_BB2D_AQMEMORYDEBUG_ZCOMP_LIMIT_MASK (0x3F000000U)
1773 #define CSL_BB2D_AQMEMORYDEBUG_ZCOMP_LIMIT_SHIFT (24U)
1774 #define CSL_BB2D_AQMEMORYDEBUG_ZCOMP_LIMIT_RESETVAL (0x0000003cU)
1775 #define CSL_BB2D_AQMEMORYDEBUG_ZCOMP_LIMIT_MAX (0x0000003fU)
1777 #define CSL_BB2D_AQMEMORYDEBUG_DISABLE_WRITE_DATA_SPEEDUP_MASK (0x00800000U)
1778 #define CSL_BB2D_AQMEMORYDEBUG_DISABLE_WRITE_DATA_SPEEDUP_SHIFT (23U)
1779 #define CSL_BB2D_AQMEMORYDEBUG_DISABLE_WRITE_DATA_SPEEDUP_RESETVAL (0x00000000U)
1780 #define CSL_BB2D_AQMEMORYDEBUG_DISABLE_WRITE_DATA_SPEEDUP_MAX (0x00000001U)
1782 #define CSL_BB2D_AQMEMORYDEBUG_DISABLE_ZCOMPRESSION_MASK (0x00200000U)
1783 #define CSL_BB2D_AQMEMORYDEBUG_DISABLE_ZCOMPRESSION_SHIFT (21U)
1784 #define CSL_BB2D_AQMEMORYDEBUG_DISABLE_ZCOMPRESSION_RESETVAL (0x00000000U)
1785 #define CSL_BB2D_AQMEMORYDEBUG_DISABLE_ZCOMPRESSION_MAX (0x00000001U)
1787 #define CSL_BB2D_AQMEMORYDEBUG_INTERLEAVE_BUFFER_LOW_LATENCY_MODE_MASK (0x00020000U)
1788 #define CSL_BB2D_AQMEMORYDEBUG_INTERLEAVE_BUFFER_LOW_LATENCY_MODE_SHIFT (17U)
1789 #define CSL_BB2D_AQMEMORYDEBUG_INTERLEAVE_BUFFER_LOW_LATENCY_MODE_RESETVAL (0x00000000U)
1790 #define CSL_BB2D_AQMEMORYDEBUG_INTERLEAVE_BUFFER_LOW_LATENCY_MODE_MAX (0x00000001U)
1792 #define CSL_BB2D_AQMEMORYDEBUG_DONT_STALL_WRITES_TO_SAME_ADDRESS_MASK (0x40000000U)
1793 #define CSL_BB2D_AQMEMORYDEBUG_DONT_STALL_WRITES_TO_SAME_ADDRESS_SHIFT (30U)
1794 #define CSL_BB2D_AQMEMORYDEBUG_DONT_STALL_WRITES_TO_SAME_ADDRESS_RESETVAL (0x00000000U)
1795 #define CSL_BB2D_AQMEMORYDEBUG_DONT_STALL_WRITES_TO_SAME_ADDRESS_MAX (0x00000001U)
1797 #define CSL_BB2D_AQMEMORYDEBUG_DISABLE_MINI_MMU_CACHE_MASK (0x00004000U)
1798 #define CSL_BB2D_AQMEMORYDEBUG_DISABLE_MINI_MMU_CACHE_SHIFT (14U)
1799 #define CSL_BB2D_AQMEMORYDEBUG_DISABLE_MINI_MMU_CACHE_RESETVAL (0x00000000U)
1800 #define CSL_BB2D_AQMEMORYDEBUG_DISABLE_MINI_MMU_CACHE_MAX (0x00000001U)
1802 #define CSL_BB2D_AQMEMORYDEBUG_MAX_OUTSTANDING_READS_MASK (0x000000FFU)
1803 #define CSL_BB2D_AQMEMORYDEBUG_MAX_OUTSTANDING_READS_SHIFT (0U)
1804 #define CSL_BB2D_AQMEMORYDEBUG_MAX_OUTSTANDING_READS_RESETVAL (0x00000000U)
1805 #define CSL_BB2D_AQMEMORYDEBUG_MAX_OUTSTANDING_READS_MAX (0x000000ffU)
1807 #define CSL_BB2D_AQMEMORYDEBUG_DISABLE_STALL_READS_MASK (0x00400000U)
1808 #define CSL_BB2D_AQMEMORYDEBUG_DISABLE_STALL_READS_SHIFT (22U)
1809 #define CSL_BB2D_AQMEMORYDEBUG_DISABLE_STALL_READS_RESETVAL (0x00000000U)
1810 #define CSL_BB2D_AQMEMORYDEBUG_DISABLE_STALL_READS_MAX (0x00000001U)
1812 #define CSL_BB2D_AQMEMORYDEBUG_DISABLE_FAST_CLEAR_MASK (0x00100000U)
1813 #define CSL_BB2D_AQMEMORYDEBUG_DISABLE_FAST_CLEAR_SHIFT (20U)
1814 #define CSL_BB2D_AQMEMORYDEBUG_DISABLE_FAST_CLEAR_RESETVAL (0x00000000U)
1815 #define CSL_BB2D_AQMEMORYDEBUG_DISABLE_FAST_CLEAR_MAX (0x00000001U)
1817 #define CSL_BB2D_AQMEMORYDEBUG_LIMIT_CONTROL_MASK (0x00080000U)
1818 #define CSL_BB2D_AQMEMORYDEBUG_LIMIT_CONTROL_SHIFT (19U)
1819 #define CSL_BB2D_AQMEMORYDEBUG_LIMIT_CONTROL_RESETVAL (0x00000000U)
1820 #define CSL_BB2D_AQMEMORYDEBUG_LIMIT_CONTROL_MAX (0x00000001U)
1822 #define CSL_BB2D_AQMEMORYDEBUG_RESETVAL (0x3c000000U)
1824 /* AQREGISTERTIMINGCONTROL */
1826 #define CSL_BB2D_AQREGISTERTIMINGCONTROL_FAST_RTC_MASK (0x00030000U)
1827 #define CSL_BB2D_AQREGISTERTIMINGCONTROL_FAST_RTC_SHIFT (16U)
1828 #define CSL_BB2D_AQREGISTERTIMINGCONTROL_FAST_RTC_RESETVAL (0x00000003U)
1829 #define CSL_BB2D_AQREGISTERTIMINGCONTROL_FAST_RTC_MAX (0x00000003U)
1831 #define CSL_BB2D_AQREGISTERTIMINGCONTROL_FAST_WTC_MASK (0x000C0000U)
1832 #define CSL_BB2D_AQREGISTERTIMINGCONTROL_FAST_WTC_SHIFT (18U)
1833 #define CSL_BB2D_AQREGISTERTIMINGCONTROL_FAST_WTC_RESETVAL (0x00000000U)
1834 #define CSL_BB2D_AQREGISTERTIMINGCONTROL_FAST_WTC_MAX (0x00000003U)
1836 #define CSL_BB2D_AQREGISTERTIMINGCONTROL_FOR_RF2P_MASK (0x0000FF00U)
1837 #define CSL_BB2D_AQREGISTERTIMINGCONTROL_FOR_RF2P_SHIFT (8U)
1838 #define CSL_BB2D_AQREGISTERTIMINGCONTROL_FOR_RF2P_RESETVAL (0x00000000U)
1839 #define CSL_BB2D_AQREGISTERTIMINGCONTROL_FOR_RF2P_MAX (0x000000ffU)
1841 #define CSL_BB2D_AQREGISTERTIMINGCONTROL_FOR_RF1P_MASK (0x000000FFU)
1842 #define CSL_BB2D_AQREGISTERTIMINGCONTROL_FOR_RF1P_SHIFT (0U)
1843 #define CSL_BB2D_AQREGISTERTIMINGCONTROL_FOR_RF1P_RESETVAL (0x00000000U)
1844 #define CSL_BB2D_AQREGISTERTIMINGCONTROL_FOR_RF1P_MAX (0x000000ffU)
1846 #define CSL_BB2D_AQREGISTERTIMINGCONTROL_DEEP_SLEEP_MASK (0x00200000U)
1847 #define CSL_BB2D_AQREGISTERTIMINGCONTROL_DEEP_SLEEP_SHIFT (21U)
1848 #define CSL_BB2D_AQREGISTERTIMINGCONTROL_DEEP_SLEEP_RESETVAL (0x00000000U)
1849 #define CSL_BB2D_AQREGISTERTIMINGCONTROL_DEEP_SLEEP_MAX (0x00000001U)
1851 #define CSL_BB2D_AQREGISTERTIMINGCONTROL_LIGHT_SLEEP_MASK (0x00400000U)
1852 #define CSL_BB2D_AQREGISTERTIMINGCONTROL_LIGHT_SLEEP_SHIFT (22U)
1853 #define CSL_BB2D_AQREGISTERTIMINGCONTROL_LIGHT_SLEEP_RESETVAL (0x00000000U)
1854 #define CSL_BB2D_AQREGISTERTIMINGCONTROL_LIGHT_SLEEP_MAX (0x00000001U)
1856 #define CSL_BB2D_AQREGISTERTIMINGCONTROL_POWER_DOWN_MASK (0x00100000U)
1857 #define CSL_BB2D_AQREGISTERTIMINGCONTROL_POWER_DOWN_SHIFT (20U)
1858 #define CSL_BB2D_AQREGISTERTIMINGCONTROL_POWER_DOWN_RESETVAL (0x00000000U)
1859 #define CSL_BB2D_AQREGISTERTIMINGCONTROL_POWER_DOWN_MAX (0x00000001U)
1861 #define CSL_BB2D_AQREGISTERTIMINGCONTROL_RESETVAL (0x00030000U)
1863 /* GCMEMORYRESERVED */
1865 #define CSL_BB2D_GCMEMORYRESERVED_RESETVAL (0x00000000U)
1867 /* GCDISPLAYPRIORITY */
1869 #define CSL_BB2D_GCDISPLAYPRIORITY_HIGH_MASK (0x0000FF00U)
1870 #define CSL_BB2D_GCDISPLAYPRIORITY_HIGH_SHIFT (8U)
1871 #define CSL_BB2D_GCDISPLAYPRIORITY_HIGH_RESETVAL (0x00000001U)
1872 #define CSL_BB2D_GCDISPLAYPRIORITY_HIGH_MAX (0x000000ffU)
1874 #define CSL_BB2D_GCDISPLAYPRIORITY_PERIOD_MASK (0x000000FFU)
1875 #define CSL_BB2D_GCDISPLAYPRIORITY_PERIOD_SHIFT (0U)
1876 #define CSL_BB2D_GCDISPLAYPRIORITY_PERIOD_RESETVAL (0x00000002U)
1877 #define CSL_BB2D_GCDISPLAYPRIORITY_PERIOD_MAX (0x000000ffU)
1879 #define CSL_BB2D_GCDISPLAYPRIORITY_RESETVAL (0x00000102U)
1881 /* GCDBGCYCLECOUNTER */
1883 #define CSL_BB2D_GCDBGCYCLECOUNTER_COUNT_MASK (0xFFFFFFFFU)
1884 #define CSL_BB2D_GCDBGCYCLECOUNTER_COUNT_SHIFT (0U)
1885 #define CSL_BB2D_GCDBGCYCLECOUNTER_COUNT_RESETVAL (0x00001c5eU)
1886 #define CSL_BB2D_GCDBGCYCLECOUNTER_COUNT_MAX (0xffffffffU)
1888 #define CSL_BB2D_GCDBGCYCLECOUNTER_RESETVAL (0x00001c5eU)
1890 /* GCOUTSTANDINGREADS0 */
1892 #define CSL_BB2D_GCOUTSTANDINGREADS0_PEC_MASK (0x000000FFU)
1893 #define CSL_BB2D_GCOUTSTANDINGREADS0_PEC_SHIFT (0U)
1894 #define CSL_BB2D_GCOUTSTANDINGREADS0_PEC_RESETVAL (0x00000000U)
1895 #define CSL_BB2D_GCOUTSTANDINGREADS0_PEC_MAX (0x000000ffU)
1897 #define CSL_BB2D_GCOUTSTANDINGREADS0_PEZ_MASK (0x0000FF00U)
1898 #define CSL_BB2D_GCOUTSTANDINGREADS0_PEZ_SHIFT (8U)
1899 #define CSL_BB2D_GCOUTSTANDINGREADS0_PEZ_RESETVAL (0x00000000U)
1900 #define CSL_BB2D_GCOUTSTANDINGREADS0_PEZ_MAX (0x000000ffU)
1902 #define CSL_BB2D_GCOUTSTANDINGREADS0_FE_MASK (0x00FF0000U)
1903 #define CSL_BB2D_GCOUTSTANDINGREADS0_FE_SHIFT (16U)
1904 #define CSL_BB2D_GCOUTSTANDINGREADS0_FE_RESETVAL (0x00000000U)
1905 #define CSL_BB2D_GCOUTSTANDINGREADS0_FE_MAX (0x000000ffU)
1907 #define CSL_BB2D_GCOUTSTANDINGREADS0_MMU_MASK (0xFF000000U)
1908 #define CSL_BB2D_GCOUTSTANDINGREADS0_MMU_SHIFT (24U)
1909 #define CSL_BB2D_GCOUTSTANDINGREADS0_MMU_RESETVAL (0x00000000U)
1910 #define CSL_BB2D_GCOUTSTANDINGREADS0_MMU_MAX (0x000000ffU)
1912 #define CSL_BB2D_GCOUTSTANDINGREADS0_RESETVAL (0x00000000U)
1914 /* GCOUTSTANDINGREADS1 */
1916 #define CSL_BB2D_GCOUTSTANDINGREADS1_TOTAL_MASK (0xFF000000U)
1917 #define CSL_BB2D_GCOUTSTANDINGREADS1_TOTAL_SHIFT (24U)
1918 #define CSL_BB2D_GCOUTSTANDINGREADS1_TOTAL_RESETVAL (0x00000000U)
1919 #define CSL_BB2D_GCOUTSTANDINGREADS1_TOTAL_MAX (0x000000ffU)
1921 #define CSL_BB2D_GCOUTSTANDINGREADS1_FC_MASK (0x00FF0000U)
1922 #define CSL_BB2D_GCOUTSTANDINGREADS1_FC_SHIFT (16U)
1923 #define CSL_BB2D_GCOUTSTANDINGREADS1_FC_RESETVAL (0x00000000U)
1924 #define CSL_BB2D_GCOUTSTANDINGREADS1_FC_MAX (0x000000ffU)
1926 #define CSL_BB2D_GCOUTSTANDINGREADS1_TX_MASK (0x0000FF00U)
1927 #define CSL_BB2D_GCOUTSTANDINGREADS1_TX_SHIFT (8U)
1928 #define CSL_BB2D_GCOUTSTANDINGREADS1_TX_RESETVAL (0x00000000U)
1929 #define CSL_BB2D_GCOUTSTANDINGREADS1_TX_MAX (0x000000ffU)
1931 #define CSL_BB2D_GCOUTSTANDINGREADS1_RA_MASK (0x000000FFU)
1932 #define CSL_BB2D_GCOUTSTANDINGREADS1_RA_SHIFT (0U)
1933 #define CSL_BB2D_GCOUTSTANDINGREADS1_RA_RESETVAL (0x00000000U)
1934 #define CSL_BB2D_GCOUTSTANDINGREADS1_RA_MAX (0x000000ffU)
1936 #define CSL_BB2D_GCOUTSTANDINGREADS1_RESETVAL (0x00000000U)
1938 /* GCOUTSTANDINGWRITES */
1940 #define CSL_BB2D_GCOUTSTANDINGWRITES_TOTAL_MASK (0xFF000000U)
1941 #define CSL_BB2D_GCOUTSTANDINGWRITES_TOTAL_SHIFT (24U)
1942 #define CSL_BB2D_GCOUTSTANDINGWRITES_TOTAL_RESETVAL (0x00000000U)
1943 #define CSL_BB2D_GCOUTSTANDINGWRITES_TOTAL_MAX (0x000000ffU)
1945 #define CSL_BB2D_GCOUTSTANDINGWRITES_FC_MASK (0x00FF0000U)
1946 #define CSL_BB2D_GCOUTSTANDINGWRITES_FC_SHIFT (16U)
1947 #define CSL_BB2D_GCOUTSTANDINGWRITES_FC_RESETVAL (0x00000000U)
1948 #define CSL_BB2D_GCOUTSTANDINGWRITES_FC_MAX (0x000000ffU)
1950 #define CSL_BB2D_GCOUTSTANDINGWRITES_PEC_MASK (0x000000FFU)
1951 #define CSL_BB2D_GCOUTSTANDINGWRITES_PEC_SHIFT (0U)
1952 #define CSL_BB2D_GCOUTSTANDINGWRITES_PEC_RESETVAL (0x00000000U)
1953 #define CSL_BB2D_GCOUTSTANDINGWRITES_PEC_MAX (0x000000ffU)
1955 #define CSL_BB2D_GCOUTSTANDINGWRITES_PEZ_MASK (0x0000FF00U)
1956 #define CSL_BB2D_GCOUTSTANDINGWRITES_PEZ_SHIFT (8U)
1957 #define CSL_BB2D_GCOUTSTANDINGWRITES_PEZ_RESETVAL (0x00000000U)
1958 #define CSL_BB2D_GCOUTSTANDINGWRITES_PEZ_MAX (0x000000ffU)
1960 #define CSL_BB2D_GCOUTSTANDINGWRITES_RESETVAL (0x00000000U)
1962 /* GCDEBUGSIGNALSRA */
1964 #define CSL_BB2D_GCDEBUGSIGNALSRA_SIGNAL_MASK (0xFFFFFFFFU)
1965 #define CSL_BB2D_GCDEBUGSIGNALSRA_SIGNAL_SHIFT (0U)
1966 #define CSL_BB2D_GCDEBUGSIGNALSRA_SIGNAL_RESETVAL (0x00000000U)
1967 #define CSL_BB2D_GCDEBUGSIGNALSRA_SIGNAL_MAX (0xffffffffU)
1969 #define CSL_BB2D_GCDEBUGSIGNALSRA_RESETVAL (0x00000000U)
1971 /* GCDEBUGSIGNALSTX */
1973 #define CSL_BB2D_GCDEBUGSIGNALSTX_SIGNAL_MASK (0xFFFFFFFFU)
1974 #define CSL_BB2D_GCDEBUGSIGNALSTX_SIGNAL_SHIFT (0U)
1975 #define CSL_BB2D_GCDEBUGSIGNALSTX_SIGNAL_RESETVAL (0x00000000U)
1976 #define CSL_BB2D_GCDEBUGSIGNALSTX_SIGNAL_MAX (0xffffffffU)
1978 #define CSL_BB2D_GCDEBUGSIGNALSTX_RESETVAL (0x00000000U)
1980 /* GCDEBUGSIGNALSFE */
1982 #define CSL_BB2D_GCDEBUGSIGNALSFE_SIGNAL_MASK (0xFFFFFFFFU)
1983 #define CSL_BB2D_GCDEBUGSIGNALSFE_SIGNAL_SHIFT (0U)
1984 #define CSL_BB2D_GCDEBUGSIGNALSFE_SIGNAL_RESETVAL (0x00000000U)
1985 #define CSL_BB2D_GCDEBUGSIGNALSFE_SIGNAL_MAX (0xffffffffU)
1987 #define CSL_BB2D_GCDEBUGSIGNALSFE_RESETVAL (0x00000000U)
1989 /* GCDEBUGSIGNALSPE */
1991 #define CSL_BB2D_GCDEBUGSIGNALSPE_SIGNAL_MASK (0xFFFFFFFFU)
1992 #define CSL_BB2D_GCDEBUGSIGNALSPE_SIGNAL_SHIFT (0U)
1993 #define CSL_BB2D_GCDEBUGSIGNALSPE_SIGNAL_RESETVAL (0x00000000U)
1994 #define CSL_BB2D_GCDEBUGSIGNALSPE_SIGNAL_MAX (0xffffffffU)
1996 #define CSL_BB2D_GCDEBUGSIGNALSPE_RESETVAL (0x00000000U)
1998 /* GCDEBUGSIGNALSDE */
2000 #define CSL_BB2D_GCDEBUGSIGNALSDE_SIGNAL_MASK (0xFFFFFFFFU)
2001 #define CSL_BB2D_GCDEBUGSIGNALSDE_SIGNAL_SHIFT (0U)
2002 #define CSL_BB2D_GCDEBUGSIGNALSDE_SIGNAL_RESETVAL (0x00000000U)
2003 #define CSL_BB2D_GCDEBUGSIGNALSDE_SIGNAL_MAX (0xffffffffU)
2005 #define CSL_BB2D_GCDEBUGSIGNALSDE_RESETVAL (0x00000000U)
2007 /* GCDEBUGSIGNALSSH */
2009 #define CSL_BB2D_GCDEBUGSIGNALSSH_SIGNAL_MASK (0xFFFFFFFFU)
2010 #define CSL_BB2D_GCDEBUGSIGNALSSH_SIGNAL_SHIFT (0U)
2011 #define CSL_BB2D_GCDEBUGSIGNALSSH_SIGNAL_RESETVAL (0x00000000U)
2012 #define CSL_BB2D_GCDEBUGSIGNALSSH_SIGNAL_MAX (0xffffffffU)
2014 #define CSL_BB2D_GCDEBUGSIGNALSSH_RESETVAL (0x00000000U)
2016 /* GCDEBUGSIGNALSPA */
2018 #define CSL_BB2D_GCDEBUGSIGNALSPA_SIGNAL_MASK (0xFFFFFFFFU)
2019 #define CSL_BB2D_GCDEBUGSIGNALSPA_SIGNAL_SHIFT (0U)
2020 #define CSL_BB2D_GCDEBUGSIGNALSPA_SIGNAL_RESETVAL (0x00000000U)
2021 #define CSL_BB2D_GCDEBUGSIGNALSPA_SIGNAL_MAX (0xffffffffU)
2023 #define CSL_BB2D_GCDEBUGSIGNALSPA_RESETVAL (0x00000000U)
2025 /* GCDEBUGSIGNALSSE */
2027 #define CSL_BB2D_GCDEBUGSIGNALSSE_SIGNAL_MASK (0xFFFFFFFFU)
2028 #define CSL_BB2D_GCDEBUGSIGNALSSE_SIGNAL_SHIFT (0U)
2029 #define CSL_BB2D_GCDEBUGSIGNALSSE_SIGNAL_RESETVAL (0x00000000U)
2030 #define CSL_BB2D_GCDEBUGSIGNALSSE_SIGNAL_MAX (0xffffffffU)
2032 #define CSL_BB2D_GCDEBUGSIGNALSSE_RESETVAL (0x00000000U)
2034 /* GCDEBUGSIGNALSMC */
2036 #define CSL_BB2D_GCDEBUGSIGNALSMC_SIGNAL_MASK (0xFFFFFFFFU)
2037 #define CSL_BB2D_GCDEBUGSIGNALSMC_SIGNAL_SHIFT (0U)
2038 #define CSL_BB2D_GCDEBUGSIGNALSMC_SIGNAL_RESETVAL (0x00000000U)
2039 #define CSL_BB2D_GCDEBUGSIGNALSMC_SIGNAL_MAX (0xffffffffU)
2041 #define CSL_BB2D_GCDEBUGSIGNALSMC_RESETVAL (0x00000000U)
2043 /* GCDEBUGSIGNALSHI */
2045 #define CSL_BB2D_GCDEBUGSIGNALSHI_SIGNAL_MASK (0xFFFFFFFFU)
2046 #define CSL_BB2D_GCDEBUGSIGNALSHI_SIGNAL_SHIFT (0U)
2047 #define CSL_BB2D_GCDEBUGSIGNALSHI_SIGNAL_RESETVAL (0x00000000U)
2048 #define CSL_BB2D_GCDEBUGSIGNALSHI_SIGNAL_MAX (0xffffffffU)
2050 #define CSL_BB2D_GCDEBUGSIGNALSHI_RESETVAL (0x00000000U)
2052 /* GCDEBUGCONTROL0 */
2054 #define CSL_BB2D_GCDEBUGCONTROL0_SH_MASK (0x0F000000U)
2055 #define CSL_BB2D_GCDEBUGCONTROL0_SH_SHIFT (24U)
2056 #define CSL_BB2D_GCDEBUGCONTROL0_SH_RESETVAL (0x00000000U)
2057 #define CSL_BB2D_GCDEBUGCONTROL0_SH_MAX (0x0000000fU)
2059 #define CSL_BB2D_GCDEBUGCONTROL0_DE_MASK (0x00000F00U)
2060 #define CSL_BB2D_GCDEBUGCONTROL0_DE_SHIFT (8U)
2061 #define CSL_BB2D_GCDEBUGCONTROL0_DE_RESETVAL (0x00000000U)
2062 #define CSL_BB2D_GCDEBUGCONTROL0_DE_MAX (0x0000000fU)
2064 #define CSL_BB2D_GCDEBUGCONTROL0_PE_MASK (0x000F0000U)
2065 #define CSL_BB2D_GCDEBUGCONTROL0_PE_SHIFT (16U)
2066 #define CSL_BB2D_GCDEBUGCONTROL0_PE_RESETVAL (0x00000000U)
2067 #define CSL_BB2D_GCDEBUGCONTROL0_PE_MAX (0x0000000fU)
2069 #define CSL_BB2D_GCDEBUGCONTROL0_FE_MASK (0x0000000FU)
2070 #define CSL_BB2D_GCDEBUGCONTROL0_FE_SHIFT (0U)
2071 #define CSL_BB2D_GCDEBUGCONTROL0_FE_RESETVAL (0x00000000U)
2072 #define CSL_BB2D_GCDEBUGCONTROL0_FE_MAX (0x0000000fU)
2074 #define CSL_BB2D_GCDEBUGCONTROL0_RESETVAL (0x00000000U)
2076 /* GCDEBUGCONTROL1 */
2078 #define CSL_BB2D_GCDEBUGCONTROL1_SE_MASK (0x00000F00U)
2079 #define CSL_BB2D_GCDEBUGCONTROL1_SE_SHIFT (8U)
2080 #define CSL_BB2D_GCDEBUGCONTROL1_SE_RESETVAL (0x00000000U)
2081 #define CSL_BB2D_GCDEBUGCONTROL1_SE_MAX (0x0000000fU)
2083 #define CSL_BB2D_GCDEBUGCONTROL1_TX_MASK (0x0F000000U)
2084 #define CSL_BB2D_GCDEBUGCONTROL1_TX_SHIFT (24U)
2085 #define CSL_BB2D_GCDEBUGCONTROL1_TX_RESETVAL (0x00000000U)
2086 #define CSL_BB2D_GCDEBUGCONTROL1_TX_MAX (0x0000000fU)
2088 #define CSL_BB2D_GCDEBUGCONTROL1_PA_MASK (0x0000000FU)
2089 #define CSL_BB2D_GCDEBUGCONTROL1_PA_SHIFT (0U)
2090 #define CSL_BB2D_GCDEBUGCONTROL1_PA_RESETVAL (0x00000000U)
2091 #define CSL_BB2D_GCDEBUGCONTROL1_PA_MAX (0x0000000fU)
2093 #define CSL_BB2D_GCDEBUGCONTROL1_RA_MASK (0x000F0000U)
2094 #define CSL_BB2D_GCDEBUGCONTROL1_RA_SHIFT (16U)
2095 #define CSL_BB2D_GCDEBUGCONTROL1_RA_RESETVAL (0x00000000U)
2096 #define CSL_BB2D_GCDEBUGCONTROL1_RA_MAX (0x0000000fU)
2098 #define CSL_BB2D_GCDEBUGCONTROL1_RESETVAL (0x00000000U)
2100 /* GCDEBUGCONTROL2 */
2102 #define CSL_BB2D_GCDEBUGCONTROL2_HI_MASK (0x00000F00U)
2103 #define CSL_BB2D_GCDEBUGCONTROL2_HI_SHIFT (8U)
2104 #define CSL_BB2D_GCDEBUGCONTROL2_HI_RESETVAL (0x00000000U)
2105 #define CSL_BB2D_GCDEBUGCONTROL2_HI_MAX (0x0000000fU)
2107 #define CSL_BB2D_GCDEBUGCONTROL2_MC_MASK (0x0000000FU)
2108 #define CSL_BB2D_GCDEBUGCONTROL2_MC_SHIFT (0U)
2109 #define CSL_BB2D_GCDEBUGCONTROL2_MC_RESETVAL (0x00000000U)
2110 #define CSL_BB2D_GCDEBUGCONTROL2_MC_MAX (0x0000000fU)
2112 #define CSL_BB2D_GCDEBUGCONTROL2_RESETVAL (0x00000000U)
2114 /* GCDEBUGCONTROL3 */
2116 #define CSL_BB2D_GCDEBUGCONTROL3_PROBE0_MASK (0x0000000FU)
2117 #define CSL_BB2D_GCDEBUGCONTROL3_PROBE0_SHIFT (0U)
2118 #define CSL_BB2D_GCDEBUGCONTROL3_PROBE0_RESETVAL (0x00000000U)
2119 #define CSL_BB2D_GCDEBUGCONTROL3_PROBE0_MAX (0x0000000fU)
2121 #define CSL_BB2D_GCDEBUGCONTROL3_PROBE1_MASK (0x00000F00U)
2122 #define CSL_BB2D_GCDEBUGCONTROL3_PROBE1_SHIFT (8U)
2123 #define CSL_BB2D_GCDEBUGCONTROL3_PROBE1_RESETVAL (0x00000000U)
2124 #define CSL_BB2D_GCDEBUGCONTROL3_PROBE1_MAX (0x0000000fU)
2126 #define CSL_BB2D_GCDEBUGCONTROL3_RESETVAL (0x00000000U)
2128 /* GCBUSCONTROL */
2130 #define CSL_BB2D_GCBUSCONTROL_FCC_MASK (0x00000100U)
2131 #define CSL_BB2D_GCBUSCONTROL_FCC_SHIFT (8U)
2132 #define CSL_BB2D_GCBUSCONTROL_FCC_RESETVAL (0x00000000U)
2133 #define CSL_BB2D_GCBUSCONTROL_FCC_MAX (0x00000001U)
2135 #define CSL_BB2D_GCBUSCONTROL_FC_MASK (0x00000040U)
2136 #define CSL_BB2D_GCBUSCONTROL_FC_SHIFT (6U)
2137 #define CSL_BB2D_GCBUSCONTROL_FC_RESETVAL (0x00000000U)
2138 #define CSL_BB2D_GCBUSCONTROL_FC_MAX (0x00000001U)
2140 #define CSL_BB2D_GCBUSCONTROL_PEZ_MASK (0x00000002U)
2141 #define CSL_BB2D_GCBUSCONTROL_PEZ_SHIFT (1U)
2142 #define CSL_BB2D_GCBUSCONTROL_PEZ_RESETVAL (0x00000000U)
2143 #define CSL_BB2D_GCBUSCONTROL_PEZ_MAX (0x00000001U)
2145 #define CSL_BB2D_GCBUSCONTROL_TX_MASK (0x00000080U)
2146 #define CSL_BB2D_GCBUSCONTROL_TX_SHIFT (7U)
2147 #define CSL_BB2D_GCBUSCONTROL_TX_RESETVAL (0x00000001U)
2148 #define CSL_BB2D_GCBUSCONTROL_TX_MAX (0x00000001U)
2150 #define CSL_BB2D_GCBUSCONTROL_MMU_MASK (0x00000020U)
2151 #define CSL_BB2D_GCBUSCONTROL_MMU_SHIFT (5U)
2152 #define CSL_BB2D_GCBUSCONTROL_MMU_RESETVAL (0x00000001U)
2153 #define CSL_BB2D_GCBUSCONTROL_MMU_MAX (0x00000001U)
2155 #define CSL_BB2D_GCBUSCONTROL_PEC_MASK (0x00000001U)
2156 #define CSL_BB2D_GCBUSCONTROL_PEC_SHIFT (0U)
2157 #define CSL_BB2D_GCBUSCONTROL_PEC_RESETVAL (0x00000000U)
2158 #define CSL_BB2D_GCBUSCONTROL_PEC_MAX (0x00000001U)
2160 #define CSL_BB2D_GCBUSCONTROL_FE_MASK (0x00000008U)
2161 #define CSL_BB2D_GCBUSCONTROL_FE_SHIFT (3U)
2162 #define CSL_BB2D_GCBUSCONTROL_FE_RESETVAL (0x00000001U)
2163 #define CSL_BB2D_GCBUSCONTROL_FE_MAX (0x00000001U)
2165 #define CSL_BB2D_GCBUSCONTROL_RESETVAL (0x000000a8U)
2167 /* GCREGENDIANNESS0 */
2169 #define CSL_BB2D_GCREGENDIANNESS0_WORD_SWAP_MASK (0xFFFFFFFFU)
2170 #define CSL_BB2D_GCREGENDIANNESS0_WORD_SWAP_SHIFT (0U)
2171 #define CSL_BB2D_GCREGENDIANNESS0_WORD_SWAP_RESETVAL (0x00000000U)
2172 #define CSL_BB2D_GCREGENDIANNESS0_WORD_SWAP_MAX (0xffffffffU)
2174 #define CSL_BB2D_GCREGENDIANNESS0_RESETVAL (0x00000000U)
2176 /* GCREGENDIANNESS1 */
2178 #define CSL_BB2D_GCREGENDIANNESS1_BYTE_SWAP_MASK (0xFFFFFFFFU)
2179 #define CSL_BB2D_GCREGENDIANNESS1_BYTE_SWAP_SHIFT (0U)
2180 #define CSL_BB2D_GCREGENDIANNESS1_BYTE_SWAP_RESETVAL (0x00000000U)
2181 #define CSL_BB2D_GCREGENDIANNESS1_BYTE_SWAP_MAX (0xffffffffU)
2183 #define CSL_BB2D_GCREGENDIANNESS1_RESETVAL (0x00000000U)
2185 /* GCREGENDIANNESS2 */
2187 #define CSL_BB2D_GCREGENDIANNESS2_BIT_SWAP_MASK (0xFFFFFFFFU)
2188 #define CSL_BB2D_GCREGENDIANNESS2_BIT_SWAP_SHIFT (0U)
2189 #define CSL_BB2D_GCREGENDIANNESS2_BIT_SWAP_RESETVAL (0x00000000U)
2190 #define CSL_BB2D_GCREGENDIANNESS2_BIT_SWAP_MAX (0xffffffffU)
2192 #define CSL_BB2D_GCREGENDIANNESS2_RESETVAL (0x00000000U)
2194 /* GCREGDRAWPRIMITIVESTARTTIMESTAMP */
2196 #define CSL_BB2D_GCREGDRAWPRIMITIVESTARTTIMESTAMP_START_TIME_MASK (0xFFFFFFFFU)
2197 #define CSL_BB2D_GCREGDRAWPRIMITIVESTARTTIMESTAMP_START_TIME_SHIFT (0U)
2198 #define CSL_BB2D_GCREGDRAWPRIMITIVESTARTTIMESTAMP_START_TIME_RESETVAL (0x00000000U)
2199 #define CSL_BB2D_GCREGDRAWPRIMITIVESTARTTIMESTAMP_START_TIME_MAX (0xffffffffU)
2201 #define CSL_BB2D_GCREGDRAWPRIMITIVESTARTTIMESTAMP_RESETVAL (0x00000000U)
2203 /* GCREGDRAWPRIMITIVEENDTIMESTAMP */
2205 #define CSL_BB2D_GCREGDRAWPRIMITIVEENDTIMESTAMP_END_TIME_MASK (0xFFFFFFFFU)
2206 #define CSL_BB2D_GCREGDRAWPRIMITIVEENDTIMESTAMP_END_TIME_SHIFT (0U)
2207 #define CSL_BB2D_GCREGDRAWPRIMITIVEENDTIMESTAMP_END_TIME_RESETVAL (0x00000000U)
2208 #define CSL_BB2D_GCREGDRAWPRIMITIVEENDTIMESTAMP_END_TIME_MAX (0xffffffffU)
2210 #define CSL_BB2D_GCREGDRAWPRIMITIVEENDTIMESTAMP_RESETVAL (0x00000000U)
2212 /* GCREGCONTROL0 */
2214 #define CSL_BB2D_GCREGCONTROL0_ENABLE_READ_MERGE_MASK (0x00000001U)
2215 #define CSL_BB2D_GCREGCONTROL0_ENABLE_READ_MERGE_SHIFT (0U)
2216 #define CSL_BB2D_GCREGCONTROL0_ENABLE_READ_MERGE_RESETVAL (0x00000001U)
2217 #define CSL_BB2D_GCREGCONTROL0_ENABLE_READ_MERGE_MAX (0x00000001U)
2219 #define CSL_BB2D_GCREGCONTROL0_OUTSTANDING_READS_PER_CHANNEL_MASK (0x03FF0000U)
2220 #define CSL_BB2D_GCREGCONTROL0_OUTSTANDING_READS_PER_CHANNEL_SHIFT (16U)
2221 #define CSL_BB2D_GCREGCONTROL0_OUTSTANDING_READS_PER_CHANNEL_RESETVAL (0x00000080U)
2222 #define CSL_BB2D_GCREGCONTROL0_OUTSTANDING_READS_PER_CHANNEL_MAX (0x000003ffU)
2224 #define CSL_BB2D_GCREGCONTROL0_MISC0_MASK (0x0000FFF0U)
2225 #define CSL_BB2D_GCREGCONTROL0_MISC0_SHIFT (4U)
2226 #define CSL_BB2D_GCREGCONTROL0_MISC0_RESETVAL (0x00000000U)
2227 #define CSL_BB2D_GCREGCONTROL0_MISC0_MAX (0x00000fffU)
2229 #define CSL_BB2D_GCREGCONTROL0_ENABLE_WRITE_MERGE_MASK (0x00000004U)
2230 #define CSL_BB2D_GCREGCONTROL0_ENABLE_WRITE_MERGE_SHIFT (2U)
2231 #define CSL_BB2D_GCREGCONTROL0_ENABLE_WRITE_MERGE_RESETVAL (0x00000001U)
2232 #define CSL_BB2D_GCREGCONTROL0_ENABLE_WRITE_MERGE_MAX (0x00000001U)
2234 #define CSL_BB2D_GCREGCONTROL0_MISC1_MASK (0xFC000000U)
2235 #define CSL_BB2D_GCREGCONTROL0_MISC1_SHIFT (26U)
2236 #define CSL_BB2D_GCREGCONTROL0_MISC1_RESETVAL (0x00000000U)
2237 #define CSL_BB2D_GCREGCONTROL0_MISC1_MAX (0x0000003fU)
2239 #define CSL_BB2D_GCREGCONTROL0_ENABLE_UNALIGNED_MERGE_MASK (0x00000002U)
2240 #define CSL_BB2D_GCREGCONTROL0_ENABLE_UNALIGNED_MERGE_SHIFT (1U)
2241 #define CSL_BB2D_GCREGCONTROL0_ENABLE_UNALIGNED_MERGE_RESETVAL (0x00000000U)
2242 #define CSL_BB2D_GCREGCONTROL0_ENABLE_UNALIGNED_MERGE_MAX (0x00000001U)
2244 #define CSL_BB2D_GCREGCONTROL0_ENABLE_UNALIGNED_WRITE_MERGE_MASK (0x00000008U)
2245 #define CSL_BB2D_GCREGCONTROL0_ENABLE_UNALIGNED_WRITE_MERGE_SHIFT (3U)
2246 #define CSL_BB2D_GCREGCONTROL0_ENABLE_UNALIGNED_WRITE_MERGE_RESETVAL (0x00000000U)
2247 #define CSL_BB2D_GCREGCONTROL0_ENABLE_UNALIGNED_WRITE_MERGE_MAX (0x00000001U)
2249 #define CSL_BB2D_GCREGCONTROL0_RESETVAL (0x00800005U)
2251 /* AQCMDBUFFERADDR */
2253 #define CSL_BB2D_AQCMDBUFFERADDR_TYPE_MASK (0x80000000U)
2254 #define CSL_BB2D_AQCMDBUFFERADDR_TYPE_SHIFT (31U)
2255 #define CSL_BB2D_AQCMDBUFFERADDR_TYPE_RESETVAL (0x00000000U)
2256 #define CSL_BB2D_AQCMDBUFFERADDR_TYPE_MAX (0x00000001U)
2258 #define CSL_BB2D_AQCMDBUFFERADDR_ADDRESS_MASK (0x7FFFFFFFU)
2259 #define CSL_BB2D_AQCMDBUFFERADDR_ADDRESS_SHIFT (0U)
2260 #define CSL_BB2D_AQCMDBUFFERADDR_ADDRESS_RESETVAL (0x00000000U)
2261 #define CSL_BB2D_AQCMDBUFFERADDR_ADDRESS_MAX (0x7fffffffU)
2263 #define CSL_BB2D_AQCMDBUFFERADDR_RESETVAL (0x00000000U)
2265 /* AQCMDBUFFERCTRL */
2267 #define CSL_BB2D_AQCMDBUFFERCTRL_PREFETCH_MASK (0x0000FFFFU)
2268 #define CSL_BB2D_AQCMDBUFFERCTRL_PREFETCH_SHIFT (0U)
2269 #define CSL_BB2D_AQCMDBUFFERCTRL_PREFETCH_RESETVAL (0x00000000U)
2270 #define CSL_BB2D_AQCMDBUFFERCTRL_PREFETCH_MAX (0x0000ffffU)
2272 #define CSL_BB2D_AQCMDBUFFERCTRL_ENDIAN_CONTROL_MASK (0x00300000U)
2273 #define CSL_BB2D_AQCMDBUFFERCTRL_ENDIAN_CONTROL_SHIFT (20U)
2274 #define CSL_BB2D_AQCMDBUFFERCTRL_ENDIAN_CONTROL_RESETVAL (0x00000000U)
2275 #define CSL_BB2D_AQCMDBUFFERCTRL_ENDIAN_CONTROL_MAX (0x00000003U)
2277 #define CSL_BB2D_AQCMDBUFFERCTRL_ENABLE_MASK (0x00010000U)
2278 #define CSL_BB2D_AQCMDBUFFERCTRL_ENABLE_SHIFT (16U)
2279 #define CSL_BB2D_AQCMDBUFFERCTRL_ENABLE_RESETVAL (0x00000000U)
2280 #define CSL_BB2D_AQCMDBUFFERCTRL_ENABLE_MAX (0x00000001U)
2282 #define CSL_BB2D_AQCMDBUFFERCTRL_NA1_MASK (0xFFC00000U)
2283 #define CSL_BB2D_AQCMDBUFFERCTRL_NA1_SHIFT (22U)
2284 #define CSL_BB2D_AQCMDBUFFERCTRL_NA1_RESETVAL (0x00000000U)
2285 #define CSL_BB2D_AQCMDBUFFERCTRL_NA1_MAX (0x000003ffU)
2287 #define CSL_BB2D_AQCMDBUFFERCTRL_NA_MASK (0x000E0000U)
2288 #define CSL_BB2D_AQCMDBUFFERCTRL_NA_SHIFT (17U)
2289 #define CSL_BB2D_AQCMDBUFFERCTRL_NA_RESETVAL (0x00000000U)
2290 #define CSL_BB2D_AQCMDBUFFERCTRL_NA_MAX (0x00000007U)
2292 #define CSL_BB2D_AQCMDBUFFERCTRL_RESETVAL (0x00000000U)
2294 /* AQFESTATUS */
2296 #define CSL_BB2D_AQFESTATUS_COMMAND_DATA_MASK (0x00000001U)
2297 #define CSL_BB2D_AQFESTATUS_COMMAND_DATA_SHIFT (0U)
2298 #define CSL_BB2D_AQFESTATUS_COMMAND_DATA_RESETVAL (0x00000000U)
2299 #define CSL_BB2D_AQFESTATUS_COMMAND_DATA_MAX (0x00000001U)
2301 #define CSL_BB2D_AQFESTATUS_RESETVAL (0x00000000U)
2303 /* AQFEDEBUGSTATE */
2305 #define CSL_BB2D_AQFEDEBUGSTATE_CMD_FETCH_STATE_MASK (0x00000C00U)
2306 #define CSL_BB2D_AQFEDEBUGSTATE_CMD_FETCH_STATE_SHIFT (10U)
2307 #define CSL_BB2D_AQFEDEBUGSTATE_CMD_FETCH_STATE_RESETVAL (0x00000000U)
2308 #define CSL_BB2D_AQFEDEBUGSTATE_CMD_FETCH_STATE_MAX (0x00000003U)
2310 #define CSL_BB2D_AQFEDEBUGSTATE_CMD_STATE_MASK (0x0000001FU)
2311 #define CSL_BB2D_AQFEDEBUGSTATE_CMD_STATE_SHIFT (0U)
2312 #define CSL_BB2D_AQFEDEBUGSTATE_CMD_STATE_RESETVAL (0x00000000U)
2313 #define CSL_BB2D_AQFEDEBUGSTATE_CMD_STATE_MAX (0x0000001fU)
2315 #define CSL_BB2D_AQFEDEBUGSTATE_CMD_DMA_STATE_MASK (0x00000300U)
2316 #define CSL_BB2D_AQFEDEBUGSTATE_CMD_DMA_STATE_SHIFT (8U)
2317 #define CSL_BB2D_AQFEDEBUGSTATE_CMD_DMA_STATE_RESETVAL (0x00000000U)
2318 #define CSL_BB2D_AQFEDEBUGSTATE_CMD_DMA_STATE_MAX (0x00000003U)
2320 #define CSL_BB2D_AQFEDEBUGSTATE_VE_REQ_STATE_MASK (0x00030000U)
2321 #define CSL_BB2D_AQFEDEBUGSTATE_VE_REQ_STATE_SHIFT (16U)
2322 #define CSL_BB2D_AQFEDEBUGSTATE_VE_REQ_STATE_RESETVAL (0x00000000U)
2323 #define CSL_BB2D_AQFEDEBUGSTATE_VE_REQ_STATE_MAX (0x00000003U)
2325 #define CSL_BB2D_AQFEDEBUGSTATE_CAL_STATE_MASK (0x0000C000U)
2326 #define CSL_BB2D_AQFEDEBUGSTATE_CAL_STATE_SHIFT (14U)
2327 #define CSL_BB2D_AQFEDEBUGSTATE_CAL_STATE_RESETVAL (0x00000000U)
2328 #define CSL_BB2D_AQFEDEBUGSTATE_CAL_STATE_MAX (0x00000003U)
2330 #define CSL_BB2D_AQFEDEBUGSTATE_REQ_DMA_STATE_MASK (0x00003000U)
2331 #define CSL_BB2D_AQFEDEBUGSTATE_REQ_DMA_STATE_SHIFT (12U)
2332 #define CSL_BB2D_AQFEDEBUGSTATE_REQ_DMA_STATE_RESETVAL (0x00000000U)
2333 #define CSL_BB2D_AQFEDEBUGSTATE_REQ_DMA_STATE_MAX (0x00000003U)
2335 #define CSL_BB2D_AQFEDEBUGSTATE_RESETVAL (0x00000000U)
2337 /* AQFEDEBUGCURCMDADR */
2339 #define CSL_BB2D_AQFEDEBUGCURCMDADR_CUR_CMD_ADR_MASK (0xFFFFFFF8U)
2340 #define CSL_BB2D_AQFEDEBUGCURCMDADR_CUR_CMD_ADR_SHIFT (3U)
2341 #define CSL_BB2D_AQFEDEBUGCURCMDADR_CUR_CMD_ADR_RESETVAL (0x00000000U)
2342 #define CSL_BB2D_AQFEDEBUGCURCMDADR_CUR_CMD_ADR_MAX (0x1fffffffU)
2344 #define CSL_BB2D_AQFEDEBUGCURCMDADR_RESETVAL (0x00000000U)
2346 /* AQFEDEBUGCMDLOWREG */
2348 #define CSL_BB2D_AQFEDEBUGCMDLOWREG_CMD_LOW_REG_MASK (0xFFFFFFFFU)
2349 #define CSL_BB2D_AQFEDEBUGCMDLOWREG_CMD_LOW_REG_SHIFT (0U)
2350 #define CSL_BB2D_AQFEDEBUGCMDLOWREG_CMD_LOW_REG_RESETVAL (0x00000000U)
2351 #define CSL_BB2D_AQFEDEBUGCMDLOWREG_CMD_LOW_REG_MAX (0xffffffffU)
2353 #define CSL_BB2D_AQFEDEBUGCMDLOWREG_RESETVAL (0x00000000U)
2355 /* AQFEDEBUGCMDHIREG */
2357 #define CSL_BB2D_AQFEDEBUGCMDHIREG_CMD_HI_REG_MASK (0xFFFFFFFFU)
2358 #define CSL_BB2D_AQFEDEBUGCMDHIREG_CMD_HI_REG_SHIFT (0U)
2359 #define CSL_BB2D_AQFEDEBUGCMDHIREG_CMD_HI_REG_RESETVAL (0x00000000U)
2360 #define CSL_BB2D_AQFEDEBUGCMDHIREG_CMD_HI_REG_MAX (0xffffffffU)
2362 #define CSL_BB2D_AQFEDEBUGCMDHIREG_RESETVAL (0x00000000U)
2364 #ifdef __cplusplus
2365 }
2366 #endif
2367 #endif