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8 1 <span class="comment">/*
9 </span> 2 <span class="comment"> * Copyright (c) 2013, Texas Instruments Incorporated
10 </span> 3 <span class="comment"> * All rights reserved.
11 </span> 4 <span class="comment"> *
12 </span> 5 <span class="comment"> * Redistribution and use in source and binary forms, with or without
13 </span> 6 <span class="comment"> * modification, are permitted provided that the following conditions
14 </span> 7 <span class="comment"> * are met:
15 </span> 8 <span class="comment"> *
16 </span> 9 <span class="comment"> * * Redistributions of source code must retain the above copyright
17 </span> 10 <span class="comment"> * notice, this list of conditions and the following disclaimer.
18 </span> 11 <span class="comment"> *
19 </span> 12 <span class="comment"> * * Redistributions in binary form must reproduce the above copyright
20 </span> 13 <span class="comment"> * notice, this list of conditions and the following disclaimer in the
21 </span> 14 <span class="comment"> * documentation and/or other materials provided with the distribution.
22 </span> 15 <span class="comment"> *
23 </span> 16 <span class="comment"> * * Neither the name of Texas Instruments Incorporated nor the names of
24 </span> 17 <span class="comment"> * its contributors may be used to endorse or promote products derived
25 </span> 18 <span class="comment"> * from this software without specific prior written permission.
26 </span> 19 <span class="comment"> *
27 </span> 20 <span class="comment"> * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
28 </span> 21 <span class="comment"> * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
29 </span> 22 <span class="comment"> * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 </span> 23 <span class="comment"> * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
31 </span> 24 <span class="comment"> * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
32 </span> 25 <span class="comment"> * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
33 </span> 26 <span class="comment"> * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
34 </span> 27 <span class="comment"> * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
35 </span> 28 <span class="comment"> * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
36 </span> 29 <span class="comment"> * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
37 </span> 30 <span class="comment"> * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38 </span> 31 <span class="comment"> *
39 </span> 32 <span class="comment"> */</span>
40 33 <span class="comment">/*
41 </span> 34 <span class="comment"> * ======== Interrupt.xdc ========
42 </span> 35 <span class="comment"> */</span>
43 36
44 37 <span class="xdoc">/*!
45 </span> 38 <span class="xdoc"> * ======== Interrupt ========
46 </span> 39 <span class="xdoc"> * TCI6614 IPC interrupt manager
47 </span> 40 <span class="xdoc"> */</span>
48 41
49 42 @ModuleStartup
50 43
51 44 <span class=key>module</span> Interrupt <span class=key>inherits</span> ti.sdo.ipc.notifyDrivers.IInterrupt
52 45 {
53 46
54 47 <span class=key>const</span> UInt INVALIDPAYLOAD = 0xFFFFFFFF;
55 48
56 49 <span class="xdoc">/*!
57 </span> 50 <span class="xdoc"> * ======== enableKick ========
58 </span> 51 <span class="xdoc"> * If set to 'true' IPC will unlock the KICK registers on C66x devices
59 </span> 52 <span class="xdoc"> *
60 </span> 53 <span class="xdoc"> * IPC unlocks the KICK registers on the local core if (and only if) all
61 </span> 54 <span class="xdoc"> * the following conditions are met:
62 </span> 55 <span class="xdoc"> * - This configuration is set to 'true'
63 </span> 56 <span class="xdoc"> * - SharedRegion #0 is valid and the local core is its owner
64 </span> 57 <span class="xdoc"> * - SharedRegion #0 is not valid and the local core is CORE0
65 </span> 58 <span class="xdoc"> */</span>
66 59 <span class=key>config</span> Bool enableKick = <span class=key>true</span>;
67 60
68 61 <span class="xdoc">/*!
69 </span> 62 <span class="xdoc"> * ======== Interrupt_intClearAll ========
70 </span> 63 <span class="xdoc"> * Clear all pending interrupts.
71 </span> 64 <span class="xdoc"> */</span>
72 65 Void intClearAll();
73 66
74 67 <span class="xdoc">/*!
75 </span> 68 <span class="xdoc"> * ======== Interrupt_checkAndClear =======
76 </span> 69 <span class="xdoc"> * Check to see that interrupt is set, if so clear it and return 1.
77 </span> 70 <span class="xdoc"> */</span>
78 71 UInt checkAndClear(UInt16 remoteProcId, IntInfo *intInfo);
79 72
80 73 <span class=key>internal</span>:
81 74
82 75 <span class="xdoc">/*! Source ID bit position for CORE0 */</span>
83 76 <span class=key>const</span> UInt SRCS_BITPOS_CORE0 = 4;
84 77
85 78 <span class="xdoc">/*! Source ID bit position for HOST */</span>
86 79 <span class=key>const</span> UInt SRCS_BITPOS_HOST = 31;
87 80
88 81 <span class="xdoc">/*! Ptr to the IPC Generation Registers */</span>
89 82 <span class=key>config</span> Ptr IPCGR0;
90 83
91 84 <span class="xdoc">/*! Ptr to the IPC Acknowledgment Registers */</span>
92 85 <span class=key>config</span> Ptr IPCAR0;
93 86
94 87 <span class="xdoc">/*! Ptr to the IPC Host Generation Host Register */</span>
95 88 <span class=key>config</span> Ptr IPCGRH;
96 89
97 90 <span class="xdoc">/*! Ptr to the IPC Acknowledgement Host Register */</span>
98 91 <span class=key>config</span> Ptr IPCARH;
99 92
100 93 <span class="xdoc">/*! Ptr to the KICK0 Bootcfg Registers */</span>
101 94 <span class=key>config</span> Ptr KICK0;
102 95
103 96 <span class="xdoc">/*! Ptr to the KICK1 Bootcfg Registers */</span>
104 97 <span class=key>config</span> Ptr KICK1;
105 98
106 99 <span class="xdoc">/*! Inter-processor interrupt id (varies per device) */</span>
107 100 <span class=key>config</span> UInt INTERDSPINT;
108 101
109 102 <span class="xdoc">/*! Vector interrupt id for Hwi_create */</span>
110 103 <span class=key>config</span> UInt DSPINT;
111 104
112 105 <span class="xdoc">/*! Function table */</span>
113 106 <span class=key>struct</span> FxnTable {
114 107 Fxn func;
115 108 UArg arg;
116 109 }
117 110
118 111
119 112 <span class="xdoc">/*!
120 </span> 113 <span class="xdoc"> * ======== isr ========
121 </span> 114 <span class="xdoc"> * Stub function plugged as interrupt handler
122 </span> 115 <span class="xdoc"> */</span>
123 116 Void isr(UArg arg);
124 117
125 118 <span class=key>struct</span> Module_State {
126 119 FxnTable fxnTable[]; <span class="comment">/* indexed by Source ID bit pos */</span>
127 120 UInt numPlugged; <span class="comment">/* # of times the interrupt was registered */</span>
128 121 };
129 122 }
130 </pre>
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