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8 1 <span class="comment">/*
9 </span> 2 <span class="comment"> * Copyright (c) 2012-2013, Texas Instruments Incorporated
10 </span> 3 <span class="comment"> * All rights reserved.
11 </span> 4 <span class="comment"> *
12 </span> 5 <span class="comment"> * Redistribution and use in source and binary forms, with or without
13 </span> 6 <span class="comment"> * modification, are permitted provided that the following conditions
14 </span> 7 <span class="comment"> * are met:
15 </span> 8 <span class="comment"> *
16 </span> 9 <span class="comment"> * * Redistributions of source code must retain the above copyright
17 </span> 10 <span class="comment"> * notice, this list of conditions and the following disclaimer.
18 </span> 11 <span class="comment"> *
19 </span> 12 <span class="comment"> * * Redistributions in binary form must reproduce the above copyright
20 </span> 13 <span class="comment"> * notice, this list of conditions and the following disclaimer in the
21 </span> 14 <span class="comment"> * documentation and/or other materials provided with the distribution.
22 </span> 15 <span class="comment"> *
23 </span> 16 <span class="comment"> * * Neither the name of Texas Instruments Incorporated nor the names of
24 </span> 17 <span class="comment"> * its contributors may be used to endorse or promote products derived
25 </span> 18 <span class="comment"> * from this software without specific prior written permission.
26 </span> 19 <span class="comment"> *
27 </span> 20 <span class="comment"> * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
28 </span> 21 <span class="comment"> * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
29 </span> 22 <span class="comment"> * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 </span> 23 <span class="comment"> * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
31 </span> 24 <span class="comment"> * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
32 </span> 25 <span class="comment"> * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
33 </span> 26 <span class="comment"> * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
34 </span> 27 <span class="comment"> * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
35 </span> 28 <span class="comment"> * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
36 </span> 29 <span class="comment"> * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
37 </span> 30 <span class="comment"> * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38 </span> 31 <span class="comment"> */</span>
39 32 <span class="comment">/*
40 </span> 33 <span class="comment"> * ======== GatePetersonN.xdc ========
41 </span> 34 <span class="comment"> *
42 </span> 35 <span class="comment"> */</span>
43 36
44 37 <span class=key>package</span> ti.sdo.ipc.gates;
45 38
46 39 import xdc.runtime.Error;
47 40 import xdc.runtime.Assert;
48 41 import xdc.runtime.IGateProvider;
49 42 import xdc.runtime.Diags;
50 43 import xdc.runtime.Log;
51 44 import xdc.rov.ViewInfo;
52 45
53 46 import ti.sdo.utils.MultiProc;
54 47 import ti.sdo.ipc.Ipc;
55 48
56 49 import ti.sdo.ipc.interfaces.IGateMPSupport;
57 50
58 51 <span class="xdoc">/*!
59 </span> 52 <span class="xdoc"> * ======== GatePetersonN (for N processors) ========
60 </span> 53 <span class="xdoc"> * IGateMPSupport gate based on the Peterson's algorithm
61 </span> 54 <span class="xdoc"> *
62 </span> 55 <span class="xdoc"> * This module implements the {<b>@link</b> ti.sdo.ipc.interfaces.IGateMPSupport}
63 </span> 56 <span class="xdoc"> * interface using the Peterson Algorithm in shared memory. This
64 </span> 57 <span class="xdoc"> * implementation works for N processors.
65 </span> 58 <span class="xdoc"> *
66 </span> 59 <span class="xdoc"> * Each GatePetersonN instance requires a small piece of
67 </span> 60 <span class="xdoc"> * shared memory. The base address of this shared memory is specified as
68 </span> 61 <span class="xdoc"> * the 'sharedAddr' argument to the create. The amount of shared memory
69 </span> 62 <span class="xdoc"> * consumed by a single instance can be obtained using the
70 </span> 63 <span class="xdoc"> * {<b>@link</b> #sharedMemReq} call.
71 </span> 64 <span class="xdoc"> *
72 </span> 65 <span class="xdoc"> * Shared memory has to conform to the following specification. Padding is
73 </span> 66 <span class="xdoc"> * added between certain elements in shared memory if cache alignment is
74 </span> 67 <span class="xdoc"> * required for the region in which the instance is placed.
75 </span> 68 <span class="xdoc"> *
76 </span> 69 <span class="xdoc"> * <b>@p(code)</b>
77 </span> 70 <span class="xdoc"> *
78 </span> 71 <span class="xdoc"> * shmBaseAddr -> ------------------------------ bytes
79 </span> 72 <span class="xdoc"> * | enteredStage[0] | 4
80 </span> 73 <span class="xdoc"> * | (PADDING if aligned) |
81 </span> 74 <span class="xdoc"> * |----------------------------|
82 </span> 75 <span class="xdoc"> * | enteredStage[1] | 4
83 </span> 76 <span class="xdoc"> * | (PADDING if aligned) |
84 </span> 77 <span class="xdoc"> * |----------------------------|
85 </span> 78 <span class="xdoc"> * . . .
86 </span> 79 <span class="xdoc"> * |----------------------------|
87 </span> 80 <span class="xdoc"> * | enteredStage[N-1] | 4
88 </span> 81 <span class="xdoc"> * | (PADDING if aligned) |
89 </span> 82 <span class="xdoc"> * |----------------------------|
90 </span> 83 <span class="xdoc"> * | lastProcEnteringStage[1] | 4
91 </span> 84 <span class="xdoc"> * | (PADDING if aligned) |
92 </span> 85 <span class="xdoc"> * |----------------------------|
93 </span> 86 <span class="xdoc"> * . . .
94 </span> 87 <span class="xdoc"> * |----------------------------|
95 </span> 88 <span class="xdoc"> * | lastProcEnteringStage[N-1]| 4
96 </span> 89 <span class="xdoc"> * | (PADDING if aligned) |
97 </span> 90 <span class="xdoc"> * |----------------------------|
98 </span> 91 <span class="xdoc"> * <b>@p</b>
99 </span> 92 <span class="xdoc"> */</span>
100 93 @InstanceInitError
101 94 @InstanceFinalize
102 95
103 96 <span class=key>module</span> GatePetersonN <span class=key>inherits</span> IGateMPSupport
104 97 {
105 98 <span class="xdoc">/*! <b>@_nodoc</b> */</span>
106 99 <span class=key>metaonly</span> <span class=key>struct</span> BasicView {
107 100 String objType;
108 101 Ptr localGate;
109 102 UInt nested;
110 103 String gateOwner;
111 104 }
112 105
113 106 <span class="xdoc">/*! <b>@_nodoc</b> */</span>
114 107 @Facet
115 108 <span class=key>metaonly</span> <span class=key>config</span> ViewInfo.Instance rovViewInfo =
116 109 ViewInfo.create({
117 110 viewMap: [
118 111 [<span class="string">'Basic'</span>,
119 112 {
120 113 type: ViewInfo.INSTANCE,
121 114 viewInitFxn: <span class="string">'viewInitBasic'</span>,
122 115 structName: <span class="string">'BasicView'</span>
123 116 }
124 117 ],
125 118 ]
126 119 });
127 120
128 121 <span class="xdoc">/*!
129 </span> 122 <span class="xdoc"> * ======== numInstances ========
130 </span> 123 <span class="xdoc"> * Maximum number of instances supported by the GatePetersonN module
131 </span> 124 <span class="xdoc"> */</span>
132 125 <span class=key>config</span> UInt numInstances = 512;
133 126 <span class=key>config</span> UInt MAX_NUM_PROCS = 8;
134 127
135 128 <span class=key>instance</span>:
136 129
137 130 <span class="xdoc">/*!
138 </span> 131 <span class="xdoc"> * <b>@_nodoc</b>
139 </span> 132 <span class="xdoc"> * ======== enter ========
140 </span> 133 <span class="xdoc"> * Enter this gate
141 </span> 134 <span class="xdoc"> */</span>
142 135 @DirectCall
143 136 <span class=key>override</span> IArg enter();
144 137
145 138 <span class="xdoc">/*!
146 </span> 139 <span class="xdoc"> * <b>@_nodoc</b>
147 </span> 140 <span class="xdoc"> * ======== leave ========
148 </span> 141 <span class="xdoc"> * Leave this gate
149 </span> 142 <span class="xdoc"> */</span>
150 143 @DirectCall
151 144 <span class=key>override</span> Void leave(IArg key);
152 145
153 146 <span class=key>internal</span>:
154 147
155 148 <span class=key>const</span> Int32 NOT_INTERESTED = -1;
156 149
157 150 <span class="comment">/* initializes shared memory */</span>
158 151 Void postInit(Object *obj);
159 152
160 153 <span class=key>struct</span> Instance_State {
161 154 volatile Int32 *enteredStage[MAX_NUM_PROCS];
162 155 volatile Int32 *lastProcEnteringStage[MAX_NUM_PROCS-1];
163 156 UInt16 selfId;
164 157 UInt16 numProcessors;
165 158 UInt nested; <span class="comment">/* For nesting */</span>
166 159 IGateProvider.Handle localGate;
167 160 Ipc.ObjType objType;
168 161 SizeT cacheLineSize;
169 162 Bool cacheEnabled;
170 163 };
171 164 }
172 </pre>
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