1 #include "fwkPort.h"
3 #include <xdc/std.h>
4 #include <xdc/cfg/global.h>
5 #include <xdc/runtime/Error.h>
6 #include <xdc/runtime/Log.h>
7 #include <xdc/runtime/Memory.h>
9 #include <ti/sysbios/BIOS.h>
10 #include <ti/sysbios/knl/Semaphore.h>
12 #include <math.h>
14 #include "sio.h"
16 //#include "inpbuf.h"
17 //#include "outbuf.h"
18 //#include "pafsio.h"
19 //#include "psdkaf_typ.h"
20 //#include "psdkaf_dec.h"
22 //Add because of table
23 #include <sap.h>
24 #include <mib.h>
25 #include <mob.h>
27 //Define Module table
28 #if 1
29 DEV2_TableElem DEV2_table[] = {
30 {
31 {NULL, NULL},
32 {"DIB", &DIB_FXNS, (Int)DIB_init, NULL, 0, 0}
33 },
34 {
35 {NULL, NULL},
36 {"DOB", &DOB_FXNS, (Int)DOB_init, NULL, 0, 0}
37 },
38 {
39 {NULL, NULL},
40 {"DAP", &SAP_FXNS, (Int)SAP_init, NULL, 0, 0}
41 },
42 /***
43 {
44 {NULL, NULL},
45 {"SAP", &SAP_FXNS, (Int)SAP_init, NULL, 0, 0}
46 },
47 ***/
48 {
49 {NULL, NULL},
50 {NULL, NULL, 0, NULL, 0, 0} /* End the table wit a NULL entry */
51 },
52 };
53 #else
54 DEV2_TableElem DEV2_table[4];
55 void setupDev2Table(void)
56 {
57 DEV2_createDevice("DIB", &DIB_FXNS, (Int)DIB_init, NULL);
58 DEV2_createDevice("DOB", &DOB_FXNS, (Int)DOB_init, NULL);
59 DEV2_createDevice("DAP", &SAP_FXNS, (Int)SAP_init, NULL);
60 }
61 #endif
63 void initDev2(void)
64 {
65 SAP_init();
66 DIB_init();
67 DOB_init();
68 }
71 // Define available heap regions
72 extern const ti_sysbios_heaps_HeapMem_Handle heapMemL2Sram;
73 extern const ti_sysbios_heaps_HeapMem_Handle heapMemDdr3;
74 //extern const ti_sysbios_heaps_HeapMem_Handle heapMemMsmc;
76 #define DEV2_L2HEAP0 ((IHeap_Handle)heapMemL2Sram)
77 #define DEV2_L2HEAP1 ((IHeap_Handle)heapMemL2Sram)
78 #define DEV2_L2HEAP2 ((IHeap_Handle)heapMemL2Sram)
79 #define DEV2_EHEAP ((IHeap_Handle)heapMemDdr3)
80 //#define DEV2_MHEAP ((IHeap_Handle)heapMemMsmc)
82 HeapMem_Handle DEV2_memSpaceToHeap (IALG_MemSpace space)
83 {
84 switch(space)
85 {
86 case IALG_SARAM: /* IALG_SARAM0 = IALG_SARAM : Normally used for IRAM. */
87 Log_info2("DEV2_memSpaceToHeap: IALG_SARAM (0x%x) 0x%x", space, (IArg)DEV2_L2HEAP0);
88 return DEV2_L2HEAP0;
90 case IALG_EXTERNAL: // normally external SDRAM
91 Log_info2("DEV2_memSpaceToHeap: IALG_EXTERNAL (0x%x) 0x%x", space, (IArg)DEV2_EHEAP);
92 return DEV2_EHEAP;
94 case IALG_SARAM1:
95 Log_info2("DEV2_memSpaceToHeap: IALG_SARAM1 (0x%x) 0x%x", space, (IArg)DEV2_L2HEAP1);
96 return DEV2_L2HEAP1;
98 case IALG_SARAM2:
99 Log_info2("DEV2_memSpaceToHeap: IALG_SARAM2 (0x%x) 0x%x", space, (IArg)DEV2_L2HEAP2);
100 return DEV2_L2HEAP2;
102 case IALG_DARAM0:
103 Log_info2("DEV2_memSpaceToHeap: IALG_DARAM0 (0x%x) 0x%x", space, (IArg)DEV2_L2HEAP0);
104 return DEV2_L2HEAP0;
106 case IALG_DARAM1: // not normally used.
107 Log_info2("DEV2_memSpaceToHeap: IALG_DARAM1 (0x%x) 0x%x", space, (IArg)DEV2_L2HEAP1);
108 return DEV2_L2HEAP1;
110 case IALG_DARAM2: // not normally used.
111 Log_info2("DEV2_memSpaceToHeap: IALG_DARAM2 (0x%x) 0x%x", space, (IArg)DEV2_L2HEAP2);
112 return DEV2_L2HEAP2; // not normally used.
114 case IALG_ESDATA: // not normally used.
115 Log_info2("DEV2_memSpaceToHeap: IALG_ESDATA (0x%x) 0x%x", space, (IArg)DEV2_EHEAP);
116 return DEV2_EHEAP;
118 default:
119 Log_info2("DEV2_ALG_memSpaceToHeap: default (0x%x) 0x%x", space, (IArg)DEV2_EHEAP);
120 return DEV2_EHEAP;
121 }
122 }