[processor-sdk/performance-audio-sr.git] / psdk_cust / ipc_3_43_00_00_eng / docs / doxygen / html / ___ipc_power_8h.html
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107 <div class="textblock"><p>============================================================================ </p><hr/>
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112 Data Structures</h2></td></tr>
113 <tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_ipc_power___callback_elem.html">IpcPower_CallbackElem</a></td></tr>
114 <tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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117 Macros</h2></td></tr>
118 <tr class="memitem:a37cbe42fc1def5f605172230038387aa"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="___ipc_power_8h.html#a37cbe42fc1def5f605172230038387aa">MIRQ34_SHIFT</a>   2</td></tr>
119 <tr class="separator:a37cbe42fc1def5f605172230038387aa"><td class="memSeparator" colspan="2"> </td></tr>
120 <tr class="memitem:ab7f088add089757ea9c178569e3275bc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="___ipc_power_8h.html#ab7f088add089757ea9c178569e3275bc">MIRQ37_SHIFT</a>   5</td></tr>
121 <tr class="separator:ab7f088add089757ea9c178569e3275bc"><td class="memSeparator" colspan="2"> </td></tr>
122 <tr class="memitem:a959b40ce47c593c5e78d0d632d01881d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="___ipc_power_8h.html#a959b40ce47c593c5e78d0d632d01881d">MIRQ38_SHIFT</a>   6</td></tr>
123 <tr class="separator:a959b40ce47c593c5e78d0d632d01881d"><td class="memSeparator" colspan="2"> </td></tr>
124 <tr class="memitem:a60e92584dc7909ed7d6aa78f085551c1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="___ipc_power_8h.html#a60e92584dc7909ed7d6aa78f085551c1">MIRQ39_SHIFT</a>   7</td></tr>
125 <tr class="separator:a60e92584dc7909ed7d6aa78f085551c1"><td class="memSeparator" colspan="2"> </td></tr>
126 <tr class="memitem:acda6b0f107658b8ba3b3a04cf11b4816"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="___ipc_power_8h.html#acda6b0f107658b8ba3b3a04cf11b4816">MIRQ_SHIFT</a>(irq)   (((irq) - 16) % 32)</td></tr>
127 <tr class="separator:acda6b0f107658b8ba3b3a04cf11b4816"><td class="memSeparator" colspan="2"> </td></tr>
128 <tr class="memitem:afceb324b3b780817c0f55f58fc000240"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="___ipc_power_8h.html#afceb324b3b780817c0f55f58fc000240">IRQWAKEEN_SHIFT</a>(irq)   (((irq) - 32) % 32)</td></tr>
129 <tr class="separator:afceb324b3b780817c0f55f58fc000240"><td class="memSeparator" colspan="2"> </td></tr>
130 <tr class="memitem:a92aad919804b47e93cd17afbd3e42757"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="___ipc_power_8h.html#a92aad919804b47e93cd17afbd3e42757">MBX_INT</a>   50</td></tr>
131 <tr class="separator:a92aad919804b47e93cd17afbd3e42757"><td class="memSeparator" colspan="2"> </td></tr>
132 <tr class="memitem:a3741553679cd610b344165318659ec3a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="___ipc_power_8h.html#a3741553679cd610b344165318659ec3a">GPT3_INT</a>   53</td></tr>
133 <tr class="separator:a3741553679cd610b344165318659ec3a"><td class="memSeparator" colspan="2"> </td></tr>
134 <tr class="memitem:a96415a4f7a08af2b6418a6a842b94344"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="___ipc_power_8h.html#a96415a4f7a08af2b6418a6a842b94344">GPT4_INT</a>   54</td></tr>
135 <tr class="separator:a96415a4f7a08af2b6418a6a842b94344"><td class="memSeparator" colspan="2"> </td></tr>
136 <tr class="memitem:a49d5b178b302459d9be25df0d59ac813"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="___ipc_power_8h.html#a49d5b178b302459d9be25df0d59ac813">GPT9_INT</a>   55</td></tr>
137 <tr class="separator:a49d5b178b302459d9be25df0d59ac813"><td class="memSeparator" colspan="2"> </td></tr>
138 <tr class="memitem:a3fe53a81d7c016bdd032aa0e187932d3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="___ipc_power_8h.html#a3fe53a81d7c016bdd032aa0e187932d3">GPT11_INT</a>   56</td></tr>
139 <tr class="separator:a3fe53a81d7c016bdd032aa0e187932d3"><td class="memSeparator" colspan="2"> </td></tr>
140 <tr class="memitem:a9d0936f2d52dd2a33aba701eda311519"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="___ipc_power_8h.html#a9d0936f2d52dd2a33aba701eda311519">MBX6_U1_INT</a>   66</td></tr>
141 <tr class="separator:a9d0936f2d52dd2a33aba701eda311519"><td class="memSeparator" colspan="2"> </td></tr>
142 <tr class="memitem:a0e7911969f528e939707d41c3ab8ee49"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="___ipc_power_8h.html#a0e7911969f528e939707d41c3ab8ee49">DSP_GPT5_INT</a>   67</td></tr>
143 <tr class="separator:a0e7911969f528e939707d41c3ab8ee49"><td class="memSeparator" colspan="2"> </td></tr>
144 <tr class="memitem:a3854f019387a13c360752f84e3929e89"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="___ipc_power_8h.html#a3854f019387a13c360752f84e3929e89">DSP_GPT6_INT</a>   68</td></tr>
145 <tr class="separator:a3854f019387a13c360752f84e3929e89"><td class="memSeparator" colspan="2"> </td></tr>
146 <tr class="memitem:a92e8c6b6093c99dd316b4a010cf656c9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="___ipc_power_8h.html#a92e8c6b6093c99dd316b4a010cf656c9">DSP_MBX_INT</a>   57</td></tr>
147 <tr class="separator:a92e8c6b6093c99dd316b4a010cf656c9"><td class="memSeparator" colspan="2"> </td></tr>
148 <tr class="memitem:a08014f1265296fc7a9347bd53e7c6520"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="___ipc_power_8h.html#a08014f1265296fc7a9347bd53e7c6520">WUGEN_MAILBOX_BIT</a>   (1 << <a class="el" href="___ipc_power_8h.html#a37cbe42fc1def5f605172230038387aa">MIRQ34_SHIFT</a>)</td></tr>
149 <tr class="separator:a08014f1265296fc7a9347bd53e7c6520"><td class="memSeparator" colspan="2"> </td></tr>
150 <tr class="memitem:a8d6b48f5b14da562977d236838a6407f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="___ipc_power_8h.html#a8d6b48f5b14da562977d236838a6407f">WUGEN_GPT3_BIT</a>   (1 << <a class="el" href="___ipc_power_8h.html#ab7f088add089757ea9c178569e3275bc">MIRQ37_SHIFT</a>)</td></tr>
151 <tr class="separator:a8d6b48f5b14da562977d236838a6407f"><td class="memSeparator" colspan="2"> </td></tr>
152 <tr class="memitem:a62cc796138b0afb3bf7f22873805eb96"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="___ipc_power_8h.html#a62cc796138b0afb3bf7f22873805eb96">WUGEN_GPT4_BIT</a>   (1 << <a class="el" href="___ipc_power_8h.html#a959b40ce47c593c5e78d0d632d01881d">MIRQ38_SHIFT</a>)</td></tr>
153 <tr class="separator:a62cc796138b0afb3bf7f22873805eb96"><td class="memSeparator" colspan="2"> </td></tr>
154 <tr class="memitem:a824e50464afd767ef013fcf3d4faf624"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="___ipc_power_8h.html#a824e50464afd767ef013fcf3d4faf624">WUGEN_GPT9_BIT</a>   (1 << <a class="el" href="___ipc_power_8h.html#a60e92584dc7909ed7d6aa78f085551c1">MIRQ39_SHIFT</a>)</td></tr>
155 <tr class="separator:a824e50464afd767ef013fcf3d4faf624"><td class="memSeparator" colspan="2"> </td></tr>
156 <tr class="memitem:aafd391d49e85219850f96cc837c70b02"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="___ipc_power_8h.html#aafd391d49e85219850f96cc837c70b02">WUGEN_GPT11_BIT</a>   (1 << <a class="el" href="___ipc_power_8h.html#acda6b0f107658b8ba3b3a04cf11b4816">MIRQ_SHIFT</a>(<a class="el" href="___ipc_power_8h.html#a3fe53a81d7c016bdd032aa0e187932d3">GPT11_INT</a>))</td></tr>
157 <tr class="separator:aafd391d49e85219850f96cc837c70b02"><td class="memSeparator" colspan="2"> </td></tr>
158 <tr class="memitem:a1ecc88f52791e9d486a11291f930a909"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="___ipc_power_8h.html#a1ecc88f52791e9d486a11291f930a909">WUGEN_MBX6_U1_BIT</a>   (1 << <a class="el" href="___ipc_power_8h.html#acda6b0f107658b8ba3b3a04cf11b4816">MIRQ_SHIFT</a>(<a class="el" href="___ipc_power_8h.html#a9d0936f2d52dd2a33aba701eda311519">MBX6_U1_INT</a>))</td></tr>
159 <tr class="separator:a1ecc88f52791e9d486a11291f930a909"><td class="memSeparator" colspan="2"> </td></tr>
160 <tr class="memitem:ab353b88e74f4da8897738995ea640e64"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="___ipc_power_8h.html#ab353b88e74f4da8897738995ea640e64">DSP_SYS_IRQWAKEEN_GPT5_BIT</a>   (1 << <a class="el" href="___ipc_power_8h.html#afceb324b3b780817c0f55f58fc000240">IRQWAKEEN_SHIFT</a>(<a class="el" href="___ipc_power_8h.html#a0e7911969f528e939707d41c3ab8ee49">DSP_GPT5_INT</a>))</td></tr>
161 <tr class="separator:ab353b88e74f4da8897738995ea640e64"><td class="memSeparator" colspan="2"> </td></tr>
162 <tr class="memitem:aedbdd162832a6b38bf6f83834a12dbe8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="___ipc_power_8h.html#aedbdd162832a6b38bf6f83834a12dbe8">DSP_SYS_IRQWAKEEN_GPT6_BIT</a>   (1 << <a class="el" href="___ipc_power_8h.html#afceb324b3b780817c0f55f58fc000240">IRQWAKEEN_SHIFT</a>(<a class="el" href="___ipc_power_8h.html#a3854f019387a13c360752f84e3929e89">DSP_GPT6_INT</a>))</td></tr>
163 <tr class="separator:aedbdd162832a6b38bf6f83834a12dbe8"><td class="memSeparator" colspan="2"> </td></tr>
164 <tr class="memitem:aef8876cf2a6b90b80e5f96b2423d5f33"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="___ipc_power_8h.html#aef8876cf2a6b90b80e5f96b2423d5f33">DSP1_SYS_IRQWAKEEN_MBX5_U0_BIT</a>   (1 << <a class="el" href="___ipc_power_8h.html#afceb324b3b780817c0f55f58fc000240">IRQWAKEEN_SHIFT</a>(<a class="el" href="___ipc_power_8h.html#a92e8c6b6093c99dd316b4a010cf656c9">DSP_MBX_INT</a>))</td></tr>
165 <tr class="separator:aef8876cf2a6b90b80e5f96b2423d5f33"><td class="memSeparator" colspan="2"> </td></tr>
166 <tr class="memitem:af931043680fd192385440000aa4933a8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="___ipc_power_8h.html#af931043680fd192385440000aa4933a8">DSP2_SYS_IRQWAKEEN_MBX6_U0_BIT</a>   (1 << <a class="el" href="___ipc_power_8h.html#afceb324b3b780817c0f55f58fc000240">IRQWAKEEN_SHIFT</a>(<a class="el" href="___ipc_power_8h.html#a92e8c6b6093c99dd316b4a010cf656c9">DSP_MBX_INT</a>))</td></tr>
167 <tr class="separator:af931043680fd192385440000aa4933a8"><td class="memSeparator" colspan="2"> </td></tr>
168 <tr class="memitem:aeb96e800beab968e9cb80673e681975b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="___ipc_power_8h.html#aeb96e800beab968e9cb80673e681975b">WUGEN_MEVT0</a>   0x4000100C</td></tr>
169 <tr class="separator:aeb96e800beab968e9cb80673e681975b"><td class="memSeparator" colspan="2"> </td></tr>
170 <tr class="memitem:a4dd33004a7a0486136cc38ee2982ab5e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="___ipc_power_8h.html#a4dd33004a7a0486136cc38ee2982ab5e">WUGEN_MEVT1</a>   0x40001010</td></tr>
171 <tr class="separator:a4dd33004a7a0486136cc38ee2982ab5e"><td class="memSeparator" colspan="2"> </td></tr>
172 <tr class="memitem:a36c41e34d7f282ccdfcc6511287c7518"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="___ipc_power_8h.html#a36c41e34d7f282ccdfcc6511287c7518">DSP_SYS_IRQWAKEEN0</a>   0x01D00020</td></tr>
173 <tr class="separator:a36c41e34d7f282ccdfcc6511287c7518"><td class="memSeparator" colspan="2"> </td></tr>
174 <tr class="memitem:a26d10ecfc39d049e3e33f6d0d21a1ad9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="___ipc_power_8h.html#a26d10ecfc39d049e3e33f6d0d21a1ad9">DSP_SYS_IRQWAKEEN1</a>   0x01D00024</td></tr>
175 <tr class="separator:a26d10ecfc39d049e3e33f6d0d21a1ad9"><td class="memSeparator" colspan="2"> </td></tr>
176 <tr class="memitem:a8644c6f44727cb2661cd7d379b081493"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="___ipc_power_8h.html#a8644c6f44727cb2661cd7d379b081493">OMAP_IPU_WUGEN_INT_MASK0</a>   0</td></tr>
177 <tr class="separator:a8644c6f44727cb2661cd7d379b081493"><td class="memSeparator" colspan="2"> </td></tr>
178 <tr class="memitem:a64f29e207771a6bcede7e978f9797760"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="___ipc_power_8h.html#a64f29e207771a6bcede7e978f9797760">OMAP_IPU_WUGEN_INT_MASK1</a></td></tr>
179 <tr class="separator:a64f29e207771a6bcede7e978f9797760"><td class="memSeparator" colspan="2"> </td></tr>
180 <tr class="memitem:a528481e89ee006ecf72187fcce5b7d4a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="___ipc_power_8h.html#a528481e89ee006ecf72187fcce5b7d4a">VAYU_IPU2_WUGEN_INT_MASK0</a>   0</td></tr>
181 <tr class="separator:a528481e89ee006ecf72187fcce5b7d4a"><td class="memSeparator" colspan="2"> </td></tr>
182 <tr class="memitem:adbbfae990283e92c1c7c68beacb8b31b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="___ipc_power_8h.html#adbbfae990283e92c1c7c68beacb8b31b">VAYU_IPU2_WUGEN_INT_MASK1</a></td></tr>
183 <tr class="separator:adbbfae990283e92c1c7c68beacb8b31b"><td class="memSeparator" colspan="2"> </td></tr>
184 <tr class="memitem:a6db95174401d21ca1c6452ba81e343ee"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="___ipc_power_8h.html#a6db95174401d21ca1c6452ba81e343ee">VAYU_IPU1_WUGEN_INT_MASK0</a>   0</td></tr>
185 <tr class="separator:a6db95174401d21ca1c6452ba81e343ee"><td class="memSeparator" colspan="2"> </td></tr>
186 <tr class="memitem:adc8fa0540d98e9970ac1c6e1a8f978ed"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="___ipc_power_8h.html#adc8fa0540d98e9970ac1c6e1a8f978ed">VAYU_IPU1_WUGEN_INT_MASK1</a></td></tr>
187 <tr class="separator:adc8fa0540d98e9970ac1c6e1a8f978ed"><td class="memSeparator" colspan="2"> </td></tr>
188 <tr class="memitem:ac4510e5d04936be41253f04278b89c55"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="___ipc_power_8h.html#ac4510e5d04936be41253f04278b89c55">VAYU_DSP1_WUGEN_INT_MASK0</a>   (<a class="el" href="___ipc_power_8h.html#aef8876cf2a6b90b80e5f96b2423d5f33">DSP1_SYS_IRQWAKEEN_MBX5_U0_BIT</a>)</td></tr>
189 <tr class="separator:ac4510e5d04936be41253f04278b89c55"><td class="memSeparator" colspan="2"> </td></tr>
190 <tr class="memitem:a61342f8520f0512602ed3747bda617f5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="___ipc_power_8h.html#a61342f8520f0512602ed3747bda617f5">VAYU_DSP1_WUGEN_INT_MASK1</a>   (<a class="el" href="___ipc_power_8h.html#ab353b88e74f4da8897738995ea640e64">DSP_SYS_IRQWAKEEN_GPT5_BIT</a>)</td></tr>
191 <tr class="separator:a61342f8520f0512602ed3747bda617f5"><td class="memSeparator" colspan="2"> </td></tr>
192 <tr class="memitem:a44cfe88fcf9ad23091aff11ece31cebe"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="___ipc_power_8h.html#a44cfe88fcf9ad23091aff11ece31cebe">VAYU_DSP2_WUGEN_INT_MASK0</a>   (<a class="el" href="___ipc_power_8h.html#af931043680fd192385440000aa4933a8">DSP2_SYS_IRQWAKEEN_MBX6_U0_BIT</a>)</td></tr>
193 <tr class="separator:a44cfe88fcf9ad23091aff11ece31cebe"><td class="memSeparator" colspan="2"> </td></tr>
194 <tr class="memitem:a30d3236d77d1d5d48d6ebd2ada4ce208"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="___ipc_power_8h.html#a30d3236d77d1d5d48d6ebd2ada4ce208">VAYU_DSP2_WUGEN_INT_MASK1</a>   (<a class="el" href="___ipc_power_8h.html#aedbdd162832a6b38bf6f83834a12dbe8">DSP_SYS_IRQWAKEEN_GPT6_BIT</a>)</td></tr>
195 <tr class="separator:a30d3236d77d1d5d48d6ebd2ada4ce208"><td class="memSeparator" colspan="2"> </td></tr>
196 <tr class="memitem:a11e446be91792f845d8ff6f07ea805a3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="___ipc_power_8h.html#a11e446be91792f845d8ff6f07ea805a3">M3_SCR_REG</a>   0xE000ED10</td></tr>
197 <tr class="separator:a11e446be91792f845d8ff6f07ea805a3"><td class="memSeparator" colspan="2"> </td></tr>
198 <tr class="memitem:a5759d525aa4f685db7e5c89c872f65bd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="___ipc_power_8h.html#a5759d525aa4f685db7e5c89c872f65bd">SLEEPONEXIT_BIT</a>   1</td></tr>
199 <tr class="separator:a5759d525aa4f685db7e5c89c872f65bd"><td class="memSeparator" colspan="2"> </td></tr>
200 <tr class="memitem:ad7ffbca9147abc5d29f6cf09caf65d0e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="___ipc_power_8h.html#ad7ffbca9147abc5d29f6cf09caf65d0e">DEEPSLEEP_BIT</a>   2</td></tr>
201 <tr class="separator:ad7ffbca9147abc5d29f6cf09caf65d0e"><td class="memSeparator" colspan="2"> </td></tr>
202 <tr class="memitem:ad63ddd32b386c84dae5533d570f8808d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="___ipc_power_8h.html#ad63ddd32b386c84dae5533d570f8808d">SEVONPEND_BIT</a>   4</td></tr>
203 <tr class="separator:ad63ddd32b386c84dae5533d570f8808d"><td class="memSeparator" colspan="2"> </td></tr>
204 </table><table class="memberdecls">
205 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="typedef-members"></a>
206 Typedefs</h2></td></tr>
207 <tr class="memitem:ae99c659d4a4c2c2c42a0b08d72cf4af7"><td class="memItemLeft" align="right" valign="top">typedef struct <a class="el" href="struct_ipc_power___callback_elem.html">IpcPower_CallbackElem</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="___ipc_power_8h.html#ae99c659d4a4c2c2c42a0b08d72cf4af7">IpcPower_CallbackElem</a></td></tr>
208 <tr class="separator:ae99c659d4a4c2c2c42a0b08d72cf4af7"><td class="memSeparator" colspan="2"> </td></tr>
209 </table><table class="memberdecls">
210 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
211 Functions</h2></td></tr>
212 <tr class="memitem:a3bdb3d5555d312eac806ecbbb3945264"><td class="memItemLeft" align="right" valign="top">Void </td><td class="memItemRight" valign="bottom"><a class="el" href="___ipc_power_8h.html#a3bdb3d5555d312eac806ecbbb3945264">IpcPower_preSuspend</a> (Void)</td></tr>
213 <tr class="separator:a3bdb3d5555d312eac806ecbbb3945264"><td class="memSeparator" colspan="2"> </td></tr>
214 <tr class="memitem:a030bbbc427c5c7cb0cb6fd8bbe570abf"><td class="memItemLeft" align="right" valign="top">Void </td><td class="memItemRight" valign="bottom"><a class="el" href="___ipc_power_8h.html#a030bbbc427c5c7cb0cb6fd8bbe570abf">IpcPower_postResume</a> (Void)</td></tr>
215 <tr class="separator:a030bbbc427c5c7cb0cb6fd8bbe570abf"><td class="memSeparator" colspan="2"> </td></tr>
216 </table>
217 <h2 class="groupheader">Macro Definition Documentation</h2>
218 <a class="anchor" id="a37cbe42fc1def5f605172230038387aa"></a>
219 <div class="memitem">
220 <div class="memproto">
221 <table class="memname">
222 <tr>
223 <td class="memname">#define MIRQ34_SHIFT   2</td>
224 </tr>
225 </table>
226 </div><div class="memdoc">
228 </div>
229 </div>
230 <a class="anchor" id="ab7f088add089757ea9c178569e3275bc"></a>
231 <div class="memitem">
232 <div class="memproto">
233 <table class="memname">
234 <tr>
235 <td class="memname">#define MIRQ37_SHIFT   5</td>
236 </tr>
237 </table>
238 </div><div class="memdoc">
240 </div>
241 </div>
242 <a class="anchor" id="a959b40ce47c593c5e78d0d632d01881d"></a>
243 <div class="memitem">
244 <div class="memproto">
245 <table class="memname">
246 <tr>
247 <td class="memname">#define MIRQ38_SHIFT   6</td>
248 </tr>
249 </table>
250 </div><div class="memdoc">
252 </div>
253 </div>
254 <a class="anchor" id="a60e92584dc7909ed7d6aa78f085551c1"></a>
255 <div class="memitem">
256 <div class="memproto">
257 <table class="memname">
258 <tr>
259 <td class="memname">#define MIRQ39_SHIFT   7</td>
260 </tr>
261 </table>
262 </div><div class="memdoc">
264 </div>
265 </div>
266 <a class="anchor" id="acda6b0f107658b8ba3b3a04cf11b4816"></a>
267 <div class="memitem">
268 <div class="memproto">
269 <table class="memname">
270 <tr>
271 <td class="memname">#define MIRQ_SHIFT</td>
272 <td>(</td>
273 <td class="paramtype"> </td>
274 <td class="paramname">irq</td><td>)</td>
275 <td>   (((irq) - 16) % 32)</td>
276 </tr>
277 </table>
278 </div><div class="memdoc">
280 </div>
281 </div>
282 <a class="anchor" id="afceb324b3b780817c0f55f58fc000240"></a>
283 <div class="memitem">
284 <div class="memproto">
285 <table class="memname">
286 <tr>
287 <td class="memname">#define IRQWAKEEN_SHIFT</td>
288 <td>(</td>
289 <td class="paramtype"> </td>
290 <td class="paramname">irq</td><td>)</td>
291 <td>   (((irq) - 32) % 32)</td>
292 </tr>
293 </table>
294 </div><div class="memdoc">
296 </div>
297 </div>
298 <a class="anchor" id="a92aad919804b47e93cd17afbd3e42757"></a>
299 <div class="memitem">
300 <div class="memproto">
301 <table class="memname">
302 <tr>
303 <td class="memname">#define MBX_INT   50</td>
304 </tr>
305 </table>
306 </div><div class="memdoc">
308 </div>
309 </div>
310 <a class="anchor" id="a3741553679cd610b344165318659ec3a"></a>
311 <div class="memitem">
312 <div class="memproto">
313 <table class="memname">
314 <tr>
315 <td class="memname">#define GPT3_INT   53</td>
316 </tr>
317 </table>
318 </div><div class="memdoc">
320 </div>
321 </div>
322 <a class="anchor" id="a96415a4f7a08af2b6418a6a842b94344"></a>
323 <div class="memitem">
324 <div class="memproto">
325 <table class="memname">
326 <tr>
327 <td class="memname">#define GPT4_INT   54</td>
328 </tr>
329 </table>
330 </div><div class="memdoc">
332 </div>
333 </div>
334 <a class="anchor" id="a49d5b178b302459d9be25df0d59ac813"></a>
335 <div class="memitem">
336 <div class="memproto">
337 <table class="memname">
338 <tr>
339 <td class="memname">#define GPT9_INT   55</td>
340 </tr>
341 </table>
342 </div><div class="memdoc">
344 </div>
345 </div>
346 <a class="anchor" id="a3fe53a81d7c016bdd032aa0e187932d3"></a>
347 <div class="memitem">
348 <div class="memproto">
349 <table class="memname">
350 <tr>
351 <td class="memname">#define GPT11_INT   56</td>
352 </tr>
353 </table>
354 </div><div class="memdoc">
356 </div>
357 </div>
358 <a class="anchor" id="a9d0936f2d52dd2a33aba701eda311519"></a>
359 <div class="memitem">
360 <div class="memproto">
361 <table class="memname">
362 <tr>
363 <td class="memname">#define MBX6_U1_INT   66</td>
364 </tr>
365 </table>
366 </div><div class="memdoc">
368 </div>
369 </div>
370 <a class="anchor" id="a0e7911969f528e939707d41c3ab8ee49"></a>
371 <div class="memitem">
372 <div class="memproto">
373 <table class="memname">
374 <tr>
375 <td class="memname">#define DSP_GPT5_INT   67</td>
376 </tr>
377 </table>
378 </div><div class="memdoc">
380 </div>
381 </div>
382 <a class="anchor" id="a3854f019387a13c360752f84e3929e89"></a>
383 <div class="memitem">
384 <div class="memproto">
385 <table class="memname">
386 <tr>
387 <td class="memname">#define DSP_GPT6_INT   68</td>
388 </tr>
389 </table>
390 </div><div class="memdoc">
392 </div>
393 </div>
394 <a class="anchor" id="a92e8c6b6093c99dd316b4a010cf656c9"></a>
395 <div class="memitem">
396 <div class="memproto">
397 <table class="memname">
398 <tr>
399 <td class="memname">#define DSP_MBX_INT   57</td>
400 </tr>
401 </table>
402 </div><div class="memdoc">
404 </div>
405 </div>
406 <a class="anchor" id="a08014f1265296fc7a9347bd53e7c6520"></a>
407 <div class="memitem">
408 <div class="memproto">
409 <table class="memname">
410 <tr>
411 <td class="memname">#define WUGEN_MAILBOX_BIT   (1 << <a class="el" href="___ipc_power_8h.html#a37cbe42fc1def5f605172230038387aa">MIRQ34_SHIFT</a>)</td>
412 </tr>
413 </table>
414 </div><div class="memdoc">
416 </div>
417 </div>
418 <a class="anchor" id="a8d6b48f5b14da562977d236838a6407f"></a>
419 <div class="memitem">
420 <div class="memproto">
421 <table class="memname">
422 <tr>
423 <td class="memname">#define WUGEN_GPT3_BIT   (1 << <a class="el" href="___ipc_power_8h.html#ab7f088add089757ea9c178569e3275bc">MIRQ37_SHIFT</a>)</td>
424 </tr>
425 </table>
426 </div><div class="memdoc">
428 </div>
429 </div>
430 <a class="anchor" id="a62cc796138b0afb3bf7f22873805eb96"></a>
431 <div class="memitem">
432 <div class="memproto">
433 <table class="memname">
434 <tr>
435 <td class="memname">#define WUGEN_GPT4_BIT   (1 << <a class="el" href="___ipc_power_8h.html#a959b40ce47c593c5e78d0d632d01881d">MIRQ38_SHIFT</a>)</td>
436 </tr>
437 </table>
438 </div><div class="memdoc">
440 </div>
441 </div>
442 <a class="anchor" id="a824e50464afd767ef013fcf3d4faf624"></a>
443 <div class="memitem">
444 <div class="memproto">
445 <table class="memname">
446 <tr>
447 <td class="memname">#define WUGEN_GPT9_BIT   (1 << <a class="el" href="___ipc_power_8h.html#a60e92584dc7909ed7d6aa78f085551c1">MIRQ39_SHIFT</a>)</td>
448 </tr>
449 </table>
450 </div><div class="memdoc">
452 </div>
453 </div>
454 <a class="anchor" id="aafd391d49e85219850f96cc837c70b02"></a>
455 <div class="memitem">
456 <div class="memproto">
457 <table class="memname">
458 <tr>
459 <td class="memname">#define WUGEN_GPT11_BIT   (1 << <a class="el" href="___ipc_power_8h.html#acda6b0f107658b8ba3b3a04cf11b4816">MIRQ_SHIFT</a>(<a class="el" href="___ipc_power_8h.html#a3fe53a81d7c016bdd032aa0e187932d3">GPT11_INT</a>))</td>
460 </tr>
461 </table>
462 </div><div class="memdoc">
464 </div>
465 </div>
466 <a class="anchor" id="a1ecc88f52791e9d486a11291f930a909"></a>
467 <div class="memitem">
468 <div class="memproto">
469 <table class="memname">
470 <tr>
471 <td class="memname">#define WUGEN_MBX6_U1_BIT   (1 << <a class="el" href="___ipc_power_8h.html#acda6b0f107658b8ba3b3a04cf11b4816">MIRQ_SHIFT</a>(<a class="el" href="___ipc_power_8h.html#a9d0936f2d52dd2a33aba701eda311519">MBX6_U1_INT</a>))</td>
472 </tr>
473 </table>
474 </div><div class="memdoc">
476 </div>
477 </div>
478 <a class="anchor" id="ab353b88e74f4da8897738995ea640e64"></a>
479 <div class="memitem">
480 <div class="memproto">
481 <table class="memname">
482 <tr>
483 <td class="memname">#define DSP_SYS_IRQWAKEEN_GPT5_BIT   (1 << <a class="el" href="___ipc_power_8h.html#afceb324b3b780817c0f55f58fc000240">IRQWAKEEN_SHIFT</a>(<a class="el" href="___ipc_power_8h.html#a0e7911969f528e939707d41c3ab8ee49">DSP_GPT5_INT</a>))</td>
484 </tr>
485 </table>
486 </div><div class="memdoc">
488 </div>
489 </div>
490 <a class="anchor" id="aedbdd162832a6b38bf6f83834a12dbe8"></a>
491 <div class="memitem">
492 <div class="memproto">
493 <table class="memname">
494 <tr>
495 <td class="memname">#define DSP_SYS_IRQWAKEEN_GPT6_BIT   (1 << <a class="el" href="___ipc_power_8h.html#afceb324b3b780817c0f55f58fc000240">IRQWAKEEN_SHIFT</a>(<a class="el" href="___ipc_power_8h.html#a3854f019387a13c360752f84e3929e89">DSP_GPT6_INT</a>))</td>
496 </tr>
497 </table>
498 </div><div class="memdoc">
500 </div>
501 </div>
502 <a class="anchor" id="aef8876cf2a6b90b80e5f96b2423d5f33"></a>
503 <div class="memitem">
504 <div class="memproto">
505 <table class="memname">
506 <tr>
507 <td class="memname">#define DSP1_SYS_IRQWAKEEN_MBX5_U0_BIT   (1 << <a class="el" href="___ipc_power_8h.html#afceb324b3b780817c0f55f58fc000240">IRQWAKEEN_SHIFT</a>(<a class="el" href="___ipc_power_8h.html#a92e8c6b6093c99dd316b4a010cf656c9">DSP_MBX_INT</a>))</td>
508 </tr>
509 </table>
510 </div><div class="memdoc">
512 </div>
513 </div>
514 <a class="anchor" id="af931043680fd192385440000aa4933a8"></a>
515 <div class="memitem">
516 <div class="memproto">
517 <table class="memname">
518 <tr>
519 <td class="memname">#define DSP2_SYS_IRQWAKEEN_MBX6_U0_BIT   (1 << <a class="el" href="___ipc_power_8h.html#afceb324b3b780817c0f55f58fc000240">IRQWAKEEN_SHIFT</a>(<a class="el" href="___ipc_power_8h.html#a92e8c6b6093c99dd316b4a010cf656c9">DSP_MBX_INT</a>))</td>
520 </tr>
521 </table>
522 </div><div class="memdoc">
524 </div>
525 </div>
526 <a class="anchor" id="aeb96e800beab968e9cb80673e681975b"></a>
527 <div class="memitem">
528 <div class="memproto">
529 <table class="memname">
530 <tr>
531 <td class="memname">#define WUGEN_MEVT0   0x4000100C</td>
532 </tr>
533 </table>
534 </div><div class="memdoc">
536 </div>
537 </div>
538 <a class="anchor" id="a4dd33004a7a0486136cc38ee2982ab5e"></a>
539 <div class="memitem">
540 <div class="memproto">
541 <table class="memname">
542 <tr>
543 <td class="memname">#define WUGEN_MEVT1   0x40001010</td>
544 </tr>
545 </table>
546 </div><div class="memdoc">
548 </div>
549 </div>
550 <a class="anchor" id="a36c41e34d7f282ccdfcc6511287c7518"></a>
551 <div class="memitem">
552 <div class="memproto">
553 <table class="memname">
554 <tr>
555 <td class="memname">#define DSP_SYS_IRQWAKEEN0   0x01D00020</td>
556 </tr>
557 </table>
558 </div><div class="memdoc">
560 </div>
561 </div>
562 <a class="anchor" id="a26d10ecfc39d049e3e33f6d0d21a1ad9"></a>
563 <div class="memitem">
564 <div class="memproto">
565 <table class="memname">
566 <tr>
567 <td class="memname">#define DSP_SYS_IRQWAKEEN1   0x01D00024</td>
568 </tr>
569 </table>
570 </div><div class="memdoc">
572 </div>
573 </div>
574 <a class="anchor" id="a8644c6f44727cb2661cd7d379b081493"></a>
575 <div class="memitem">
576 <div class="memproto">
577 <table class="memname">
578 <tr>
579 <td class="memname">#define OMAP_IPU_WUGEN_INT_MASK0   0</td>
580 </tr>
581 </table>
582 </div><div class="memdoc">
584 </div>
585 </div>
586 <a class="anchor" id="a64f29e207771a6bcede7e978f9797760"></a>
587 <div class="memitem">
588 <div class="memproto">
589 <table class="memname">
590 <tr>
591 <td class="memname">#define OMAP_IPU_WUGEN_INT_MASK1</td>
592 </tr>
593 </table>
594 </div><div class="memdoc">
595 <b>Value:</b><div class="fragment"><div class="line">(<a class="code" href="___ipc_power_8h.html#a08014f1265296fc7a9347bd53e7c6520">WUGEN_MAILBOX_BIT</a> | <a class="code" href="___ipc_power_8h.html#a8d6b48f5b14da562977d236838a6407f">\</a></div>
596 <div class="line"><a class="code" href="___ipc_power_8h.html#a8d6b48f5b14da562977d236838a6407f"> WUGEN_GPT3_BIT</a> | <a class="code" href="___ipc_power_8h.html#a62cc796138b0afb3bf7f22873805eb96">\</a></div>
597 <div class="line"><a class="code" href="___ipc_power_8h.html#a62cc796138b0afb3bf7f22873805eb96"> WUGEN_GPT4_BIT</a>)</div>
598 <div class="ttc" id="___ipc_power_8h_html_a08014f1265296fc7a9347bd53e7c6520"><div class="ttname"><a href="___ipc_power_8h.html#a08014f1265296fc7a9347bd53e7c6520">WUGEN_MAILBOX_BIT</a></div><div class="ttdeci">#define WUGEN_MAILBOX_BIT</div><div class="ttdef"><b>Definition:</b> _IpcPower.h:76</div></div>
599 <div class="ttc" id="___ipc_power_8h_html_a8d6b48f5b14da562977d236838a6407f"><div class="ttname"><a href="___ipc_power_8h.html#a8d6b48f5b14da562977d236838a6407f">WUGEN_GPT3_BIT</a></div><div class="ttdeci">#define WUGEN_GPT3_BIT</div><div class="ttdef"><b>Definition:</b> _IpcPower.h:77</div></div>
600 <div class="ttc" id="___ipc_power_8h_html_a62cc796138b0afb3bf7f22873805eb96"><div class="ttname"><a href="___ipc_power_8h.html#a62cc796138b0afb3bf7f22873805eb96">WUGEN_GPT4_BIT</a></div><div class="ttdeci">#define WUGEN_GPT4_BIT</div><div class="ttdef"><b>Definition:</b> _IpcPower.h:78</div></div>
601 </div><!-- fragment -->
602 </div>
603 </div>
604 <a class="anchor" id="a528481e89ee006ecf72187fcce5b7d4a"></a>
605 <div class="memitem">
606 <div class="memproto">
607 <table class="memname">
608 <tr>
609 <td class="memname">#define VAYU_IPU2_WUGEN_INT_MASK0   0</td>
610 </tr>
611 </table>
612 </div><div class="memdoc">
614 </div>
615 </div>
616 <a class="anchor" id="adbbfae990283e92c1c7c68beacb8b31b"></a>
617 <div class="memitem">
618 <div class="memproto">
619 <table class="memname">
620 <tr>
621 <td class="memname">#define VAYU_IPU2_WUGEN_INT_MASK1</td>
622 </tr>
623 </table>
624 </div><div class="memdoc">
625 <b>Value:</b><div class="fragment"><div class="line">(<a class="code" href="___ipc_power_8h.html#a8d6b48f5b14da562977d236838a6407f">WUGEN_GPT3_BIT</a> | <a class="code" href="___ipc_power_8h.html#a1ecc88f52791e9d486a11291f930a909">\</a></div>
626 <div class="line"><a class="code" href="___ipc_power_8h.html#a1ecc88f52791e9d486a11291f930a909"> WUGEN_MBX6_U1_BIT</a>)</div>
627 <div class="ttc" id="___ipc_power_8h_html_a8d6b48f5b14da562977d236838a6407f"><div class="ttname"><a href="___ipc_power_8h.html#a8d6b48f5b14da562977d236838a6407f">WUGEN_GPT3_BIT</a></div><div class="ttdeci">#define WUGEN_GPT3_BIT</div><div class="ttdef"><b>Definition:</b> _IpcPower.h:77</div></div>
628 <div class="ttc" id="___ipc_power_8h_html_a1ecc88f52791e9d486a11291f930a909"><div class="ttname"><a href="___ipc_power_8h.html#a1ecc88f52791e9d486a11291f930a909">WUGEN_MBX6_U1_BIT</a></div><div class="ttdeci">#define WUGEN_MBX6_U1_BIT</div><div class="ttdef"><b>Definition:</b> _IpcPower.h:82</div></div>
629 </div><!-- fragment -->
630 </div>
631 </div>
632 <a class="anchor" id="a6db95174401d21ca1c6452ba81e343ee"></a>
633 <div class="memitem">
634 <div class="memproto">
635 <table class="memname">
636 <tr>
637 <td class="memname">#define VAYU_IPU1_WUGEN_INT_MASK0   0</td>
638 </tr>
639 </table>
640 </div><div class="memdoc">
642 </div>
643 </div>
644 <a class="anchor" id="adc8fa0540d98e9970ac1c6e1a8f978ed"></a>
645 <div class="memitem">
646 <div class="memproto">
647 <table class="memname">
648 <tr>
649 <td class="memname">#define VAYU_IPU1_WUGEN_INT_MASK1</td>
650 </tr>
651 </table>
652 </div><div class="memdoc">
653 <b>Value:</b><div class="fragment"><div class="line">(<a class="code" href="___ipc_power_8h.html#aafd391d49e85219850f96cc837c70b02">WUGEN_GPT11_BIT</a> | <a class="code" href="___ipc_power_8h.html#a1ecc88f52791e9d486a11291f930a909">\</a></div>
654 <div class="line"><a class="code" href="___ipc_power_8h.html#a1ecc88f52791e9d486a11291f930a909"> WUGEN_MBX6_U1_BIT</a>)</div>
655 <div class="ttc" id="___ipc_power_8h_html_aafd391d49e85219850f96cc837c70b02"><div class="ttname"><a href="___ipc_power_8h.html#aafd391d49e85219850f96cc837c70b02">WUGEN_GPT11_BIT</a></div><div class="ttdeci">#define WUGEN_GPT11_BIT</div><div class="ttdef"><b>Definition:</b> _IpcPower.h:81</div></div>
656 <div class="ttc" id="___ipc_power_8h_html_a1ecc88f52791e9d486a11291f930a909"><div class="ttname"><a href="___ipc_power_8h.html#a1ecc88f52791e9d486a11291f930a909">WUGEN_MBX6_U1_BIT</a></div><div class="ttdeci">#define WUGEN_MBX6_U1_BIT</div><div class="ttdef"><b>Definition:</b> _IpcPower.h:82</div></div>
657 </div><!-- fragment -->
658 </div>
659 </div>
660 <a class="anchor" id="ac4510e5d04936be41253f04278b89c55"></a>
661 <div class="memitem">
662 <div class="memproto">
663 <table class="memname">
664 <tr>
665 <td class="memname">#define VAYU_DSP1_WUGEN_INT_MASK0   (<a class="el" href="___ipc_power_8h.html#aef8876cf2a6b90b80e5f96b2423d5f33">DSP1_SYS_IRQWAKEEN_MBX5_U0_BIT</a>)</td>
666 </tr>
667 </table>
668 </div><div class="memdoc">
670 </div>
671 </div>
672 <a class="anchor" id="a61342f8520f0512602ed3747bda617f5"></a>
673 <div class="memitem">
674 <div class="memproto">
675 <table class="memname">
676 <tr>
677 <td class="memname">#define VAYU_DSP1_WUGEN_INT_MASK1   (<a class="el" href="___ipc_power_8h.html#ab353b88e74f4da8897738995ea640e64">DSP_SYS_IRQWAKEEN_GPT5_BIT</a>)</td>
678 </tr>
679 </table>
680 </div><div class="memdoc">
682 </div>
683 </div>
684 <a class="anchor" id="a44cfe88fcf9ad23091aff11ece31cebe"></a>
685 <div class="memitem">
686 <div class="memproto">
687 <table class="memname">
688 <tr>
689 <td class="memname">#define VAYU_DSP2_WUGEN_INT_MASK0   (<a class="el" href="___ipc_power_8h.html#af931043680fd192385440000aa4933a8">DSP2_SYS_IRQWAKEEN_MBX6_U0_BIT</a>)</td>
690 </tr>
691 </table>
692 </div><div class="memdoc">
694 </div>
695 </div>
696 <a class="anchor" id="a30d3236d77d1d5d48d6ebd2ada4ce208"></a>
697 <div class="memitem">
698 <div class="memproto">
699 <table class="memname">
700 <tr>
701 <td class="memname">#define VAYU_DSP2_WUGEN_INT_MASK1   (<a class="el" href="___ipc_power_8h.html#aedbdd162832a6b38bf6f83834a12dbe8">DSP_SYS_IRQWAKEEN_GPT6_BIT</a>)</td>
702 </tr>
703 </table>
704 </div><div class="memdoc">
706 </div>
707 </div>
708 <a class="anchor" id="a11e446be91792f845d8ff6f07ea805a3"></a>
709 <div class="memitem">
710 <div class="memproto">
711 <table class="memname">
712 <tr>
713 <td class="memname">#define M3_SCR_REG   0xE000ED10</td>
714 </tr>
715 </table>
716 </div><div class="memdoc">
718 </div>
719 </div>
720 <a class="anchor" id="a5759d525aa4f685db7e5c89c872f65bd"></a>
721 <div class="memitem">
722 <div class="memproto">
723 <table class="memname">
724 <tr>
725 <td class="memname">#define SLEEPONEXIT_BIT   1</td>
726 </tr>
727 </table>
728 </div><div class="memdoc">
730 </div>
731 </div>
732 <a class="anchor" id="ad7ffbca9147abc5d29f6cf09caf65d0e"></a>
733 <div class="memitem">
734 <div class="memproto">
735 <table class="memname">
736 <tr>
737 <td class="memname">#define DEEPSLEEP_BIT   2</td>
738 </tr>
739 </table>
740 </div><div class="memdoc">
742 </div>
743 </div>
744 <a class="anchor" id="ad63ddd32b386c84dae5533d570f8808d"></a>
745 <div class="memitem">
746 <div class="memproto">
747 <table class="memname">
748 <tr>
749 <td class="memname">#define SEVONPEND_BIT   4</td>
750 </tr>
751 </table>
752 </div><div class="memdoc">
754 </div>
755 </div>
756 <h2 class="groupheader">Typedef Documentation</h2>
757 <a class="anchor" id="ae99c659d4a4c2c2c42a0b08d72cf4af7"></a>
758 <div class="memitem">
759 <div class="memproto">
760 <table class="memname">
761 <tr>
762 <td class="memname">typedef struct <a class="el" href="struct_ipc_power___callback_elem.html">IpcPower_CallbackElem</a> <a class="el" href="struct_ipc_power___callback_elem.html">IpcPower_CallbackElem</a></td>
763 </tr>
764 </table>
765 </div><div class="memdoc">
767 </div>
768 </div>
769 <h2 class="groupheader">Function Documentation</h2>
770 <a class="anchor" id="a3bdb3d5555d312eac806ecbbb3945264"></a>
771 <div class="memitem">
772 <div class="memproto">
773 <table class="memname">
774 <tr>
775 <td class="memname">Void IpcPower_preSuspend </td>
776 <td>(</td>
777 <td class="paramtype">Void </td>
778 <td class="paramname"></td><td>)</td>
779 <td></td>
780 </tr>
781 </table>
782 </div><div class="memdoc">
784 </div>
785 </div>
786 <a class="anchor" id="a030bbbc427c5c7cb0cb6fd8bbe570abf"></a>
787 <div class="memitem">
788 <div class="memproto">
789 <table class="memname">
790 <tr>
791 <td class="memname">Void IpcPower_postResume </td>
792 <td>(</td>
793 <td class="paramtype">Void </td>
794 <td class="paramname"></td><td>)</td>
795 <td></td>
796 </tr>
797 </table>
798 </div><div class="memdoc">
800 </div>
801 </div>
802 </div><!-- contents -->
803 <!-- HTML footer for doxygen 1.8.9.1-->
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805 <hr class="footer"/><small>
806 Copyright 2016, Texas Instruments Incorporated
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