[processor-sdk/performance-audio-sr.git] / psdk_cust / libarch_k2g_1_0_1_0 / packages / ti / libarch / src / lib_cachecfg.h
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28 #ifndef _LIBARCH_CACHE_CONFIG_H
29 #define _LIBARCH_CACHE_CONFIG_H
31 #ifdef LIB_OPENCL
32 #include <dsp_c.h>
33 #else
34 # ifdef LIB_RTOS
35 # include <ti/csl/csl_cache.h>
36 # include <ti/csl/csl_cacheAux.h>
37 # else
38 # error "Unsupported OS! Please specify either LIB_OPENCL or LIB_RTOS"
39 # endif
40 #endif
42 /** @defgroup libarch_cachecfg Cache Configuration API
43 * @{
44 */
45 /** @} */
47 /** @addtogroup libarch_cachecfg
48 * @{
49 * @name Cache Configuration Macros
50 * @brief L1D and L2 related macros
51 */
52 /*@{*/
53 /**
54 * @brief L1D and L2 information such as base address, total size, etc.
55 * \remark These macros are meant to be used by the inlined functions defined
56 * in this header file. Users should NOT directly use these macros, but
57 * should use the appropriate functions.
58 */
59 #ifdef LIB_RTOS
60 #define LIB_L1D_BASE_ADDRESS_K2H (0x00F00000U)
61 #define LIB_L1D_SIZE_TOTAL_K2H (32*1024UL)
62 #define LIB_L2_BASE_ADDRESS_K2H (0x00800000U)
63 #define LIB_L2_SRAM_SIZE_DEFAULT_K2H (896*1024UL)
64 #define LIB_L2_SIZE_TOTAL_K2H (1024*1024UL)
66 #define LIB_L1D_BASE_ADDRESS_AM572x (0x00F00000U)
67 #define LIB_L1D_SIZE_TOTAL_AM572x (32*1024UL)
68 #define LIB_L2_BASE_ADDRESS_AM572x (0x00800000U)
69 #define LIB_L2_SRAM_SIZE_DEFAULT_AM572x (128*1024UL)
70 #define LIB_L2_SIZE_TOTAL_AM572x (288*1024UL)
72 #define LIB_L1D_BASE_ADDRESS_C6678 (0x00F00000U)
73 #define LIB_L1D_SIZE_TOTAL_C6678 (32*1024UL)
74 #define LIB_L2_BASE_ADDRESS_C6678 (0x00800000U)
75 #define LIB_L2_SRAM_SIZE_DEFAULT_C6678 (384*1024UL)
76 #define LIB_L2_SIZE_TOTAL_C6678 (512*1024UL)
78 #define LIB_L1D_BASE_ADDRESS_K2G (0x00F00000U)
79 #define LIB_L1D_SIZE_TOTAL_K2G (32*1024UL)
80 #define LIB_L2_BASE_ADDRESS_K2G (0x00800000U)
81 #define LIB_L2_SRAM_SIZE_DEFAULT_K2G (384*1024UL)
82 #define LIB_L2_SIZE_TOTAL_K2G (1024*1024UL)
84 #ifdef SOC_K2H
85 #define LIB_L1D_SIZE_TOTAL LIB_L1D_SIZE_TOTAL_K2H
86 #define LIB_L2_SIZE_TOTAL LIB_L2_SIZE_TOTAL_K2H
87 #define LIB_L1D_BASE_ADDRESS LIB_L1D_BASE_ADDRESS_K2H
88 #define LIB_L2_BASE_ADDRESS LIB_L2_BASE_ADDRESS_K2H
89 #else
90 #ifdef SOC_AM572x
91 #define LIB_L1D_SIZE_TOTAL LIB_L1D_SIZE_TOTAL_AM572x
92 #define LIB_L2_SIZE_TOTAL LIB_L2_SIZE_TOTAL_AM572x
93 #define LIB_L1D_BASE_ADDRESS LIB_L1D_BASE_ADDRESS_AM572x
94 #define LIB_L2_BASE_ADDRESS LIB_L2_BASE_ADDRESS_AM572x
95 #else
96 #ifdef SOC_C6678
97 #define LIB_L1D_SIZE_TOTAL LIB_L1D_SIZE_TOTAL_C6678
98 #define LIB_L2_SIZE_TOTAL LIB_L2_SIZE_TOTAL_C6678
99 #define LIB_L1D_BASE_ADDRESS LIB_L1D_BASE_ADDRESS_C6678
100 #define LIB_L2_BASE_ADDRESS LIB_L2_BASE_ADDRESS_C6678
101 #else
102 #ifdef SOC_K2G
103 #define LIB_L1D_SIZE_TOTAL LIB_L1D_SIZE_TOTAL_K2G
104 #define LIB_L2_SIZE_TOTAL LIB_L2_SIZE_TOTAL_K2G
105 #define LIB_L1D_BASE_ADDRESS LIB_L1D_BASE_ADDRESS_K2G
106 #define LIB_L2_BASE_ADDRESS LIB_L2_BASE_ADDRESS_K2G
107 #else
108 #error "Unsupported TARGET"
109 #endif /* SOC_K2G */
110 #endif /* SOC_C6678 */
111 #endif /* SOC_AM572x */
112 #endif /* SOC_K2H */
114 #endif /* LIB_RTOS */
116 /*@}*/
117 /** @} */
119 /** @addtogroup libarch_cachecfg
120 * @{
121 * @brief Error return codes of cache configuration functions.
122 */
123 /*@{*/
124 #define LIB_CACHE_SUCCESS (0) /**< Success. No error. */
125 #define LIB_CACHE_ERROR (-1) /**< Failure. */
126 /*@}*/
127 /** @} */
129 /**
130 * @ingroup libarch_cachecfg
131 * @brief Function lib_get_L1D_SRAM_base() returns the base address of the
132 * configured L1D SRAM that can be used as scratchpad.
133 *
134 * @retval Base address of SRAM in L1D
135 */
136 static inline void * lib_get_L1D_SRAM_base()
137 {
138 #ifdef LIB_OPENCL
139 return((void *)__scratch_l1d_start());
140 #else
141 # ifdef LIB_RTOS
142 return((void *)LIB_L1D_BASE_ADDRESS);
143 # else
144 # error "Unsupported OS! Please specify either LIB_OPENCL or LIB_RTOS"
145 # endif
146 #endif
147 }
149 /**
150 * @ingroup libarch_cachecfg
151 * @brief Function lib_get_L2_SRAM_base() returns the base address of the
152 * configured L2 SRAM that can be used as scratchpad.
153 *
154 * @retval Base address of SRAM in L2
155 */
156 static inline void * lib_get_L2_SRAM_base()
157 {
158 #ifdef LIB_OPENCL
159 return((void *)__scratch_l2_start());
160 #else
161 # ifdef LIB_RTOS
162 return((void *)LIB_L2_BASE_ADDRESS);
163 # else
164 # error "Unsupported OS! Please specify either LIB_OPENCL or LIB_RTOS"
165 # endif
166 #endif
167 }
169 /**
170 * @ingroup libarch_cachecfg
171 * @brief Function lib_get_L1D_total_size() returns the total size of L1D.
172 *
173 * @retval Total size of L1D
174 */
175 static inline int lib_get_L1D_total_size()
176 {
177 #ifdef LIB_OPENCL
178 return(__scratch_l1d_size() + __cache_l1d_size());
179 #else
180 # ifdef LIB_RTOS
181 return(LIB_L1D_SIZE_TOTAL);
182 # else
183 # error "Unsupported OS! Please specify either LIB_OPENCL or LIB_RTOS"
184 # endif
185 #endif
186 }
188 /**
189 * @ingroup libarch_cachecfg
190 * @brief Function lib_get_L1D_SRAM_size() returns the size of the configured
191 * L1D SRAM that can be used as scratchpad.
192 *
193 * @retval Size of SRAM in L1D
194 */
195 #ifdef LIB_OPENCL
196 static inline uint32_t lib_get_L1D_SRAM_size()
197 {
198 return(__scratch_l1d_size());
199 }
200 #else
201 # ifdef LIB_RTOS
202 extern uint32_t lib_get_L1D_SRAM_size();
203 # else
204 # error "Unsupported OS! Please specify either LIB_OPENCL or LIB_RTOS"
205 # endif
206 #endif
208 /**
209 * @ingroup libarch_cachecfg
210 * @brief Function lib_get_L2_total_size() returns the total size of L2.
211 *
212 * @retval Maximum size of SRAM in L2
213 */
214 static inline int lib_get_L2_total_size()
215 {
216 #ifdef LIB_OPENCL
217 return(__scratch_l2_size() + __cache_l2_size());
218 #else
219 # ifdef LIB_RTOS
220 return(LIB_L2_SIZE_TOTAL);
221 # else
222 # error "Unsupported OS! Please specify either LIB_OPENCL or LIB_RTOS"
223 # endif
224 #endif
225 }
227 /**
228 * @ingroup libarch_cachecfg
229 * @brief Function lib_get_L2_SRAM_size() returns the size of the configured
230 * L2 SRAM that can be used as scratchpad.
231 *
232 * @retval Size of SRAM in L2
233 */
234 #ifdef LIB_OPENCL
235 static inline uint32_t lib_get_L2_SRAM_size()
236 {
237 return(__scratch_l2_size());
238 }
239 #else
240 # ifdef LIB_RTOS
241 extern uint32_t lib_get_L2_SRAM_size(); /* defined in lib_cachecfg.c */
242 # else
243 # error "Unsupported OS! Please specify either LIB_OPENCL or LIB_RTOS"
244 # endif
245 #endif
248 /**
249 * @ingroup libarch_cachecfg
250 * @brief Function \ref lib_L1D_config_SRAM configures L1D to have the desired
251 * SRAM size.
252 *
253 * @param[in] size_SRAM desired L1D SRAM size in bytes
254 *
255 * @retval LIB_CACHE_SUCCESS @copydoc LIB_CACHE_SUCCESS
256 * @retval LIB_CACHE_ERROR @copydoc LIB_CACHE_ERROR
257 *
258 * \remark L1D will be write-back invalidated before being configured.
259 * \remark To avoid unnecessary cache configuration, users can first call function
260 * lib_get_L1D_SRAM_size() to find out current SRAM size. If it is the
261 * desired size, this function does not need to be called.
262 */
263 extern int lib_L1D_config_SRAM(size_t size_SRAM);
265 /**
266 * @ingroup libarch_cachecfg
267 * @brief Function lib_L2_config_SRAM() configures L2 to have desired SRAM size.
268 *
269 * @param[in] size_SRAM desired L2 SRAM size in bytes
270 *
271 * @retval LIB_CACHE_SUCCESS @copydoc LIB_CACHE_SUCCESS
272 * @retval LIB_CACHE_ERROR @copydoc LIB_CACHE_ERROR
273 *
274 * \remark L2 will be write-back invalidated before being configured.
275 * \remark To avoid unnecessary cache configuration, users can first call function
276 * lib_get_L2_SRAM_size() to find out current SRAM size. If it is the
277 * desired size, this function does not need to be called.
278 */
279 extern int lib_L2_config_SRAM(size_t size_SRAM);
281 #endif /* _LIBARCH_CACHE_CONFIG_H */
283 /* nothing past this point */