[processor-sdk/performance-audio-sr.git] / psdk_cust / pdk_k2g_1_0_1_1_eng / packages / ti / board / diag / common / K2G / platform.c
1 /*
2 * Copyright (c) 2010-2015, Texas Instruments Incorporated
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * * Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 *
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * * Neither the name of Texas Instruments Incorporated nor the names of
17 * its contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
22 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
24 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
25 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
26 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
27 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
28 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
29 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
30 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 */
34 /**
35 *
36 * \file platform.c
37 *
38 * \brief This contains platform common APIs. This file acts as entry
39 * point for all the platform library modules.
40 *
41 ******************************************************************************/
43 #include "platform_internal.h"
45 /* Errno value */
46 uint32_t platform_errno = 0;
47 uint32_t platform_init_return_code = 0;
49 /* Platform Library Version*/
50 #if (PLATFORM_VERSTRING_IN)
51 static char platform_library_version[16] = PLATFORM_LIB_VERSION;
52 #endif
54 /* Information we need to keep around for access */
55 static struct platform_mcb_t {
56 uint32_t frequency;
57 int32_t board_version;
58 int32_t mastercore;
59 } platform_mcb = {0, 0, 0};
61 #if (UART_printf_IN)
62 uint8_t uart_port_num = PLATFORM_UART_PORT_0;
63 static WRITE_info write_type;
64 static char write_buffer[MAX_WRITE_LEN];
65 #endif
67 #if (PLATFORM_READ_IN)
68 READ_info read_type = PLATFORM_READ_SCANF;
69 #endif
72 /* This structure holds information about the devices on the platform */
73 #if (PLATFORM_NAND_IN)
74 uint8_t gDeviceNandBBlist[BLOCKS_PER_DEVICE];
76 PLATFORM_DEVICE_info gDeviceNand = {0x2C, 0xCA, PLATFORM_DEVICE_NAND, 16, BLOCKS_PER_DEVICE, PAGES_PER_BLOCK, BYTES_PER_PAGE, SPARE_BYTES_PER_PAGE, PLATFORM_DEVID_MT29F2G16ABAFA, 5, 0x400, 0, NULL, NULL};
77 #endif
79 #if (PLATFORM_NOR_IN)
80 PLATFORM_DEVICE_info gDeviceNor = {0x20, 0xBA, PLATFORM_DEVICE_NOR, 8, SPI_NOR_SECTOR_COUNT, (SPI_NOR_PAGE_COUNT / SPI_NOR_SECTOR_COUNT), SPI_NOR_PAGE_SIZE, 0, PLATFORM_DEVID_NORN25Q128A13ESF40F, 0, 0, 0, NULL, NULL};
81 #endif
83 #if (PLATFORM_I2C_EEPROM_IN)
84 PLATFORM_DEVICE_info gDeviceEeprom0 = {PLATFORM_I2C_EEPROM_MANUFACTURER_ID,PLATFORM_I2C_EEPROM_DEVICE_ID_1,PLATFORM_DEVICE_EEPROM, 8, 1, 1, 65536, 0, PLATFORM_DEVID_EEPROM50, 0, 0, 0, NULL, NULL};
85 PLATFORM_DEVICE_info gDeviceEeprom1 = {PLATFORM_I2C_EEPROM_MANUFACTURER_ID,PLATFORM_I2C_EEPROM_DEVICE_ID_2,PLATFORM_DEVICE_EEPROM, 8, 1, 1, 65536, 0, PLATFORM_DEVID_EEPROM51, 0, 0, 0, NULL, NULL};
86 #endif
88 #if (PLATFORM_MMCHS_IN)
90 PLATFORM_DEVICE_info gDeviceSd = {0, 0, PLATFORM_DEVICE_MAX, 0, 0, 0, 0, 0, PLATFORM_DEVID_SD, 0, 0, 0, NULL, NULL};
92 PLATFORM_DEVICE_info gDeviceEmmc = {0, 0, PLATFORM_DEVICE_MAX, 0, 0, 0, 0, 0, PLATFORM_DEVID_EMMC, 0, 0, 0, NULL, NULL};
94 mmchsInfo *mmcInfo;
95 mmchsInfo *sdInfo;
96 mmchsCardInfo *mmcCard;
97 mmchsCardInfo *sdCard;
99 #endif
101 #if (PLATFORM_QSPI_FLASH_IN)
102 PLATFORM_DEVICE_info gDeviceQspiFlash = {0, 0, PLATFORM_DEVICE_QSPI_FLASH, 8, QSPI_FLASH_NUM_SECTORS, (QSPI_FLASH_SECTOR_SIZE / QSPI_FLASH_PAGE_SIZE), QSPI_FLASH_PAGE_SIZE, 0, PLATFORM_DEVID_QSPIFLASH_S25FL512S, 0, 0, 0, NULL, NULL};
103 uint8_t qspiReadMode = PLATFORM_QSPI_IO_MODE_QUAD;
104 uint8_t qspiWriteMode = PLATFORM_QSPI_IO_MODE_QUAD;
105 #endif
107 /* This structure holds information about the EMAC port on the platform */
108 PLATFORM_EMAC_PORT_MODE emac_port_mode[PLATFORM_MAX_EMAC_PORT_NUM] =
109 {
110 PLATFORM_EMAC_PORT_MODE_PHY,
111 PLATFORM_EMAC_PORT_MODE_PHY
112 };
114 #if (PLATFORM_EXTMEMTEST_IN)
115 static inline int32_t platform_memory_test (uint32_t start_address, uint32_t end_address);
116 #endif
118 uint8_t gSysClkSel = 0;
120 #if (PLATFORM_GETINFO_IN)
121 /******************************************************************************
122 * platform_get_frequency
123 *
124 * Internal function to read frequency from PLL.
125 *
126 ******************************************************************************/
127 static inline uint32_t platform_get_frequency(void)
128 {
129 CSL_Status status;
130 PllcHwSetup hwSetupRead;
131 uint32_t dsp_freq;
133 status = CorePllcGetHwSetup (&hwSetupRead);
135 if (status != CSL_SOK) {
136 IFPRINT(UART_printf("platform_get_frequency: Hardware setup parameters reading... Failed.\n"));
137 IFPRINT(UART_printf("\tReason: Error setting in hardware validation."\
138 " [status = 0x%x].\n", status));
139 platform_errno = PLATFORM_ERRNO_GENERIC;
140 return (uint32_t)-1;
141 } else {
142 /* Compute the real dsp freq (*100) */
143 dsp_freq = (hwSetupRead.pllM + 1)/(hwSetupRead.preDiv + 1);
144 dsp_freq = (dsp_freq * PLATFORM_BASE_CLK_RATE_MHZ)/(hwSetupRead.postDiv + 1);
145 }
147 return (dsp_freq);
149 }
150 #endif
152 Bool serial_num_isvalid(char c)
153 {
154 if (
155 ((c >= '0') && (c <= '9')) ||
156 ((c >= 'a') && (c <= 'z')) ||
157 ((c >= 'A') && (c <= 'Z'))
158 )
159 {
160 return TRUE;
161 }
162 else
163 {
164 return FALSE;
165 }
166 }
168 static void getSerialNumber(char *buf)
169 {
170 #if (PLATFORM_I2C_EEPROM_IN)
171 PLATFORM_DEVICE_info *p_device;
172 uint32_t i;
174 buf[0] = 0;
176 p_device = platform_device_open(PLATFORM_DEVID_EEPROM50, 0);
177 if (p_device != NULL)
178 {
179 /* Serial number stored in the last 128 bytes of the EEPROM 0x50 */
180 if (platform_device_read(p_device->handle, gDeviceEeprom0.page_size-MAX_SN_STORE_SIZE, (uint8_t *)buf, 16) == Platform_EOK)
181 {
182 for (i = 0; i < MAX_SN_SIZE; i++)
183 {
184 if(!serial_num_isvalid(buf[i]))
185 {
186 break;
187 }
188 }
189 buf[i] = 0;
190 }
191 else
192 {
193 IFPRINT(UART_printf("Unable to read board serial number."));
194 }
195 }
197 platform_device_close(p_device->handle);
198 #endif
200 return;
201 }
203 /******************************************************************************
204 * platform_get_info
205 ******************************************************************************/
206 #if (PLATFORM_GETINFO_IN)
207 void platform_get_info(platform_info * p_info)
208 {
209 uint32_t csr = CSL_chipReadCSR();
210 volatile uint32_t *megm_rev = (uint32_t *) (MEGM_REV_ID_REGISTER);
211 uint32_t i;
213 if (p_info == 0) {
214 IFPRINT(UART_printf("p_info argument is NULL\n"));
215 platform_errno = PLATFORM_ERRNO_INVALID_ARGUMENT;
216 return;
217 }
219 memset(p_info, 0, sizeof(platform_info));
221 strncpy(p_info->version, platform_library_version, 16);
223 p_info->cpu.core_count = PLATFORM_CORE_COUNT;
224 p_info->cpu.id = (uint16_t) CSL_FEXT(csr, CHIP_CSR_CPU_ID);
225 p_info->cpu.revision_id = (uint16_t) CSL_FEXT(csr, CHIP_CSR_REV_ID);
226 strncpy(p_info->cpu.name, PLATFORM_INFO_CPU_NAME, 32);
228 p_info->cpu.megamodule_revision_major =
229 (uint16_t)(((*megm_rev) & MEGM_REV_ID_MAJ_MASK) >> MEGM_REV_ID_MAJ_SHIFT);
230 p_info->cpu.megamodule_revision_minor =
231 (uint16_t)(((*megm_rev) & MEGM_REV_ID_MIN_MASK) >> MEGM_REV_ID_MIN_SHIFT);
233 strncpy(p_info->board_name, PLATFORM_INFO_BOARD_NAME, 32);
235 /* Only little endian mode is supported by the device */
236 p_info->cpu.endian = PLATFORM_LE;
238 p_info->emac.port_count = PLATFORM_MAX_EMAC_PORT_NUM;
240 p_info->frequency = platform_get_frequency();
241 platform_mcb.frequency = p_info->frequency;
242 p_info->board_rev = getBoardVersion();
243 platform_mcb.board_version = p_info->board_rev;
244 getSerialNumber(p_info->serial_nbr);
246 platform_get_macaddr(PLATFORM_MAC_TYPE_EFUSE, &(p_info->emac.efuse_mac_address[0]));
247 platform_get_macaddr(PLATFORM_MAC_TYPE_EEPROM, &(p_info->emac.eeprom_mac_address[0]));
249 for (i = PLATFORM_USER_LED_CLASS; i < PLATFORM_END_LED_CLASS; i++ ) {
250 switch (i) {
251 case PLATFORM_USER_LED_CLASS:
252 p_info->led[i].count = PLATFORM_SOC_LED_COUNT;
253 break;
254 case PLATFORM_SYSTEM_LED_CLASS:
255 p_info->led[i].count = PLATFORM_I2C_LED_COUNT;
256 break;
257 default:
258 IFPRINT(UART_printf("Can't read LED Class information\n"));
259 platform_errno = PLATFORM_ERRNO_LED;
260 break;
261 }
262 }
263 }
264 #endif
266 /******************************************************************************
267 * platform_init
268 ******************************************************************************/
269 #if (PLATFORM_INIT_IN)
271 /*Enable EDC on MSMC*/
272 /* Note: Once MSMC EDC is enabled, error correction stays enabled until
273 * the MSMC is reset
274 */
275 static int MSMC_enableEDC ()
276 {
277 unsigned int status = 0;
279 *(unsigned int *)(SMEDCC) &= 0x7FFFFFFF; //Clear SEN(bit31)=0
280 *(unsigned int *)(SMEDCC) |= 0x40000000; //Set ECM(bit30)=1
282 /* Check the status */
283 status = *(unsigned int *)(SMEDCC);
286 if ((status>>30)==0x1)
287 /* Enabled */
288 return 1;
290 /* Failed */
291 return 0;
292 }
295 /*Enable EDC on L1P*/
296 static int enableL1PEDC ()
297 {
298 unsigned int status = 0;
300 *(unsigned int *)(L1PEDCMD) = 0x1; //Set EN(bit0)=1
302 /* Check the status */
303 status = *(unsigned int *)(L1PEDSTAT);
305 if ((status<<28) == 0x10000000)
306 /* Enabled */
307 return 1;
309 /* Failed */
310 return 0;
311 }
314 /*Enable EDC on L2*/
315 static int enableL2EDC ()
316 {
317 unsigned int status = 0;
319 *(unsigned int *)(L2EDCMD) = 0x1;
321 /* Check the status */
322 status = *(unsigned int *)(L2EDSTAT);
324 if ((status<<28) == 0x10000000)
325 /* Enabled */
326 return 1;
328 /* Failed */
329 return 0;
330 }
332 /*Enable all bits in L2EDCEN*/
333 static int enableEDCL2EDCEN ()
334 {
335 /* Set DL2CEN(bit0),PL2CEN(bit1),DL2SEN(bit2),PL2SEN(bit3),SDMAEN(bit4)=1 */
336 *(unsigned int *)(L2EDCEN) |= 0x1F;
337 return 1;
338 }
340 void configSoCGpio(void)
341 {
342 /* FLASH_HOLD */
343 gpioSetDirection(GPIO_PORT_1, 41, GPIO_OUT);
344 //gpioClearOutput(GPIO_PORT_1, 41);
345 gpioSetOutput(GPIO_PORT_1, 41);
346 }
348 #define ENABLE_CLK_DEBUG
350 void platform_info_print(void)
351 {
352 UART_printf("\n\nPlatform Info:\n");
353 UART_printf("**************************************\n");
354 UART_printf("66AK2G02 - C66 Core\n");
355 UART_printf("\nClock Selection - ");
356 if(gSysClkSel)
357 {
358 UART_printf("External Clock on SYSCLKP\n\n");
359 }
360 else
361 {
362 UART_printf("Internal Clock on SYSOSC_IN\n\n");
363 }
365 UART_printf("Core PLL Clock - 600MHz\n");
366 UART_printf("DDR PLL Clock - 200MHz\n");
367 UART_printf("UART PLL Clock - 384MHz\n");
368 UART_printf("DSS PLL Clock - 72.4MHz\n");
369 UART_printf("NSS PLL Clock - 1000MHz\n");
370 UART_printf("ICSS PLL Clock - 200MHz\n");
371 UART_printf("**************************************\n\n\n");
372 }
374 Platform_STATUS platform_init(platform_init_flags * p_flags,
375 platform_init_config * p_config)
376 {
377 CSL_Status status;
378 PllcHwSetup pllc_hwSetup;
379 PllcHwSetup pllc_hwSetupRead;
380 volatile uint32_t i;
382 struct pll_init_data ddr_pll_data = {DDR3A_PLL, PLLM_DDR3,PLLD_DDR3,PLLOD_DDR3};
383 pll_init_data pll_data;
385 #ifdef PLATFORM_PLL_REINIT
386 int loop_count;
387 #endif
389 /*************************************************************************
390 * This routine may be called before BIOS or the application has loaded.
391 * Do not try and write debug statements from here.
392 ***********************************************************************/
394 if ((p_flags == 0) || (p_config == 0)){
395 platform_errno = PLATFORM_ERRNO_INVALID_ARGUMENT;
396 return ( (Platform_STATUS) Platform_EFAIL);
397 }
399 /* Start TCSL so its free running */
400 CSL_chipWriteTSCL(0);
402 /* Unlock the Boot Config */
403 CSL_BootCfgUnlockKicker();
405 /* Get the sys clock selection based on SYSCLKSEL pin status */
406 gSysClkSel = CSL_FEXT (hBootCfg->PLLCLKSEL_STAT,
407 BOOTCFG_PLLCLKSEL_STAT_SYSCLKSEL_STAT);
408 if(gSysClkSel)
409 {
410 //printf("Clock Input is SYSCLKP\n");
412 ddr_pll_data.pll = 0;
413 ddr_pll_data.pll_m = DDRCLKP_PLLM_DDR3;
414 ddr_pll_data.pll_d = DDRCLKP_PLLD_DDR3;
415 ddr_pll_data.pll_od = DDRCLKP_PLLOD_DDR3;
416 }
417 else
418 {
419 //printf("Clock Input is HF OSC\n");
420 }
422 #if defined(SODIMM_CONFIG)
423 uint8_t buf[256];
424 uint8_t i2cportnumber=1;
425 if(readSPD(0x53,buf,i2cportnumber) == Platform_EOK)
426 {
427 uint8_t Dividend,Divisor;
428 uint16_t ddrClock;
429 float MTB,tCK;
430 Dividend = buf[10];
431 Divisor = buf[11];
432 MTB = (float)Dividend/Divisor;
433 tCK = buf[12]*MTB; // minimum cycle time tCK
434 ddrClock = ((1/tCK)*1000)*2;
435 if(ddrClock == 800)
436 {
437 ddr_pll_data.pll = 0;
438 ddr_pll_data.pll_m = 4;
439 ddr_pll_data.pll_d = 1;
440 ddr_pll_data.pll_od = 2;
441 }
442 else if(ddrClock == 1066)
443 {
444 ddr_pll_data.pll = 0;
445 ddr_pll_data.pll_m = 16;
446 ddr_pll_data.pll_d = 1;
447 ddr_pll_data.pll_od = 6;
448 }
449 else if(ddrClock == 1333)
450 {
451 ddr_pll_data.pll = 0;
452 ddr_pll_data.pll_m = 20;
453 ddr_pll_data.pll_d = 1;
454 ddr_pll_data.pll_od = 6;
455 }
456 else if(ddrClock == 1600)
457 {
458 ddr_pll_data.pll = 0;
459 ddr_pll_data.pll_m = 8;
460 ddr_pll_data.pll_d = 1;
461 ddr_pll_data.pll_od = 2;
462 }
463 else
464 {
465 printf("ddrClock --> %d is not valid\n",ddrClock);
466 return ( (Platform_STATUS) Platform_EFAIL);
467 }
468 }
469 #endif
471 #ifdef PLATFORM_PLL_REINIT
472 for (loop_count = 0; loop_count < 10; loop_count++) {
473 platform_errno = 0;
474 #endif
476 PowerUpDomains();
478 /* Initialise default pin muxing */
479 pinMuxInit();
481 /* PLLC module handle structure */
482 if (p_flags->pll)
483 {
484 /* Set the Core PLL */
485 /* Clear local data structures */
486 memset(&pllc_hwSetup, 0, sizeof(PllcHwSetup));
488 /* Setup PLLC hardware parameters */
489 pllc_hwSetup.divEnable = (CSL_BitMask32) (PLLC_DIVEN_PLLDIV2 |
490 PLLC_DIVEN_PLLDIV3) ;
492 /* Setup PLLC hardware parameters */
493 pllc_hwSetup.pllM =
494 (((p_config->pllm) ? p_config->pllm : PLATFORM_PLL1_PLLM_val) - 1);
495 pllc_hwSetup.preDiv = PLATFORM_PLL_PREDIV_val - 1;
496 pllc_hwSetup.pllDiv2 = PLATFORM_PLLDIV2_val - 1;
497 pllc_hwSetup.pllDiv3 = PLATFORM_PLLDIV3_val - 1;
498 pllc_hwSetup.postDiv = PLATFORM_PLL_POSTDIV_val -1;
500 /* Configure PLL muxing and selection */
501 configPllClkSelection(gSysClkSel);
503 #ifdef ENABLE_CLK_DEBUG
504 /* Enable Main PLL on OBSCLK pin and SYSCLKOUT */
505 enablePllObsClk(OBSCLK_MAIN_PLL);
506 CSL_FINS(hBootCfg->DEVCFG, BOOTCFG_DEVCFG_SYSCLKOUTEN, 1);
507 #endif
508 /* set Pll */
509 status = CorePllcHwSetup (&pllc_hwSetup);
511 if (status != CSL_SOK) {
512 platform_errno = PLATFORM_ERRNO_PLL_SETUP;
513 return ( (Platform_STATUS) Platform_EFAIL);
514 }
516 /* Read back */
517 status = CorePllcGetHwSetup (&pllc_hwSetupRead);
519 if (status != CSL_SOK) {
520 platform_errno = PLATFORM_ERRNO_PLL_SETUP;
521 return ( (Platform_STATUS) Platform_EFAIL);
522 }
524 #ifdef ENABLE_CLK_DEBUG
525 /* Enable NSS PLL on OBSCLK pin */
526 enablePllObsClk(OBSCLK_NSS_PLL);
527 #endif
528 pll_data.pll_m = PLLM_NSS;
529 pll_data.pll_d = PLLD_NSS;
530 pll_data.pll_od = CLKOD_NSS;
532 /* Set the NSS PLL */
533 status = SetNssPllConfig(&pll_data);
534 if (status != CSL_SOK) {
535 platform_errno = PLATFORM_ERRNO_PLL_SETUP;
536 return ( (Platform_STATUS) Platform_EFAIL);
537 }
539 #ifdef ENABLE_CLK_DEBUG
540 /* Enable DDR3 PLL on OBSCLK pin */
541 enablePllObsClk(OBSCLK_DDR3A_PLL);
542 #endif
543 /* Set the DDR3 PLL */
544 status = SetDDR3PllConfig(&ddr_pll_data);
545 if (status != CSL_SOK)
546 {
547 platform_errno = PLATFORM_ERRNO_PLL_SETUP;
548 return ( (Platform_STATUS) Platform_EFAIL);
549 }
551 #ifdef ENABLE_CLK_DEBUG
552 /* Enable DSS PLL on OBSCLK pin */
553 enablePllObsClk(OBSCLK_DSS_PLL);
554 #endif
556 pll_data.pll_m = PLLM_DSS;
557 pll_data.pll_d = PLLD_DSS;
558 pll_data.pll_od = CLKOD_DSS;
560 /* Set the DSS PLL */
561 status = SetDssPllConfig(&pll_data);
562 if (status != CSL_SOK) {
563 platform_errno = PLATFORM_ERRNO_PLL_SETUP;
564 return ( (Platform_STATUS) Platform_EFAIL);
565 }
567 #ifdef ENABLE_CLK_DEBUG
568 /* Enable ICSS PLL on OBSCLK pin */
569 enablePllObsClk(OBSCLK_ICSS_PLL);
570 #endif
572 pll_data.pll_m = PLLM_ICSS;
573 pll_data.pll_d = PLLD_ICSS;
574 pll_data.pll_od = CLKOD_ICSS;
576 /* Set the ICSS PLL */
577 status = SetIcssPllConfig(&pll_data);
578 if (status != CSL_SOK) {
579 platform_errno = PLATFORM_ERRNO_PLL_SETUP;
580 return ( (Platform_STATUS) Platform_EFAIL);
581 }
583 #ifdef ENABLE_CLK_DEBUG
584 /* Enable UART PLL on OBSCLK pin */
585 enablePllObsClk(OBSCLK_UART_PLL);
586 #endif
588 pll_data.pll_m = PLLM_UART;
589 pll_data.pll_d = PLLD_UART;
590 pll_data.pll_od = CLKOD_UART;
592 /* Set the UART PLL */
593 status = SetUartPllConfig(&pll_data);
594 if (status != CSL_SOK) {
595 platform_errno = PLATFORM_ERRNO_PLL_SETUP;
596 return ( (Platform_STATUS) Platform_EFAIL);
597 }
598 }
600 /* Save frequency, its needed by platform_delay */
601 if(!platform_mcb.frequency) {
602 platform_mcb.frequency = platform_get_frequency();
603 }
605 /* Initialize DDR */
606 if (p_flags->ddr) {
608 xmc_setup();
610 /* Delay 10msec */
611 for (i=0; i<1000; i++)
612 platform_delay (10);
613 #if defined(SODIMM_CONFIG)
614 status = init_ddr3param(buf);
615 #else
617 status = DDR3Init();
618 #endif
620 if (status != CSL_SOK) {
621 platform_errno = PLATFORM_ERRNO_GENERIC;
622 return ( (Platform_STATUS) Platform_EFAIL);
623 }
624 }
626 #ifdef PLATFORM_PLL_REINIT
627 if (!p_flags->pll || !p_flags->ddr) {
628 break;
629 }
631 /* Run DDR3 test */
632 if (platform_memory_test(PLL_REINIT_DDR3_TEST_START_ADDR,
633 PLL_REINIT_DDR3_TEST_END_ADDR) == Platform_EOK) {
634 break;
635 }
636 }
637 platform_init_return_code = loop_count;
639 if (loop_count == 10) {
640 platform_errno = PLATFORM_ERRNO_GENERIC;
641 return ( (Platform_STATUS) Platform_EFAIL);
642 }
643 #endif
645 /* Enable Error Correction for memory */
646 if (p_flags->ecc) {
647 enableL1PEDC();
648 enableEDCL2EDCEN();
649 enableL2EDC();
650 MSMC_enableEDC();
651 }
653 //TODO: Need to change SGMII to RGMII
654 if (p_flags->phy) {
655 //configSerdes();
656 //Init_SGMII(0);
657 //Init_SGMII(1);
658 }
660 #if (PLATFORM_GPIO_IN)
661 gpioInit(GPIO_PORT_0);
662 gpioInit(GPIO_PORT_1);
663 configSoCGpio();
664 #endif
666 #if (PLATFORM_LED_IN)
667 /* Enable GPIO mode for LED0 and LED1 */
668 pinMuxSetMode(SOC_LED0_PADCONFIG, PADCONFIG_MUX_MODE_QUATERNARY);
669 pinMuxSetMode(SOC_LED1_PADCONFIG, PADCONFIG_MUX_MODE_QUATERNARY);
671 /* Configure LED0 and LED1 GPIO pins as output */
672 gpioSetDirection(GPIO_PORT_0, SOC_LED0_GPIO, GPIO_OUT);
673 gpioSetDirection(GPIO_PORT_1, SOC_LED1_GPIO, GPIO_OUT);
674 #endif
676 #if (PLATFORM_I2C_IN)
677 /* Initialize all the I2C ports - Needed for different I2C devices on the board */
678 evmI2CInit(I2C_PORT_0);
679 evmI2CInit(I2C_PORT_1);
680 evmI2CInit(I2C_PORT_2);
681 #endif
683 #if (PLATFORM_I2C_IO_EXP_IN)
684 /* Initialize IO expander */
685 i2cIoExpanderInit();
686 #endif
688 return Platform_EOK;
689 }
690 #endif
692 /******************************************************************************
693 * platform_get_coreid
694 ******************************************************************************/
695 #if (PLATFORM_GETCOREID_IN)
696 uint32_t platform_get_coreid(void)
697 {
698 return (CSL_chipReadDNUM());
699 }
700 #endif
702 uint32_t platform_get_clksel(void)
703 {
704 return (gSysClkSel);
705 }
707 /******************************************************************************
708 * platform_getmacaddr
709 ******************************************************************************/
710 #if (PLATFORM_GETMACADDR_IN)
711 Platform_STATUS platform_get_emac_info(uint32_t port_num, PLATFORM_EMAC_EXT_info * emac_info)
712 {
713 uint32_t mac_addr2, mac_addr1;
715 IFPRINT(UART_printf("platform_get_emac_info called \n"));
717 emac_info->port_num = port_num;
718 emac_info->mode = emac_port_mode[port_num];
720 CSL_BootCfgGetMacIdentifier(&mac_addr1, &mac_addr2);
721 emac_info->mac_address[0] = ((mac_addr2 & 0x0000ff00) >> 8);
722 emac_info->mac_address[1] = (mac_addr2 & 0x000000ff);
724 emac_info->mac_address[2] = ((mac_addr1 & 0xff000000) >> 24);
725 emac_info->mac_address[3] = ((mac_addr1 & 0x00ff0000) >> 16);
726 emac_info->mac_address[4] = ((mac_addr1 & 0x0000ff00) >> 8);
727 emac_info->mac_address[5] = (mac_addr1 & 0x000000ff);
729 return Platform_EOK;
730 }
732 /*
733 * August 15, 2011 - platform_get_macaddr() is deprecated, application needs to call
734 * the new API platform_get_emac_info() to get the MAC address of the port
735 */
736 Platform_STATUS platform_get_macaddr(PLATFORM_MAC_TYPE type, uint8_t * p_mac_address)
737 {
738 IFPRINT(UART_printf("platform_get_macaddr called \n"));
740 switch (type) {
742 case PLATFORM_MAC_TYPE_EFUSE:
743 {
744 uint32_t mac_addr2, mac_addr1;
746 CSL_BootCfgGetMacIdentifier(&mac_addr1, &mac_addr2);
747 p_mac_address[0] = ((mac_addr2 & 0x0000ff00) >> 8);
748 p_mac_address[1] = (mac_addr2 & 0x000000ff);
750 p_mac_address[2] = ((mac_addr1 & 0xff000000) >> 24);
751 p_mac_address[3] = ((mac_addr1 & 0x00ff0000) >> 16);
752 p_mac_address[4] = ((mac_addr1 & 0x0000ff00) >> 8);
753 p_mac_address[5] = (mac_addr1 & 0x000000ff);
755 return Platform_EOK;
756 }
758 default:
759 case PLATFORM_MAC_TYPE_EEPROM:
760 {
761 memset(p_mac_address, 0, 6);
762 return ((Platform_STATUS) Platform_EUNSUPPORTED);
763 }
764 }
765 }
766 #endif
768 /******************************************************************************
769 * platform_get_phy_addr
770 ******************************************************************************/
771 #if (PLATFORM_GETPHYADDR_IN)
772 int32_t platform_get_phy_addr(uint32_t port_num)
773 {
774 IFPRINT(UART_printf("platform_get_phy_addr called \n"));
776 return port_num;
777 }
778 #endif
780 /******************************************************************************
781 * platform_phy_link_status
782 ******************************************************************************/
783 #if (PLATFORM_PHYLINKSTATUS_IN)
784 Platform_STATUS platform_phy_link_status(uint32_t port_num)
785 {
786 uint32_t phy_addr;
787 CSL_MDIO_USERACCESS user_access_reg;
789 IFPRINT(UART_printf("platform_get_phy_link_status (portnum = %d) called \n", port_num));
791 phy_addr = platform_get_phy_addr( port_num);
793 CSL_MDIO_getUserAccessRegister(port_num, &user_access_reg);
795 user_access_reg.phyAddr = phy_addr;
796 user_access_reg.regAddr = 24; //The LED Control Reg address
797 user_access_reg.data &= 0xFFBE; // Need to check this in ?
798 user_access_reg.data |= 1;
800 CSL_MDIO_setUserAccessRegister(port_num, &user_access_reg);
802 return Platform_EOK;
803 }
804 #endif
806 /******************************************************************************
807 * platform_get_switch_state
808 ******************************************************************************/
809 #if (PLATFORM_GETSWITCHSTATE_IN)
810 uint32_t platform_get_switch_state(uint32_t id)
811 {
812 IFPRINT(UART_printf("platform_get_switch_state(id=%d) called \n", id));
814 return (bmcGetUserSwitch(id));
815 }
816 #endif
819 /******************************************************************************
820 * platform_uart_read
821 ******************************************************************************/
822 #if (PLATFORM_UART_IN)
823 Platform_STATUS platform_uart_read(uint8_t *buf, uint32_t delay)
824 {
825 uint32_t delayCount = delay;
827 if (buf == NULL){
828 return ((Platform_STATUS) Platform_EINVALID);
829 }
831 while( (UartIsDataReady(uart_port_num)) != 1)
832 {
833 if (delayCount--)
834 {
835 platform_delay(1);
836 }
837 else
838 {
839 IFPRINT(UART_printf("platform_uart_read: Read timeout\n"));
840 platform_errno = PLATFORM_ERRNO_READTO;
841 *buf = UartReadData(uart_port_num);
842 return ( (Platform_STATUS) Platform_EFAIL);
843 }
844 }
846 *buf = UartReadData (uart_port_num);
848 return Platform_EOK;
849 }
851 /******************************************************************************
852 * platform_uart_write
853 ******************************************************************************/
854 Platform_STATUS platform_uart_write(uint8_t buf)
855 {
856 UART_RET ret;
858 ret = UartWriteData(uart_port_num, buf);
859 if(ret != UART_RET_OK)
860 {
861 platform_errno = PLATFORM_ERRNO_DEV_FAIL;
862 return Platform_EFAIL;
863 }
865 return Platform_EOK;
866 }
868 /******************************************************************************
869 * platform_uart_set_baudrate
870 ******************************************************************************/
871 Platform_STATUS platform_uart_set_baudrate(uint32_t baudrate)
872 {
873 uint16_t brate;
874 UART_RET ret;
876 IFPRINT(UART_printf("platform_uart_set_baudrate(baudrate=%d) called \n", baudrate));
878 brate = ((uint16_t) (PLATFORM_UART_INPUT_CLOCK_RATE/(baudrate * 16)));
880 ret = UartSetBaudRate(uart_port_num, brate);
881 if(ret != UART_RET_OK)
882 {
883 IFPRINT(UART_printf("platform_uart_set_baudrate: Failed with error - %d\n", ret));
884 platform_errno = PLATFORM_ERRNO_DEV_FAIL;
885 return Platform_EFAIL;
886 }
888 return Platform_EOK;
889 }
891 /******************************************************************************
892 * platform_uart_init
893 ******************************************************************************/
894 Platform_STATUS platform_uart_init(void) {
896 UART_RET ret;
897 Platform_STATUS staus;
898 IFPRINT(UART_printf("platform_uart_init called \n"));
900 ret = UartInit(uart_port_num);
901 if(ret != UART_RET_OK)
902 {
903 platform_errno = PLATFORM_ERRNO_DEV_FAIL;
904 return Platform_EFAIL;
905 }
907 staus = platform_uart_set_baudrate(115200);
909 return (staus);
910 }
912 /******************************************************************************
913 * platform_uart_set_params
914 *
915 * UART platform library supports three HW instances of UART controller but
916 * platform uart APIs does not provide choose UART port number.
917 * Set UART port number using this function and subsequent calls to platform
918 * uart APIs will use the uart port number set.
919 ******************************************************************************/
920 Platform_STATUS platform_uart_set_params(PLATFORM_UART_Params *params) {
922 IFPRINT(UART_printf("platform_uart_set_params called \n"));
924 if(params->uart_port <= PLATFORM_UART_PORT_2)
925 {
926 uart_port_num = params->uart_port;
927 }
928 else
929 {
930 return Platform_EFAIL;
931 }
933 return Platform_EOK;
934 }
936 #endif
939 #if (PLATFORM_LED_IN)
941 uint8_t soc_led_pin_num [PLATFORM_SOC_LED_COUNT] = {SOC_LED0_GPIO, SOC_LED1_GPIO, IO_EXP_SOC_LED2, IO_EXP_SOC_LED3, IO_EXP_SOC_LED4};
942 uint8_t soc_led_gpio_port [2] = {GPIO_PORT_0, GPIO_PORT_1};
944 /******************************************************************************
945 * platform_user_led_ctrl
946 ******************************************************************************/
947 static Platform_STATUS platform_user_led_ctrl(uint32_t led_id, PLATFORM_LED_OP operation)
948 {
949 GPIO_RET gpioRet;
950 I2C_RET i2cRet;
951 Platform_STATUS status;
953 status = Platform_EOK;
955 IFPRINT(UART_printf("platform_user_led_ctrl called \n"));
957 switch(led_id) {
958 case PLATFORM_SOC_LED0:
959 case PLATFORM_SOC_LED1:
960 if (operation == PLATFORM_LED_OFF) {
961 gpioRet = gpioClearOutput(soc_led_gpio_port[led_id],
962 soc_led_pin_num[led_id]);
963 }
964 else {
965 gpioRet = gpioSetOutput(soc_led_gpio_port[led_id],
966 soc_led_pin_num[led_id]);
967 }
969 if(gpioRet != GPIO_RET_OK)
970 {
971 IFPRINT(UART_printf("platform_user_led_ctrl: Configuring LED %d Failed!\n", led_id));
972 platform_errno = PLATFORM_ERRNO_DEV_FAIL;
973 status = Platform_EFAIL;
974 }
976 break;
978 case PLATFORM_SOC_LED2:
979 case PLATFORM_SOC_LED3:
980 case PLATFORM_SOC_LED4:
981 if (operation == PLATFORM_LED_ON) {
982 i2cRet = i2cIoExpanderWritePin(
983 (I2cIoExpPins) soc_led_pin_num[led_id],
984 I2C_IO_EXP_PIN_LOW); // LOW to LED ON
985 }
986 else {
987 i2cRet = i2cIoExpanderWritePin(
988 (I2cIoExpPins) soc_led_pin_num[led_id],
989 I2C_IO_EXP_PIN_HIGH); // HIGH to LED OFF
990 }
992 if(i2cRet != I2C_RET_OK)
993 {
994 IFPRINT(UART_printf("platform_user_led_ctrl: Configuring LED %d Failed!\n", led_id));
995 platform_errno = PLATFORM_ERRNO_DEV_FAIL;
996 status = Platform_EFAIL;
997 }
999 break;
1001 default:
1002 IFPRINT(UART_printf("platform_user_led_ctrl: Invalid led_id %d\n", led_id));
1003 platform_errno = PLATFORM_ERRNO_INVALID_ARGUMENT;
1004 return ( (Platform_STATUS) Platform_EUNSUPPORTED);
1005 }
1007 return (status);
1008 }
1010 /******************************************************************************
1011 * platform_led
1012 ******************************************************************************/
1013 Platform_STATUS platform_led(uint32_t led_id, PLATFORM_LED_OP operation, LED_CLASS_E led_class)
1014 {
1015 Platform_STATUS status;
1017 IFPRINT(UART_printf("platform_led(ledid=%d,operation=%d,class=%d) called \n", led_id, operation, led_class));
1019 switch (led_class) {
1020 case PLATFORM_USER_LED_CLASS:
1021 status = platform_user_led_ctrl(led_id, operation);
1022 break;
1023 case PLATFORM_SYSTEM_LED_CLASS:
1024 return ( (Platform_STATUS) Platform_EUNSUPPORTED);
1025 default:
1026 IFPRINT(UART_printf("platform_led: Invalid led_class %d\n", led_class));
1027 platform_errno = PLATFORM_ERRNO_INVALID_ARGUMENT;
1028 return ( (Platform_STATUS) Platform_EUNSUPPORTED);
1029 }
1031 return (status);
1032 }
1033 #endif
1035 /******************************************************************************
1036 * platform_delay
1037 ******************************************************************************/
1038 #if (PLATFORM_DELAY_IN)
1039 Platform_STATUS platform_delay(uint32_t usecs)
1040 {
1041 int32_t delayCount = (int32_t) usecs * platform_mcb.frequency;
1042 int32_t start_val = (int32_t) CSL_chipReadTSCL();
1044 while (((int32_t)CSL_chipReadTSCL() - start_val) < delayCount);
1046 return Platform_EOK;
1047 }
1049 void platform_delaycycles(uint32_t cycles)
1050 {
1051 uint32_t start_val = CSL_chipReadTSCL();
1053 while ((CSL_chipReadTSCL() - start_val) < cycles);
1055 return;
1056 }
1057 #else
1058 /*
1059 * ======== Delay function ========
1060 */
1061 Platform_STATUS platform_delay(uint32_t usecs)
1062 {
1063 BOARD_delay(usecs);
1064 }
1066 /**
1067 * \brief Function to generate delay in secs
1068 *
1069 * \return - None
1070 */
1071 void delay_secs(uint32_t secs)
1072 {
1073 uint32_t index;
1075 for (index = 0; index < secs; index++)
1076 {
1077 platform_delay(1000000);
1078 }
1080 }
1082 #endif
1084 /******************************************************************************
1085 * platform_memory_test
1086 ******************************************************************************/
1087 #if (PLATFORM_EXTMEMTEST_IN)
1088 static inline int32_t platform_memory_test (uint32_t start_address, uint32_t end_address)
1089 {
1090 uint32_t index, value;
1092 /* Write a pattern */
1093 for (index = start_address; index < end_address; index += 4) {
1094 *(volatile uint32_t *) index = (uint32_t)index;
1095 }
1097 /* Read and check the pattern */
1098 for (index = start_address; index < end_address; index += 4) {
1100 value = *(uint32_t *) index;
1102 if (value != index) {
1103 IFPRINT(UART_printf("platform_memory_test: Failed at address index = 0x%x value = 0x%x *(index) = 0x%x\n",
1104 index, value, *(volatile uint32_t *) index));
1105 platform_errno = index;
1106 return (Platform_EFAIL);
1107 }
1108 }
1110 /* Write a pattern for complementary values */
1111 for (index = start_address; index < end_address; index += 4) {
1112 *(volatile uint32_t *) index = (uint32_t)~index;
1113 }
1115 /* Read and check the pattern */
1116 for (index = start_address; index < end_address; index += 4) {
1118 value = *(uint32_t *) index;
1120 if (value != ~index) {
1121 IFPRINT(UART_printf("platform_memory_test: Failed at address index = 0x%x value = 0x%x *(index) = 0x%x\n",
1122 index, value, *(volatile uint32_t *) index));
1123 platform_errno = index;
1124 return (Platform_EFAIL);
1125 }
1126 }
1128 return Platform_EOK;
1129 }
1130 #endif
1132 /******************************************************************************
1133 * platform_external_memory_test
1134 ******************************************************************************/
1135 #if (PLATFORM_EXTMEMTEST_IN)
1136 Platform_STATUS platform_external_memory_test(uint32_t start_address, uint32_t end_address)
1137 {
1138 IFPRINT(UART_printf("platform_external_memory_test(start=0x%x,end=0x%x) called \n", start_address, end_address));
1140 if((start_address == 0) && (end_address == 0)) {
1141 start_address = PLATFORM_DDR3_SDRAM_START;
1142 end_address = PLATFORM_DDR3_SDRAM_END - 1;
1143 }
1145 if ((start_address < PLATFORM_DDR3_SDRAM_START) ||
1146 (end_address > PLATFORM_DDR3_SDRAM_END) ||
1147 (start_address >= end_address)){
1148 IFPRINT(UART_printf("platform_external_memory_test: Start address (0x%08x) or end address (0x%08x)\n",
1149 start_address, end_address));
1150 platform_errno = PLATFORM_ERRNO_INVALID_ARGUMENT;
1151 return ((Platform_STATUS) Platform_EINVALID);
1152 }
1154 return platform_memory_test(start_address, end_address);
1155 }
1156 #endif
1158 /******************************************************************************
1159 * UART_printf - Printf or echo to UART or both
1160 ******************************************************************************/
1161 #if (UART_printf_IN)
1162 WRITE_info UART_printf_configure (WRITE_info wtype) {
1163 WRITE_info original;
1164 IFPRINT(UART_printf("UART_printf_configure(write_type=%d) called \n", wtype));
1165 original = write_type;
1166 write_type = wtype;
1167 return original;
1168 }
1170 void UART_printf(const char *fmt, ... )
1171 {
1172 va_list arg_ptr;
1173 uint32_t i, length;
1175 /* Initial UART_printf to temporary buffer.. at least try some sort of sanity check so we don't write all over
1176 * memory if the print is too large.
1177 */
1178 if (strlen(fmt) > MAX_WRITE_LEN) {platform_errno = PLATFORM_ERRNO_INVALID_ARGUMENT; return;}
1180 va_start( arg_ptr, fmt );
1181 length = vsprintf( (char *)write_buffer, fmt, arg_ptr );
1182 va_end( arg_ptr );
1184 if ((write_type == UART_printf_PRINTF) || (write_type == UART_printf_ALL)) {
1185 printf( "%s", write_buffer );
1186 fflush(stdout);
1187 }
1189 if ((write_type == UART_printf_UART) || (write_type == UART_printf_ALL)) {
1190 /* Log to console port (routine only sends a byte at a time) */
1191 for (i=0; i < length; i++) {
1192 if (write_buffer[i] == '\n') {
1193 UartWriteData(PLATFORM_UART_DBG_PORT, (uint8_t)0x0D);
1194 UartWriteData(PLATFORM_UART_DBG_PORT, (uint8_t)0x0A);
1195 }
1196 else {
1197 UartWriteData(PLATFORM_UART_DBG_PORT, (uint8_t)write_buffer[i]);
1198 }
1199 }
1200 }
1202 return;
1203 }
1204 #endif
1206 /******************************************************************************
1207 * platform_read_configure - Connfigures the input source for platform_read
1208 ******************************************************************************/
1209 #if (PLATFORM_READ_IN)
1210 READ_info platform_read_configure (READ_info rdype) {
1211 READ_info original;
1213 IFPRINT(UART_printf("platform_read_configure(read_type=%d) called \n", rdype));
1215 original = read_type;
1216 read_type = rdype;
1218 return original;
1219 }
1221 /******************************************************************************
1222 * platform_read - scanf or read from UART
1223 ******************************************************************************/
1224 uint32_t platform_read(uint8_t *data, uint32_t length)
1225 {
1226 Platform_STATUS status = Platform_EOK;
1227 uint32_t count = 0;
1229 if (read_type == PLATFORM_READ_UART)
1230 {
1231 /* Wait till an input is provided */
1232 do
1233 {
1234 status = platform_uart_read(data, PLATFORM_READ_DELAY);
1235 if(status == Platform_EOK)
1236 {
1237 /* Check if user pressed enter */
1238 if((*data == 0xD) || (*data == 0x1B))
1239 {
1240 *data = '\0';
1241 break;
1242 }
1244 platform_uart_write(*data);
1246 count++;
1247 data++;
1248 }
1250 } while ((status != Platform_EOK) || (count != length));
1251 }
1253 if (read_type == PLATFORM_READ_SCANF)
1254 {
1255 count = scanf("%s", data);
1256 }
1258 return (count);
1259 }
1260 #endif /* #if (PLATFORM_READ_IN) */
1262 /******************************************************************************
1263 * platform_device_open
1264 ******************************************************************************/
1265 #if (PLATFORM_NAND_IN) || (PLATFORM_NOR_IN) || (PLATFORM_I2C_EEPROM_IN) || (PLATFORM_MMCHS_IN) || (PLATFORM_QSPI_FLASH_IN)
1266 PLATFORM_DEVICE_info *platform_device_open(uint32_t deviceid, uint32_t flags ) {
1268 PLATFORM_DEVICE_info *p_info;
1270 IFPRINT(UART_printf("platform_device_open(deviceid=0x%x,flags=0x%x) called \n", deviceid, flags));
1272 #if (PLATFORM_NAND_IN)
1274 if (deviceid == PLATFORM_DEVID_MT29F2G16ABAFA) {
1275 /* Disable Write protect in NAND */
1276 if (nandInit() != SUCCESS) {
1277 IFPRINT(UART_printf("platform_dveice_open: Initialization failed.\n"));
1278 return NULL;
1279 }
1281 /* Store the open flags */
1282 gDeviceNand.flags = flags;
1284 /* Set the device to point to its bad block list */
1285 gDeviceNand.bblist = (uint8_t *)&gDeviceNandBBlist;
1287 p_info = &gDeviceNand;
1289 if (NandGetDetails(p_info) != SUCCESS) {
1290 IFPRINT(UART_printf("platform_device_open: Unable to read device information.\n"));
1291 platform_errno = PLATFORM_ERRNO_BADFLASHDEV;
1292 return NULL;
1293 }
1295 p_info->handle = deviceid;
1297 return p_info;
1298 }
1300 #endif
1302 #if (PLATFORM_NOR_IN)
1304 NOR_STATUS nor_status;
1306 if (deviceid == PLATFORM_DEVID_NORN25Q128A13ESF40F) {
1308 /* Disable Write protect in NOR */
1309 nor_status = nor_init();
1310 if (nor_status != NOR_EOK) {
1311 IFPRINT(UART_printf("platform_device_open: Initialization failed.\n"));
1312 return NULL;
1313 }
1315 /* Store the open flags */
1316 gDeviceNor.flags = flags;
1318 p_info = &gDeviceNor;
1320 if (nor_get_details(p_info) != SUCCESS) {
1321 IFPRINT(UART_printf("platform_device_open: Unable to read device information.\n"));
1322 platform_errno = PLATFORM_ERRNO_BADFLASHDEV;
1323 return NULL;
1324 }
1326 p_info->handle = deviceid;
1328 return p_info;
1329 }
1330 #endif
1332 #if (PLATFORM_I2C_EEPROM_IN)
1333 uint8_t i2cportnumber=0;
1334 if (deviceid == PLATFORM_DEVID_EEPROM50) {
1335 /* Store the open flags */
1336 gDeviceEeprom0.flags = flags;
1338 evmI2CInit(i2cportnumber);
1339 p_info = &gDeviceEeprom0;
1340 p_info->handle = deviceid;
1341 return p_info;
1342 }
1344 if (deviceid == PLATFORM_DEVID_EEPROM51) {
1345 /* Store the open flags */
1346 gDeviceEeprom1.flags = flags;
1347 evmI2CInit(i2cportnumber);
1348 p_info = &gDeviceEeprom1;
1349 p_info->handle = deviceid;
1350 return p_info;
1351 }
1353 #endif
1355 #if (PLATFORM_MMCHS_IN)
1357 if (deviceid == PLATFORM_DEVID_EMMC) {
1358 mmcInfo = mmchsInit(MMCHS_MMC_INST);
1359 if (mmcInfo == NULL) {
1360 IFPRINT(UART_printf("platform_device_open: Initialization failed.\n"));
1361 return NULL;
1362 }
1364 /* Store the open flags */
1365 gDeviceEmmc.flags = flags;
1366 mmcCard = mmcInfo->card;
1368 p_info = &gDeviceEmmc;
1369 p_info->handle = deviceid;
1371 if (mmcCard->cardType == MMCHS_MMC)
1372 {
1373 p_info->type = PLATFORM_DEVICE_EMMC;
1374 p_info->manufacturer_id = mmcCard->cid.manfid;
1375 p_info->device_id = mmcCard->cid.oemid;
1376 p_info->width = mmcCard->busWidth;
1377 p_info->block_count = mmcCard->nBlks;
1378 p_info->page_size = mmcCard->blkLen;
1379 }
1380 return p_info;
1381 }
1383 if (deviceid == PLATFORM_DEVID_SD) {
1384 sdInfo = mmchsInit(MMCHS_SD_CARD_INST);
1385 if (sdInfo == NULL) {
1386 IFPRINT(UART_printf("platform_device_open: Initialization failed.\n"));
1387 return NULL;
1388 }
1390 /* Store the open flags */
1391 gDeviceSd.flags = flags;
1392 sdCard = sdInfo->card;
1394 p_info = &gDeviceSd;
1395 p_info->handle = deviceid;
1397 if (sdCard->cardType == MMCHS_SD_CARD)
1398 {
1399 p_info->type = PLATFORM_DEVICE_SD;
1400 p_info->manufacturer_id = sdCard->cid.manfid;
1401 p_info->device_id = sdCard->cid.oemid;
1402 p_info->width = sdCard->busWidth;
1403 p_info->block_count = sdCard->nBlks;
1404 p_info->page_size = sdCard->blkLen;
1406 }
1407 return p_info;
1408 }
1410 #endif
1412 #if (PLATFORM_QSPI_FLASH_IN)
1413 QSPI_STATUS qspiStatus;
1415 if (deviceid == PLATFORM_DEVID_QSPIFLASH_S25FL512S) {
1417 /* Initialize the qspi flash */
1418 qspiStatus = qspiFlashInit(&gDeviceQspiFlash);
1419 if (qspiStatus != QSPI_SUCCESS) {
1420 IFPRINT(UART_printf("platform_device_open: QSPI Flash Initialization failed.\n"));
1421 return NULL;
1422 }
1424 /* Store the open flags */
1425 gDeviceQspiFlash.flags = flags;
1427 p_info = &gDeviceQspiFlash;
1429 if (qspiFlashReadId(p_info) != SUCCESS) {
1430 IFPRINT(UART_printf("platform_device_open: Unable to read device information.\n"));
1431 platform_errno = PLATFORM_ERRNO_BADFLASHDEV;
1432 return NULL;
1433 }
1435 p_info->handle = deviceid;
1437 return p_info;
1438 }
1439 #endif
1441 platform_errno = PLATFORM_ERRNO_UNSUPPORTED;
1443 return NULL;
1444 }
1445 #endif
1447 /******************************************************************************
1448 * platform_flash_close
1449 ******************************************************************************/
1450 #if (PLATFORM_NAND_IN) || (PLATFORM_NOR_IN) || (PLATFORM_I2C_EEPROM_IN) || (PLATFORM_MMCHS_IN) || (PLATFORM_QSPI_FLASH_IN)
1451 Platform_STATUS platform_device_close(PLATFORM_DEVHANDLE deviceid) {
1453 IFPRINT(UART_printf("platform_device_close(handle=0x%x) called \n", deviceid));
1455 #if (PLATFORM_NAND_IN)
1456 if (deviceid == PLATFORM_DEVID_MT29F2G16ABAFA) {
1457 gDeviceNand.handle = 0;
1458 return Platform_EOK;
1459 }
1460 #endif
1462 #if (PLATFORM_NOR_IN)
1463 if (deviceid == PLATFORM_DEVID_NORN25Q128A13ESF40F) {
1464 gDeviceNor.handle = 0;
1465 return Platform_EOK;
1466 }
1467 #endif
1469 #if (PLATFORM_I2C_EEPROM_IN)
1471 if (deviceid == PLATFORM_DEVID_EEPROM50) {
1472 gDeviceEeprom0.handle = 0;
1473 return Platform_EOK;
1474 }
1476 if (deviceid == PLATFORM_DEVID_EEPROM51) {
1477 gDeviceEeprom1.handle = 0;
1478 return Platform_EOK;
1479 }
1481 #endif
1483 #if (PLATFORM_MMCHS_IN)
1485 if (deviceid == PLATFORM_DEVID_EMMC) {
1486 gDeviceEmmc.handle = 0;
1487 return Platform_EOK;
1488 }
1490 if (deviceid == PLATFORM_DEVID_SD) {
1491 gDeviceSd.handle = 0;
1492 return Platform_EOK;
1493 }
1495 #endif
1497 #if (PLATFORM_QSPI_FLASH_IN)
1498 if (deviceid == PLATFORM_DEVID_QSPIFLASH_S25FL512S) {
1499 gDeviceQspiFlash.handle = 0;
1500 return Platform_EOK;
1501 }
1502 #endif
1504 return Platform_EUNSUPPORTED;
1505 }
1506 #endif
1508 /******************************************************************************
1509 * platform_flash_read_spare_data
1510 ******************************************************************************/
1511 #if (PLATFORM_NAND_IN) || (PLATFORM_NOR_IN) || (PLATFORM_I2C_EEPROM_IN)
1512 Platform_STATUS platform_device_read_spare_data(PLATFORM_DEVHANDLE deviceid,
1513 uint32_t block_number,
1514 uint32_t page_number,
1515 uint8_t *buf) {
1517 IFPRINT(UART_printf("platform_device_read_spare_data(handle=0x%x, block=%d, page=%d,buf=0x%x) called \n",
1518 deviceid, block_number, page_number, buf));
1520 if (buf == NULL) {
1521 platform_errno = PLATFORM_ERRNO_INVALID_ARGUMENT;
1522 return Platform_EINVALID;
1523 }
1525 #if (PLATFORM_NAND_IN)
1526 if (deviceid == PLATFORM_DEVID_MT29F2G16ABAFA) {
1527 if ((block_number >= gDeviceNand.block_count) || (page_number >= gDeviceNand.page_count))
1528 {
1529 platform_errno = PLATFORM_ERRNO_INVALID_ARGUMENT;
1530 return Platform_EINVALID;
1531 }
1533 if (NandReadSpareArea (&gDeviceNand, block_number, page_number, buf) != SUCCESS) {
1534 return ( (Platform_STATUS) Platform_EFAIL);
1535 }
1536 return Platform_EOK;
1537 }
1538 #endif
1540 return Platform_EUNSUPPORTED;
1542 }
1543 #endif
1545 /******************************************************************************
1546 * platform_device_mark_block_bad
1547 ******************************************************************************/
1548 #if PLATFORM_NAND_WRITE_IN
1549 Platform_STATUS platform_device_mark_block_bad(PLATFORM_DEVHANDLE deviceid,
1550 uint32_t block_number) {
1552 uint8_t *buf = NULL;
1553 PLATFORM_DEVICE_info *p_device;
1555 if (deviceid == PLATFORM_DEVID_MT29F2G16ABAFA) {
1556 p_device = &gDeviceNand;
1557 }
1558 else {
1559 p_device = NULL;
1560 }
1562 if (p_device == NULL) {
1563 platform_errno = PLATFORM_ERRNO_INVALID_ARGUMENT;
1564 return Platform_EINVALID;
1565 }
1567 buf = (uint8_t *) Osal_platformMalloc(platform_roundup(p_device->spare_size, PLATFORM_CACHE_LINE_SIZE),
1568 PLATFORM_CACHE_LINE_SIZE);
1570 platform_device_read_spare_data(deviceid, block_number, 0, buf);
1572 buf[p_device->bboffset] = 0xA5; /* BI indicator byte*/
1574 if ( block_number >= gDeviceNand.block_count ) {
1575 platform_errno = PLATFORM_ERRNO_INVALID_ARGUMENT;
1576 Osal_platformFree(buf, platform_roundup(p_device->spare_size, PLATFORM_CACHE_LINE_SIZE));
1577 return Platform_EINVALID;
1578 }
1580 if (NandWriteSpareArea (p_device, block_number, 0, buf) != SUCCESS) {
1581 Osal_platformFree(buf, platform_roundup(p_device->spare_size, PLATFORM_CACHE_LINE_SIZE));
1582 return ( (Platform_STATUS) Platform_EFAIL);
1583 }
1585 Osal_platformFree(buf, platform_roundup(p_device->spare_size, PLATFORM_CACHE_LINE_SIZE));
1587 return Platform_EOK;
1589 }
1590 #endif
1592 /******************************************************************************
1593 * platform_flash_write_spare_data
1594 ******************************************************************************/
1595 #if (PLATFORM_NAND_IN) || (PLATFORM_NOR_IN) || (PLATFORM_I2C_EEPROM_IN)
1596 Platform_STATUS platform_device_write_spare_data(PLATFORM_DEVHANDLE deviceid,
1597 uint32_t block_number,
1598 uint32_t page_number,
1599 uint8_t *buf) {
1601 IFPRINT(UART_printf("platform_device_write_spare_data(handle=0x%x, block=%d, page=%d,buf=0x%x) called \n",
1602 deviceid, block_number, page_number, buf));
1604 if (buf == NULL) {
1605 platform_errno = PLATFORM_ERRNO_INVALID_ARGUMENT;
1606 return Platform_EINVALID;
1607 }
1609 #if (PLATFORM_NAND_WRITE_IN)
1610 if (deviceid == PLATFORM_DEVID_MT29F2G16ABAFA) {
1611 if ((block_number >= gDeviceNand.block_count) || (page_number >= gDeviceNand.page_count))
1612 {
1613 platform_errno = PLATFORM_ERRNO_INVALID_ARGUMENT;
1614 return Platform_EINVALID;
1615 }
1617 if (NandWriteSpareArea (&gDeviceNand, block_number, page_number, buf) != SUCCESS) {
1618 return ( (Platform_STATUS) Platform_EFAIL);
1619 }
1620 return Platform_EOK;
1621 }
1622 #endif
1624 return Platform_EUNSUPPORTED;
1626 }
1627 #endif
1629 /******************************************************************************
1630 * platform_device_read
1631 ******************************************************************************/
1632 #if (PLATFORM_NAND_IN) || (PLATFORM_NOR_IN) || (PLATFORM_I2C_EEPROM_IN) || (PLATFORM_MMCHS_IN) || (PLATFORM_QSPI_FLASH_IN)
1633 Platform_STATUS platform_device_read(PLATFORM_DEVHANDLE deviceid,
1634 uint32_t offset,
1635 uint8_t *buf,
1636 uint32_t len) {
1638 IFPRINT(UART_printf("platform_device_read(handle=0x%x, offset=%d, len=%d, buf=0x%x) called \n",
1639 deviceid, offset, len, buf));
1641 if (buf == NULL || len == 0) {
1642 platform_errno = PLATFORM_ERRNO_INVALID_ARGUMENT;
1643 return Platform_EINVALID;
1644 }
1646 #if (PLATFORM_NAND_IN)
1647 if (deviceid == PLATFORM_DEVID_MT29F2G16ABAFA) {
1648 NAND_ADDR addr;
1649 uint32_t read_len = 0;
1651 addr.uiColumnAddr= 0;
1653 for (read_len = 0; read_len < len; read_len += gDeviceNand.page_size)
1654 {
1655 if (platform_offset_to_blocknpage(deviceid, offset+read_len, &addr.uiBlockAddr, &addr.uiPageAddr) != Platform_EOK) {
1656 return Platform_EUNSUPPORTED;
1657 }
1659 if (readNandPage (&gDeviceNand, addr, &buf[read_len]) != SUCCESS) {
1660 return ( (Platform_STATUS) Platform_EFAIL);
1661 }
1662 }
1664 return Platform_EOK;
1665 }
1666 #endif
1668 #if (PLATFORM_NOR_IN)
1669 if (deviceid == PLATFORM_DEVID_NORN25Q128A13ESF40F) {
1670 if (nor_read (&gDeviceNor, offset, len, buf) != SUCCESS) {
1671 return ( (Platform_STATUS) Platform_EFAIL);
1672 }
1673 return Platform_EOK;
1674 }
1675 #endif
1677 #if (PLATFORM_I2C_EEPROM_IN)
1678 uint8_t i2cportnumber=0;
1679 if (deviceid == PLATFORM_DEVID_EEPROM50) {
1680 if (i2cEepromRead (offset, len, buf, 0x50,i2cportnumber) != I2C_RET_OK) {
1681 IFPRINT(UART_printf("platform_eeprom_read: EEPROM read failed\n"));
1682 return ( (Platform_STATUS) Platform_EFAIL);
1683 }
1684 return Platform_EOK;
1685 }
1687 if (deviceid == PLATFORM_DEVID_EEPROM51) {
1688 if (i2cEepromRead (offset, len, buf, 0x51,i2cportnumber) != I2C_RET_OK) {
1689 IFPRINT(UART_printf("platform_eeprom_read: EEPROM read failed\n"));
1690 return ( (Platform_STATUS) Platform_EFAIL);
1691 }
1692 return Platform_EOK;
1693 }
1695 #endif
1697 #if (PLATFORM_MMCHS_IN)
1699 if (deviceid == PLATFORM_DEVID_EMMC){
1700 //TODO: Need to add support for reading data which is not multiple of block length
1701 if (mmchsBlockRead (mmcCard, offset, (len/MMCHS_BLK_LEN), buf) != SUCCESS) {
1702 return ( (Platform_STATUS) Platform_EFAIL);
1703 }
1705 return Platform_EOK;
1706 }
1708 if (deviceid == PLATFORM_DEVID_SD) {
1709 //TODO: Need to add support for reading data which is not multiple of block length
1710 if (mmchsBlockRead (sdCard, offset, (len/MMCHS_BLK_LEN), buf) != SUCCESS) {
1711 return ( (Platform_STATUS) Platform_EFAIL);
1712 }
1714 return Platform_EOK;
1715 }
1717 #endif
1719 #if (PLATFORM_QSPI_FLASH_IN)
1720 if (deviceid == PLATFORM_DEVID_QSPIFLASH_S25FL512S) {
1721 if (qspiFlashRead (&gDeviceQspiFlash, offset, len, buf, qspiReadMode)
1722 != SUCCESS) {
1723 return ( (Platform_STATUS) Platform_EFAIL);
1724 }
1725 return Platform_EOK;
1726 }
1727 #endif
1729 return Platform_EUNSUPPORTED;
1731 }
1732 #endif
1734 /******************************************************************************
1735 * Computes a block and page based on an offset
1736 ******************************************************************************/
1737 #if (PLATFORM_NAND_IN) || (PLATFORM_NOR_IN) || (PLATFORM_QSPI_FLASH_IN)
1739 Platform_STATUS platform_offset_to_blocknpage(PLATFORM_DEVHANDLE deviceid,
1740 uint32_t offset,
1741 uint32_t *block,
1742 uint32_t *page) {
1743 uint32_t leftover;
1744 uint32_t block_size;
1745 uint32_t block_count, page_size, page_count;
1747 IFPRINT(UART_printf("platform_offset_to_blocknpage(handle=0x%x, offset=%d) called \n",
1748 deviceid, offset));
1750 #if (PLATFORM_NAND_IN)
1751 if (deviceid == PLATFORM_DEVID_MT29F2G16ABAFA) {
1752 block_count = gDeviceNand.block_count;
1753 page_size = gDeviceNand.page_size;
1754 page_count = gDeviceNand.page_count;
1755 }
1756 #endif
1758 #if (PLATFORM_NOR_IN)
1759 if (deviceid == PLATFORM_DEVID_NORN25Q128A13ESF40F) {
1760 block_count = gDeviceNor.block_count;
1761 page_size = gDeviceNor.page_size;
1762 page_count = gDeviceNor.page_count;
1763 }
1764 #endif
1766 #if (PLATFORM_QSPI_FLASH_IN)
1767 if (deviceid == PLATFORM_DEVID_QSPIFLASH_S25FL512S) {
1768 block_count = gDeviceQspiFlash.block_count;
1769 page_size = gDeviceQspiFlash.page_size;
1770 page_count = gDeviceQspiFlash.page_count;
1771 }
1772 #endif
1774 block_size = (page_count * page_size);
1776 *block = offset / block_size;
1777 leftover = offset % block_size;
1778 *page = leftover / page_size;
1779 if (leftover % page_size) {
1780 /* All writes must be page aligned for now */
1781 return Platform_EUNSUPPORTED;
1782 }
1783 if (*block > block_count) {
1784 return Platform_EINVALID;
1785 }
1786 if (*page > page_count) {
1787 return Platform_EINVALID;
1788 }
1790 IFPRINT(UART_printf("platform_offset_to_blocknpage: offset = %d block = %d page = %d \n", offset, *block, *page));
1792 return Platform_EOK;
1794 }
1796 #endif
1798 /******************************************************************************
1799 * Computes a block and page based on an offset
1800 ******************************************************************************/
1801 #if (PLATFORM_NAND_IN) || (PLATFORM_NOR_IN) || (PLATFORM_QSPI_FLASH_IN)
1803 Platform_STATUS platform_blocknpage_to_offset(PLATFORM_DEVHANDLE deviceid,
1804 uint32_t *offset,
1805 uint32_t block,
1806 uint32_t page) {
1808 uint32_t block_count, page_size, page_count;
1810 IFPRINT(UART_printf("platform_blocknpage_to_offset(handle=0x%x, block=%d, page=%d) called \n",
1811 deviceid, block, page));
1813 #if (PLATFORM_NAND_IN)
1814 if (deviceid == PLATFORM_DEVID_MT29F2G16ABAFA) {
1815 block_count = gDeviceNand.block_count;
1816 page_size = gDeviceNand.page_size;
1817 page_count = gDeviceNand.page_count;
1818 }
1819 #endif
1821 #if (PLATFORM_NOR_IN)
1822 if (deviceid == PLATFORM_DEVID_NORN25Q128A13ESF40F) {
1823 block_count = gDeviceNor.block_count;
1824 page_size = gDeviceNor.page_size;
1825 page_count = gDeviceNor.page_count;
1826 }
1827 #endif
1829 #if (PLATFORM_QSPI_FLASH_IN)
1830 if (deviceid == PLATFORM_DEVID_QSPIFLASH_S25FL512S) {
1831 block_count = gDeviceQspiFlash.block_count;
1832 page_size = gDeviceQspiFlash.page_size;
1833 page_count = gDeviceQspiFlash.page_count;
1834 }
1835 #endif
1837 if (block >block_count || page > page_count) {
1838 return Platform_EINVALID;
1839 }
1841 *offset = (block * (page_count * page_size)) + (page * page_size);
1843 IFPRINT(UART_printf("platform_blocknpage_to_offset: offset = %d block = %d page = %d \n", *offset, block, page));
1845 return Platform_EOK;
1846 }
1848 #endif
1850 /******************************************************************************
1851 * platform_device_write
1852 ******************************************************************************/
1854 #if (PLATFORM_NAND_IN) || (PLATFORM_NOR_IN) || (PLATFORM_I2C_EEPROM_IN) || (PLATFORM_MMCHS_IN) || (PLATFORM_QSPI_FLASH_IN)
1856 Platform_STATUS platform_device_write(PLATFORM_DEVHANDLE deviceid,
1857 uint32_t offset,
1858 uint8_t *buf,
1859 uint32_t len) {
1861 IFPRINT(UART_printf("platform_device_write(handle=0x%x, offset=%d, len=%d, buf=0x%x) called \n",
1862 deviceid, offset, len, buf));
1864 /* Check general args */
1865 if (buf == NULL || len == 0) {
1866 platform_errno = PLATFORM_ERRNO_INVALID_ARGUMENT;
1867 return Platform_EINVALID;
1868 }
1870 #if (PLATFORM_NAND_WRITE_IN || PLATFORM_NOR_WRITE_IN || PLATFORM_QSPI_FLASH_IN)
1871 if ((deviceid == PLATFORM_DEVID_MT29F2G16ABAFA) ||
1872 (deviceid == PLATFORM_DEVID_NORN25Q128A13ESF40F) ||
1873 (deviceid == PLATFORM_DEVID_QSPIFLASH_S25FL512S))
1874 {
1875 NAND_ADDR addr;
1876 NAND_ADDR StartAddress;
1877 Platform_STATUS retval = Platform_EOK;
1878 PLATFORM_DEVICE_info *p_device;
1879 int32_t block, page;
1880 int32_t bufindex;
1881 int32_t index;
1882 int32_t useable_page_size;
1883 int32_t block_size;
1884 uint32_t noraddress;
1885 uint32_t qspiflashaddress;
1886 uint8_t *pBlock = NULL;
1887 uint8_t *pPage = NULL;
1889 #if (PLATFORM_NAND_WRITE_IN)
1890 if (deviceid == PLATFORM_DEVID_MT29F2G16ABAFA) {
1891 p_device = &gDeviceNand;
1892 }
1893 #endif
1895 #if (PLATFORM_NOR_WRITE_IN)
1896 if (deviceid == PLATFORM_DEVID_NORN25Q128A13ESF40F) {
1897 p_device = &gDeviceNor;
1898 }
1899 #endif
1901 #if (PLATFORM_QSPI_FLASH_IN)
1902 if (deviceid == PLATFORM_DEVID_QSPIFLASH_S25FL512S) {
1903 p_device = &gDeviceQspiFlash;
1904 }
1905 #endif
1907 #if (PLATFORM_QSPI_FLASH_WRITE_IN)
1908 if (deviceid == PLATFORM_DEVID_QSPIFLASH_S25FL512S) {
1909 if (qspiFlashWrite (&gDeviceQspiFlash, offset, len, buf, qspiWriteMode)
1910 != SUCCESS) {
1911 return ( (Platform_STATUS) Platform_EFAIL);
1912 }
1913 return Platform_EOK;
1914 }
1915 #endif
1916 /* Calculate the usable page area.. Its the size of the page */
1917 useable_page_size = p_device->page_size;
1919 /* allocate a buffer big enough to hold one block (must include spare area) */
1920 block_size = p_device->page_size * p_device->page_count;
1922 pBlock = Osal_platformMalloc(platform_roundup(block_size, PLATFORM_CACHE_LINE_SIZE),
1923 PLATFORM_CACHE_LINE_SIZE);
1925 if ( !pBlock ){
1926 platform_errno = PLATFORM_ERRNO_OOM;
1927 retval = Platform_EFAIL;
1928 goto FLASHWRITE_ERROR;
1929 }
1931 /* allocate a buffer big enough to hold one page of the flash */
1932 pPage = Osal_platformMalloc(platform_roundup(p_device->page_size, PLATFORM_CACHE_LINE_SIZE),
1933 PLATFORM_CACHE_LINE_SIZE);
1935 if ( !pPage ){
1936 platform_errno = PLATFORM_ERRNO_OOM;
1937 retval = Platform_EFAIL;
1938 goto FLASHWRITE_ERROR;
1939 }
1941 /* Get starting address */
1942 addr.uiColumnAddr= 0;
1943 if (platform_offset_to_blocknpage(deviceid, offset, &addr.uiBlockAddr, &addr.uiPageAddr) != Platform_EOK) {
1944 retval = Platform_EUNSUPPORTED;
1945 goto FLASHWRITE_ERROR;
1946 }
1948 /*
1949 * We can now write the file to flash. The basic algorithm is this:
1950 * Read the bad block table
1951 * While we have data to write do
1952 * skip block if bad
1953 * read the block (page level)
1954 * erase the block (block level)
1955 * write the block (page level)
1956 */
1958 /* set index to start of the data to write */
1959 bufindex = 0;
1961 /* Initialize the starting block we will be using */
1962 block = addr.uiBlockAddr;
1963 StartAddress.uiBlockAddr = addr.uiBlockAddr;
1964 StartAddress.uiPageAddr = addr.uiPageAddr;
1965 StartAddress.uiColumnAddr = 0;
1967 while (len) {
1969 /* Skip bad blocks */
1970 if (p_device->bblist) {
1971 if (p_device->bblist[block] == 0x00) {
1972 /* Block is bad, skip to next good one */
1973 IFPRINT(UART_printf( "platform_device_write: Skipping bad block %d. \n", block));
1974 block++;
1975 while (p_device->bblist[block] == 0x00) {
1976 block++;
1977 }
1978 }
1979 }
1981 /* Make sure we didn't exceed number of blocks */
1982 if (block > p_device->block_count) {
1983 IFPRINT(UART_printf( "Due to bad blocks, you have run out of room in the Flash for this image. \n"));
1984 platform_errno = PLATFORM_ERRNO_NOFREEBLOCKS;
1985 retval = Platform_EFAIL;
1986 goto FLASHWRITE_ERROR;
1987 }
1989 IFPRINT(UART_printf( "platform_device_write: Writing block %d \n", block));
1991 /*
1992 * Read the block..
1993 * may need to preserve what we don't actually write out.
1994 */
1995 for (page=0, index = 0; page < p_device->page_count;
1996 page++, index +=p_device->page_size) {
1997 addr.uiBlockAddr = block;
1998 addr.uiPageAddr = page;
1999 addr.uiColumnAddr= 0;
2000 if (p_device->handle == PLATFORM_DEVID_MT29F2G16ABAFA) {
2001 #if (PLATFORM_NAND_WRITE_IN)
2003 if (readNandPage (&gDeviceNand, addr, (uint8_t *)(pBlock + index)) != SUCCESS) {
2004 retval = Platform_EFAIL;
2005 IFPRINT(UART_printf( "platform_device_write: Error reading block %d page %d. \n", block, page));
2006 goto FLASHWRITE_ERROR;
2007 }
2008 #endif
2009 }
2010 else if (p_device->handle == PLATFORM_DEVID_NORN25Q128A13ESF40F) {
2011 #if (PLATFORM_NOR_WRITE_IN)
2012 (void) platform_blocknpage_to_offset(p_device->handle, &noraddress, addr.uiBlockAddr, addr.uiPageAddr);
2013 if (nor_read (&gDeviceNor, noraddress, p_device->page_size, (uint8_t *)(pBlock + index)) != SUCCESS) {
2014 retval = Platform_EFAIL;
2015 UART_printf( "platform_device_write: Error reading block %d page %d. \n", block, page);
2016 goto FLASHWRITE_ERROR;
2017 }
2018 #endif
2019 }
2020 else {
2021 #if (PLATFORM_QSPI_FLASH_WRITE_IN)
2022 (void) platform_blocknpage_to_offset(p_device->handle, &qspiflashaddress, addr.uiBlockAddr, addr.uiPageAddr);
2023 if (qspiFlashRead (&gDeviceQspiFlash, qspiflashaddress, p_device->page_size, (uint8_t *)(pBlock + index), qspiReadMode) != SUCCESS) {
2024 retval = Platform_EFAIL;
2025 UART_printf( "platform_device_write: Error reading block %d page %d. \n", block, page);
2026 goto FLASHWRITE_ERROR;
2027 }
2028 #endif
2029 }
2030 }
2032 /* erase the block */
2033 if (p_device->handle == PLATFORM_DEVID_MT29F2G16ABAFA) {
2034 #if (PLATFORM_NAND_WRITE_IN)
2035 if (nandFlashBlockErase (&gDeviceNand, block) != SUCCESS) {
2036 IFPRINT(UART_printf( "platform_device_write: Could not erase block %d. \n", block));
2037 retval = Platform_EFAIL;
2038 goto FLASHWRITE_ERROR;
2039 }
2040 #endif
2041 }
2042 else if (p_device->handle == PLATFORM_DEVID_NORN25Q128A13ESF40F) {
2043 #if (PLATFORM_NOR_WRITE_IN)
2044 if (nor_erase (&gDeviceNor, block) != SUCCESS) {
2045 IFPRINT(UART_printf( "platform_device_write: Could not erase block %d. \n", block));
2046 retval = Platform_EFAIL;
2047 goto FLASHWRITE_ERROR;
2048 }
2049 #endif
2050 }
2051 else {
2052 #if (PLATFORM_QSPI_FLASH_WRITE_IN)
2053 if (qspiFlashErase (&gDeviceQspiFlash, block) != SUCCESS) {
2054 IFPRINT(UART_printf( "platform_device_write: Could not erase block %d. \n", block));
2055 retval = Platform_EFAIL;
2056 goto FLASHWRITE_ERROR;
2057 }
2058 #endif
2059 }
2061 /*
2062 * Write the block...
2063 * - Get one page of data and write out or
2064 * - if we run out of data re-write what we previously read.
2065 */
2066 for (page = 0, index = 0; page < p_device->page_count;
2067 page++, index +=p_device->page_size) {
2069 IFPRINT(UART_printf( "platform_device_write: Writing to block %d page %d \n", block, page));
2071 if (block == StartAddress.uiBlockAddr && page < StartAddress.uiPageAddr) {
2072 /* if we are within the first block we are writing, then we may have a start
2073 * page other than page 0, so re-write what was there.
2074 */
2075 memcpy(pPage, (pBlock+bufindex), useable_page_size);
2076 }
2077 else
2078 if (len == 0) {
2079 /* we wrote all the data, so write back any pages we pre-read that are left */
2080 memcpy(pPage, (pBlock+bufindex), useable_page_size);
2081 }
2082 else
2083 if (len < useable_page_size) {
2084 /* we have less than a full page of data */
2085 memset(pPage, 0xFF, p_device->page_size);
2086 memcpy(pPage, (buf+bufindex), len);
2087 len = 0;
2088 }
2089 else {
2090 /* get a full page of data */
2091 memcpy(pPage, (buf+bufindex), useable_page_size);
2092 len -= useable_page_size;
2093 bufindex += useable_page_size;
2094 }
2095 /* write the page */
2096 addr.uiBlockAddr = block;
2097 addr.uiPageAddr = page;
2098 addr.uiColumnAddr= 0;
2099 if (p_device->handle == PLATFORM_DEVID_MT29F2G16ABAFA) {
2100 #if (PLATFORM_NAND_WRITE_IN)
2101 if (writeNandPage (&gDeviceNand, addr, pPage) != SUCCESS) {
2102 IFPRINT(UART_printf( "platform_device_write: Error writing block %d page %d. \n", block, page));
2103 retval = Platform_EFAIL;
2104 goto FLASHWRITE_ERROR;
2105 }
2106 #endif
2107 }
2108 else if (p_device->handle == PLATFORM_DEVID_NORN25Q128A13ESF40F) {
2109 #if (PLATFORM_NOR_WRITE_IN)
2110 (void) platform_blocknpage_to_offset(p_device->handle, &noraddress, addr.uiBlockAddr, addr.uiPageAddr);
2111 if (nor_write(&gDeviceNor, noraddress, p_device->page_size, pPage) != SUCCESS) {
2112 IFPRINT(UART_printf( "platform_device_write: Error writing block %d page %d. \n", block, page));
2113 retval = Platform_EFAIL;
2114 goto FLASHWRITE_ERROR;
2115 }
2116 #endif
2117 }
2118 else {
2119 #if (PLATFORM_QSPI_FLASH_WRITE_IN)
2120 (void) platform_blocknpage_to_offset(p_device->handle, &qspiflashaddress, addr.uiBlockAddr, addr.uiPageAddr);
2121 if (qspiFlashWrite(&gDeviceQspiFlash, qspiflashaddress, p_device->page_size, pPage, qspiWriteMode) != SUCCESS) {
2122 IFPRINT(UART_printf( "platform_device_write: Error writing block %d page %d. \n", block, page));
2123 retval = Platform_EFAIL;
2124 goto FLASHWRITE_ERROR;
2125 }
2126 #endif
2127 }
2128 }
2130 /* increment to the next block */
2131 block++;
2132 }
2134 FLASHWRITE_ERROR:
2136 if (pBlock) {
2137 Osal_platformFree( pBlock, platform_roundup(block_size, PLATFORM_CACHE_LINE_SIZE) );
2138 }
2140 if (pPage) {
2141 Osal_platformFree( pPage, platform_roundup(p_device->page_size, PLATFORM_CACHE_LINE_SIZE));
2142 }
2144 return retval;
2145 }
2146 #endif
2148 #if (PLATFORM_I2C_EEPROM_IN) && (PLATFORM_I2C_EEPROM_WRITE_IN)
2149 uint8_t i2cportnumber=0;
2150 if (deviceid == PLATFORM_DEVID_EEPROM50) {
2151 if (i2cEepromWriteByteAddr(offset, 0x50, buf, len, I2C_RELEASE_BUS,i2cportnumber) != I2C_RET_OK) {
2152 IFPRINT(UART_printf("platform_device_write: EEPROM write for address 0x%x failed\n", 0x50));
2153 platform_errno = PLATFORM_ERRNO_EEPROM;
2154 return ( (Platform_STATUS) Platform_EFAIL);
2155 }
2156 return Platform_EOK;
2157 }
2159 if (deviceid == PLATFORM_DEVID_EEPROM51) {
2160 if (i2cEepromWriteByteAddr(offset, 0x51, buf, len, I2C_RELEASE_BUS,i2cportnumber) != I2C_RET_OK) {
2161 IFPRINT(UART_printf("platform_device_write: EEPROM write for address 0x%x failed\n", 0x51));
2162 platform_errno = PLATFORM_ERRNO_EEPROM;
2163 return ( (Platform_STATUS) Platform_EFAIL);
2164 }
2165 return Platform_EOK;
2166 }
2168 #endif
2170 #if (PLATFORM_MMCHS_IN)
2172 if (deviceid == PLATFORM_DEVID_EMMC){
2173 //TODO: Need to add support for writing data which is not multiple of block length
2174 if (mmchsBlockWrite (mmcCard, offset, (len/MMCHS_BLK_LEN), buf) != SUCCESS) {
2175 return ( (Platform_STATUS) Platform_EFAIL);
2176 }
2178 return Platform_EOK;
2179 }
2181 if (deviceid == PLATFORM_DEVID_SD) {
2182 //TODO: Need to add support for writing data which is not multiple of block length
2183 if (mmchsBlockWrite (sdCard, offset, (len/MMCHS_BLK_LEN), buf) != SUCCESS) {
2184 return ( (Platform_STATUS) Platform_EFAIL);
2185 }
2187 return Platform_EOK;
2188 }
2190 #endif
2192 return Platform_EUNSUPPORTED;
2194 }
2195 #endif
2197 /******************************************************************************
2198 * platform_device_erase_block
2199 ******************************************************************************/
2200 #if (PLATFORM_NAND_IN) || (PLATFORM_NOR_IN) || (PLATFORM_I2C_EEPROM_IN)
2201 Platform_STATUS platform_device_erase_block(PLATFORM_DEVHANDLE deviceid,
2202 uint32_t block_number) {
2204 IFPRINT(UART_printf("platform_device_erase_block(handle=0x%x, blockt=%d) called \n",
2205 deviceid, block_number));
2207 #if (PLATFORM_NAND_IN) && (PLATFORM_NAND_WRITE_IN)
2208 if (deviceid == PLATFORM_DEVID_MT29F2G16ABAFA) {
2209 if (block_number >= gDeviceNand.block_count) {
2210 platform_errno = PLATFORM_ERRNO_INVALID_ARGUMENT;
2211 return Platform_EINVALID;
2212 }
2213 if (nandFlashBlockErase (&gDeviceNand, block_number) != SUCCESS) {
2214 return ( (Platform_STATUS) Platform_EFAIL);
2215 }
2216 return Platform_EOK;
2217 }
2218 #endif
2220 #if (PLATFORM_NOR_IN) && (PLATFORM_NOR_WRITE_IN)
2221 if (deviceid == PLATFORM_DEVID_NORN25Q128A13ESF40F) {
2222 if (block_number > gDeviceNor.block_count) {
2223 platform_errno = PLATFORM_ERRNO_INVALID_ARGUMENT;
2224 return Platform_EINVALID;
2225 }
2226 if (nor_erase (&gDeviceNor, block_number) != SUCCESS) {
2227 return ( (Platform_STATUS) Platform_EFAIL);
2228 }
2229 return Platform_EOK;
2230 }
2231 #endif
2233 #if (PLATFORM_QSPI_FLASH_IN) && (PLATFORM_QSPI_FLASH_WRITE_IN)
2234 if (deviceid == PLATFORM_DEVID_QSPIFLASH_S25FL512S) {
2235 if (block_number > gDeviceQspiFlash.block_count) {
2236 platform_errno = PLATFORM_ERRNO_INVALID_ARGUMENT;
2237 return Platform_EINVALID;
2238 }
2239 if (qspiFlashErase (&gDeviceQspiFlash, block_number) != SUCCESS) {
2240 return ( (Platform_STATUS) Platform_EFAIL);
2241 }
2242 return Platform_EOK;
2243 }
2244 #endif
2246 return Platform_EUNSUPPORTED;
2247 }
2248 #endif
2250 /******************************************************************************
2251 * platform_device_print_info
2252 ******************************************************************************/
2253 #if (PLATFORM_MMCHS_IN)
2254 Platform_STATUS platform_device_print_info(PLATFORM_DEVHANDLE deviceid) {
2256 IFPRINT(UART_printf("platform_device_print_info(handle=0x%x) called \n",
2257 deviceid));
2259 #if (PLATFORM_MMCHS_IN)
2260 if (deviceid == PLATFORM_DEVID_EMMC) {
2261 mmchsPrintCardInfo(mmcCard);
2262 return Platform_EOK;
2263 }
2264 else if (deviceid == PLATFORM_DEVID_SD) {
2265 mmchsPrintCardInfo(sdCard);
2266 return Platform_EOK;
2267 }
2269 return Platform_EUNSUPPORTED;
2271 #endif
2272 }
2273 #endif
2275 /******************************************************************************
2276 * platform_device_set_speed
2277 ******************************************************************************/
2278 #if (PLATFORM_MMCHS_IN)
2279 Platform_STATUS platform_device_set_speed(PLATFORM_DEVHANDLE deviceid,
2280 uint32_t speed) {
2282 mmchsCardInfo *cardInfo = NULL;
2284 IFPRINT(UART_printf("platform_device_set_speed(handle=0x%x, speed=%d) called \n",
2285 deviceid, speed));
2287 #if (PLATFORM_MMCHS_IN)
2288 if (deviceid == PLATFORM_DEVID_EMMC) {
2289 cardInfo = mmcCard;
2290 }
2291 else if (deviceid == PLATFORM_DEVID_SD) {
2292 cardInfo = sdCard;
2293 }
2295 if(cardInfo != NULL)
2296 {
2297 if (mmchsSetTranSpeed(cardInfo,speed) != SUCCESS) {
2298 return ( (Platform_STATUS) Platform_EFAIL);
2299 }
2301 return Platform_EOK;
2302 }
2304 return Platform_EUNSUPPORTED;
2306 #endif
2307 }
2308 #endif
2310 /******************************************************************************
2311 * platform_device_set_bus_width
2312 ******************************************************************************/
2313 #if (PLATFORM_MMCHS_IN)
2314 Platform_STATUS platform_device_set_bus_width(PLATFORM_DEVHANDLE deviceid,
2315 PLATFORM_MMCSD_BUS_WIDTH width) {
2317 mmchsCardInfo *cardInfo = NULL;
2319 IFPRINT(UART_printf("platform_device_set_bus_width(handle=0x%x, Bus width=%d) called \n",
2320 deviceid, width));
2322 #if (PLATFORM_MMCHS_IN)
2323 if (deviceid == PLATFORM_DEVID_EMMC) {
2324 cardInfo = mmcCard;
2325 }
2326 else if (deviceid == PLATFORM_DEVID_SD) {
2327 cardInfo = sdCard;
2328 }
2330 if(cardInfo != NULL)
2331 {
2332 switch(width)
2333 {
2334 case PLATFORM_MMCSD_BUS_1BIT:
2335 mmchsSetBusWidth(cardInfo, SD_BUS_WIDTH_1BIT);
2336 break;
2338 case PLATFORM_MMCSD_BUS_4BIT:
2339 mmchsSetBusWidth(cardInfo, SD_BUS_WIDTH_4BIT);
2340 mmchsPrintCSD(cardInfo);
2341 break;
2343 case PLATFORM_MMCSD_BUS_8BIT:
2344 mmchsSetBusWidth(cardInfo, SD_BUS_WIDTH_8BIT);
2345 mmchsPrintECSD(cardInfo);
2346 break;
2347 }
2349 return Platform_EOK;
2350 }
2352 return Platform_EUNSUPPORTED;
2354 #endif
2355 }
2356 #endif
2358 /******************************************************************************
2359 * platform_device_set_params
2360 ******************************************************************************/
2361 #if (PLATFORM_QSPI_FLASH_IN)
2362 Platform_STATUS platform_device_set_params(PLATFORM_DEVHANDLE deviceid, void *params)
2363 {
2364 Platform_STATUS status;
2365 PLATFORM_DEVICE_info *p_info;
2367 if(deviceid == PLATFORM_DEVID_QSPIFLASH_S25FL512S)
2368 {
2369 qspiReadMode = ((PLATFORM_QSPI_Params *)params)->read_mode;
2370 qspiWriteMode = ((PLATFORM_QSPI_Params *)params)->write_mode;
2371 p_info = &gDeviceQspiFlash;
2372 if (qspiReadMode == PLATFORM_QSPI_IO_MODE_QUAD)
2373 {
2374 status = qspiFlashQuadModeCtrl(p_info, 1);
2375 return status;
2376 }
2377 else
2378 {
2379 status = qspiFlashQuadModeCtrl(p_info, 0);
2380 return status;
2381 }
2382 }
2384 return (Platform_EOK);
2385 }
2386 #endif
2388 #if PLATFORM_CACHE_IN
2389 uint32_t Convert_CoreLocal2GlobalAddr (uint32_t addr)
2390 {
2391 uint32_t coreNum;
2393 /* Get the core number. */
2394 #ifdef SIMULATOR_SUPPORT
2395 coreNum = CSL_chipReadDNUM();
2396 #else
2397 coreNum = platform_get_coreid();
2398 #endif
2399 /* Check if the address is a valid Local L2 address to convert */
2400 if ( (addr >= (uint32_t) 0x800000) &&
2401 (addr < (uint32_t) 0x900000) ) {
2402 /* Compute the global address. */
2403 return ((1 << 28) | (coreNum << 24) | (addr & 0x00ffffff));
2404 }
2405 else {
2406 return (addr);
2407 }
2408 }
2409 #endif
2411 /* OSAL functions for Platform Library */
2412 uint8_t *Osal_platformMalloc (uint32_t num_bytes, uint32_t alignment)
2413 {
2414 return malloc(num_bytes);
2415 }
2417 void Osal_platformFree (uint8_t *dataPtr, uint32_t num_bytes)
2418 {
2419 /* Free up the memory */
2420 if (dataPtr)
2421 {
2422 free(dataPtr);
2423 }
2424 }
2426 void Osal_platformSpiCsEnter(void)
2427 {
2429 }
2431 void Osal_platformSpiCsExit (void)
2432 {
2434 }