[processor-sdk/performance-audio-sr.git] / psdk_cust / pdk_k2g_1_0_1_1_eng / packages / ti / board / diag / lcd / src / evmk2g_pwm.c
1 /*
2 * Copyright (c) 2015, Texas Instruments Incorporated
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * * Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 *
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * * Neither the name of Texas Instruments Incorporated nor the names of
17 * its contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
22 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
24 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
25 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
26 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
27 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
28 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
29 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
30 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 */
34 /**
35 *
36 * \file evmck2g_pwm.c
37 *
38 * \brief This file contains functions for pwm driver
39 *
40 ******************************************************************************/
42 #include "platform_internal.h"
44 #if (PLATFORM_PWM_IN)
46 /******************************************************************************
47 ** GLOBAL DEFINITIONS
48 ******************************************************************************/
50 hEcapHandle hEcap = (hEcapHandle)CSL_ECAP_0_CFG_REGS;
51 hPwmssHandle hPwmss = (hPwmssHandle)CSL_PWM_0_CFG_REGS;
53 #define CSL_ECAP_FIXED 0 //TODO Has to be revisited after fixing CSL.
55 #if !(CSL_ECAP_FIXED)
56 static void reg_wr_32(Uint32 baseAddr,Uint32 writeData)
57 {
58 (*(Uint32 *) (baseAddr)) = writeData;
59 }
61 static Uint32 reg_rd_32(Uint32 baseAddr)
62 {
63 Uint32 read_data;
64 read_data = (*(Uint32 *) (baseAddr));
65 return read_data;
66 }
67 #endif
69 /******************************************************************************
70 ** INTERNAL FUNCTION DEFINITIONS
71 ******************************************************************************/
73 /**
74 *
75 * \brief This function initializes the ECAP module and PWM driver.
76 * It also enables the backlight with 50% duty cycle.
77 *
78 * No parameters.
79 *
80 * \return ECAP_SUCCESS - On Success
81 * ECAP_ERR - On Failure
82 *
83 */
84 int8_t pwmInit(void)
85 {
86 #if !(CSL_ECAP_FIXED)
87 Uint32 baseAddr = 0;
88 Uint32 value = 0;
89 #endif
91 pinMuxSetMode(221, 4);
93 /* TODO ECAP control registers and interrupt registers are 16 bit.
94 * But its wrongly defined as 32 bit registers in cslr_ecap.h.
95 * Until a fix for that is in place, we will hardcode the ECCTL registers
96 */
98 #if !(CSL_ECAP_FIXED) //Comment the code after fixing CSL
99 baseAddr = CSL_ECAP_0_CFG_REGS;
101 value = reg_rd_32(baseAddr + ECAP_ECCTL1);
102 value = value >> 16;
103 value |= (ECAP_ECCTL2_APWM_MODE << 9) |
104 (ECAP_ECCTL2_SYNCO_SEL_DISABLE << 6) |
105 (ECAP_ECCTL2_APWM_POLARITY << 10) |
106 (ECAP_ECCTL2_FREERUN_ENABLE << 4);
108 reg_wr_32(baseAddr + ECAP_ECCTL1, value << 16);
110 pwmSetDutyCycle(50);
111 #endif
114 #if (CSL_ECAP_FIXED) //TODO Uncomment the code after fixing CSL
116 /* Configure ECAP module to operate in APWM mode */
117 CSL_FINS(hEcap->ECCTL2, ECAP_ECCTL2_CAP_APWM, ECAP_ECCTL2_APWM_MODE);
119 /* Disable sync out */
120 CSL_FINS(hEcap->ECCTL2, ECAP_ECCTL2_SYNCO_SEL, ECAP_ECCTL2_SYNCO_SEL_DISABLE);
122 /* Configure ECAP to generate PWM waveform with 50% duty cycle. */
123 pwmSetDutyCycle(50);
125 /* Configures output polarity for APWM output. ECAP_PWM_OUT pin as High */
126 CSL_FINS(hEcap->ECCTL2, ECAP_ECCTL2_APWMPOL, ECAP_ECCTL2_APWM_POLARITY);
128 /* Disable APWM mode */
129 CSL_FINS(hEcap->ECCTL2, ECAP_ECCTL2_CAP_APWM, ECAP_ECCTL2_APWM_MODE_DISABLE);
131 /* Configures counter to free running */
132 CSL_FINS(hEcap->ECCTL2, ECAP_ECCTL2_TSCTRSTOP, ECAP_ECCTL2_FREERUN_ENABLE);
134 /* Configure ECAP module to operate in APWM mode */
135 CSL_FINS(hEcap->ECCTL2, ECAP_ECCTL2_CAP_APWM, ECAP_ECCTL2_APWM_MODE);
136 #endif
138 return ECAP_SUCCESS;
139 }
141 /**
142 *
143 * \brief This function is used to set the duty cycle of the PWM waveform.
144 *
145 * \param dutyCycle [IN] : Value of the duty cycle to be set.
146 * 50 - 50% duty cycle.
147 * 75 - 75% duty cycle.
148 *
149 * \return ECAP SUCCESS - On Success.
150 * ECAP_ERR - On Failure.
151 *
152 */
153 int8_t pwmSetDutyCycle(uint8_t dutyCycle)
154 {
155 uint32_t acmpValue;
157 if (dutyCycle <= 100)
158 {
159 acmpValue = ECAP_CAP1_APRD_VALUE;
160 acmpValue = ((acmpValue * dutyCycle) / 100);
162 /* Configure ECAP to generate PWM waveform with dutyCycle */
163 CSL_FINS(hEcap->CAP1, ECAP_CAP1_CAP1, ECAP_CAP1_APRD_VALUE);
164 CSL_FINS(hEcap->CAP2, ECAP_CAP2_CAP2, acmpValue);
166 //platform_write("LCD brightness - %d percent\n", dutyCycle);
167 return ECAP_SUCCESS;
168 }
170 IFPRINT (platform_write("pwmSetDutyCycle: Invalid input - "
171 "dutyCycle is more than 100\n"));
173 return ECAP_ERR;
174 }
176 #endif /* #if (PLATFORM_PWM_IN) */