[processor-sdk/performance-audio-sr.git] / psdk_cust / pdk_k2g_1_0_1_1_eng / packages / ti / csl / csl_msmcAux.h
1 /**
2 * @file csl_msmcAux.h
3 *
4 * @brief
5 * This is the MSMC Auxilary Header File which exposes the various
6 * CSL Functional Layer API's to configure the MSMC Module.
7 *
8 * \par
9 * ============================================================================
10 * @n (C) Copyright 2008, 2009, Texas Instruments, Inc.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 *
16 * Redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer.
18 *
19 * Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in the
21 * documentation and/or other materials provided with the
22 * distribution.
23 *
24 * Neither the name of Texas Instruments Incorporated nor the names of
25 * its contributors may be used to endorse or promote products derived
26 * from this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 */
42 #ifndef _CSL_MSMCAUX_H_
43 #define _CSL_MSMCAUX_H_
45 #ifdef __cplusplus
46 extern "C" {
47 #endif
49 #include <ti/csl/csl_msmc.h>
51 /** @addtogroup CSL_MSMC_FUNCTION
52 @{ */
54 /** ============================================================================
55 * @n@b CSL_MSMC_getPID
56 *
57 * @b Description
58 * @n This function gets the peripheral ID register for the MSMC IP.
59 *
60 * @b Arguments
61 * @n None
62 *
63 * <b> Return Value </b>
64 * @n None
65 *
66 * <b> Pre Condition </b>
67 * @n None
68 *
69 * <b> Post Condition </b>
70 * @n None
71 *
72 * @b Reads
73 * @n MSMC_PID
74 *
75 * @b Example
76 * @verbatim
77 Uint32 pid;
79 // Get the Mode change progress flag
80 mcpFlag = CSL_MSMC_getModeChangeProgress ();
82 @endverbatim
83 * =============================================================================
84 */
85 static inline Uint32 CSL_MSMC_getPID (void)
86 {
87 return hMsmc->PID;
88 }
90 /** ============================================================================
91 * @n@b CSL_MSMC_getModeChangeProgress
92 *
93 * @b Description
94 * @n This function gets the mode change progress flag
95 *
96 * @b Arguments
97 * @n None
98 *
99 * <b> Return Value </b>
100 * @n None
101 *
102 * <b> Pre Condition </b>
103 * @n None
104 *
105 * <b> Post Condition </b>
106 * @n None
107 *
108 * @b Reads
109 * @n MSMC_SMCC_MCP
110 *
111 * @b Example
112 * @verbatim
113 Uint8 mcpFlag;
115 // Get the Mode change progress flag
116 mcpFlag = CSL_MSMC_getModeChangeProgress ();
118 @endverbatim
119 * =============================================================================
120 */
121 static inline Uint8 CSL_MSMC_getModeChangeProgress (void)
122 {
123 return CSL_FEXT (hMsmc->SMCC, MSMC_SMCC_MCP);
124 }
126 /** ============================================================================
127 * @n@b CSL_MSMC_getSoftErrorAddress
128 *
129 * @b Description
130 * @n When ECM bit is 1 in SMCFG register this function gets the corrupted
131 * location error address.
132 *
133 * @b Arguments
134 * @n None
135 *
136 * <b> Return Value </b>
137 * Sof Error Address.
138 *
139 * <b> Pre Condition </b>
140 * @n None
141 *
142 * <b> Post Condition </b>
143 * @n None
144 *
145 * @b Reads
146 * @n MSMC_SMCERRAR_SEADDR
147 *
148 * @b Example
149 * @verbatim
150 Uint32 errAddr;
152 errAddr = CSL_MSMC_getSoftErrorAddress ();
154 @endverbatim
155 * =============================================================================
156 */
157 static inline Uint32 CSL_MSMC_getSoftErrorAddress (void)
158 {
159 return CSL_FEXT (hMsmc->SMCERRAR, MSMC_SMCERRAR_SEADDR);
160 }
162 /** ============================================================================
163 * @n@b CSL_MSMC_getSoftErrorAddressExtension
164 *
165 * @b Description
166 * @n This function gets the address extension used for the faulting address.
167 *
168 * @b Arguments
169 * @n None
170 *
171 * <b> Return Value </b>
172 * Soft Address Extension.
173 *
174 * <b> Pre Condition </b>
175 * @n None
176 *
177 * <b> Post Condition </b>
178 * @n None
179 *
180 * @b Reads
181 * @n MSMC_SMCERRXR_ESYN, MSMC_SMCERRXR_SEEADDR, MSMC_SMCERRXR_SEPID,MSMC_SMCERRXR_SER
182 *
183 * @b Example
184 * @verbatim
185 Uint8 esyn;
186 Uint8 errAddrExt;
187 Uint8 sepId;
188 Uint8 ser;
190 CSL_MSMC_getSoftErrorAddressExtension (&esyn, &errAddrExt, &sepId, &ser);
192 @endverbatim
193 * =============================================================================
194 */
195 static inline void CSL_MSMC_getSoftErrorAddressExtension
196 (
197 Uint8* esyn,
198 Uint8* address,
199 Uint8* sepId,
200 Uint8* ser
201 )
202 {
203 Uint32 value = hMsmc->SMCERRXR;
205 *esyn = CSL_FEXT (value, MSMC_SMCERRXR_ESYN);
206 *address = CSL_FEXT (value, MSMC_SMCERRXR_SEEADDR);
207 *sepId = CSL_FEXT (value, MSMC_SMCERRXR_SEPID);
208 *ser = CSL_FEXT (value, MSMC_SMCERRXR_SER);
209 }
211 /** ============================================================================
212 * @n@b CSL_MSMC_setCounterBankRefreshRead
213 *
214 * @b Description
215 * @n This function programs REFDEL counter to the number of MSMC clock cycles
216 * between each bank refresh read access.
217 *
218 * @b Arguments
219 @verbatim
220 refdel number of MSMC clock cycles
221 @endverbatim
222 *
223 * <b> Return Value </b>
224 * @n None
225 *
226 * <b> Pre Condition </b>
227 * @n None
228 *
229 * <b> Post Condition </b>
230 * @n None
231 *
232 * @b Writes
233 * @n MSMC_SMEDCC_REFDEL
234 *
235 * @b Example
236 * @verbatim
238 CSL_MSMC_setCounterBankRefreshRead (1);
240 @endverbatim
241 * =============================================================================
242 */
243 static inline void CSL_MSMC_setCounterBankRefreshRead (Uint32 refdel)
244 {
245 CSL_FINS (hMsmc->SMEDCC, MSMC_SMEDCC_REFDEL, refdel);
246 }
248 /** ============================================================================
249 * @n@b CSL_MSMC_getCounterBankRefreshRead
250 *
251 * @b Description
252 * @n This function gets REFDEL counter to the number of MSMC clock cycles
253 * between each bank refresh read access.
254 *
255 * @b Arguments
256 * @n None
257 *
258 * <b> Return Value </b>
259 * REFDEL counter
260 *
261 * <b> Pre Condition </b>
262 * @n None
263 *
264 * <b> Post Condition </b>
265 * @n None
266 *
267 * @b Reads
268 * @n MSMC_SMEDCC_REFDEL
269 *
270 * @b Example
271 * @verbatim
272 Uint32 refdel;
274 refdel = CSL_MSMC_getCounterBankRefreshRead ();
276 @endverbatim
277 * =============================================================================
278 */
279 static inline Uint32 CSL_MSMC_getCounterBankRefreshRead (void)
280 {
281 return CSL_FEXT (hMsmc->SMEDCC, MSMC_SMEDCC_REFDEL);
282 }
284 /** ============================================================================
285 * @n@b CSL_MSMC_getParityRAM
286 *
287 * @b Description
288 * @n This function programs gets the parity RAM status
289 *
290 * @b Arguments
291 @verbatim
292 None
293 @endverbatim
294 *
295 * <b> Return Value </b>
296 * @n Parity RAM
297 *
298 * <b> Pre Condition </b>
299 * @n None
300 *
301 * <b> Post Condition </b>
302 * @n None
303 *
304 * @b Reads
305 * @n MSMC_SMEDCC_PRR
306 *
307 * @b Example
308 * @verbatim
310 Uint8 parityRAM;
312 parityRAM = CSL_MSMC_getParityRAM ();
314 @endverbatim
315 * =============================================================================
316 */
317 static inline Uint8 CSL_MSMC_getParityRAM (void)
318 {
319 return CSL_FEXT (hMsmc->SMEDCC, MSMC_SMEDCC_PRR);
320 }
322 /** ============================================================================
323 * @n@b CSL_MSMC_getCSE
324 *
325 * @b Description
326 * @n This function programs reads the CSE bit to determine if there is a parity
327 * mismatch
328 *
329 * @b Arguments
330 @verbatim
331 None
332 @endverbatim
333 *
334 * <b> Return Value </b>
335 * @n CSE Status
336 *
337 * <b> Pre Condition </b>
338 * @n None
339 *
340 * <b> Post Condition </b>
341 * @n None
342 *
343 * @b Reads
344 * @n MSMC_SMEDCC_CSE
345 *
346 * @b Example
347 * @verbatim
349 Uint8 cse;
351 cse = CSL_MSMC_getCSE ();
353 @endverbatim
354 * =============================================================================
355 */
356 static inline Uint8 CSL_MSMC_getCSE (void)
357 {
358 return CSL_FEXT (hMsmc->SMEDCC, MSMC_SMEDCC_CSE);
359 }
361 /** ============================================================================
362 * @n@b CSL_MSMC_setCSE
363 *
364 * @b Description
365 * @n This function programs sets the CSE bit
366 *
367 * @b Arguments
368 @verbatim
369 None
370 @endverbatim
371 *
372 * <b> Return Value </b>
373 * @n None
374 *
375 * <b> Pre Condition </b>
376 * @n None
377 *
378 * <b> Post Condition </b>
379 * @n None
380 *
381 * @b Writes
382 * @n MSMC_SMEDCC_CSE
383 *
384 * @b Example
385 * @verbatim
387 // Clear the CSE Bit.
388 CSL_MSMC_setCSE (0);
390 @endverbatim
391 * =============================================================================
392 */
393 static inline void CSL_MSMC_setCSE (Uint8 cse)
394 {
395 CSL_FINS(hMsmc->SMEDCC, MSMC_SMEDCC_CSE, cse);
396 }
398 /** ============================================================================
399 * @n@b CSL_MSMC_getECM
400 *
401 * @b Description
402 * @n This function programs gets the status of the error correcting mode
403 *
404 * @b Arguments
405 @verbatim
406 None
407 @endverbatim
408 *
409 * <b> Return Value </b>
410 * @n ECM Mode
411 *
412 * <b> Pre Condition </b>
413 * @n None
414 *
415 * <b> Post Condition </b>
416 * @n None
417 *
418 * @b Reads
419 * @n MSMC_SMEDCC_ECM
420 *
421 * @b Example
422 * @verbatim
424 Uint8 ecm;
426 ecm = CSL_MSMC_getECM ();
428 @endverbatim
429 * =============================================================================
430 */
431 static inline Uint8 CSL_MSMC_getECM (void)
432 {
433 return CSL_FEXT (hMsmc->SMEDCC, MSMC_SMEDCC_ECM);
434 }
436 /** ============================================================================
437 * @n@b CSL_MSMC_setECM
438 *
439 * @b Description
440 * @n This function programs sets the error correcting mode.
441 *
442 * @b Arguments
443 @verbatim
444 None
445 @endverbatim
446 *
447 * <b> Return Value </b>
448 * @n None
449 *
450 * <b> Pre Condition </b>
451 * @n None
452 *
453 * <b> Post Condition </b>
454 * @n None
455 *
456 * @b Writes
457 * @n MSMC_SMEDCC_ECM
458 *
459 * @b Example
460 * @verbatim
462 // Set Error Correcting Mode
463 CSL_MSMC_setECM (0);
465 @endverbatim
466 * =============================================================================
467 */
468 static inline void CSL_MSMC_setECM (Uint8 ecm)
469 {
470 CSL_FINS(hMsmc->SMEDCC, MSMC_SMEDCC_ECM, ecm);
471 }
473 /** ============================================================================
474 * @n@b CSL_MSMC_enableScrubbingEngine
475 *
476 * @b Description
477 * @n This function enables the scrubbing engine.
478 *
479 * @b Arguments
480 * @n None
481 *
482 * <b> Return Value </b>
483 * @n None
484 *
485 * <b> Pre Condition </b>
486 * @n None
487 *
488 * <b> Post Condition </b>
489 * @n Scrubbing Engine is enabled.
490 *
491 * @b Writes
492 * @n MSMC_SMEDCC_SEN=0
493 *
494 * @b Example
495 * @verbatim
496 CSL_MSMC_enableScrubbingEngine ();
498 @endverbatim
499 * =============================================================================
500 */
501 static inline void CSL_MSMC_enableScrubbingEngine (void)
502 {
503 CSL_FINS (hMsmc->SMEDCC, MSMC_SMEDCC_SEN, 0x0);
504 }
506 /** ============================================================================
507 * @n@b CSL_MSMC_disableScrubbingEngine
508 *
509 * @b Description
510 * @n This function disables the scrubbing engine.
511 *
512 * @b Arguments
513 * @n None
514 *
515 * <b> Return Value </b>
516 * @n None
517 *
518 * <b> Pre Condition </b>
519 * @n None
520 *
521 * <b> Post Condition </b>
522 * @n Scrubbing Engine is disabled.
523 *
524 * @b Writes
525 * @n MSMC_SMEDCC_SEN=1
526 *
527 * @b Example
528 * @verbatim
529 CSL_MSMC_disableScrubbingEngine ();
531 @endverbatim
532 * =============================================================================
533 */
534 static inline void CSL_MSMC_disableScrubbingEngine (void)
535 {
536 CSL_FINS (hMsmc->SMEDCC, MSMC_SMEDCC_SEN, (Uint32)1);
537 }
539 /** ============================================================================
540 * @n@b CSL_MSMC_getScrubbingEngineState
541 *
542 * @b Description
543 * @n This function gets the state of scrubbing engine, if it is
544 * enabled/disabled.
545 *
546 * @b Arguments
547 * @n None
548 *
549 * <b> Return Value </b>
550 * @li 1 - Scrubbing Engine is enabled.
551 * @li 0 - Scrubbing Engine is disabled.
552 *
553 * <b> Pre Condition </b>
554 * @n None
555 *
556 * <b> Post Condition </b>
557 * @n None
558 *
559 * @b Reads
560 * @n MSMC_SMEDCC_SEN
561 *
562 * @b Example
563 * @verbatim
564 Uint32 stateSE;
566 stateSE = CSL_MSMC_getScrubbingEngineState ();
568 @endverbatim
569 * =============================================================================
570 */
571 static inline Uint32 CSL_MSMC_getScrubbingEngineState (void)
572 {
573 return CSL_FEXT (hMsmc->SMEDCC, MSMC_SMEDCC_SEN);
574 }
576 /** ============================================================================
577 * @n@b CSL_MSMC_getScrubErrorCorrectedAddress
578 *
579 * @b Description
580 * @n This function gets address of the location whose contents have been
581 * corrected by the scrubbing engine.
582 *
583 * @b Arguments
584 * @n None
585 *
586 * <b> Return Value </b> Uint32
587 *
588 * <b> Pre Condition </b>
589 * @n None
590 *
591 * <b> Post Condition </b>
592 * @n None
593 *
594 * @b Reads
595 * @n MSMC_SMCEA_SECA
596 *
597 * @b Example
598 * @verbatim
599 Uint32 correctedAddr;
601 correctedAddr = CSL_MSMC_getScrubErrorCorrectedAddress ();
603 @endverbatim
604 * =============================================================================
605 */
606 static inline Uint32 CSL_MSMC_getScrubErrorCorrectedAddress (void)
607 {
608 return CSL_FEXT (hMsmc->SMCEA, MSMC_SMCEA_SECA);
609 }
611 /** ============================================================================
612 * @n@b CSL_MSMC_getSyndromeValue
613 *
614 * @b Description
615 * @n This function gets the syndrome value that identifies the erroneous bit
616 * in the data which the scrubbing engine has corrected.
617 *
618 * @b Arguments
619 * @n None
620 *
621 * <b> Return Value </b>
622 * @n ESYN Field
623 *
624 * <b> Pre Condition </b>
625 * @n None
626 *
627 * <b> Post Condition </b>
628 * @n SMSECA register configured with the value zero.
629 *
630 * @b Reads
631 * @n MSMC_SMCEA_ESYN
632 *
633 * @b Example
634 * @verbatim
635 Uint8 esynValue;
637 esynValue = CSL_MSMC_getSyndromeValue ();
639 @endverbatim
640 * =============================================================================
641 */
642 static inline Uint8 CSL_MSMC_getSyndromeValue (void)
643 {
644 return CSL_FEXT (hMsmc->SMCEA, MSMC_SMCEA_ESYN);
645 }
647 /** ============================================================================
648 * @n@b CSL_MSMC_getScrubCorrectableErrorCounter
649 *
650 * @b Description
651 * @n This function gets the Scrubbing Engine Correctable Error Counter.
652 *
653 * @b Arguments
654 * @n None
655 *
656 * <b> Return Value </b> Uint32
657 *
658 * <b> Pre Condition </b>
659 * @n None
660 *
661 * <b> Post Condition </b>
662 * @n None
663 *
664 * @b Reads
665 * @n MSMC_SMSECC_SCEC
666 *
667 * @b Example
668 * @verbatim
669 Uint32 cCounter;
671 cCounter = CSL_MSMC_getScrubCorrectableErrorCounter ();
673 @endverbatim
674 * =============================================================================
675 */
676 static inline Uint32 CSL_MSMC_getScrubCorrectableErrorCounter (void)
677 {
678 return CSL_FEXT (hMsmc->SMSECC, MSMC_SMSECC_SCEC);
679 }
681 /** ============================================================================
682 * @n@b CSL_MSMC_clearScrubCorrectableErrorCounter
683 *
684 * @b Description
685 * @n This function clears the Scrub Correctable Error Counter.
686 *
687 * @b Arguments
688 * @n None
689 *
690 * <b> Return Value </b>
691 * @n None
692 *
693 * <b> Pre Condition </b>
694 * @n None
695 *
696 * <b> Post Condition </b>
697 * @n SMSECC register configured with the value passed.
698 *
699 * @b Writes
700 * @n MSMC_SMSECC_SCEC=0
701 *
702 * @b Example
703 * @verbatim
704 CSL_MSMC_clearScrubCorrectableErrorCounter ();
706 @endverbatim
707 * =============================================================================
708 */
709 static inline void CSL_MSMC_clearScrubCorrectableErrorCounter (void)
710 {
711 CSL_FINS (hMsmc->SMSECC, MSMC_SMSECC_SCEC, 0);
712 return;
713 }
715 /** ============================================================================
716 * @n@b CSL_MSMC_getScrubNonCorrectableErrorCounter
717 *
718 * @b Description
719 * @n This function gets the Scrubbing Engine NonCorrectable Error Counter.
720 *
721 * @b Arguments
722 * @n None
723 *
724 * <b> Return Value </b> Uint32
725 *
726 * <b> Pre Condition </b>
727 * @n None
728 *
729 * <b> Post Condition </b>
730 * @n None
731 *
732 * @b Reads
733 * @n MSMC_SMSECC_SNCEC
734 *
735 * @b Example
736 * @verbatim
737 Uint32 ncCounter;
739 ncCounter = CSL_MSMC_getScrubNonCorrectableErrorCounter ();
741 @endverbatim
742 * =============================================================================
743 */
744 static inline Uint32 CSL_MSMC_getScrubNonCorrectableErrorCounter (void)
745 {
746 return CSL_FEXT (hMsmc->SMSECC, MSMC_SMSECC_SNCEC);
747 }
749 /** ============================================================================
750 * @n@b CSL_MSMC_clearScrubNonCorrectableErrorCounter
751 *
752 * @b Description
753 * @n his function clears the Scrub Non Correctable Error Counter.
754 *
755 * @b Arguments
756 * @n None
757 *
758 * <b> Return Value </b>
759 * @n None
760 *
761 * <b> Pre Condition </b>
762 * @n None
763 *
764 * <b> Post Condition </b>
765 * @n SMSECC register configured with the value passed.
766 *
767 * @b Writes
768 * @n MSMC_SMSECC_SNCEC=0
769 *
770 * @b Example
771 * @verbatim
772 CSL_MSMC_clearScrubNonCorrectableErrorCounter ();
774 @endverbatim
775 * =============================================================================
776 */
777 static inline void CSL_MSMC_clearScrubNonCorrectableErrorCounter (void)
778 {
779 CSL_FINS (hMsmc->SMSECC, MSMC_SMSECC_SNCEC, 0);
780 return;
781 }
783 /** ============================================================================
784 * @n@b CSL_MSMC_getFaultAddress
785 *
786 * @b Description
787 * @n This function gets the access address causing the fault.
788 *
789 * @b Arguments
790 * @n None
791 *
792 * <b> Return Value </b>
793 * Fault Address
794 *
795 * <b> Pre Condition </b>
796 * @n None
797 *
798 * <b> Post Condition </b>
799 * @n None
800 *
801 * @b Reads
802 * @n MSMC_SMPFAR_FAULT_ADDRESS
803 *
804 * @b Example
805 * @verbatim
806 Uint32 faultAddr;
808 faultAddr = CSL_MSMC_getFaultAddress ();
810 @endverbatim
811 * =============================================================================
812 */
813 static inline Uint32 CSL_MSMC_getFaultAddress (void)
814 {
815 return CSL_FEXT (hMsmc->SMPFAR, MSMC_SMPFAR_FAULT_ADDRESS);
816 }
818 /** ============================================================================
819 * @n@b CSL_MSMC_getFaultAddressNMStatus
820 *
821 * @b Description
822 * @n This function gets the NM Status which is set if the access address
823 * causing the fault does not match any of the segment BADDR
824 *
825 * @b Arguments
826 * @n None
827 *
828 * <b> Return Value </b>
829 * Fault Address NM Status
830 *
831 * <b> Pre Condition </b>
832 * @n None
833 *
834 * <b> Post Condition </b>
835 * @n None
836 *
837 * @b Reads
838 * @n MSMC_SMPFXR_NM
839 *
840 * @b Example
841 * @verbatim
842 Uint8 faultNMStatus;
844 faultNMStatus = CSL_MSMC_getFaultAddressNMStatus ();
846 @endverbatim
847 * =============================================================================
848 */
849 static inline Uint8 CSL_MSMC_getFaultAddressNMStatus(void)
850 {
851 return CSL_FEXT (hMsmc->SMPFXR, MSMC_SMPFXR_NM);
852 }
854 /** ============================================================================
855 * @n@b CSL_MSMC_getFaultInfo
856 *
857 * @b Description
858 * @n This function gets the MSMC fault information. This include the event
859 * bits event bits for all PrivID's and the Master ID which caused the
860 * fault.
861 *
862 * @b Arguments
863 * @verbatim
864 faultPrivID Fault Priv ID populated by this API.
865 faultMstID Fault Master ID populated by this API.
866 @endverbatim
867 *
868 * <b> Return Value </b>
869 * @n None
870 *
871 * <b> Pre Condition </b>
872 * @n None
873 *
874 * <b> Post Condition </b>
875 * @n None
876 *
877 * @b Reads
878 * @n MSMC_SMPFR_FPID, MSMC_SMPFR_FMSTID
879 *
880 * @b Example
881 * @verbatim
882 Uint8 faultPrivID;
883 Uint8 faultMstID;
885 // Get the fault information.
886 CSL_MSMC_getFaultInfo &faultPrivID, &faultMstID);
888 @endverbatim
889 * =============================================================================
890 */
891 static inline void CSL_MSMC_getFaultInfo (Uint8* faultPrivID, Uint8* faultMstID)
892 {
893 Uint32 value = hMsmc->SMPFR;
895 *faultPrivID = CSL_FEXT (value, MSMC_SMPFR_FPID);
896 *faultMstID = CSL_FEXT (value, MSMC_SMPFR_FMSTID);
897 }
899 /** ============================================================================
900 * @n@b CSL_MSMC_clearFaultPrivID
901 *
902 * @b Description
903 * @n This function clears the faulted PrivID bit set in SMPFV register.
904 *
905 * @b Arguments
906 * @n None
907 *
908 * <b> Return Value </b>
909 * @n None
910 *
911 * <b> Pre Condition </b>
912 * @n None
913 *
914 * <b> Post Condition </b>
915 * @n Fault ID is cleared.
916 *
917 * @b Writes
918 * @n MSMC_SMPFCR_CLR=1
919 *
920 * @b Example
921 * @verbatim
922 CSL_MSMC_clearFaultPrivID ();
924 @endverbatim
925 * =============================================================================
926 */
927 static inline void CSL_MSMC_clearFaultPrivID (void)
928 {
929 CSL_FINS (hMsmc->SMPFCR, MSMC_SMPFCR_CLR, 1);
930 return;
931 }
933 /** ============================================================================
934 * @n@b CSL_MSMC_setStarvationBoundCGEM
935 *
936 * @b Description
937 * @n This function sets the starvation bound for CCGEM slaves.
938 *
939 * @b Arguments
940 @verbatim
941 index CGEM slave to configure starvation bound for
942 strvEmifArbiter Starvation bound to be configured for the EMIF Arbiter
943 strvRAMArbiter Starvation bound to be configured for the RAM Bank Arbiter
944 @endverbatim
945 *
946 * <b> Return Value </b>
947 * @n None
948 *
949 * <b> Pre Condition </b>
950 * @n None
951 *
952 * <b> Post Condition </b>
953 * @n None
954 *
955 * @b Writes
956 * @n MSMC_SBNDC0_SCNTCE, MSMC_SBNDC0_SCNTCM
957 *
958 * @b Example
959 * @verbatim
960 CSL_MSMC_setStarvationBoundCGEM (1,1,1);
962 @endverbatim
963 * =============================================================================
964 */
965 static inline void CSL_MSMC_setStarvationBoundCGEM
966 (
967 Uint32 index,
968 Uint8 strvEmifArbiter,
969 Uint8 strvRAMArbiter
970 )
971 {
972 hMsmc->SBND[index] = CSL_FMK (MSMC_SBNDC0_SCNTCE, strvEmifArbiter) |
973 CSL_FMK (MSMC_SBNDC0_SCNTCM, strvRAMArbiter);
974 return;
975 }
977 /** ============================================================================
978 * @n@b CSL_MSMC_getStarvationBoundCGEM
979 *
980 * @b Description
981 * @n This function gets the starvation bound for CCGEM slaves.
982 *
983 * @b Arguments
984 @verbatim
985 index CGEM slave index
986 strvEmifArbiter Starvation bound for the EMIF Arbiter
987 strvRAMArbiter Starvation bound for the RAM Bank Arbiter
988 @endverbatim
989 *
990 * <b> Return Value </b>
991 * @n None
992 *
993 * <b> Pre Condition </b>
994 * @n None
995 *
996 * <b> Post Condition </b>
997 * @n None
998 *
999 * @b Reads
1000 * @n MSMC_SBNDC0_SCNTCE, MSMC_SBNDC0_SCNTCM
1001 *
1002 * @b Example
1003 * @verbatim
1004 Uint8 strvEMIF;
1005 Uint8 strvRAM;
1007 CSL_MSMC_getStarvationBoundCGEM (1, &strvEMIF, &strvRAM);
1009 @endverbatim
1010 * =============================================================================
1011 */
1012 static inline void CSL_MSMC_getStarvationBoundCGEM
1013 (
1014 Uint32 index,
1015 Uint8* strvEmifArbiter,
1016 Uint8* strvRAMArbiter
1017 )
1018 {
1019 Uint32 value = hMsmc->SBND[index];
1020 *strvEmifArbiter = CSL_FEXT (value, MSMC_SBNDC0_SCNTCE);
1021 *strvRAMArbiter = CSL_FEXT (value, MSMC_SBNDC0_SCNTCM);
1022 }
1024 /** ============================================================================
1025 * @n@b CSL_MSMC_setStarvationBoundSMS
1026 *
1027 * @b Description
1028 * @n This function sets the starvation bound for SMS port.
1029 *
1030 * @b Arguments
1031 @verbatim
1032 sbnd starvation bound to be configured
1033 @endverbatim
1034 *
1035 * <b> Return Value </b>
1036 * @n None
1037 *
1038 * <b> Pre Condition </b>
1039 * @n None
1040 *
1041 * <b> Post Condition </b>
1042 * @n Starvation Count for the SMS Port is configured.
1043 *
1044 * @b Writes
1045 * @n MSMC_SBNDM_SCNTMM
1046 *
1047 * @b Example
1048 * @verbatim
1049 CSL_MSMC_setStarvationBoundSMS (1);
1051 @endverbatim
1052 * =============================================================================
1053 */
1054 static inline void CSL_MSMC_setStarvationBoundSMS (Uint32 sbnd)
1055 {
1056 CSL_FINS (hMsmc->SBNDM, MSMC_SBNDM_SCNTMM, sbnd);
1057 return;
1058 }
1060 /** ============================================================================
1061 * @n@b CSL_MSMC_getStarvationBoundSMS
1062 *
1063 * @b Description
1064 * @n This function gets the starvation bound for SMS port.
1065 *
1066 * @b Arguments
1067 * @n None
1068 *
1069 * <b> Return Value </b>
1070 * Starvation Bound for the SMS Port.
1071 *
1072 * <b> Pre Condition </b>
1073 * @n None
1074 *
1075 * <b> Post Condition </b>
1076 * @n None
1077 *
1078 * @b Reads
1079 * @n MSMC_SBNDM_SCNTMM
1080 *
1081 * @b Example
1082 * @verbatim
1083 Uint32 sbndm;
1085 sbndm = CSL_MSMC_getStarvationBoundSMS ();
1087 @endverbatim
1088 * =============================================================================
1089 */
1090 static inline Uint32 CSL_MSMC_getStarvationBoundSMS (void)
1091 {
1092 return CSL_FEXT (hMsmc->SBNDM, MSMC_SBNDM_SCNTMM);
1093 }
1095 /** ============================================================================
1096 * @n@b CSL_MSMC_setStarvationBoundSES
1097 *
1098 * @b Description
1099 * @n This function sets the starvation bound for SES port.
1100 *
1101 * @b Arguments
1102 @verbatim
1103 sbnd starvation bound to be configured
1104 @endverbatim
1105 *
1106 * <b> Return Value </b>
1107 * @n None
1108 *
1109 * <b> Pre Condition </b>
1110 * @n None
1111 *
1112 * <b> Post Condition </b>
1113 * @n Starvation count for the SES port is configured
1114 *
1115 * @b Writes
1116 * @n MSMC_SBNDE_SCNTEM
1117 *
1118 * @b Example
1119 * @verbatim
1120 CSL_MSMC_setStarvationBoundSES (1);
1122 @endverbatim
1123 * =============================================================================
1124 */
1125 static inline void CSL_MSMC_setStarvationBoundSES (Uint32 sbnd)
1126 {
1127 CSL_FINS (hMsmc->SBNDE, MSMC_SBNDE_SCNTEM, sbnd);
1128 return;
1129 }
1131 /** ============================================================================
1132 * @n@b CSL_MSMC_getStarvationBoundSES
1133 *
1134 * @b Description
1135 * @n This function gets the starvation bound for SES port.
1136 *
1137 * @b Arguments
1138 * @n None
1139 *
1140 * <b> Return Value </b>
1141 * Starvation Bound for the SES Port.
1142 *
1143 * <b> Pre Condition </b>
1144 * @n None
1145 *
1146 * <b> Post Condition </b>
1147 * @n None
1148 *
1149 * @b Reads
1150 * @n MSMC_SBNDE_SCNTEM
1151 *
1152 * @b Example
1153 * @verbatim
1154 Uint32 sbnde;
1156 sbnde = CSL_MSMC_getStarvationBoundSES ();
1158 @endverbatim
1159 * =============================================================================
1160 */
1161 static inline Uint32 CSL_MSMC_getStarvationBoundSES (void)
1162 {
1163 return CSL_FEXT (hMsmc->SBNDE, MSMC_SBNDE_SCNTEM);
1164 }
1166 /** ============================================================================
1167 * @n@b CSL_MSMC_setSMSMPAXH
1168 *
1169 * @b Description
1170 * @n This function sets the contents of SMS_MPAXH register.
1171 *
1172 * @b Arguments
1173 @verbatim
1174 privid PrivID
1175 index Index into the set of 8 registers for this particular
1176 PrivID
1177 mpaxh CSL_MSMC_SMSMPAXH structure that needs to be set into the
1178 register
1179 @endverbatim
1180 *
1181 * <b> Return Value </b>
1182 * @n None
1183 *
1184 * <b> Pre Condition </b>
1185 * @n None
1186 *
1187 * <b> Post Condition </b>
1188 * @n SMS MPAXH register for the PrivID configured with the value passed.
1189 *
1190 * @b Writes
1191 * @n MSMC_SMS_MPAXH_0_SEGSZ..MSMC_SMS_MPAXH_7_SEGSZ,
1192 * MSMC_SMS_MPAXH_0_BADDR..MSMC_SMS_MPAXH_7_BADDR
1193 *
1194 * @b Example
1195 * @verbatim
1196 Uint32 privid = 1;
1197 Uint32 index = 0;
1198 CSL_MSMC_SMSMPAXH mpaxh;
1200 mpaxh.segSz = 4;
1201 mpaxh.baddr = 0x10;
1203 CSL_MSMC_setSMSMPAXH (privid, index, &mpaxh);
1205 @endverbatim
1206 * =============================================================================
1207 */
1208 static inline void CSL_MSMC_setSMSMPAXH
1209 (
1210 Uint32 privid,
1211 Uint32 index,
1212 CSL_MSMC_SMSMPAXH* mpaxh
1213 )
1214 {
1215 hMsmc->SMS_MPAX_PER_PRIVID[privid].SMS[index].MPAXH =
1216 CSL_FMK (MSMC_SMS_MPAXH_0_SEGSZ, mpaxh->segSz) |
1217 CSL_FMK (MSMC_SMS_MPAXH_0_BADDR, mpaxh->baddr);
1218 }
1220 /** ============================================================================
1221 * @n@b CSL_MSMC_getSMSMPAXH
1222 *
1223 * @b Description
1224 * @n This function gets the contents of SMS_MPAXH register.
1225 *
1226 * @b Arguments
1227 @verbatim
1228 privid PrivID
1229 index Index into the set of 8 registers for this particular
1230 PrivID
1231 mpaxh CSL_MSMC_SMSMPAXH structure that needs to be set into the
1232 register
1233 @endverbatim
1234 *
1235 * <b> Return Value </b>
1236 * @n None
1237 *
1238 * <b> Pre Condition </b>
1239 * @n None
1240 *
1241 * <b> Post Condition </b>
1242 * @n None
1243 *
1244 * @b Reads
1245 * @n MSMC_SMS_MPAXH_0_SEGSZ..MSMC_SMS_MPAXH_7_SEGSZ,
1246 * MSMC_SMS_MPAXH_0_BADDR..MSMC_SMS_MPAXH_7_BADDR
1247 *
1248 * @b Example
1249 * @verbatim
1250 Uint32 privid = 1;
1251 Uint32 index = 0;
1252 CSL_MSMC_SMSMPAXH mpaxh;
1254 CSL_MSMC_getSMSMPAXH (privid, index, &mpaxh);
1256 @endverbatim
1257 * =============================================================================
1258 */
1259 static inline void CSL_MSMC_getSMSMPAXH (
1260 Uint32 privid,
1261 Uint32 index,
1262 CSL_MSMC_SMSMPAXH* mpaxh
1263 )
1264 {
1265 Uint32 value = hMsmc->SMS_MPAX_PER_PRIVID[privid].SMS[index].MPAXH;
1266 mpaxh->segSz = CSL_FEXT (value, MSMC_SMS_MPAXH_0_SEGSZ);
1267 mpaxh->baddr = CSL_FEXT (value, MSMC_SMS_MPAXH_0_BADDR);
1268 }
1270 /** ============================================================================
1271 * @n@b CSL_MSMC_setSMSMPAXL
1272 *
1273 * @b Description
1274 * @n This function sets the contents of SMS_MPAXL register.
1275 *
1276 * @b Arguments
1277 @verbatim
1278 privid PrivID
1279 index Index into the set of 8 registers for this particular
1280 PrivID
1281 mpaxl CSL_MSMC_SMSMPAXL structure that needs to be set into the
1282 register
1283 @endverbatim
1284 *
1285 * <b> Return Value </b>
1286 * @n None
1287 *
1288 * <b> Pre Condition </b>
1289 * @n None
1290 *
1291 * <b> Post Condition </b>
1292 * @n SMS MPAXL register for the PrivID configured with the value passed.
1293 *
1294 * @b Writes
1295 * @n MSMC_SMS_MPAXL_0_UX..MSMC_SMS_MPAXL_7_UX,
1296 * MSMC_SMS_MPAXL_0_UW..MSMC_SMS_MPAXL_7_UW,
1297 * MSMC_SMS_MPAXL_0_UR..MSMC_SMS_MPAXL_7_UR,
1298 * MSMC_SMS_MPAXL_0_SX..MSMC_SMS_MPAXL_7_SX,
1299 * MSMC_SMS_MPAXL_0_SW..MSMC_SMS_MPAXL_7_SW,
1300 * MSMC_SMS_MPAXL_0_SR..MSMC_SMS_MPAXL_7_SR,
1301 * MSMC_SMS_MPAXL_0_RADDR..MSMC_SMS_MPAXL_7_RADDR,
1302 *
1303 * @b Example
1304 * @verbatim
1305 Uint32 privid = 1;
1306 Uint32 index = 0;
1307 CSL_MSMC_SMSMPAXL mpaxl;
1309 mpaxl.ux = 1;
1310 mpaxl.uw = 1;
1311 mpaxl.ur = 1;
1312 mpaxl.sx = 1;
1313 mpaxl.sw = 1;
1314 mpaxl.sr = 1;
1315 mpaxl.emu = 0;
1316 mpaxl.ns = 1;
1317 mpaxl.raddr = 0x100;
1319 CSL_MSMC_setSMSMPAXL (privid, index, &mpaxl);
1321 @endverbatim
1322 * =============================================================================
1323 */
1324 static inline void CSL_MSMC_setSMSMPAXL
1325 (
1326 Uint32 privid,
1327 Uint32 index,
1328 CSL_MSMC_SMSMPAXL* mpaxl
1329 )
1330 {
1331 Uint32 value = 0;
1333 CSL_FINS (value, MSMC_SMS_MPAXL_0_UX, mpaxl->ux);
1334 CSL_FINS (value, MSMC_SMS_MPAXL_0_UW, mpaxl->uw);
1335 CSL_FINS (value, MSMC_SMS_MPAXL_0_UR, mpaxl->ur);
1336 CSL_FINS (value, MSMC_SMS_MPAXL_0_SX, mpaxl->sx);
1337 CSL_FINS (value, MSMC_SMS_MPAXL_0_SW, mpaxl->sw);
1338 CSL_FINS (value, MSMC_SMS_MPAXL_0_SR, mpaxl->sr);
1339 CSL_FINS (value, MSMC_SMS_MPAXL_0_RADDR, mpaxl->raddr);
1341 hMsmc->SMS_MPAX_PER_PRIVID[privid].SMS[index].MPAXL = value;
1342 }
1344 /** ============================================================================
1345 * @n@b CSL_MSMC_getSMSMPAXL
1346 *
1347 * @b Description
1348 * @n This function gets the contents of SMS_MPAXL register.
1349 *
1350 * @b Arguments
1351 @verbatim
1352 privid PrivID
1353 index Index into the set of 8 registers for this particular
1354 PrivID
1355 mpaxl CSL_MSMC_SMSMPAXL structure that needs to be set into the
1356 register
1357 @endverbatim
1358 *
1359 * <b> Return Value </b>
1360 * @n None
1361 *
1362 * <b> Pre Condition </b>
1363 * @n None
1364 *
1365 * <b> Post Condition </b>
1366 * @n None
1367 *
1368 * @b Reads
1369 * @n MSMC_SMS_MPAXL_0_UX..MSMC_SMS_MPAXL_7_UX,
1370 * MSMC_SMS_MPAXL_0_UW..MSMC_SMS_MPAXL_7_UW,
1371 * MSMC_SMS_MPAXL_0_UR..MSMC_SMS_MPAXL_7_UR,
1372 * MSMC_SMS_MPAXL_0_SX..MSMC_SMS_MPAXL_7_SX,
1373 * MSMC_SMS_MPAXL_0_SW..MSMC_SMS_MPAXL_7_SW,
1374 * MSMC_SMS_MPAXL_0_SR..MSMC_SMS_MPAXL_7_SR,
1375 * MSMC_SMS_MPAXL_0_RADDR..MSMC_SMS_MPAXL_7_RADDR,
1376 *
1377 * @b Example
1378 * @verbatim
1379 Uint32 privid = 1;
1380 Uint32 index = 0;
1381 CSL_MSMC_SMSMPAXL mpaxl;
1383 CSL_MSMC_getSMSMPAXL (privid, index, &mpaxl);
1385 @endverbatim
1386 * =============================================================================
1387 */
1388 static inline void CSL_MSMC_getSMSMPAXL
1389 (
1390 Uint32 privid,
1391 Uint32 index,
1392 CSL_MSMC_SMSMPAXL* mpaxl
1393 )
1394 {
1395 Uint32 value = hMsmc->SMS_MPAX_PER_PRIVID[privid].SMS[index].MPAXL;
1397 mpaxl->raddr = CSL_FEXT (value, MSMC_SMS_MPAXL_0_RADDR);
1398 mpaxl->sr = CSL_FEXT (value, MSMC_SMS_MPAXL_0_SR);
1399 mpaxl->sw = CSL_FEXT (value, MSMC_SMS_MPAXL_0_SW);
1400 mpaxl->sx = CSL_FEXT (value, MSMC_SMS_MPAXL_0_SX);
1401 mpaxl->ur = CSL_FEXT (value, MSMC_SMS_MPAXL_0_UR);
1402 mpaxl->uw = CSL_FEXT (value, MSMC_SMS_MPAXL_0_UW);
1403 mpaxl->ux = CSL_FEXT (value, MSMC_SMS_MPAXL_0_UX);
1404 }
1406 /** ============================================================================
1407 * @n@b CSL_MSMC_setSESMPAXH
1408 *
1409 * @b Description
1410 * @n This function sets the contents of SES_MPAXH register.
1411 *
1412 * @b Arguments
1413 @verbatim
1414 privid PrivID
1415 index Index into the set of 8 registers for this particular
1416 PrivID
1417 mpaxh CSL_MSMC_SESMPAXH structure that needs to be set into the
1418 register
1419 @endverbatim
1420 *
1421 * <b> Return Value </b>
1422 * @n None
1423 *
1424 * <b> Pre Condition </b>
1425 * @n None
1426 *
1427 * <b> Post Condition </b>
1428 * @n SES MPAXH register for the PrivID configured with the value passed.
1429 *
1430 * @b Writes
1431 * @n MSMC_SES_MPAXH_0_BE..MSMC_SES_MPAXH_7_BE,
1432 * MSMC_SES_MPAXH_0_AI..MSMC_SES_MPAXH_7_AI,
1433 * MSMC_SES_MPAXH_0_SEGSZ..MSMC_SES_MPAXH_7_SEGSZ,
1434 * MSMC_SES_MPAXH_0_BADDR..MSMC_SES_MPAXH_7_BADDR
1435 *
1436 * @b Example
1437 * @verbatim
1438 Uint32 privid = 1;
1439 Uint32 index = 0;
1440 CSL_MSMC_SESMPAXH mpaxh;
1442 mpaxh.segSize = 4;
1443 mpaxh.baseAddress = 0x100;
1444 mpaxh.be = 1;
1445 mpaxh.ai = 1;
1447 CSL_MSMC_setSESMPAXH (privid, index, &mpaxh);
1449 @endverbatim
1450 * =============================================================================
1451 */
1452 static inline void CSL_MSMC_setSESMPAXH
1453 (
1454 Uint32 privid,
1455 Uint32 index,
1456 CSL_MSMC_SESMPAXH* mpaxh
1457 )
1458 {
1459 Uint32 value = 0;
1461 CSL_FINS (value, MSMC_SES_MPAXH_0_BE, mpaxh->be);
1462 CSL_FINS (value, MSMC_SES_MPAXH_0_AI, mpaxh->ai);
1463 CSL_FINS (value, MSMC_SES_MPAXH_0_SEGSZ, mpaxh->segSz);
1464 CSL_FINS (value, MSMC_SES_MPAXH_0_BADDR, mpaxh->baddr);
1466 hMsmc->SES_MPAX_PER_PRIVID[privid].SES[index].MPAXH = value;
1467 }
1469 /** ============================================================================
1470 * @n@b CSL_MSMC_getSESMPAXH
1471 *
1472 * @b Description
1473 * @n This function gets the contents of SES_MPAXH register.
1474 *
1475 * @b Arguments
1476 @verbatim
1477 privid PrivID
1478 index Index into the set of 8 registers for this particular
1479 PrivID
1480 mpaxh CSL_MSMC_SESMPAXH structure that needs to be set into the
1481 register
1482 @endverbatim
1483 *
1484 * <b> Return Value </b>
1485 * @n None
1486 *
1487 * <b> Pre Condition </b>
1488 * @n None
1489 *
1490 * <b> Post Condition </b>
1491 * @n None
1492 *
1493 * @b Reads
1494 * @n MSMC_SES_MPAXH_0_BE..MSMC_SES_MPAXH_7_BE,
1495 * MSMC_SES_MPAXH_0_AI..MSMC_SES_MPAXH_7_AI,
1496 * MSMC_SES_MPAXH_0_SEGSZ..MSMC_SES_MPAXH_7_SEGSZ,
1497 * MSMC_SES_MPAXH_0_BADDR..MSMC_SES_MPAXH_7_BADDR
1498 *
1499 * @b Example
1500 * @verbatim
1501 Uint32 privid = 1;
1502 Uint32 index = 0;
1503 CSL_MSMC_SESMPAXH mpaxh;
1505 CSL_MSMC_getSESMPAXH (privid, index, &mpaxh);
1507 @endverbatim
1508 * =============================================================================
1509 */
1510 static inline void CSL_MSMC_getSESMPAXH
1511 (
1512 Uint32 privid,
1513 Uint32 index,
1514 CSL_MSMC_SESMPAXH* mpaxh
1515 )
1516 {
1517 Uint32 value = hMsmc->SES_MPAX_PER_PRIVID[privid].SES[index].MPAXH;
1518 mpaxh->be = CSL_FEXT (value, MSMC_SES_MPAXH_0_BE);
1519 mpaxh->ai = CSL_FEXT (value, MSMC_SES_MPAXH_0_AI);
1520 mpaxh->segSz = CSL_FEXT (value, MSMC_SES_MPAXH_0_SEGSZ);
1521 mpaxh->baddr = CSL_FEXT (value, MSMC_SES_MPAXH_0_BADDR);
1522 }
1524 /** ============================================================================
1525 * @n@b CSL_MSMC_setSESMPAXL
1526 *
1527 * @b Description
1528 * @n This function sets the contents of SES_MPAXL register.
1529 *
1530 * @b Arguments
1531 @verbatim
1532 privid PrivID
1533 index Index into the set of 8 registers for this particular
1534 PrivID
1535 mpaxl CSL_MSMC_SESMPAXL structure that needs to be set into the
1536 register
1537 @endverbatim
1538 *
1539 * <b> Return Value </b>
1540 * @n None
1541 *
1542 * <b> Pre Condition </b>
1543 * @n None
1544 *
1545 * <b> Post Condition </b>
1546 * @n SES MPAXL register for the PrivID configured with the value passed.
1547 *
1548 * @b Writes
1549 * @n MSMC_SES_MPAXL_0_UX..MSMC_SES_MPAXL_7_UX,
1550 * MSMC_SES_MPAXL_0_UW..MSMC_SES_MPAXL_7_UW,
1551 * MSMC_SES_MPAXL_0_UR..MSMC_SES_MPAXL_7_UR,
1552 * MSMC_SES_MPAXL_0_SX..MSMC_SES_MPAXL_7_SX,
1553 * MSMC_SES_MPAXL_0_SW..MSMC_SES_MPAXL_7_SW,
1554 * MSMC_SES_MPAXL_0_SR..MSMC_SES_MPAXL_7_SR,
1555 * MSMC_SES_MPAXL_0_RADDR..MSMC_SES_MPAXL_7_RADDR
1556 *
1557 * @b Example
1558 * @verbatim
1559 Uint32 privid = 1;
1560 Uint32 index = 0;
1561 CSL_MSMC_SESMPAXL mpaxl;
1563 mpaxl.ux = 1;
1564 mpaxl.uw = 1;
1565 mpaxl.ur = 1;
1566 mpaxl.sx = 1;
1567 mpaxl.sw = 1;
1568 mpaxl.sr = 1;
1569 mpaxl.raddr = 0x4000;
1571 CSL_MSMC_setSESMPAXL (privid, index, &mpaxl);
1573 @endverbatim
1574 * =============================================================================
1575 */
1576 static inline void CSL_MSMC_setSESMPAXL
1577 (
1578 Uint32 privid,
1579 Uint32 index,
1580 CSL_MSMC_SESMPAXL* mpaxl
1581 )
1582 {
1583 Uint32 value = 0;
1585 CSL_FINS (value, MSMC_SES_MPAXL_0_UX, mpaxl->ux);
1586 CSL_FINS (value, MSMC_SES_MPAXL_0_UW, mpaxl->uw);
1587 CSL_FINS (value, MSMC_SES_MPAXL_0_UR, mpaxl->ur);
1588 CSL_FINS (value, MSMC_SES_MPAXL_0_SX, mpaxl->sx);
1589 CSL_FINS (value, MSMC_SES_MPAXL_0_SW, mpaxl->sw);
1590 CSL_FINS (value, MSMC_SES_MPAXL_0_SR, mpaxl->sr);
1591 CSL_FINS (value, MSMC_SES_MPAXL_0_RADDR, mpaxl->raddr);
1593 hMsmc->SES_MPAX_PER_PRIVID[privid].SES[index].MPAXL = value;
1594 }
1596 /** ============================================================================
1597 * @n@b CSL_MSMC_getSESMPAXL
1598 *
1599 * @b Description
1600 * @n This function gets the contents of SES_MPAXL register.
1601 *
1602 * @b Arguments
1603 @verbatim
1604 privid PrivID
1605 index Index into the set of 8 registers for this particular
1606 PrivID
1607 mpaxl CSL_MSMC_SESMPAXL structure that needs to be set into the
1608 register
1609 @endverbatim
1610 *
1611 * <b> Return Value </b>
1612 * @n None
1613 *
1614 * <b> Pre Condition </b>
1615 * @n None
1616 *
1617 * <b> Post Condition </b>
1618 * @n None
1619 *
1620 * @b Reads
1621 * @n MSMC_SES_MPAXL_0_UX..MSMC_SES_MPAXL_7_UX,
1622 * MSMC_SES_MPAXL_0_UW..MSMC_SES_MPAXL_7_UW,
1623 * MSMC_SES_MPAXL_0_UR..MSMC_SES_MPAXL_7_UR,
1624 * MSMC_SES_MPAXL_0_SX..MSMC_SES_MPAXL_7_SX,
1625 * MSMC_SES_MPAXL_0_SW..MSMC_SES_MPAXL_7_SW,
1626 * MSMC_SES_MPAXL_0_SR..MSMC_SES_MPAXL_7_SR,
1627 * MSMC_SES_MPAXL_0_RADDR..MSMC_SES_MPAXL_7_RADDR
1628 *
1629 * @b Example
1630 * @verbatim
1631 Uint32 privid = 1;
1632 Uint32 index = 0;
1633 CSL_MSMC_SESMPAXL mpaxl;
1635 CSL_MSMC_getSESMPAXL (privid, index, &mpaxl);
1637 @endverbatim
1638 * =============================================================================
1639 */
1640 static inline void CSL_MSMC_getSESMPAXL
1641 (
1642 Uint32 privid,
1643 Uint32 index,
1644 CSL_MSMC_SESMPAXL* mpaxl
1645 )
1646 {
1647 Uint32 value = hMsmc->SES_MPAX_PER_PRIVID[privid].SES[index].MPAXL;
1648 mpaxl->raddr = CSL_FEXT (value, MSMC_SES_MPAXL_0_RADDR);
1649 mpaxl->sr = CSL_FEXT (value, MSMC_SES_MPAXL_0_SR);
1650 mpaxl->sw = CSL_FEXT (value, MSMC_SES_MPAXL_0_SW);
1651 mpaxl->sx = CSL_FEXT (value, MSMC_SES_MPAXL_0_SX);
1652 mpaxl->ur = CSL_FEXT (value, MSMC_SES_MPAXL_0_UR);
1653 mpaxl->uw = CSL_FEXT (value, MSMC_SES_MPAXL_0_UW);
1654 mpaxl->ux = CSL_FEXT (value, MSMC_SES_MPAXL_0_UX);
1655 return;
1656 }
1658 /** ============================================================================
1659 * @n@b CSL_MSMC_lockNonMPAX
1660 *
1661 * @b Description
1662 * @n This function locks the write access for all non MPAX registers.
1663 *
1664 * @b Arguments
1665 * @n None
1666 *
1667 * <b> Return Value </b>
1668 * @n None
1669 *
1670 * <b> Pre Condition </b>
1671 * @n None
1672 *
1673 * <b> Post Condition </b>
1674 * @n All the non MPAX registers are locked for write-access.
1675 *
1676 * @b Writes
1677 * @n MSMC_CFGLCK_MGCID=0x2CD00000,MSMC_CFGLCK_WLCK=1
1678 *
1679 * @b Example
1680 * @verbatim
1682 CSL_MSMC_lockNonMPAX ();
1684 @endverbatim
1685 * =============================================================================
1686 */
1687 static inline void CSL_MSMC_lockNonMPAX (void)
1688 {
1689 hMsmc->CFGLCK = CSL_FMK(MSMC_CFGLCK_MGCID, 0x2CD0) | CSL_FMK(MSMC_CFGLCK_WLCK, 1);
1690 }
1692 /** ============================================================================
1693 * @n@b CSL_MSMC_isNonMPAXLocked
1694 *
1695 * @b Description
1696 * @n This function gets the status of the lock for non MPAX registers.
1697 *
1698 * @b Arguments
1699 * @n None
1700 *
1701 * <b> Return Value </b>
1702 * @n TRUE - Non MPAX Register Write Access is locked
1703 * @n FALSE - Non MPAX Register Write Access is unlocked
1704 *
1705 * <b> Pre Condition </b>
1706 * @n None
1707 *
1708 * <b> Post Condition </b>
1709 * @n None
1710 *
1711 * @b Reads
1712 * @n MSMC_CFGLCKSTAT_WSTAT
1713 *
1714 * @b Example
1715 * @verbatim
1717 if (CSL_MSMC_isNonMPAXLocked () == TRUE)
1718 {
1719 // Non MPAX Registers are locked.
1720 }
1721 else
1722 {
1723 // MPAX Registers are not locked.
1724 }
1726 @endverbatim
1727 * =============================================================================
1728 */
1729 static inline Bool CSL_MSMC_isNonMPAXLocked (void)
1730 {
1731 return (Bool)CSL_FEXT (hMsmc->CFGLCKSTAT, MSMC_CFGLCKSTAT_WSTAT);
1732 }
1734 /** ============================================================================
1735 * @n@b CSL_MSMC_unlockNonMPAX
1736 *
1737 * @b Description
1738 * @n This function unlocks the write access for all non MPAX registers.
1739 *
1740 * @b Arguments
1741 * @n None
1742 *
1743 * <b> Return Value </b>
1744 * @n None
1745 *
1746 * <b> Pre Condition </b>
1747 * @n @a CSL_MSMC_lockNonMPAX() must be called.
1748 *
1749 * <b> Post Condition </b>
1750 * @n All the non MPAX registers are available for write-access.
1751 *
1752 * @b Writes
1753 * @n MSMC_CFGULCK_MGCID=0x2CD00000,MSMC_CFGULCK_WEN=1
1754 *
1755 * @b Example
1756 * @verbatim
1758 if (CSL_MSMC_isNonMPAXLocked () == TRUE)
1759 {
1760 // Non MPAX Registers are locked
1761 ...
1762 // Unlock the Non-MPAX registers.
1763 CSL_MSMC_unlockNonMPAX ();
1764 }
1766 @endverbatim
1767 * =============================================================================
1768 */
1769 static inline void CSL_MSMC_unlockNonMPAX (void)
1770 {
1771 hMsmc->CFGULCK = CSL_FMK(MSMC_CFGULCK_MGCID, 0x2CD0) | CSL_FMK(MSMC_CFGULCK_WEN, 1);
1772 }
1774 /** ============================================================================
1775 * @n@b CSL_MSMC_lockSMS
1776 *
1777 * @b Description
1778 * @n This function locks the write access for all SMS MPAX registers.
1779 *
1780 * @b Arguments
1781 @verbatim
1782 privid PrivID for which the SMS MPAX registers will be locked.
1783 @endverbatim
1784 *
1785 * <b> Return Value </b>
1786 * @n None
1787 *
1788 * <b> Pre Condition </b>
1789 * @n None
1790 *
1791 * <b> Post Condition </b>
1792 * @n All the SMS MPAX registers for the specific PrivID are locked for
1793 * write-access.
1794 *
1795 * @b Writes
1796 * @n MSMC_SMS_MPAX_LCK_MGCID=0x2CD10000, MSMC_SMS_MPAX_LCK_WLCK
1797 *
1798 * @b Example
1799 * @verbatim
1801 // Lock SMS MPAX registers for priv-id 1.
1802 CSL_MSMC_lockSMS (1);
1804 @endverbatim
1805 * =============================================================================
1806 */
1807 static inline void CSL_MSMC_lockSMS (Uint32 privid)
1808 {
1809 hMsmc->SMS_MPAX_LCK = CSL_FMK(MSMC_SMS_MPAX_LCK_MGCID, 0x2CD1) | CSL_FMKR (privid, privid, 1);
1810 }
1812 /** ============================================================================
1813 * @n@b CSL_MSMC_isSMSLocked
1814 *
1815 * @b Description
1816 * @n This function gets the status of the lock for SMS MPAX registers for the
1817 * specific priv-id
1818 *
1819 * @b Arguments
1820 @verbatim
1821 privid PrivID for which the status is required.
1822 @endverbatim
1823 *
1824 * <b> Return Value </b>
1825 * @n TRUE - SMS MPAX Register Write Access is locked for the priv-id
1826 * @n FALSE - SMS MPAX Register Write Access is unlocked for the priv-id
1827 *
1828 * <b> Pre Condition </b>
1829 * @n None
1830 *
1831 * <b> Post Condition </b>
1832 * @n None
1833 *
1834 * @b Reads
1835 * @n MSMC_SMS_MPAX_LCKSTAT_WSTAT
1836 *
1837 * @b Example
1838 * @verbatim
1840 if (CSL_MSMC_isSMSLocked (1) == TRUE)
1841 {
1842 // SMS MPAX Registers for Priv-ID 1 are locked.
1843 }
1844 else
1845 {
1846 // SMS MPAX Registers for Priv-ID 1 are not locked.
1847 }
1849 @endverbatim
1850 * =============================================================================
1851 */
1852 static inline Bool CSL_MSMC_isSMSLocked (Uint32 privId)
1853 {
1854 return (Bool)CSL_FEXTR (hMsmc->SMS_MPAX_LCKSTAT, privId, privId);
1855 }
1857 /** ============================================================================
1858 * @n@b CSL_MSMC_unlockSMS
1859 *
1860 * @b Description
1861 * @n This function unlocks the write access for all SMS MPAX registers.
1862 *
1863 * @b Arguments
1864 @verbatim
1865 privid PrivID for which the SMS MPAX registers will be unlocked.
1866 @endverbatim
1867 *
1868 * <b> Return Value </b>
1869 * @n None
1870 *
1871 * <b> Pre Condition </b>
1872 * @n @a CSL_MSMC_lockSMS() must be called.
1873 *
1874 * <b> Post Condition </b>
1875 * @n All the SMS MPAX registers for the specific PrivID are unlocked for
1876 * write-access.
1877 *
1878 * @b Writes
1879 * @n MSMC_SMS_MPAX_ULCK_MGCID=0x2CD10000,MSMC_SMS_MPAX_ULCK_WEN
1880 *
1881 * @b Example
1882 * @verbatim
1883 ...
1884 if (CSL_MSMC_isSMSLocked (1) == TRUE)
1885 {
1886 // SMS MPAX Registers for Priv-ID 1 are locked.
1887 ...
1888 // Unlock SMS MPAX registers for priv-id 1.
1889 CSL_MSMC_unlockSMS (1);
1890 }
1891 @endverbatim
1892 * =============================================================================
1893 */
1894 static inline void CSL_MSMC_unlockSMS (Uint32 privid)
1895 {
1896 hMsmc->SMS_MPAX_ULCK = CSL_FMK(MSMC_SMS_MPAX_ULCK_MGCID, 0x2CD1) | CSL_FMKR (privid, privid, 1);
1897 }
1899 /** ============================================================================
1900 * @n@b CSL_MSMC_lockSES
1901 *
1902 * @b Description
1903 * @n This function locks the write access for all SES MPAX registers.
1904 *
1905 * @b Arguments
1906 @verbatim
1907 privid PrivID for which the SES MPAX registers will be locked.
1908 @endverbatim
1909 *
1910 * <b> Return Value </b>
1911 * @n None
1912 *
1913 * <b> Pre Condition </b>
1914 * @n None
1915 *
1916 * <b> Post Condition </b>
1917 * @n All the SES MPAX registers for the specific PrivID are locked for
1918 * write-access.
1919 *
1920 * @b Writes
1921 * @n MSMC_SES_MPAX_LCK_MGCID=0x2CD20000,MSMC_SES_MPAX_LCK_WLCK
1922 *
1923 * @b Example
1924 * @verbatim
1926 // Lock SES MPAX registers for priv-id 1.
1927 CSL_MSMC_lockSES (1);
1929 @endverbatim
1930 * =============================================================================
1931 */
1932 static inline void CSL_MSMC_lockSES (Uint32 privid)
1933 {
1934 hMsmc->SES_MPAX_LCK = CSL_FMK(MSMC_SES_MPAX_LCK_MGCID, 0x2CD2) | CSL_FMKR (privid, privid, 1);
1935 }
1937 /** ============================================================================
1938 * @n@b CSL_MSMC_isSESLocked
1939 *
1940 * @b Description
1941 * @n This function gets the status of the lock for SES MPAX registers for the
1942 * specific priv-id
1943 *
1944 * @b Arguments
1945 @verbatim
1946 privid PrivID for which the status is required.
1947 @endverbatim
1948 *
1949 * <b> Return Value </b>
1950 * @n TRUE - SES MPAX Register Write Access is locked for the priv-id
1951 * @n FALSE - SES MPAX Register Write Access is unlocked for the priv-id
1952 *
1953 * <b> Pre Condition </b>
1954 * @n None
1955 *
1956 * <b> Post Condition </b>
1957 * @n None
1958 *
1959 * @b Reads
1960 * @n MSMC_SES_MPAX_LCKSTAT_WSTAT
1961 *
1962 * @b Example
1963 * @verbatim
1965 if (CSL_MSMC_isSESLocked (1) == TRUE)
1966 {
1967 // SES MPAX Registers for Priv-ID 1 are locked.
1968 }
1969 else
1970 {
1971 // SES MPAX Registers for Priv-ID 1 are not locked.
1972 }
1974 @endverbatim
1975 * =============================================================================
1976 */
1977 static inline Bool CSL_MSMC_isSESLocked (Uint32 privId)
1978 {
1979 return (Bool)CSL_FEXTR (hMsmc->SES_MPAX_LCKSTAT, privId, privId);
1980 }
1982 /** ============================================================================
1983 * @n@b CSL_MSMC_unlockSES
1984 *
1985 * @b Description
1986 * @n This function unlocks the write access for all SES MPAX registers.
1987 *
1988 * @b Arguments
1989 @verbatim
1990 privid PrivID for which the SES MPAX registers will be unlocked.
1991 @endverbatim
1992 *
1993 * <b> Return Value </b>
1994 * @n None
1995 *
1996 * <b> Pre Condition </b>
1997 * @n @a CSL_MSMC_lockSES() must be called.
1998 *
1999 * <b> Post Condition </b>
2000 * @n All the SES MPAX registers for the specific PrivID are unlocked for
2001 * write-access.
2002 *
2003 * @b Writes
2004 * @n MSMC_SES_MPAX_ULCK_MGCID=0x2CD20000,MSMC_SES_MPAX_ULCK_WEN
2005 *
2006 * @b Example
2007 * @verbatim
2008 ...
2009 if (CSL_MSMC_isSESLocked (1) == TRUE)
2010 {
2011 // SES MPAX Registers for Priv-ID 1 are locked.
2012 ...
2013 // Unlock SES MPAX registers for priv-id 1.
2014 CSL_MSMC_unlockSES (1);
2015 }
2016 @endverbatim
2017 * =============================================================================
2018 */
2019 static inline void CSL_MSMC_unlockSES (Uint32 privid)
2020 {
2021 hMsmc->SES_MPAX_ULCK = CSL_FMK(MSMC_SES_MPAX_ULCK_MGCID, 0x2CD2) | CSL_FMKR (privid, privid, 1);
2022 }
2024 /** ============================================================================
2025 * @n@b CSL_MSMC_getPendingInterrupts
2026 *
2027 * @b Description
2028 * @n This function gets the status of all pending interrupts i.e. which have
2029 * been enabled and an interrupt has occurred.
2030 *
2031 * @b Arguments
2032 @verbatim
2033 pfeStat Protection Fault Status
2034 cees Correctable EDC Error
2035 ncees Non-Correctable EDC Error
2036 cses Correctable Scrubbing Error
2037 nces Non-Correctable Scrubbing Error
2038 @endverbatim
2039 *
2040 * <b> Return Value </b>
2041 * @n None
2042 *
2043 * <b> Pre Condition </b>
2044 * @n None
2045 *
2046 * <b> Post Condition </b>
2047 * @n None
2048 *
2049 * @b Reads
2050 * @n MSMC_SMESTAT_PFESTAT, MSMC_SMESTAT_CEES, MSMC_SMESTAT_NCEES,
2051 * @n MSMC_SMESTAT_CSES, MSMC_SMESTAT_NCSES
2052 *
2053 * @b Example
2054 * @verbatim
2055 Uint16 pfeStat;
2056 Uint8 cees;
2057 Uint8 ncees;
2058 Uint8 cses;
2059 Uint8 ncses;
2061 // Get the MSMC Pending Interrupt Status
2062 CSL_MSMC_getPendingInterrupts (&pfeStat,&cees, &ncees, &cses, &ncses);
2064 @endverbatim
2065 * =============================================================================
2066 */
2067 static inline void CSL_MSMC_getPendingInterrupts
2068 (
2069 Uint16* pfeStat,
2070 Uint8* cees,
2071 Uint8* ncees,
2072 Uint8* cses,
2073 Uint8* ncses
2074 )
2075 {
2076 Uint32 value = hMsmc->SMESTAT;
2078 *pfeStat = CSL_FEXT (value, MSMC_SMESTAT_PFESTAT);
2079 *cees = CSL_FEXT (value, MSMC_SMESTAT_CEES);
2080 *ncees = CSL_FEXT (value, MSMC_SMESTAT_NCEES);
2081 *cses = CSL_FEXT (value, MSMC_SMESTAT_CSES);
2082 *ncses = CSL_FEXT (value, MSMC_SMESTAT_NCSES);
2083 }
2085 /** ============================================================================
2086 * @n@b CSL_MSMC_getRawInterruptStatus
2087 *
2088 * @b Description
2089 * @n This function gets the RAW Interrupt Status.
2090 *
2091 * @b Arguments
2092 @verbatim
2093 pfeStat Protection Fault Status
2094 cees Correctable EDC Error
2095 ncees Non-Correctable EDC Error
2096 cses Correctable Scrubbing Error
2097 nces Non-Correctable Scrubbing Error
2098 @endverbatim
2099 *
2100 * <b> Return Value </b>
2101 * @n None
2102 *
2103 * <b> Pre Condition </b>
2104 * @n None
2105 *
2106 * <b> Post Condition </b>
2107 * @n None
2108 *
2109 * @b Reads
2110 * @n MSMC_SMIRSTAT_PFESTAT, MSMC_SMIRSTAT_CEES, MSMC_SMIRSTAT_NCEES,
2111 * @n MSMC_SMIRSTAT_CSES, MSMC_SMIRSTAT_NCSES
2112 *
2113 * @b Example
2114 * @verbatim
2115 Uint16 pfeStat;
2116 Uint8 cees;
2117 Uint8 ncees;
2118 Uint8 cses;
2119 Uint8 ncses;
2121 // Get the MSMC Raw Interrupt Status
2122 CSL_MSMC_getRawInterruptStatus (&pfeStat, &cees, &ncees, &cses, &ncses);
2124 @endverbatim
2125 * =============================================================================
2126 */
2127 static inline void CSL_MSMC_getRawInterruptStatus
2128 (
2129 Uint16* pfeStat,
2130 Uint8* cees,
2131 Uint8* ncees,
2132 Uint8* cses,
2133 Uint8* ncses
2134 )
2135 {
2136 Uint32 value = hMsmc->SMIRSTAT;
2138 *pfeStat = CSL_FEXT (value, MSMC_SMIRSTAT_PFESTAT);
2139 *cees = CSL_FEXT (value, MSMC_SMIRSTAT_CEES);
2140 *ncees = CSL_FEXT (value, MSMC_SMIRSTAT_NCEES);
2141 *cses = CSL_FEXT (value, MSMC_SMIRSTAT_CSES);
2142 *ncses = CSL_FEXT (value, MSMC_SMIRSTAT_NCSES);
2143 }
2145 /** ============================================================================
2146 * @n@b CSL_MSMC_setRawInterruptStatus
2147 *
2148 * @b Description
2149 * @n This function sets the RAW Interrupt Status.
2150 *
2151 * @b Arguments
2152 @verbatim
2153 pfiStat Protection Fault Status
2154 cei Correctable EDC Error
2155 ncei Non-Correctable EDC Error
2156 csi Correctable Scrubbing Error
2157 ncsi Non-Correctable Scrubbing Error
2158 @endverbatim
2159 *
2160 * <b> Return Value </b>
2161 * @n None
2162 *
2163 * <b> Pre Condition </b>
2164 * @n None
2165 *
2166 * <b> Post Condition </b>
2167 * @n None
2168 *
2169 * @b Writes
2170 * @n MSMC_SMIRSTAT_PFESTAT, MSMC_SMIRSTAT_CEES, MSMC_SMIRSTAT_NCEES,
2171 * @n MSMC_SMIRSTAT_CSES, MSMC_SMIRSTAT_NCSES
2172 *
2173 * @b Example
2174 * @verbatim
2176 // Ensure only the Correctable EDC Errors is set
2177 CSL_MSMC_setRawInterruptStatus (0x0, 0x1, 0x0, 0x0, 0x0);
2179 @endverbatim
2180 * =============================================================================
2181 */
2182 static inline void CSL_MSMC_setRawInterruptStatus
2183 (
2184 Uint16 pfiStat,
2185 Uint8 cei,
2186 Uint8 ncei,
2187 Uint8 csi,
2188 Uint8 ncsi
2189 )
2190 {
2191 hMsmc->SMIRSTAT = CSL_FMK (MSMC_SMIRSTAT_PFESTAT, pfiStat) |
2192 CSL_FMK (MSMC_SMIRSTAT_CEES, cei) |
2193 CSL_FMK (MSMC_SMIRSTAT_NCEES, ncei) |
2194 CSL_FMK (MSMC_SMIRSTAT_CSES, csi) |
2195 CSL_FMK (MSMC_SMIRSTAT_NCSES, ncsi);
2196 }
2198 /** ============================================================================
2199 * @n@b CSL_MSMC_clearRawInterruptStatus
2200 *
2201 * @b Description
2202 * @n This function clears the RAW Interrupt Status.
2203 *
2204 * @b Arguments
2205 @verbatim
2206 pfiStat Protection Fault Status
2207 cei Correctable EDC Error
2208 ncei Non-Correctable EDC Error
2209 csi Correctable Scrubbing Error
2210 ncsi Non-Correctable Scrubbing Error
2211 @endverbatim
2212 *
2213 * <b> Return Value </b>
2214 * @n None
2215 *
2216 * <b> Pre Condition </b>
2217 * @n None
2218 *
2219 * <b> Post Condition </b>
2220 * @n None
2221 *
2222 * @b Writes
2223 * @n MSMC_SMIRC_PFIC, MSMC_SMIRC_MPEC, MSMC_SMIRC_CEC,
2224 * @n MSMC_SMIRC_NCEC, MSMC_SMIRC_CSC, MSMC_SMIRC_NCSC
2225 *
2226 * @b Example
2227 * @verbatim
2228 Uint16 pfiStat;
2229 Uint8 cei;
2230 Uint8 ncei;
2231 Uint8 csi;
2232 Uint8 ncsi;
2234 // Get the MSMC Raw Interrupt Status
2235 CSL_MSMC_getRawInterruptStatus (&pfiStat, &cei, &ncei, &csi, &ncsi);
2236 ...
2237 // Clear the MSMC Interrupt Status.
2238 CSL_MSMC_clearRawInterruptStatus (pfiStat, cei, ncei, csi, ncsi);
2239 @endverbatim
2240 * =============================================================================
2241 */
2242 static inline void CSL_MSMC_clearRawInterruptStatus
2243 (
2244 Uint16 pfiStat,
2245 Uint8 cei,
2246 Uint8 ncei,
2247 Uint8 csi,
2248 Uint8 ncsi
2249 )
2250 {
2251 hMsmc->SMIRC = CSL_FMK (MSMC_SMIRC_PFIC, pfiStat) |
2252 CSL_FMK (MSMC_SMIRC_CEC, cei) |
2253 CSL_FMK (MSMC_SMIRC_NCEC, ncei) |
2254 CSL_FMK (MSMC_SMIRC_CSC, csi) |
2255 CSL_FMK (MSMC_SMIRC_NCSC, ncsi);
2256 }
2258 /** ============================================================================
2259 * @n@b CSL_MSMC_getInterruptEnableStatus
2260 *
2261 * @b Description
2262 * @n This function is used to get the interrupt enable/disable status
2263 *
2264 * @b Arguments
2265 @verbatim
2266 pfiStat Protection Fault Status
2267 cei Correctable EDC Error
2268 ncei Non-Correctable EDC Error
2269 csi Correctable Scrubbing Error
2270 ncsi Non-Correctable Scrubbing Error
2271 @endverbatim
2272 *
2273 * <b> Return Value </b>
2274 * @n None
2275 *
2276 * <b> Pre Condition </b>
2277 * @n None
2278 *
2279 * <b> Post Condition </b>
2280 * @n None
2281 *
2282 * @b Reads
2283 * @n MSMC_SMIESTAT_PFIESTAT, MSMC_SMIESTAT_CEIE, MSMC_SMIESTAT_NCEIE,
2284 * @n MSMC_SMIESTAT_CSIE,MSMC_SMIESTAT_NCSIE
2285 *
2286 * @b Example
2287 * @verbatim
2289 Uint16 pfiStat;
2290 Uint8 cei;
2291 Uint8 ncei;
2292 Uint8 csi;
2293 Uint8 ncsi;
2295 // Get the interrupt enable status.
2296 CSL_MSMC_getInterruptEnableStatus (&pfiStat, &cei, &ncei, &csi, &ncsi);
2298 @endverbatim
2299 * =============================================================================
2300 */
2301 static inline void CSL_MSMC_getInterruptEnableStatus
2302 (
2303 Uint16* pfiStat,
2304 Uint8* cei,
2305 Uint8* ncei,
2306 Uint8* csi,
2307 Uint8* ncsi
2308 )
2309 {
2310 Uint32 value = hMsmc->SMIESTAT;
2312 *pfiStat = CSL_FEXT (value, MSMC_SMIESTAT_PFIESTAT);
2313 *cei = CSL_FEXT (value, MSMC_SMIESTAT_CEIE);
2314 *ncei = CSL_FEXT (value, MSMC_SMIESTAT_NCEIE);
2315 *csi = CSL_FEXT (value, MSMC_SMIESTAT_CSIE);
2316 *ncsi = CSL_FEXT (value, MSMC_SMIESTAT_NCSIE);
2317 }
2319 /** ============================================================================
2320 * @n@b CSL_MSMC_enableInterrupts
2321 *
2322 * @b Description
2323 * @n This function enables the MSMC interrupts
2324 *
2325 * @b Arguments
2326 @verbatim
2327 pfiStat Protection Fault Status
2328 cei Correctable EDC Error
2329 ncei Non-Correctable EDC Error
2330 csi Correctable Scrubbing Error
2331 ncsi Non-Correctable Scrubbing Error
2332 @endverbatim
2333 *
2334 * <b> Return Value </b>
2335 * @n None
2336 *
2337 * <b> Pre Condition </b>
2338 * @n None
2339 *
2340 * <b> Post Condition </b>
2341 * @n None
2342 *
2343 * @b Writes
2344 * @n MSMC_SMIESTAT_PFIESTAT, MSMC_SMIESTAT_CEIE, MSMC_SMIESTAT_NCEIE,
2345 * @n MSMC_SMIESTAT_CSIE,MSMC_SMIESTAT_NCSIE
2346 *
2347 * @b Example
2348 * @verbatim
2350 // Enable all interrupts except the scrubbing errors.
2351 CSL_MSMC_enableInterrupts (0xFFFF, 0x1, 0x1, 0x0, 0x0);
2353 @endverbatim
2354 * =============================================================================
2355 */
2356 static inline void CSL_MSMC_enableInterrupts
2357 (
2358 Uint16 pfiStat,
2359 Uint8 cei,
2360 Uint8 ncei,
2361 Uint8 csi,
2362 Uint8 ncsi
2363 )
2364 {
2365 hMsmc->SMIESTAT = CSL_FMK (MSMC_SMIESTAT_PFIESTAT, pfiStat) |
2366 CSL_FMK (MSMC_SMIESTAT_CEIE, cei) |
2367 CSL_FMK (MSMC_SMIESTAT_NCEIE, ncei) |
2368 CSL_FMK (MSMC_SMIESTAT_CSIE, csi) |
2369 CSL_FMK (MSMC_SMIESTAT_NCSIE, ncsi);
2370 }
2372 /** ============================================================================
2373 * @n@b CSL_MSMC_disableInterrupts
2374 *
2375 * @b Description
2376 * @n This function disables the MSMC interrupts
2377 *
2378 * @b Arguments
2379 @verbatim
2380 pfiStat Protection Fault Status
2381 cei Correctable EDC Error
2382 ncei Non-Correctable EDC Error
2383 csi Correctable Scrubbing Error
2384 ncsi Non-Correctable Scrubbing Error
2385 @endverbatim
2386 *
2387 * <b> Return Value </b>
2388 * @n None
2389 *
2390 * <b> Pre Condition </b>
2391 * @n None
2392 *
2393 * <b> Post Condition </b>
2394 * @n None
2395 *
2396 * @b Writes
2397 * @n MSMC_SMIEC_PFIEC, MSMC_SMIEC_CEEC, MSMC_SMIEC_NCEEC,
2398 * @n MSMC_SMIEC_CSEC, MSMC_SMIEC_NCSEC
2399 *
2400 * @b Example
2401 * @verbatim
2403 // Disable all interrupts except the scrubbing errors.
2404 CSL_MSMC_disableInterrupts (0xFFFF, 0x1, 0x1, 0x0, 0x0);
2406 @endverbatim
2407 * =============================================================================
2408 */
2409 static inline void CSL_MSMC_disableInterrupts
2410 (
2411 Uint16 pfiStat,
2412 Uint8 cei,
2413 Uint8 ncei,
2414 Uint8 csi,
2415 Uint8 ncsi
2416 )
2417 {
2418 hMsmc->SMIEC = CSL_FMK (MSMC_SMIEC_PFIEC, pfiStat) |
2419 CSL_FMK (MSMC_SMIEC_CEEC, cei) |
2420 CSL_FMK (MSMC_SMIEC_NCEEC, ncei) |
2421 CSL_FMK (MSMC_SMIEC_CSEC, csi) |
2422 CSL_FMK (MSMC_SMIEC_NCSEC, ncsi);
2423 }
2425 /** ============================================================================
2426 * @n@b CSL_MSMC_getTransmitHeader
2427 *
2428 * @b Description
2429 * @n This function gets the transmit header for analysis counter state
2430 * export through STM
2431 *
2432 * @b Arguments
2433 * @n None
2434 *
2435 * <b> Return Value </b>
2436 * @n Transmit Header
2437 *
2438 * <b> Pre Condition </b>
2439 * @n None
2440 *
2441 * <b> Post Condition </b>
2442 * @n None
2443 *
2444 * @b Reads
2445 * @n MSMC_SMATH
2446 *
2447 * @b Example
2448 * @verbatim
2449 Uint32 transmitHeader;
2451 // Get the Transmit Header
2452 transmitHeader = CSL_MSMC_getTransmitHeader();
2454 @endverbatim
2455 * =============================================================================
2456 */
2457 static inline Uint32 CSL_MSMC_getTransmitHeader (void)
2458 {
2459 return hMsmc->SMATH;
2460 }
2462 /** ============================================================================
2463 * @n@b CSL_MSMC_setTransmitHeader
2464 *
2465 * @b Description
2466 * @n This function sets the transmit header for analysis counter state
2467 * export through STM
2468 *
2469 * @b Arguments
2470 @verbatim
2471 transmitHeader Transmit header to be configured
2472 @endverbatim
2473 *
2474 * <b> Return Value </b>
2475 * @n None
2476 *
2477 * <b> Pre Condition </b>
2478 * @n None
2479 *
2480 * <b> Post Condition </b>
2481 * @n None
2482 *
2483 * @b Writes
2484 * @n MSMC_SMATH
2485 *
2486 * @b Example
2487 * @verbatim
2489 // Set the Transmit Header
2490 CSL_MSMC_getTransmitHeader(0x100);
2492 @endverbatim
2493 * =============================================================================
2494 */
2495 static inline void CSL_MSMC_setTransmitHeader (Uint32 transmitHeader)
2496 {
2497 hMsmc->SMATH = transmitHeader;
2498 }
2500 /** ============================================================================
2501 * @n@b CSL_MSMC_getHitCounter
2502 *
2503 * @b Description
2504 * @n This function gets the hit counter for the cache. If the HM bit in SMAC
2505 * is set, it is a counter for Cache hits+SRAM accesses
2506 *
2507 * @b Arguments
2508 * @n None
2509 *
2510 * <b> Return Value </b>
2511 * @n Hit Counter
2512 *
2513 * <b> Pre Condition </b>
2514 * @n None
2515 *
2516 * <b> Post Condition </b>
2517 * @n None
2518 *
2519 * @b Reads
2520 * @n MSMC_SMAH_HCNT
2521 *
2522 * @b Example
2523 * @verbatim
2524 Uint32 hitCounter;
2526 // Get the Hit Counter
2527 hitCounter = CSL_MSMC_getHitCounter();
2529 @endverbatim
2530 * =============================================================================
2531 */
2532 static inline Uint32 CSL_MSMC_getHitCounter (void)
2533 {
2534 return CSL_FEXT (hMsmc->SMAH, MSMC_SMAH_HCNT);
2535 }
2537 /** ============================================================================
2538 * @n@b CSL_MSMC_setHitCounter
2539 *
2540 * @b Description
2541 * @n This function sets the hit counter for the cache. If the HM bit in SMAC
2542 * is set, it is a counter for Cache hits+SRAM accesses
2543 *
2544 * @b Arguments
2545 * @n hitCounter - Hit Counter to be configured.
2546 *
2547 * <b> Return Value </b>
2548 * @n None
2549 *
2550 * <b> Pre Condition </b>
2551 * @n None
2552 *
2553 * <b> Post Condition </b>
2554 * @n None
2555 *
2556 * @b Writes
2557 * @n MSMC_SMAH_HCNT
2558 *
2559 * @b Example
2560 * @verbatim
2562 // Reset the hit counter
2563 CSL_MSMC_setHitCounter(0);
2565 @endverbatim
2566 * =============================================================================
2567 */
2568 static inline void CSL_MSMC_setHitCounter (Uint32 hitCounter)
2569 {
2570 CSL_FINS (hMsmc->SMAH, MSMC_SMAH_HCNT, hitCounter);
2571 }
2573 /** ============================================================================
2574 * @n@b CSL_MSMC_getMissCounter
2575 *
2576 * @b Description
2577 * @n This function gets the reads/write miss counters
2578 *
2579 * @b Arguments
2580 @verbatim
2581 readMissCntr Read Miss Counter
2582 writeMissCntr Write Miss Counter
2583 @endverbatim
2584 *
2585 * <b> Return Value </b>
2586 * @n None
2587 *
2588 * <b> Pre Condition </b>
2589 * @n None
2590 *
2591 * <b> Post Condition </b>
2592 * @n None
2593 *
2594 * @b Reads
2595 * @n MSMC_SMARM_RMCNT,MSMC_SMAWM_WMCNT
2596 *
2597 * @b Example
2598 * @verbatim
2599 Uint32 readMiss;
2600 Uint32 writeMiss;
2602 // Get the Read and Write Miss Counters
2603 CSL_MSMC_getMissCounter(&readMiss, &writeMiss);
2605 @endverbatim
2606 * =============================================================================
2607 */
2608 static inline void CSL_MSMC_getMissCounter (Uint32* readMiss, Uint32* writeMiss)
2609 {
2610 *readMiss = CSL_FEXT (hMsmc->SMARM, MSMC_SMARM_RMCNT);
2611 *writeMiss = CSL_FEXT (hMsmc->SMAWM, MSMC_SMAWM_WMCNT);
2612 }
2614 /** ============================================================================
2615 * @n@b CSL_MSMC_setMissCounter
2616 *
2617 * @b Description
2618 * @n This function sets the reads/write miss counters
2619 *
2620 * @b Arguments
2621 @verbatim
2622 readMissCntr Read Miss Counter
2623 writeMissCntr Write Miss Counter
2624 @endverbatim
2625 *
2626 * <b> Return Value </b>
2627 * @n None
2628 *
2629 * <b> Pre Condition </b>
2630 * @n None
2631 *
2632 * <b> Post Condition </b>
2633 * @n None
2634 *
2635 * @b Writes
2636 * @n MSMC_SMARM_RMCNT, MSMC_SMAWM_WMCNT
2637 *
2638 * @b Example
2639 * @verbatim
2641 // Clear the Read & Write Miss Counters
2642 CSL_MSMC_getMissCounter(&readMiss, &writeMiss);
2644 @endverbatim
2645 * =============================================================================
2646 */
2647 static inline void CSL_MSMC_setMissCounter (Uint32 readMiss, Uint32 writeMiss)
2648 {
2649 CSL_FINS (hMsmc->SMARM, MSMC_SMARM_RMCNT, readMiss);
2650 CSL_FINS (hMsmc->SMAWM, MSMC_SMAWM_WMCNT, writeMiss);
2651 }
2653 /** ============================================================================
2654 * @n@b CSL_MSMC_getVictimCounter
2655 *
2656 * @b Description
2657 * @n This function gets the victim counter
2658 *
2659 * @b Arguments
2660 * @n None
2661 *
2662 * <b> Return Value </b>
2663 * @n Victim Counter
2664 *
2665 * <b> Pre Condition </b>
2666 * @n None
2667 *
2668 * <b> Post Condition </b>
2669 * @n None
2670 *
2671 * @b Reads
2672 * @n MSMC_SMAV_VCNT
2673 *
2674 * @b Example
2675 * @verbatim
2676 Uint32 victimCounter;
2678 // Get the Victim Counter
2679 victimCounter = CSL_MSMC_getVictimCounter();
2681 @endverbatim
2682 * =============================================================================
2683 */
2684 static inline Uint32 CSL_MSMC_getVictimCounter (void)
2685 {
2686 return CSL_FEXT (hMsmc->SMAV, MSMC_SMAV_VCNT);
2687 }
2689 /** ============================================================================
2690 * @n@b CSL_MSMC_setVictimCounter
2691 *
2692 * @b Description
2693 * @n This function sets the victim counter
2694 *
2695 * @b Arguments
2696 * @n None
2697 *
2698 * <b> Return Value </b>
2699 * @n Victim Counter
2700 *
2701 * <b> Pre Condition </b>
2702 * @n None
2703 *
2704 * <b> Post Condition </b>
2705 * @n None
2706 *
2707 * @b Writes
2708 * @n MSMC_SMAV_VCNT
2709 *
2710 * @b Example
2711 * @verbatim
2713 // Reset the Victim Counter
2714 CSL_MSMC_setVictimCounter(0);
2716 @endverbatim
2717 * =============================================================================
2718 */
2719 static inline void CSL_MSMC_setVictimCounter (Uint32 victimCounter)
2720 {
2721 CSL_FINS (hMsmc->SMAV, MSMC_SMAV_VCNT, victimCounter);
2722 }
2724 /** ============================================================================
2725 * @n@b CSL_MSMC_getMemoryArbiterCounters
2726 *
2727 * @b Description
2728 * @n This function gets the performance counters for the memory arbiters
2729 * (all banks).
2730 *
2731 * @b Arguments
2732 @verbatim
2733 priorityElevationCounter Priority Elevation Counter
2734 accCyclesCounter Accumulated Cycles counter
2735 @endverbatim
2736 *
2737 * <b> Return Value </b>
2738 * @n None
2739 *
2740 * <b> Pre Condition </b>
2741 * @n None
2742 *
2743 * <b> Post Condition </b>
2744 * @n None
2745 *
2746 * @b Reads
2747 * @n MSMC_SMAMP_MPECNT, MSMC_SMAMP_ACWM
2748 *
2749 * @b Example
2750 * @verbatim
2751 Uint8 priorityElevationCounter;
2752 Uint32 accCyclesCounter;
2754 // Get the Memory Arbiter Counters
2755 CSL_MSMC_getMemoryArbiterCounters(&priorityElevationCounter, &accCyclesCounter);
2757 @endverbatim
2758 * =============================================================================
2759 */
2760 static inline void CSL_MSMC_getMemoryArbiterCounters
2761 (
2762 Uint8* priorityElevationCounter,
2763 Uint32* accCyclesCounter
2764 )
2765 {
2766 *priorityElevationCounter = CSL_FEXT (hMsmc->SMAMP, MSMC_SMAMP_MPECNT);
2767 *accCyclesCounter = CSL_FEXT (hMsmc->SMAMP, MSMC_SMAMP_ACWM);
2768 }
2770 /** ============================================================================
2771 * @n@b CSL_MSMC_setMemoryArbiterCounters
2772 *
2773 * @b Description
2774 * @n This function sets the performance counters for the memory arbiters
2775 * (all banks).
2776 *
2777 * @b Arguments
2778 @verbatim
2779 accCyclesCounter Accumulated Cycles counter
2780 @endverbatim
2781 *
2782 * <b> Return Value </b>
2783 * @n None
2784 *
2785 * <b> Pre Condition </b>
2786 * @n None
2787 *
2788 * <b> Post Condition </b>
2789 * @n None
2790 *
2791 * @b Writes
2792 * @n MSMC_SMAMP_ACWM
2793 *
2794 * @b Example
2795 * @verbatim
2797 // Clear the Memory Arbiter Counters
2798 CSL_MSMC_setMemoryArbiterCounters(0);
2800 @endverbatim
2801 * =============================================================================
2802 */
2803 static inline void CSL_MSMC_setMemoryArbiterCounters(Uint32 accCyclesCounter)
2804 {
2805 CSL_FINS (hMsmc->SMAMP, MSMC_SMAMP_ACWM, accCyclesCounter);
2806 }
2808 /** ============================================================================
2809 * @n@b CSL_MSMC_getPortArbiterCounters
2810 *
2811 * @b Description
2812 * @n This function gets the performance counters for the port arbiters
2813 *
2814 * @b Arguments
2815 @verbatim
2816 priorityElevationCounter Priority Elevation Counter
2817 accCyclesCounter Accumulated Cycles counter
2818 @endverbatim
2819 *
2820 * <b> Return Value </b>
2821 * @n None
2822 *
2823 * <b> Pre Condition </b>
2824 * @n None
2825 *
2826 * <b> Post Condition </b>
2827 * @n None
2828 *
2829 * @b Reads
2830 * @n MSMC_SMAEP_EPECNT, MSMC_SMAEP_ACWE
2831 *
2832 * @b Example
2833 * @verbatim
2834 Uint8 priorityElevationCounter;
2835 Uint32 accCyclesCounter;
2837 // Get the Port Arbiter Counters
2838 CSL_MSMC_getPortArbiterCounters(&priorityElevationCounter, &accCyclesCounter);
2840 @endverbatim
2841 * =============================================================================
2842 */
2843 static inline void CSL_MSMC_getPortArbiterCounters
2844 (
2845 Uint8* priorityElevationCounter,
2846 Uint32* accCyclesCounter
2847 )
2848 {
2849 *priorityElevationCounter = CSL_FEXT (hMsmc->SMAEP, MSMC_SMAEP_EPECNT);
2850 *accCyclesCounter = CSL_FEXT (hMsmc->SMAEP, MSMC_SMAEP_ACWE);
2851 }
2853 /** ============================================================================
2854 * @n@b CSL_MSMC_setPortArbiterCounters
2855 *
2856 * @b Description
2857 * @n This function sets the performance counters for the port arbiters
2858 *
2859 * @b Arguments
2860 @verbatim
2861 accCyclesCounter Accumulated Cycles counter
2862 @endverbatim
2863 *
2864 * <b> Return Value </b>
2865 * @n None
2866 *
2867 * <b> Pre Condition </b>
2868 * @n None
2869 *
2870 * <b> Post Condition </b>
2871 * @n None
2872 *
2873 * @b Writes
2874 * @n MSMC_SMAEP_ACWE
2875 *
2876 * @b Example
2877 * @verbatim
2879 // Reset the Port Arbiter Counters
2880 CSL_MSMC_setPortArbiterCounters(0);
2882 @endverbatim
2883 * =============================================================================
2884 */
2885 static inline void CSL_MSMC_setPortArbiterCounters(Uint32 accCyclesCounter)
2886 {
2887 CSL_FINS (hMsmc->SMAEP, MSMC_SMAEP_ACWE, accCyclesCounter);
2888 }
2890 /** ============================================================================
2891 * @n@b CSL_MSMC_getPerfFilters
2892 *
2893 * @b Description
2894 * @n This function gets the performance counters filters
2895 *
2896 * @b Arguments
2897 @verbatim
2898 ccf CPU filter for counters
2899 pidf System request PrivID filter for counters
2900 hm Selects if SMAH:HCNT counts only cache hits or SRAM accesses
2901 pth Priority threshold filter
2902 @endverbatim
2903 *
2904 * <b> Return Value </b>
2905 * @n None
2906 *
2907 * <b> Pre Condition </b>
2908 * @n None
2909 *
2910 * <b> Post Condition </b>
2911 * @n None
2912 *
2913 * @b Reads
2914 * @n MSMC_SMAC_CCF, MSMC_SMAC_PIDF, MSMC_SMAC_HM, MSMC_SMAC_PTH
2915 *
2916 * @b Example
2917 * @verbatim
2918 Uint8 ccf;
2919 Uint16 pidf;
2920 Uint8 hm;
2921 Uint8 pth;
2923 // Get the Performance Filters
2924 CSL_MSMC_getPerfFilters(&ccf, &pidf, &hm, &pth);
2926 @endverbatim
2927 * =============================================================================
2928 */
2929 static inline void CSL_MSMC_getPerfFilters
2930 (
2931 Uint8* ccf,
2932 Uint16* pidf,
2933 Uint8* hm,
2934 Uint8* pth
2935 )
2936 {
2937 Uint32 value = hMsmc->SMAC;
2939 *ccf = CSL_FEXT (value, MSMC_SMAC_CCF);
2940 *pidf = CSL_FEXT (value, MSMC_SMAC_PIDF);
2941 *hm = CSL_FEXT (value, MSMC_SMAC_HM);
2942 *pth = CSL_FEXT (value, MSMC_SMAC_PTH);
2943 }
2945 /** ============================================================================
2946 * @n@b CSL_MSMC_setPerfFilters
2947 *
2948 * @b Description
2949 * @n This function sets the performance counters filters
2950 *
2951 * @b Arguments
2952 @verbatim
2953 ccf CPU filter for counters
2954 pidf System request PrivID filter for counters
2955 hm Selects if SMAH:HCNT counts only cache hits or SRAM accesses
2956 pth Priority threshold filter
2957 @endverbatim
2958 *
2959 * <b> Return Value </b>
2960 * @n None
2961 *
2962 * <b> Pre Condition </b>
2963 * @n None
2964 *
2965 * <b> Post Condition </b>
2966 * @n None
2967 *
2968 * @b Writes
2969 * @n MSMC_SMAC_CCF, MSMC_SMAC_PIDF, MSMC_SMAC_HM, MSMC_SMAC_PTH
2970 *
2971 * @b Example
2972 * @verbatim
2973 Uint8 ccf;
2974 Uint16 pidf;
2975 Uint8 hm;
2976 Uint8 pth;
2978 // Get the Performance Filters
2979 CSL_MSMC_getPerfFilters(&ccf, &pidf, &hm, &pth);
2980 ...
2981 // Make sure we counter SRAM access also.
2982 CSL_MSMC_setPerfFilters(ccf, pidf, 1, pth);
2983 ...
2984 @endverbatim
2985 * =============================================================================
2986 */
2987 static inline void CSL_MSMC_setPerfFilters
2988 (
2989 Uint8 ccf,
2990 Uint16 pidf,
2991 Uint8 hm,
2992 Uint8 pth
2993 )
2994 {
2995 hMsmc->SMAC = CSL_FMK(MSMC_SMAC_CCF, ccf) |
2996 CSL_FMK(MSMC_SMAC_PIDF, pidf) |
2997 CSL_FMK(MSMC_SMAC_HM, hm) |
2998 CSL_FMK(MSMC_SMAC_PTH, pth);
2999 }
3001 /** ============================================================================
3002 * @n@b CSL_MSMC_enableAnalysisCounter
3003 *
3004 * @b Description
3005 * @n This function enables the analysis counters
3006 *
3007 * @b Arguments
3008 * @n None
3009 *
3010 * <b> Return Value </b>
3011 * @n None
3012 *
3013 * <b> Pre Condition </b>
3014 * @n None
3015 *
3016 * <b> Post Condition </b>
3017 * @n None
3018 *
3019 * @b Writes
3020 * @n MSMC_SMAC_AEN=1
3021 *
3022 * @b Example
3023 * @verbatim
3025 // Enables the performance analysis counter
3026 CSL_MSMC_enableAnalysisCounter();
3028 @endverbatim
3029 * =============================================================================
3030 */
3031 static inline void CSL_MSMC_enableAnalysisCounter (void)
3032 {
3033 CSL_FINS (hMsmc->SMAC, MSMC_SMAC_AEN, 1);
3034 }
3036 /** ============================================================================
3037 * @n@b CSL_MSMC_disableAnalysisCounter
3038 *
3039 * @b Description
3040 * @n This function disables the analysis counters
3041 *
3042 * @b Arguments
3043 * @n None
3044 *
3045 * <b> Return Value </b>
3046 * @n None
3047 *
3048 * <b> Pre Condition </b>
3049 * @n None
3050 *
3051 * <b> Post Condition </b>
3052 * @n None
3053 *
3054 * @b Writes
3055 * @n MSMC_SMAC_AEN=0
3056 *
3057 * @b Example
3058 * @verbatim
3060 // Disables the performance analysis counter
3061 CSL_MSMC_disableAnalysisCounter();
3063 @endverbatim
3064 * =============================================================================
3065 */
3066 static inline void CSL_MSMC_disableAnalysisCounter (void)
3067 {
3068 CSL_FINS (hMsmc->SMAC, MSMC_SMAC_AEN, 0);
3069 }
3071 /** ============================================================================
3072 * @n@b CSL_MSMC_getPriorityLevel
3073 *
3074 * @b Description
3075 * @n This function gets the priority level used for software initiated
3076 * global invalidate
3077 *
3078 * @b Arguments
3079 * @n None
3080 *
3081 * <b> Return Value </b>
3082 * @n None
3083 *
3084 * <b> Pre Condition </b>
3085 * @n None
3086 *
3087 * <b> Post Condition </b>
3088 * @n None
3089 *
3090 * @b Reads
3091 * @n MSMC_SMCFG_INVP
3092 *
3093 * @b Example
3094 * @verbatim
3095 Uint8 priorityLevel;
3097 // Get the priority Level.
3098 priorityLevel = CSL_MSMC_getPriorityLevel ();
3100 @endverbatim
3101 * =============================================================================
3102 */
3103 static inline Uint8 CSL_MSMC_getPriorityLevel (void)
3104 {
3105 return CSL_FEXT (hMsmc->SMCFG, MSMC_SMCFG_INVP);
3106 }
3108 /** ============================================================================
3109 * @n@b CSL_MSMC_setPriorityLevel
3110 *
3111 * @b Description
3112 * @n This function sets the priority level used for software initiated
3113 * global invalidate
3114 *
3115 * @b Arguments
3116 * @n None
3117 *
3118 * <b> Return Value </b>
3119 * @n None
3120 *
3121 * <b> Pre Condition </b>
3122 * @n None
3123 *
3124 * <b> Post Condition </b>
3125 * @n None
3126 *
3127 * @b Writes
3128 * @n MSMC_SMCFG_INVP
3129 *
3130 * @b Example
3131 * @verbatim
3133 // Set the priority Level.
3134 CSL_MSMC_setPriorityLevel (0x1);
3136 @endverbatim
3137 * =============================================================================
3138 */
3139 static inline void CSL_MSMC_setPriorityLevel (Uint8 priorityLevel)
3140 {
3141 CSL_FINS (hMsmc->SMCFG, MSMC_SMCFG_INVP, priorityLevel);
3142 }
3144 /** ============================================================================
3145 * @n@b CSL_MSMC_freezeCache
3146 *
3147 * @b Description
3148 * @n This function freezes the MSMC cache
3149 *
3150 * @b Arguments
3151 * @n None
3152 *
3153 * <b> Return Value </b>
3154 * @n None
3155 *
3156 * <b> Pre Condition </b>
3157 * @n None
3158 *
3159 * <b> Post Condition </b>
3160 * @n None
3161 *
3162 * @b Writes
3163 * @n MSMC_SMCFG_EFZ=1
3164 *
3165 * @b Example
3166 * @verbatim
3168 // Freeze the MSMC Cache
3169 CSL_MSMC_freezeCache ();
3171 @endverbatim
3172 * =============================================================================
3173 */
3174 static inline void CSL_MSMC_freezeCache (void)
3175 {
3176 CSL_FINS (hMsmc->SMCFG, MSMC_SMCFG_EFZ, 1);
3177 }
3179 /** ============================================================================
3180 * @n@b CSL_MSMC_unFreezeCache
3181 *
3182 * @b Description
3183 * @n This function unfreezes the MSMC cache
3184 *
3185 * @b Arguments
3186 * @n None
3187 *
3188 * <b> Return Value </b>
3189 * @n None
3190 *
3191 * <b> Pre Condition </b>
3192 * @n None
3193 *
3194 * <b> Post Condition </b>
3195 * @n None
3196 *
3197 * @b Writes
3198 * @n MSMC_SMCFG_EFZ=0
3199 *
3200 * @b Example
3201 * @verbatim
3203 // Unfreeze the MSMC Cache
3204 CSL_MSMC_unFreezeCache ();
3206 @endverbatim
3207 * =============================================================================
3208 */
3209 static inline void CSL_MSMC_unFreezeCache (void)
3210 {
3211 CSL_FINS (hMsmc->SMCFG, MSMC_SMCFG_EFZ, 0);
3212 }
3214 /** ============================================================================
3215 * @n@b CSL_MSMC_isCacheFrozen
3216 *
3217 * @b Description
3218 * @n This function checks if the MSMC cache is frozen or not?
3219 *
3220 * @b Arguments
3221 * @n None
3222 *
3223 * <b> Return Value </b>
3224 * @n TRUE - Cache is frozen
3225 * @n FALSE - Cache is not frozen
3226 *
3227 * <b> Pre Condition </b>
3228 * @n None
3229 *
3230 * <b> Post Condition </b>
3231 * @n None
3232 *
3233 * @b Reads
3234 * @n MSMC_SMCFG_EFZ
3235 *
3236 * @b Example
3237 * @verbatim
3239 // Check the status of the cache
3240 if (CSL_MSMC_isCacheFrozen () == TRUE)
3241 {
3242 // Cache is frozen.
3243 }
3244 else
3245 {
3246 // Cache is NOT frozen.
3247 }
3249 @endverbatim
3250 * =============================================================================
3251 */
3252 static inline Bool CSL_MSMC_isCacheFrozen (void)
3253 {
3254 if (CSL_FEXT (hMsmc->SMCFG, MSMC_SMCFG_EFZ) == 1)
3255 return TRUE;
3256 return FALSE;
3257 }
3259 /** ============================================================================
3260 * @n@b CSL_MSMC_invalidateCache
3261 *
3262 * @b Description
3263 * @n This function does a global invalidation of all the lines in the cache.
3264 *
3265 * @b Arguments
3266 * @n None
3267 *
3268 * <b> Return Value </b>
3269 * @n None
3270 *
3271 * <b> Pre Condition </b>
3272 * @n None
3273 *
3274 * <b> Post Condition </b>
3275 * @n All Cache lines are invalidated.
3276 *
3277 * @b Writes
3278 * @n MSMC_SMCFG_GIW=1
3279 *
3280 * @b Example
3281 * @verbatim
3282 CSL_MSMC_invalidateCache ();
3284 @endverbatim
3285 * =============================================================================
3286 */
3287 static inline void CSL_MSMC_invalidateCache (void)
3288 {
3289 CSL_FINS (hMsmc->SMCFG, MSMC_SMCFG_GIW, 1);
3290 }
3292 /** ============================================================================
3293 * @n@b CSL_MSMC_getInvalidateCacheStatus
3294 *
3295 * @b Description
3296 * @n This function returns the value of invalidate bit in SMCFG register.
3297 *
3298 * @b Arguments
3299 * @n None
3300 *
3301 * <b> Return Value </b>
3302 *
3303 * <b> Pre Condition </b>
3304 * @n None
3305 *
3306 * <b> Post Condition </b>
3307 * @n None
3308 *
3309 * @b Reads
3310 * @n MSMC_SMCFG_GIW
3311 *
3312 * @b Example
3313 * @verbatim
3314 Uint32 invStatus;
3316 invStatus = CSL_MSMC_getInvalidateCacheStatus ();
3318 @endverbatim
3319 * =============================================================================
3320 */
3321 static inline Uint32 CSL_MSMC_getInvalidateCacheStatus (void)
3322 {
3323 return CSL_FEXT (hMsmc->SMCFG, MSMC_SMCFG_GIW);
3324 }
3326 /** ============================================================================
3327 * @n@b CSL_MSMC_setCacheSize
3328 *
3329 * @b Description
3330 * @n This function sets the amount of memory configured as cache.
3331 *
3332 * @b Arguments
3333 @verbatim
3334 cmode size of cache
3335 @endverbatim
3336 *
3337 * <b> Return Value </b>
3338 * @n None
3339 *
3340 * <b> Pre Condition </b>
3341 * @n None
3342 *
3343 * <b> Post Condition </b>
3344 * @n MSMC Cache Memory Size is configured.
3345 *
3346 * @b Writes
3347 * @n MSMC_SMCFG_CMODE
3348 *
3349 * @b Example
3350 * @verbatim
3351 CSL_MSMC_setCacheSize (2);
3353 @endverbatim
3354 * =============================================================================
3355 */
3356 static inline void CSL_MSMC_setCacheSize (Uint32 cmode)
3357 {
3358 CSL_FINS (hMsmc->SMCFG, MSMC_SMCFG_CMODE, cmode);
3359 }
3361 /** ============================================================================
3362 * @n@b CSL_MSMC_getCacheSize
3363 *
3364 * @b Description
3365 * @n This function returns the amount of memory configured as cache.
3366 *
3367 * @b Arguments
3368 * @n None
3369 *
3370 * <b> Return Value </b>
3371 * @n Cache Size
3372 *
3373 * <b> Pre Condition </b>
3374 * @n None
3375 *
3376 * <b> Post Condition </b>
3377 * @n None
3378 *
3379 * @b Reads
3380 * @n MSMC_SMCFG_CMODE
3381 *
3382 * @b Example
3383 * @verbatim
3384 Uint32 cacheSize;
3386 cacheSize = CSL_MSMC_getCacheSize ();
3388 @endverbatim
3389 * =============================================================================
3390 */
3391 static inline Uint32 CSL_MSMC_getCacheSize (void)
3392 {
3393 return CSL_FEXT (hMsmc->SMCFG, MSMC_SMCFG_CMODE);
3394 }
3396 /** ============================================================================
3397 * @n@b CSL_MSMC_getSharedMemoryErrorAddress
3398 *
3399 * @b Description
3400 * @n This function returns the lower 32 bits of the 36 bit address used in the
3401 * accessing the corrupted location.
3402 *
3403 * @b Arguments
3404 * @n None
3405 *
3406 * <b> Return Value </b>
3407 * @n Shared Memory Error Address
3408 *
3409 * <b> Pre Condition </b>
3410 * @n None
3411 *
3412 * <b> Post Condition </b>
3413 * @n None
3414 *
3415 * @b Reads
3416 * @n MSMC_SMNCERRAR
3417 *
3418 * @b Example
3419 * @verbatim
3420 Uint32 memErrAddress;
3422 memErrAddress = CSL_MSMC_getSharedMemoryErrorAddress ();
3424 @endverbatim
3425 * =============================================================================
3426 */
3427 static inline Uint32 CSL_MSMC_getSharedMemoryErrorAddress (void)
3428 {
3429 return hMsmc->SMNCERRAR;
3430 }
3432 /** ============================================================================
3433 * @n@b CSL_MSMC_getSharedMemoryErrorAddressExtendedInfo
3434 *
3435 * @b Description
3436 * @n This function returns extended information i.e. upper 4 bits, priv id
3437 * which caused the error which accessing the corrupted location.
3438 *
3439 * @b Arguments
3440 * @n None
3441 *
3442 * <b> Return Value </b>
3443 * @n Shared Memory Extended Information
3444 *
3445 * <b> Pre Condition </b>
3446 * @n None
3447 *
3448 * <b> Post Condition </b>
3449 * @n None
3450 *
3451 * @b Reads
3452 * @n MSMC_SMNCERRXR_SEEADDR, MSMC_SMNCERRXR_SEPID, MSMC_SMNCERRXR_SER
3453 *
3454 * @b Example
3455 * @verbatim
3456 Uint8 seeAddr;
3457 Uint8 sepId;
3458 Uint8 ser;
3460 CSL_MSMC_getSharedMemoryErrorAddressExtendedInfo (&seeAddr, &sepId, &ser);
3462 @endverbatim
3463 * =============================================================================
3464 */
3465 static inline void CSL_MSMC_getSharedMemoryErrorAddressExtendedInfo
3466 (
3467 Uint8* seeAddr,
3468 Uint8* sepId,
3469 Uint8* ser
3470 )
3471 {
3472 Uint32 value = hMsmc->SMNCERRXR;
3474 *seeAddr = CSL_FEXT (value, MSMC_SMNCERRXR_SEEADDR);
3475 *sepId = CSL_FEXT (value, MSMC_SMNCERRXR_SEPID);
3476 *ser = CSL_FEXT (value, MSMC_SMNCERRXR_SER);
3477 }
3479 /** ============================================================================
3480 * @n@b CSL_MSMC_getScrubbingEngineErrorAddress
3481 *
3482 * @b Description
3483 * @n This function returns the scrubbing engine address after a 2-bit non
3484 * correctable address is detected.
3485 *
3486 * @b Arguments
3487 * @n None
3488 *
3489 * <b> Return Value </b>
3490 * @n Address which caused the error
3491 *
3492 * <b> Pre Condition </b>
3493 * @n None
3494 *
3495 * <b> Post Condition </b>
3496 * @n None
3497 *
3498 * @b Reads
3499 * @n MSMC_SMNCEA_SENCA
3500 *
3501 * @b Example
3502 * @verbatim
3504 Uint32 errAddress;
3506 errAddress = CSL_MSMC_getScrubbingEngineErrorAddress ();
3508 @endverbatim
3509 * =============================================================================
3510 */
3511 static inline Uint32 CSL_MSMC_getScrubbingEngineErrorAddress()
3512 {
3513 return CSL_FEXT (hMsmc->SMNCEA, MSMC_SMNCEA_SENCA);
3514 }
3516 /* @} */
3518 #ifdef __cplusplus
3519 }
3520 #endif
3522 #endif /* _CSL_MSMCAUX_H_ */