[processor-sdk/performance-audio-sr.git] / psdk_cust / pdk_k2g_1_0_1_2_eng / packages / ti / board / diag / dcan / src / dcan.h
1 /*
2 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 *
8 * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 *
11 * Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the
14 * distribution.
15 *
16 * Neither the name of Texas Instruments Incorporated nor the names of
17 * its contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 */
33 /**
34 * \file dcan.h
35 *
36 * \brief This file contains the function prototypes for the device
37 * abstraction layer of DCAN. It also contains necessary
38 * structure, enum and macro definitions
39 * DCAN : Controller Area Network Controller module
40 *
41 */
42 #ifndef DCAN_H_
43 #define DCAN_H_
45 #ifdef __cplusplus
46 extern "C" {
47 #endif
49 /* ========================================================================== */
50 /* Include Files */
51 /* ========================================================================== */
52 #include <ti/csl/cslr_dcan.h>
54 #include "hw_dcan.h"
56 /* ========================================================================== */
57 /* Macros & Typedefs */
58 /* ========================================================================== */
59 /**
60 * \brief Maximum message length in bytes that can be transmitted or received
61 * in a single message object
62 */
63 #define DCAN_MAX_MSG_LENGTH (8U)
65 /**
66 * \brief Maximum message objects that can be stored in Message RAM
67 */
68 #define DCAN_MAX_MSG_OBJECTS (64U)
70 /**
71 * \brief Invalid Message Object
72 */
73 #define DCAN_INVALID_MSG_OBJECT (0U)
75 /** \brief Message Object Size*/
76 #define DCAN_MSG_OBJ_SIZE (0x20)
78 /**
79 * \brief Mask used to deduce whether single bit error is detected or not
80 */
81 #define DCAN_ECC_SB_ERR_STS (DCAN_ECC_CSR_SE_FLAG_MASK)
83 /**
84 * \brief Mask used to deduce whether double bit error is detected or not
85 */
86 #define DCAN_ECC_DB_ERR_STS (DCAN_ECC_CSR_DE_FLAG_MASK)
88 /** \brief Error Status is updated*/
89 #define DCAN_ERR_STS_UPDATED (0x8000U)
91 /* ========================================================================== */
92 /* Structures and Enums */
93 /* ========================================================================== */
95 /**
96 * \brief Enumerates the values used to set the direction of message object
97 */
98 typedef enum dcanDirection
99 {
100 DCAN_DIR_RX = DCAN_IFARB_DIR_RECEIVE,
101 /**< Direction of message object is receive */
102 DCAN_DIR_TX = DCAN_IFARB_DIR_TRANSMIT
103 /**< Direction of message object is transmit */
104 } dcanDirection_t;
106 /**
107 * \brief Enumerates the values used to represent the DCAN error and status
108 * values
109 */
110 typedef enum dcanErrStsMask
111 {
112 DCAN_ES_MASK_NO_ERR = DCAN_ES_LEC_EN_1_0X0,
113 /**< LEC error code : No error */
114 DCAN_ES_MASK_STUFF_ERR = DCAN_ES_LEC_EN_2_0X1,
115 /**< LEC error code : Stuff error */
116 DCAN_ES_MASK_FORM_ERR = DCAN_ES_LEC_EN_3_0X2,
117 /**< LEC error code : Form error */
118 DCAN_ES_MASK_ACK_ERR = DCAN_ES_LEC_EN_4_0X3,
119 /**< LEC error code : Ack error */
120 DCAN_ES_MASK_BIT1_ERR = DCAN_ES_LEC_EN_5_0X4,
121 /**< LEC error code : Bit1 error */
122 DCAN_ES_MASK_BIT0_ERR = DCAN_ES_LEC_EN_6_0X5,
123 /**< LEC error code : Bit0 error */
124 DCAN_ES_MASK_CRC_ERR = DCAN_ES_LEC_EN_7_0X6,
125 /**< LEC error code : CRC error */
126 DCAN_ES_MASK_NO_EVENT = DCAN_ES_LEC_EN_8_0X7,
127 /**< LEC error code : No event detected */
128 DCAN_ES_MASK_TX_OK = DCAN_ES_TXOK_MASK,
129 /**< DCAN transmitted a message successfully */
130 DCAN_ES_MASK_RX_OK = DCAN_ES_RXOK_MASK,
131 /**< DCAN received a message successfully */
132 DCAN_ES_MASK_ERR_PASSIVE = DCAN_ES_EPASS_MASK,
133 /**< DCAN is in Error passive state */
134 DCAN_ES_MASK_ERR_WARNING = DCAN_ES_EWARN_MASK,
135 /**< DCAN has crossed the error warning limit */
136 DCAN_ES_MASK_BUS_OFF = DCAN_ES_BOFF_MASK,
137 /**< DCAN is in bus-off state */
138 DCAN_ES_MASK_PARITY_ERR = DCAN_ES_PER_MASK,
139 /**< Parity error is detected */
140 DCAN_ES_MASK_WAKEUP_PENDING = DCAN_ES_WAKEUP_PND_MASK,
141 /**< Wakeup pending */
142 DCAN_ES_MASK_POWER_DOWN = DCAN_ES_PDA_MASK
143 /**< DCAN is in local power down mode */
144 } dcanErrStsMask_t;
146 /**
147 * \brief Enumerates the values used to represent the DCAN error counter
148 * register values
149 */
150 typedef enum dcanErrCntrMask
151 {
152 DCAN_EC_MASK_TX_ERR = DCAN_ERRC_TEC_MASK,
153 /**< DCAN transmit error counter */
154 DCAN_EC_MASK_RX_ERR = DCAN_ERRC_REC_MASK,
155 /**< DCAN receive error counter */
156 DCAN_EC_MASK_RX_ERR_PASSIVE = DCAN_ERRC_RP_MASK
157 /**< DCAN receive error passive */
158 } dcanErrCntrMask_t;
160 /**
161 * \brief Enumerates the values used to represent the DCAN test modes
162 */
163 typedef enum dcanTestMode
164 {
165 DCAN_TEST_MODE_NONE,
166 /**< All DCAN test mode is disabled. Use for normal operation. */
167 DCAN_TEST_MODE_SILENT,
168 /**< DCAN Silent test mode */
169 DCAN_TEST_MODE_LPBACK,
170 /**< DCAN loopback test mode */
171 DCAN_TEST_MODE_LPBACK_SILENT,
172 /**< DCAN loopback with silent test mode */
173 DCAN_TEST_MODE_EXT_LPBACK
174 /**< DCAN external loopback test mode */
175 } dcanTestMode_t;
177 /**
178 * \brief Enumerates the values used to represent the DCAN interrupt lines
179 */
180 typedef enum dcanIntrLineNum
181 {
182 DCAN_INTR_LINE_NUM_0,
183 /**< DCAN interrupt line 0 */
184 DCAN_INTR_LINE_NUM_1
185 /**< DCAN interrupt line 1 */
186 } dcanIntrLineNum_t;
188 /**
189 * \brief Enumerates the values used to represent the DCAN interface
190 * registers
191 */
192 typedef enum dcanIfRegNum
193 {
194 DCAN_IF_REG_NUM_1 = 1U,
195 /**< DCAN interface register number 1 used for both read and write */
196 DCAN_IF_REG_NUM_2 = 2U,
197 /**< DCAN interface register number 2 used for both read and write */
198 DCAN_IF_REG_NUM_3 = 3U
199 /**< DCAN interface register number 3 used only for read
200 */
201 } dcanIfRegNum_t;
203 /**
204 * \brief Enumerates the values used to represent the DCAN Identifier Type
205 */
206 typedef enum dcanXidType
207 {
208 DCAN_XID_11_BIT,
209 /**< 11bit DCAN Identifier */
210 DCAN_XID_29_BIT
211 /**< 29bit DCAN Identifier */
212 } dcanXidType_t;
214 /**
215 * \brief Enumerates the values used to represent the DCAN mode of
216 * operation
217 */
218 typedef enum dcanMode
219 {
220 DCAN_MODE_NORMAL,
221 /**< DCAN normal mode */
222 DCAN_MODE_INIT
223 /**< DCAN initialization mode */
224 } dcanMode_t;
226 /**
227 * \brief Enumerates the values used to represent the DCAN parity error
228 * status
229 */
230 typedef enum dcanParityErrSts
231 {
232 DCAN_PARITY_ERR_STS_MSG_NUM = DCAN_PERR_MESSAGE_NUMBER_MASK,
233 /**< Mask used to deduce the message number which caused the Parity error */
234 DCAN_PARITY_ERR_STS_WORD_NUM = DCAN_PERR_WORD_NUMBER_MASK
235 /**< Mask used to deduce the word number
236 * which caused the Parity error */
237 } dcanParityErrSts_t;
239 #if defined (SOC_TDA3XX)
240 /**
241 * \brief Enumerates the values used to represent the DCAN ECC Diagnostic
242 * status information
243 */
244 typedef enum dcanEccDiagErrStsMask
245 {
246 DCAN_ECC_DIAG_SB_ERR_STS = DCAN_ECC_DIAG_STATUS_SE_FLAG_MASK,
247 /**< Mask used to deduce whether single bit error diagnostic is detected or
248 *not */
249 DCAN_ECC_DIAG_DB_ERR_STS = DCAN_ECC_DIAG_STATUS_DE_FLAG_MASK
250 /**< Mask used to deduce whether double bit error
251 * diagnostic is detected or not */
252 } dcanEccDiagErrStsMask_t;
253 #endif
255 /* ========================================================================== */
256 /* Structure Declarations */
257 /* ========================================================================== */
259 /** \brief Structure holding bit time parameters for DCAN
260 */
261 typedef struct dcanBitTimeParams
262 {
263 uint32_t baudRatePrescaler;
264 /**< Baud rate prescaler
265 * Value by which the CAN_CLK frequency is divided for generating the bit
266 * time quanta. The bit time is built up from a multiple of this quanta
267 * Valid programmed values are 0 to 63. The actual BRP value interpreted
268 * for the bit timing will be programmed as BRP value + 1
269 */
270 uint32_t syncJumpWidth;
271 /**< Synchronization Jump Width
272 * Valid programmed values are 0 to 3. The actual SJW value interpreted
273 * for the synchronization will be as programmed SJW value + 1
274 */
275 uint32_t timeSegment1;
276 /**< Time segment before the sample point
277 * Valid programmed values are 1 to 15. The actual TSeg1 value interpreted
278 * for the bit timing will be programmed as TSeg1 value + 1
279 */
280 uint32_t timeSegment2;
281 /**< Time segment after the sample point
282 * Valid programmed values are 0 to 7. The actual TSeg2 value which is
283 * interpreted for the bit timing will be the programmed as
284 * TSeg2 value + 1
285 */
286 uint32_t baudRatePrescalerExt;
287 /**< Baud rate prescaler extension
288 * Valid programmed values are 0 to 15. By programming BRPE the baud rate
289 * prescaler can be extended to values up to 1024
290 */
291 } dcanBitTimeParams_t;
293 /** \brief Structure holding configuration parameters of DCAN module
294 */
295 typedef struct dcanCfgParams
296 {
297 uint32_t parityEnable;
298 /**< Parity /ECC Enable or Disable for Tda2xx/Tda3xx
299 * Valid values: TRUE or FALSE
300 */
301 uint32_t eccModeEnable;
302 /**< Enable/disable SECDED single bit error correction
303 * Valid values: TRUE or FALSE. This is used only for TDA3xx platform
304 */
305 uint32_t eccDiagModeEnable;
306 /**< Enable/disable SECDED Diagnostic Mode
307 * Valid values: TRUE or FALSE. This is used only for TDA3xx platform
308 */
309 uint32_t sbeEventEnable;
310 /**< Enable/disable SECDED single bit error event
311 * Valid values: TRUE or FALSE. This is used only for TDA3xx platform
312 */
313 uint32_t intrLine0Enable;
314 /**< Interrupt line 0 enable/disable. Valid values: TRUE or FALSE */
315 uint32_t intrLine1Enable;
316 /**< Interrupt line 1 enable/disable. Valid values: TRUE or FALSE */
317 uint32_t stsChangeIntrEnable;
318 /**< Status Change Interrupt enable/disable. Valid values: TRUE or FALSE */
319 uint32_t errIntrEnable;
320 /**< Error Interrupt enable/disable. Valid values: TRUE or FALSE */
321 uint32_t if1DmaEnable;
322 /**< IF1 DMA enable/disable. Valid values: TRUE or FALSE */
323 uint32_t if2DmaEnable;
324 /**< IF2 DMA enable/disable. Valid values: TRUE or FALSE */
325 uint32_t if3DmaEnable;
326 /**< IF3 DMA enable/disable. Valid values: TRUE or FALSE */
327 uint32_t autoRetransmitDisable;
328 /**< Disable Automatic retransmission of failure messages :
329 * Valid values: TRUE or FALSE
330 */
331 uint32_t autoBusOnEnable;
332 /**< Auto Bus on enable/disable. Valid values: TRUE or FALSE */
333 uint32_t autoBusOnTimerVal;
334 /**< Auto Bus-On Timer Value in OCP clocks
335 * Valid only when autoBusOnEnable is set
336 */
337 uint32_t testModeEnable;
338 /**< Test Mode enable/disable. Valid values: TRUE or FALSE */
339 uint32_t testMode;
340 /**< Test mode. For valid values refer enum #dcanTestMode_t
341 * Valid only when testModeEnable is set
342 */
343 uint32_t ramAccessEnable;
344 /**< Direct access to the RAM is enabled/disabled while in test mode
345 * Valid only when testModeEnable is set - Valid values: TRUE or FALSE
346 */
347 } dcanCfgParams_t;
349 /** \brief Structure holding common configuration parameters of tx /rx of DCAN
350 * module
351 */
352 typedef struct dcanMsgObjCfgParams
353 {
354 uint32_t direction;
355 /**< Message object direction.For valid values refer
356 * enum #dcanDirection_t
357 */
358 uint32_t xIdFlagMask;
359 /**< Extended Identifier IDE bit Mask: Valid values: TRUE or FALSE */
360 uint32_t dirMask;
361 /**< Message Direction Mask: Valid values: TRUE or FALSE */
362 uint32_t msgIdentifierMask;
363 /**< Identifier Mask - [28:0] are valid bits */
364 uint32_t xIdFlag;
365 /**< Extended IDE Flag : Standard / Extended Identifier
366 * For valid values refer enum # dcanXidType_t
367 */
368 uint32_t msgIdentifier;
369 /**< Message Identifier - [28:0] are valid bits */
370 uint32_t msgValid;
371 /**< Valid or Invalid Message Objects.Valid values: TRUE or FALSE */
372 uint32_t uMaskUsed;
373 /**< Use mask (Msk[28:0], MXtd, and MDir) for acceptance filtering or not */
374 uint32_t intEnable;
375 /**< Interrupt Enable : IntPnd will be triggered or not after the
376 * successful transmission/reception of a frame
377 * Valid values: TRUE or FALSE
378 */
379 uint32_t remoteEnable;
380 /**< At the reception of a remote frame, TxRqst is changed or not
381 * Valid only for TX - Valid values: TRUE or FALSE
382 */
383 uint32_t fifoEOBFlag;
384 /**< Message object is part of FIFO Buffer or not
385 * Valid only for RX -Valid values: TRUE or FALSE
386 */
387 } dcanMsgObjCfgParams_t;
389 /** \brief Structure holding transfer parameters of DCAN module
390 */
391 typedef struct dcanMsgParams
392 {
393 uint32_t dataLength;
394 /**< Message object data length - Valid values: 1 to 8 */
395 uint32_t msgLostFlag;
396 /**< At the reception of a Message, Message is received or lost
397 * Valid only for RX - Valid values: TRUE or FALSE
398 */
399 uint8_t msgData[DCAN_MAX_MSG_LENGTH];
400 /**< Data Value to be transmitted */
401 } dcanMsgParams_t;
403 typedef dcanMsgParams_t dcanTxParams_t;
404 typedef dcanMsgParams_t dcanRxParams_t;
406 /** \brief Structure holding DCAN ECC Error status.
407 */
408 typedef struct dcanEccErrStatus
409 {
410 uint32_t singleBitErr;
411 /**< DCAN ECC : When one bit Error occured on Message Ram */
412 uint32_t doubleBitErr;
413 /**< DCAN ECC : When two bits Error occured on Message Ram */
414 } dcanEccErrStatus_t;
416 /* ========================================================================== */
417 /* Function Declarations */
418 /* ========================================================================== */
420 /**
421 * \brief This API will reset the DCAN module and configure the DCAN TX/RX
422 * IO Control register
423 *
424 * \param baseAddr Base Address of the DCAN module Register
425 * \param timeOut Timeout value
426 *
427 * \return STW_SOK on success else STW_EFAIL when DCAN reset fails
428 *
429 * \note This API has to be called before the driver can be used
430 */
431 int32_t DCANReset(uint32_t baseAddr, uint32_t timeOut);
433 /**
434 * \brief This API will configure the operating mode of DCAN
435 * In Init mode the communication on CAN bus is stopped and the
436 * controller needs to be placed in Init mode for initialization
437 * To start communication on CAN bus please keep the DCAN controller
438 * in Normal mode of operation
439 *
440 * \param baseAddr Base Address of the DCAN module Register
441 * \param mode DCAN mode to be configured
442 * For valid values refer enum #dcanMode_t
443 *
444 * \return None
445 */
446 void DCANSetMode(uint32_t baseAddr, uint32_t mode);
448 /**
449 * \brief This API configures bit time parameters for DCAN module
450 *
451 * \param baseAddr Base Address of the DCAN module Register
452 * \param pBitTimePrms Pointer which holds DCAN bit time parameters
453 *
454 * \return None
455 */
456 void DCANSetBitTime(uint32_t baseAddr, const dcanBitTimeParams_t *pBitTimePrms);
458 /**
459 * \brief This API configures DCAN controller
460 *
461 * \param baseAddr Base Address of the DCAN module Register
462 * \param pDcanCfgPrms Pointer which holds DCAN controller config parameters
463 *
464 * \return None
465 *
466 * \note The API DCANReset has to be called before this API can
467 * be used
468 */
469 void DCANConfig(uint32_t baseAddr, const dcanCfgParams_t *pDcanCfgPrms);
471 /**
472 * \brief This API configures DCAN TX/RX message object
473 *
474 * \param baseAddr Base Address of the DCAN module register
475 * \param msgObj Message object number of CAN node
476 * Valid values: 1 to 64
477 * \param ifRegNum DCAN interface register number
478 * For valid value refer enum #dcanIfRegNum_t
479 * \param pMsgObjCfgPrms Pointer which holds DCAN message object Config
480 * parameters of TX/RX
481 *
482 * \return STW_SOK on success else STW_EFAIL when IF register busy flag is
483 * set
484 */
485 int32_t DCANConfigMsgObj(uint32_t baseAddr,
486 uint32_t msgObj,
487 uint32_t ifRegNum,
488 const dcanMsgObjCfgParams_t *pMsgObjCfgPrms);
490 /**
491 * \brief This API transmits a CAN message and writes a CAN message into a
492 * CAN message object
493 *
494 * \param baseAddr Base Address of the DCAN module register
495 * \param msgObj Message object number of CAN node
496 * Valid values: 1 to 64
497 * \param ifRegNum DCAN interface register number
498 * For valid values refer enum #dcanIfRegNum_t
499 * \param pDcanTxPrms Pointer which holds DCAN transmit parameters
500 * \param timeOut Timeout value
501 *
502 * \return STW_SOK on success else STW_EFAIL when IF register busy flag is
503 * set
504 */
505 int32_t DCANTransmitData(uint32_t baseAddr,
506 uint32_t msgObj,
507 uint32_t ifRegNum,
508 const dcanTxParams_t *pDcanTxPrms,
509 uint32_t timeOut);
511 /**
512 * \brief This API gets received CAN message from message RAM
513 *
514 * \param baseAddr Base Address of the DCAN module register
515 * \param msgObj Message object number of CAN node
516 * Valid values : 1 to 64
517 *
518 * \param ifRegNum DCAN interface register number
519 * For valid values refer enum #dcanIfRegNum_t
520 * \param pDcanRxPrms Pointer which holds DCAN receive parameters
521 * \param timeOut Timeout value
522 *
523 * \return STW_SOK on success else STW_EFAIL when IF register busy flag is
524 * set
525 *
526 * \note The API will receive valid data of size dataLength
527 */
528 int32_t DCANGetData(uint32_t baseAddr,
529 uint32_t msgObj,
530 uint32_t ifRegNum,
531 dcanRxParams_t *pDcanRxPrms,
532 uint32_t timeOut);
534 /**
535 * \brief This API returns Tx message object transmission status whether Tx
536 * message object has a pending Tx request or not
537 *
538 * \param baseAddr Base Address of the DCAN module register
539 * \param msgObj Message object number of CAN node
540 * Valid values: 1 to 64
541 *
542 * \return FALSE when data transmission is successful else TRUE when data
543 * transmission is not successful
544 */
545 uint32_t DCANIsTxMsgPending(uint32_t baseAddr, uint32_t msgObj);
547 /**
548 * \brief This API returns Rx message object reception status whether Rx
549 * message object has a pending Rx data or not
550 *
551 * \param baseAddr Base Address of the DCAN module register
552 * \param msgObj Message object number of CAN node
553 * Valid values: 1 to 64
554 *
555 * \return TRUE when new data has arrived else FALSE when new data has not
556 * arrived
557 */
558 uint32_t DCANHasRxMsgArrived(uint32_t baseAddr, uint32_t msgObj);
560 /**
561 * \brief This API checks for whether msgObj is valid or not
562 *
563 * \param baseAddr Base Address of the DCAN Module Registers.
564 * \param msgObj Message object number whose message valid status
565 * is to be returned.
566 *
567 * \return TRUE when message object is valid else FALSE when message object
568 * is invalid
569 */
570 uint32_t DCANIsMsgValid(uint32_t baseAddr, uint32_t msgObj);
572 /**
573 * \brief This API checks for whether DCAN IF Register is busy or not
574 *
575 * \param baseAddr Base Address of the DCAN module register
576 * \param ifRegNum DCAN interface register number
577 * For valid values refer enum #dcanIfRegNum_t
578 *
579 * \return TRUE when DCAN IF Register is busy else FALSE when DCAN IF
580 * Register is not busy
581 */
582 uint32_t DCANIsIfRegBusy(uint32_t baseAddr, uint32_t ifRegNum);
584 /**
585 * \brief This API will configure which interrupt line is used to service
586 * interrupts for message objects
587 *
588 * \param baseAddr Base Address of the DCAN module register
589 * \param msgObj Message object number
590 * \param intrLineNum Interrupt line number to be configured
591 * For valid values refer enum #dcanIntrLineNum_t
592 *
593 * \return None
594 */
595 void DCANConfigIntrMux(uint32_t baseAddr,
596 uint32_t intrLineNum,
597 uint32_t msgObj);
599 /**
600 * \brief This API returns interrupt line status of DCAN
601 *
602 * \param baseAddr Base Address of the DCAN module register
603 * \param intrLineNum DCAN interrupt line number
604 * For valid values refer enum #dcanIntrLineNum_t
605 *
606 * \return message object number with highest pending interrupt or
607 * number which indicates Source of the interrupt
608 * 0x0000 : No interrupt is pending
609 * 0x0001-0x0040 : Message object Number which caused the interrupt
610 * 0x0041-0x7FFF : Unused
611 * 0x8000 : DCAN_ES value is not 0x07.
612 * 0x8001-0xFFFF : Unused
613 */
614 uint32_t DCANGetIntrStatus(uint32_t baseAddr, uint32_t intrLineNum);
616 /**
617 * \brief This API returns message object interrupt pending status
618 *
619 * \param baseAddr Base Address of the DCAN module register
620 * \param msgObj Message object number of CAN node
621 * Valid values: 1 to 64
622 *
623 * \return TRUE when message object has pending interrupt else FALSE when
624 * message object has no pending interrupt
625 */
626 uint32_t DCANIsMsgObjIntrPending(uint32_t baseAddr, uint32_t msgObj);
628 /**
629 * \brief This API will clear the interrupt pending status of received message
630 * objects after a new message is received
631 *
632 * \param baseAddr Base Address of the DCAN module register
633 * \param msgObj Message object number of CAN node
634 * Valid values : 1 to 64
635 * \param ifRegNum DCAN interface register number
636 * For valid values refer enum #dcanIfRegNum_t
637 * \return None
638 */
639 void DCANIntrClearStatus(uint32_t baseAddr, uint32_t msgObj, uint32_t ifRegNum);
641 /**
642 * \brief This API will read the error and status information of DCAN
643 * controller
644 *
645 * \param baseAddr Base Address of the DCAN module register
646 *
647 * \return Returns the error and status values.For valid values refer
648 * enum #dcanErrStsMask_t
649 *
650 * \note Reading the error and status register will clear/set certain bits
651 * in the error and status register. For more information please
652 * refer the DCAN Technical Reference Manual(TRM). For debug support,
653 * the auto clear functionality of error and status register is
654 * disabled when in debug/suspend mode
655 */
656 uint32_t DCANGetErrStatus(uint32_t baseAddr);
658 /**
659 * \brief This API will read the error counter status of DCAN
660 *
661 * \param baseAddr Base Address of the DCAN module register
662 *
663 * \return Returns the error counter status values. For valid values refer
664 * enum #dcanErrCntrMask_t
665 */
666 uint32_t DCANGetErrCntrStatus(uint32_t baseAddr);
668 /**
669 * \brief This API will read the DCAN parity error status
670 *
671 * \param baseAddr Base Address of the DCAN module register
672 *
673 * \return Returns the DCAN parity error status. For valid values refer
674 * enum #dcanParityErrSts_t
675 */
676 uint32_t DCANGetParityErrStatus(uint32_t baseAddr);
678 /**
679 * \brief This API returns message object number where DCAN ECC Single
680 * Bit Error is detected
681 *
682 * \param baseAddr Base Address of the DCAN module register
683 *
684 * \return retVal Returns the message object number where DCAN ECC Single
685 * Bit Error is detected
686 * For Tda2xx it returns DCAN_INVALID_MSG_OBJECT
687 *
688 * \note This API is valid only for Tda3xx
689 */
690 uint32_t DCANGetMsgObjBitErrDetected(uint32_t baseAddr);
692 /**
693 * \brief This API will read the ECC diagnostic status information of DCAN
694 * controller
695 *
696 * \param baseAddr Base Address of the DCAN module register
697 *
698 * \return Returns the ECC disagnostic error status information.
699 * For valid values refer enum #dcanEccDiagErrStsMask_t
700 *
701 * \note This API is valid only for Tda3xx
702 */
703 uint32_t DCANGetEccDiagErrStatus(uint32_t baseAddr);
705 /**
706 * \brief This API will read the ECC error status information of DCAN
707 * controller
708 *
709 * \param baseAddr Base Address of the DCAN module register
710 *
711 * \return Returns the ECC error status information.
712 *
713 * \note This API is valid only for Tda3xx
714 */
715 uint32_t DCANGetEccErrStatus(uint32_t baseAddr);
717 /**
718 * \brief Enable/disable the DCAN parity/ECC
719 *
720 * \param baseAddr Base Address of the DCAN module register
721 * \param enablePMD Enable/Disable DCAN parity(for Tda2xx)/ECC(for Tda3xx)
722 * Valid values: TRUE or FALSE
723 *
724 * \return None
725 */
726 void DCANParityEnable(uint32_t baseAddr, uint32_t enablePMD);
728 /**
729 * \brief Enable/ Disable the test mode of DCAN
730 *
731 * \param baseAddr Base Address of the DCAN module register
732 * \param enableTestMode Enable/Disable test mode of DCAN.
733 * Valid values: TRUE or FALSE
734 * \param testMode Select the DCAN test mode
735 * For valid values refer enum # dcanTestMode_t
736 *
737 * \return None
738 */
739 void DCANTestModeEnable(uint32_t baseAddr,
740 uint32_t enableTestMode,
741 uint32_t testMode);
743 /**
744 * \brief Enable/disable the DCAN ECC Diagnostic Mode.
745 *
746 * \param baseAddr Base Address of the DCAN module register
747 * \param enableEccDiagMode Enable/Disable DCAN ECC Diagnostic Mode
748 * Valid values: TRUE or FALSE
749 *
750 * \return None
751 *
752 * \note This API is valid only for Tda3xx
753 */
754 void DCANEccDiagModeEnable(uint32_t baseAddr, uint32_t enableEccDiagMode);
756 /**
757 * \brief This API is used to Enable/disable SECDED Single bit Error
758 * correction and SECDED Single bit Error Event
759 *
760 * \param baseAddr Base Address of the DCAN module register
761 * \param enableEccMode Enable/Disable SECDED Single bit Error
762 * correction.
763 * Valid values: TRUE or FALSE
764 * \param enableSbeEvent Enable/Disable SECDED Single bit Error
765 * Event.
766 * Valid values: TRUE or FALSE
767 *
768 * \return None
769 *
770 * \note This API is valid only for Tda3xx
771 */
772 void DCANEccModeEnable(uint32_t baseAddr,
773 uint32_t enableEccMode,
774 uint32_t enableSbeEvent);
776 /**
777 * \brief This function clears the error status of DCAN ECC.
778 *
779 * \param errClr Holds the values of which error need to be cleared.
780 * Refer #dcanEccErrStatus_t for more details.
781 * A value of 1 is written to these fields that need to
782 * be cleared and 0 for those that need not be cleared.
783 *
784 * \return STW_SOK on success else STW_EFAIL
785 *
786 * \note This API is valid only for Tda3xx
787 */
788 int32_t DCANClrEccErrStatus(uint32_t baseAddr,
789 const dcanEccErrStatus_t *errClr);
791 /**
792 * \brief This function clears the error status of DCAN ECC Diagnostic.
793 *
794 * \param errClr Holds the values of which error need to be cleared.
795 * Refer #dcanEccErrStatus_t for more details.
796 * A value of 1 is written to these fields that need to
797 * be cleared and 0 for those that need not be cleared.
798 *
799 * \return STW_SOK on success else STW_EFAIL
800 *
801 * \note This API is valid only for Tda3xx
802 */
803 int32_t DCANClrEccDiagErrStatus(uint32_t baseAddr,
804 const dcanEccErrStatus_t *errClr);
806 /**
807 * \brief This function clears the status of parity error on
808 * DCAN_PARITY interrupt line
809 *
810 * \return None
811 */
812 void DCANClrParityIntrStatus(uint32_t baseAddr);
814 #ifdef __cplusplus
815 }
816 #endif
818 #endif /* #ifndef DCAN_H_ */
819 /********************************* End of file ******************************/