/* Copyright (c) 2017, Texas Instruments Incorporated - http://www.ti.com/ All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * Neither the name of Texas Instruments Incorporated nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * */ /* * ======== app.cfg ======== * Platform: 66AK2G_bios_elf * Target: ti.targets.elf.C66 */ /* root of the configuration object model */ var Program = xdc.useModule('xdc.cfg.Program'); var cfgArgs = Program.build.cfgArgs; var RB = (cfgArgs.profile == "release" ? true : false); /* application uses the following modules and packages */ var Defaults = xdc.useModule('xdc.runtime.Defaults'); var Diags = xdc.useModule('xdc.runtime.Diags'); var Error = xdc.useModule('xdc.runtime.Error'); var Log = xdc.useModule('xdc.runtime.Log'); var Main = xdc.useModule('xdc.runtime.Main'); var Memory = xdc.useModule('xdc.runtime.Memory') var SysMin = xdc.useModule('xdc.runtime.SysMin'); var System = xdc.useModule('xdc.runtime.System'); var Text = xdc.useModule('xdc.runtime.Text'); var BIOS = xdc.useModule('ti.sysbios.BIOS'); var GateAll = xdc.useModule('ti.sysbios.gates.GateAll'); // Added for PFP var Hwi = xdc.useModule('ti.sysbios.hal.Hwi'); var Cache = xdc.useModule('ti.sysbios.hal.Cache'); var Cachec66 = xdc.useModule('ti.sysbios.family.c66.Cache'); var Timer = xdc.useModule('ti.sysbios.hal.Timer'); var HeapBuf = xdc.useModule('ti.sysbios.heaps.HeapBuf'); var HeapMem = xdc.useModule('ti.sysbios.heaps.HeapMem'); var Clock = xdc.useModule('ti.sysbios.knl.Clock'); var Idle = xdc.useModule('ti.sysbios.knl.Idle'); var Queue = xdc.useModule('ti.sysbios.knl.Queue'); var Semaphore = xdc.useModule('ti.sysbios.knl.Semaphore'); var Swi = xdc.useModule('ti.sysbios.knl.Swi'); // Added for PFP var Task = xdc.useModule('ti.sysbios.knl.Task'); var Load = xdc.useModule('ti.sysbios.utils.Load'); var LoggingSetup = xdc.useModule('ti.uia.sysbios.LoggingSetup'); var UIAEvt = xdc.useModule('ti.uia.events.UIAEvt'); var ECM = xdc.useModule('ti.sysbios.family.c64p.EventCombiner'); xdc.useModule('ti.sdo.utils.MultiProc'); /* * ======== IPC Configuration ======== */ xdc.global.SR0_cacheEnable = true; xdc.global.SrMsmcMem_cacheEnable = true; xdc.global.SrDDr3Mem_cacheEnable = true; xdc.global.SrDDr3_2Mem_cacheEnable = false; xdc.global.procName = "CORE0"; /* var ipc_cfg = xdc.loadCapsule("C:/ti/processor_sdk_audio_1_01_00_01/pasdk/shared/ipc.cfg.xs"); */ var ipc_cfg = xdc.loadCapsule("../../shared/ipc.cfg.xs"); /* select ipc libraries */ var Build = xdc.useModule('ti.sdo.ipc.Build'); Build.libType = (RB ? Build.LibType_NonInstrumented : Build.LibType_Debug); Build.assertsEnabled = (RB ? false : true); Build.logsEnabled = (RB ? false : true); /* * Uncomment this line to globally disable Asserts. * All modules inherit the default from the 'Defaults' module. You * can override these defaults on a per-module basis using Module.common$. * Disabling Asserts will save code space and improve runtime performance. Defaults.common$.diags_ASSERT = Diags.ALWAYS_OFF; */ /* * Uncomment this line to keep module names from being loaded on the target. * The module name strings are placed in the .const section. Setting this * parameter to false will save space in the .const section. Error and * Assert messages will contain an "unknown module" prefix instead * of the actual module name. Defaults.common$.namedModule = false; */ /* * Minimize exit handler array in System. The System module includes * an array of functions that are registered with System_atexit() to be * called by System_exit(). */ System.maxAtexitHandlers = 4; /* * Uncomment this line to disable the Error print function. * We lose error information when this is disabled since the errors are * not printed. Disabling the raiseHook will save some code space if * your app is not using System_printf() since the Error_print() function * calls System_printf(). Error.raiseHook = null; */ /* * Uncomment this line to keep Error, Assert, and Log strings from being * loaded on the target. These strings are placed in the .const section. * Setting this parameter to false will save space in the .const section. * Error, Assert and Log message will print raw ids and args instead of * a formatted message. Text.isLoaded = false; */ /* * Uncomment this line to disable the output of characters by SysMin * when the program exits. SysMin writes characters to a circular buffer. * This buffer can be viewed using the SysMin Output view in ROV. SysMin.flushAtExit = false; */ /* * The BIOS module will create the default heap for the system. * Specify the size of this default heap. */ //BIOS.heapSize = 0x1000; // initial setting BIOS.heapSize = 0x2000; // from pa.cfg BIOS.heapSection = ".systemHeap"; Program.sectMap[".systemHeap"] = "CORE0_DDR3"; /* * Build a custom SYS/BIOS library from sources. */ var HsDevBuild = environment["HsDevBuild"]; var hsDevBuild = (HsDevBuild == "1" ? true : false); if (HsDevBuild == true) { /* HS device build */ /* Added per recommendation from CATAPPS-171 */ BIOS.useSK = true; BIOS.setupSecureContext = true; BIOS.libType = BIOS.LibType_Custom; } else { /* GP device build */ BIOS.libType = (RB ? BIOS.LibType_NonInstrumented : BIOS.LibType_Instrumented); //BIOS.libType = BIOS.LibType_Custom; //BIOS.libType = BIOS.LibType_Debug; } /* System stack size (used by ISRs and Swis) */ Program.stack = 0x2000; Program.sectMap[".stack"] = "L2SRAM" /* Circular buffer size for System_printf() */ SysMin.bufSize = 0x200; System.SupportProxy = SysMin; /* ------ */ /* Set CPU frequency to 600 MHz */ BIOS.cpuFreq.lo = 600000000; BIOS.cpuFreq.hi = 0; /* Set Sysclock period (usec.) */ Clock.tickPeriod = 1000; /* Configure Logging */ LoggingSetup.loggerType = LoggingSetup.LoggerType_STOPMODE; // LoggerType_JTAGRUNMODE LoggingSetup.sysbiosTaskLogging = false; // true; LoggingSetup.sysbiosSwiLogging = false; LoggingSetup.sysbiosHwiLogging = false; // true //LoggingSetup.sysbiosLoggerSize = 16384; LoggingSetup.loadLogging = false; //true; LoggingSetup.mainLogging = true; LoggingSetup.mainLoggingRuntimeControl = false; LoggingSetup.mainLoggerSize = 327680; //81960; //LoggingSetup.memorySectionName = "CORE0_DDR3"; //"CORE0_MSMC"; // FL: CPU load logging via UIA doesn't work. // Below settings work for target-side load computation (no UIA) when LoggingSetup.loadLogging set to false, but not true. // Load.common$.diags_USER4 set to default or Diags.ALWAYS_ON makes no difference. /* Configure Load Logging */ Load.updateInIdle = true; // default=true Load.windowInMs = 5.33; // 48KHz 256 @ 5.33ms // in msec., default=500 Load.taskEnabled = true; // default=true Load.swiEnabled = false; // default=true Load.hwiEnabled = false; // default=true //Load.common$.diags_USER4 = Diags.ALWAYS_ON; // default=Diags.RUNTIME_ON //Task.common$.diags_USER1 = Diags.ALWAYS_ON; Task.common$.diags_INFO = Diags.ALWAYS_ON; /* Disallow nested hardware interrupts */ Hwi.dispatcherAutoNestingSupport = false; var ProjName = environment["ProjName"]; var topo = ProjName.replace( /pa_([a-z])[0-9]+_.*/, "$1"); var drv = xdc.loadPackage('ti.sdo.edma3.drv'); var rm = xdc.loadPackage ("ti.sdo.edma3.rm"); var Edma = xdc.loadPackage ("ti.sdo.edma3.drv.sample"); var Hwi = xdc.useModule('ti.sysbios.family.c64p.Hwi'); var devType = "k2g" var CpIntc = xdc.useModule('ti.sysbios.family.c66.tci66xx.CpIntc'); /* Load the OSAL package */ var osType = "tirtos"; var Osal = xdc.useModule('ti.osal.Settings'); Osal.osType = osType; Osal.socType = devType; /* Load the uart package */ var Uart = xdc.loadPackage('ti.drv.uart'); Uart.Settings.enableProfiling = false; Uart.Settings.socType = devType; Uart.Settings.useDma = "true"; /* Load the spi package */ var Spi = xdc.loadPackage('ti.drv.spi'); Spi.Settings.enableProfiling = false; Spi.Settings.socType = devType; /* Load the i2c package */ var I2c = xdc.loadPackage('ti.drv.i2c'); I2c.Settings.enableProfiling = false; I2c.Settings.socType = devType; /* Load and use the CSL packages */ var Csl = xdc.useModule('ti.csl.Settings'); Csl.deviceType = devType; /* Set default stack size for tasks */ Task.defaultStackSize = 2048; /* Set size of idle task stack */ Task.idleTaskStackSize = 2048; /* Add Audio Function Processing (AFP) task */ var task0Params = new Task.Params(); task0Params.instance.name = "TaskAfp"; task0Params.stackSize = 0x1000; // initial value from pa.cfg task0Params.stackSection = ".far:taskStackSectionAfp"; task0Params.arg0 = 0; task0Params.priority = -1; //1; Program.global.TaskAfp = Task.create("&taskAfpFxn", task0Params); Program.sectMap[".far:taskStackSectionAfp"] = "CORE0_DDR3"; // SDRAM in pa.cfg /* Add Alpha Interval Processing (AIP) task */ var task1Params = new Task.Params(); task1Params.instance.name = "TaskAip"; task1Params.stackSize = 0x1000; task1Params.stackSection = ".far:taskStackSectionAip"; task1Params.arg0 = 0; task1Params.priority = -1; //2; Program.global.TaskAip = Task.create("&taskAipFxn", task1Params); Program.sectMap[".far:taskStackSectionAip"] = "CORE0_DDR3"; // L3RAM in pa.cfg /* Add Audio Stream Input Processing (ASIP) task */ var task2Params = new Task.Params(); task2Params.instance.name = "TaskAsip"; task2Params.stackSize = 0x4000; task2Params.stackSection = ".far:taskStackSectionAsip"; //task2Params.arg0 = 0; task2Params.arg0 = $externPtr("asip_params_PA" + topo); task2Params.arg1 = $externPtr("asip_patchs_PA" + topo); task2Params.priority = -1; //3; Program.global.TaskAsip = Task.create("&taskAsipFxn", task2Params); Program.sectMap[".far:taskStackSectionAsip"] = "CORE0_DDR3"; /* Add Audio Stream Output Processing (ASOP) task */ var task3Params = new Task.Params(); task3Params.instance.name = "TaskAsop"; task3Params.stackSize = 0x4000; task3Params.stackSection = ".far:taskStackSectionAsop"; //task3Params.arg0 = 0; task3Params.arg0 = $externPtr("asop_params_PA" + topo); task3Params.arg1 = $externPtr("asop_patchs_PA" + topo); task3Params.priority = -1; //3; Program.global.TaskAsop = Task.create("&taskAsopFxn", task3Params); Program.sectMap[".far:taskStackSectionAsop"] = "CORE0_DDR3"; /* Add System Initialization task */ var task4Params = new Task.Params(); task4Params.instance.name = "TaskSysInit"; task4Params.stackSize = 0x1000; task4Params.stackSection = ".far:taskStackSectionSysInit"; task4Params.priority = 6; //5; Program.global.TaskSysInit = Task.create("&taskSysInitFxn", task4Params); Program.sectMap[".far:taskStackSectionSysInit"] = "CORE0_DDR3"; Program.sectMap[".far:taskStackSection"] = "CORE0_DDR3"; // SDRAM in pa.cfg /* Add task for audio System stream processing; formerly audioStream1Idle() */ var task5Params = new Task.Params(); task5Params.instance.name = "TaskSystemStream"; task5Params.stackSize = 0x1000; task5Params.stackSection = ".far:taskStackSectionAudioStream"; task5Params.priority = -1; Program.global.TaskSystemStream = Task.create("&taskSystemStreamFxn", task5Params); Program.sectMap[".far:taskStackSectionAudioStream"] = "CORE0_DDR3"; /* Add idle functions */ // Remark: original idle functions //Idle.idleFxns[0] = "&SAP_watchDog"; // Idle function for DSP watchdog; formerly DAP_watchDog() //Idle.idleFxns[1] = "&idleAudioStream"; // Idle function for audio stream; formerly audioStream1Idle() //Idle.idleFxns[2] = "&idleNotifyInfoChange"; // Idle function for Notify Information Change (NIC); formerly customSystemStreamIdleNIC() // Remark: Moved idleAudioStream (idle function) to taskSystemStreamFxn (task) //Idle.idleFxns[0] = "&SAP_watchDog"; // Idle function for DSP watchdog; formerly DAP_watchDog() //Idle.idleFxns[1] = "&idleNotifyInfoChange"; // Idle function for Notify Information Change (NIC); formerly customSystemStreamIdleNIC() //Idle.idleFxns[2] = "&idleDebug" // Idle function for debug code // Remark: Removed SAP watch dog Idle.idleFxns[0] = "&idleNotifyInfoChange"; // Idle function for Notify Information Change (NIC) Idle.idleFxns[1] = "&idleDebug" // Idle function for debug code /* Add L2 SRAM heap */ // formerly IRAM var heapMem0Params = new HeapMem.Params(); heapMem0Params.instance.name = "heapMemL2Sram"; heapMem0Params.size = 550*1024; // 550 kB temporary setting for OB in L2 heapMem0Params.sectionName = ".l2SramHeap"; Program.global.heapMemL2Sram = HeapMem.create(heapMem0Params); Program.sectMap[".l2SramHeap"] = "L2SRAM"; // Dec ip circular buffer will be in MSMC, size~=180 kB. // Dec op circular buffer will be in MSMC, size~=192 kB. // Both buffers will be in Shared Region MSMC. /* Add MSMC SRAM heap */ // formerly L3RAM var heapMem1Params = new HeapMem.Params(); heapMem1Params.instance.name = "heapMemMsmcSram"; // 43008=42 kB from pa.cfg // 184320=180 kB, size of input circ buf, //185344=181 kB; // 384*1024 for combined size of Dec ip/op buffers heapMem1Params.size = 128*1024; heapMem1Params.sectionName = ".msmcSramHeap"; Program.global.heapMemMsmcSram = HeapMem.create(heapMem1Params); Program.sectMap[".msmcSramHeap"] = "CORE0_DDR3"; /* Add DDR3 heap */ // formerly SDRAM var heapMem2Params = new HeapMem.Params(); heapMem2Params.instance.name = "heapMemDdr3"; heapMem2Params.size = 4350528 + (3*1024*1024); // Added 3 MB for DTS PARMA heapMem2Params.sectionName = ".ddr3Heap"; Program.global.heapMemDdr3 = HeapMem.create(heapMem2Params); Program.sectMap[".ddr3Heap"] = "CORE0_DDR3"; /* For DCS7, dcs7_cfg.c */ Program.global.Heap = Program.global.heapMemDdr3; //Program.sectMap[".stack"] = "L2SRAM"; /* Map C66x INTC Event Combiner EVT 0-3 to HWI numbers */ ECM.eventGroupHwiNum[0] = 7; ECM.eventGroupHwiNum[1] = 8; // FL: conflict w/ UART LLD, intr-callback mode ECM.eventGroupHwiNum[2] = 9; ECM.eventGroupHwiNum[3] = 10; /* Define HWI Hook Set for PFP */ Hwi.addHookSet({ registerFxn: '&pfpHwiRegister', createFxn: '&pfpHwiCreate', beginFxn: '&pfpHwiBegin', endFxn: '&pfpHwiEnd', deleteFxn: null, }); /* Define SWI Hook Set for PFP */ Swi.addHookSet({ registerFxn: '&pfpSwiRegister', // need this for Id for Hook context createFxn: '&pfpSwiCreate', // malloc context storage space readyFxn: '&pfpSwiReady', beginFxn: '&pfpSwiBegin', endFxn: '&pfpSwiEnd', deleteFxn: null, }); /* Define Task Hook Set for PFP */ Task.addHookSet({ registerFxn: '&pfpTaskRegister', createFxn: '&pfpTaskCreate', readyFxn: '&pfpTaskReady', switchFxn: '&pfpTaskSwitch', exitFxn: null, deleteFxn: null, }); /* Added for PFP, not necessary */ Hwi.common$.namedInstance=true; Swi.common$.namedInstance=true; Task.common$.namedInstance=true;