]> Gitweb @ Texas Instruments - Open Source Git Repositories - git.TI.com/gitweb - processor-sdk/performance-audio-sr.git/blobdiff - pasdk/test_dsp/framework/audioStreamOutIo.c
PASDK-577:Add "proof of concept" code for McASP LLD to setCheckRateX
[processor-sdk/performance-audio-sr.git] / pasdk / test_dsp / framework / audioStreamOutIo.c
index fbc05c0d78720a5b21f68ec10578d708b3c3b1ab..a655af2675ac0b7681a8cceeee8678bdd57435fb 100644 (file)
@@ -72,7 +72,8 @@ Int asopSelectDevices(
 {
     mcaspLLDconfig *pReqLldCfg;
     Ptr mcaspChanHandle;
-    Aud_STATUS status;
+    Int32 status;
+    Aud_STATUS audStatus;
     UInt postedEvents;    
 
     if ((pOut->hIoBuff == NULL) || (pOut->hIoPhy == NULL) || (!d10Initialized)) 
@@ -83,11 +84,17 @@ Int asopSelectDevices(
     // Deactivate currently active Output device
     if (pOut->hMcaspChan != NULL)
     {
-        // check McASP LLD control API
-        mcaspControlChan(pOut->hMcaspChan, MCASP_CHAN_RESET, NULL);
+        // Reset channel
+        status = mcaspControlChan(pOut->hMcaspChan, MCASP_CHAN_RESET, NULL);
+        if (status != MCASP_COMPLETED)
+        {
+            Log_info0("asopSelectDevices(): McASP channel reset failed!\n");
+            return ASOP_IO_ERR_MCASP_CFG;            
+        }
+        
         // Delete McASP LLD channel
         status = mcaspDeleteChan(pOut->hMcaspChan);
-        if (status != Aud_EOK)
+        if (status != MCASP_COMPLETED)
         {
             Log_info0("asopSelectDevices(): McASP channel deletion failed!\n");
             return ASOP_IO_ERR_MCASP_CFG;
@@ -118,8 +125,9 @@ Int asopSelectDevices(
         {
             // Create McASP LLD channel
             mcaspChanHandle = NULL;
-            status = mcasplldChanCreate(pReqLldCfg, &mcaspChanHandle);
-            if (status != Aud_EOK) {
+            audStatus = mcasplldChanCreate(pReqLldCfg, &mcaspChanHandle);
+            if (audStatus != Aud_EOK) 
+            {
                 Log_info0("asopSelectDevices(): McASP channel creation failed!\n");
                 return ASOP_IO_ERR_MCASP_CFG;
             }
@@ -131,6 +139,8 @@ Int asopSelectDevices(
             // configure stride according to selected McASP LLD configuration
             pOut->stride = pReqLldCfg->mcaspChanParams->noOfSerRequested * 
                 pReqLldCfg->mcaspChanParams->noOfChannels;
+                
+            pOut->rateX = 1.; // intialize rateX
         }
         else
         {
@@ -234,6 +244,10 @@ Int asopSetCheckRateX(
     Int zMI;
     Int zMS;
     Int zE, zX;
+    // "proof of concept" for McASP LLD API
+    Uint32 divider;
+    Mcasp_HwSetupData mcaspSetup;
+    Int32 status;
 
     pAstCfg = pAsotCfg->pAstCfg; // get pointer to AST common (shared) configuration
     pOut = pAsotCfg->pIoOut; // get pointer to ASOT IO configuration
@@ -302,8 +316,56 @@ Int asopSetCheckRateX(
                 return ((getVal & 0xff) | ASPERR_RATE_CHECK);
             }
 #endif // FL, New IO
-            // FL: ugly little experiment
-            //*(volatile UInt32 *)0x23400B0 |= 7; // set CLKXDIV to 7
+            if (pOut->rateX != rateX)
+            {
+                UInt32 regVal;
+                
+                //
+                // "Proof on concept" code for McASP LLD API to change bit clock divider.
+                //
+
+                // Initialize divider value.
+                // This works for AHCLKX input from HDMI & sample rate = 44.1,48,88.2,96,192 kHz.
+                divider = 2;
+                
+                // Update divider based on calculated rateX
+                divider /= rateX;
+
+#if 0 // debug
+                // Experimental code: directly write CLKXDIV
+                regVal = *(volatile UInt32 *)0x23400B0; // read MCASP_ACLKXCTL
+                regVal &= ~0x1F; // mask off CLKXDIV bits
+                //regVal |= 7; // set CLKXDIV for 48 kHz
+                //regVal |= 3; // set CLKXDIV for 96 kHz
+                //regVal |= 1; // set CLKXDIV for 192 kHz
+                regVal |= (divider-1); // set CLKXDIV
+                *(volatile UInt32 *)0x23400B0 = regVal; // write MCASP_ACLKXCTL
+#endif                
+
+#if 1
+                // get existing McASP HW setup
+                status = mcaspControlChan(pOut->hMcaspChan, Mcasp_IOCTL_CNTRL_GET_FORMAT_CHAN, &mcaspSetup);
+                if (status != MCASP_COMPLETED)
+                {
+                    Log_info0("asopSetCheckRateX(): McASP get channel format failed!\n");
+                    return ASOP_IO_ERR_MCASP_CFG;
+                }
+                
+                // update CLKXDIV based on rateX
+                mcaspSetup.clk.clkSetupClk &= ~CSL_MCASP_ACLKXCTL_CLKXDIV_MASK;
+                mcaspSetup.clk.clkSetupClk |= (divider-1);
+                
+                // update McASP HW setup
+                status = mcaspControlChan(pOut->hMcaspChan, Mcasp_IOCTL_CNTRL_SET_FORMAT_CHAN, &mcaspSetup);
+                if (status != MCASP_COMPLETED)
+                {
+                    Log_info0("asopSetCheckRateX(): McASP set channel format failed!\n");
+                    return ASOP_IO_ERR_MCASP_CFG;
+                }
+#endif            
+                
+                pOut->rateX = rateX;
+            }
         }
     }