[processor-sdk/performance-audio-sr.git] / processor_audio_sdk_1_00_00_00 / psdk_cust / ipc_3_43_00_00_eng / docs / cdoc / ti / sdo / ipc / family / vayu / InterruptArp32-src.html
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-<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
-<html><head><title>module ti.sdo.ipc.family.vayu.InterruptArp32</title>
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-<pre class=src>
- 1 <span class="comment">/*
-</span> 2 <span class="comment"> * Copyright (c) 2012-2014 Texas Instruments Incorporated - http://www.ti.com
-</span> 3 <span class="comment"> * All rights reserved.
-</span> 4 <span class="comment"> *
-</span> 5 <span class="comment"> * Redistribution and use in source and binary forms, with or without
-</span> 6 <span class="comment"> * modification, are permitted provided that the following conditions
-</span> 7 <span class="comment"> * are met:
-</span> 8 <span class="comment"> *
-</span> 9 <span class="comment"> * * Redistributions of source code must retain the above copyright
-</span> 10 <span class="comment"> * notice, this list of conditions and the following disclaimer.
-</span> 11 <span class="comment"> *
-</span> 12 <span class="comment"> * * Redistributions in binary form must reproduce the above copyright
-</span> 13 <span class="comment"> * notice, this list of conditions and the following disclaimer in the
-</span> 14 <span class="comment"> * documentation and/or other materials provided with the distribution.
-</span> 15 <span class="comment"> *
-</span> 16 <span class="comment"> * * Neither the name of Texas Instruments Incorporated nor the names of
-</span> 17 <span class="comment"> * its contributors may be used to endorse or promote products derived
-</span> 18 <span class="comment"> * from this software without specific prior written permission.
-</span> 19 <span class="comment"> *
-</span> 20 <span class="comment"> * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-</span> 21 <span class="comment"> * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-</span> 22 <span class="comment"> * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-</span> 23 <span class="comment"> * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
-</span> 24 <span class="comment"> * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
-</span> 25 <span class="comment"> * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
-</span> 26 <span class="comment"> * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
-</span> 27 <span class="comment"> * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
-</span> 28 <span class="comment"> * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
-</span> 29 <span class="comment"> * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
-</span> 30 <span class="comment"> * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-</span> 31 <span class="comment"> */</span>
- 32
- 33 <span class="comment">/*
-</span> 34 <span class="comment"> * ======== InterruptArp32.xdc ========
-</span> 35 <span class="comment"> */</span>
- 36 <span class=key>package</span> ti.sdo.ipc.family.vayu;
- 37
- 38 import ti.sdo.utils.MultiProc;
- 39
- 40 <span class="xdoc">/*!
-</span> 41 <span class="xdoc"> * ======== InterruptArp32 ========
-</span> 42 <span class="xdoc"> * ARP32 based interrupt manager
-</span> 43 <span class="xdoc"> */</span>
- 44 <span class=key>module</span> InterruptArp32 <span class=key>inherits</span> ti.sdo.ipc.notifyDrivers.IInterrupt
- 45 {
- 46 <span class="comment">/* Total number of cores on Vayu SoC */</span>
- 47 <span class=key>const</span> UInt8 NUM_CORES = 11;
- 48
- 49 <span class="comment">/* Number of Cores in EVE Sub-system */</span>
- 50 <span class=key>const</span> UInt8 NUM_EVES = 4;
- 51
- 52 <span class="comment">/* Number of Internal EVE mailboxes */</span>
- 53 <span class=key>const</span> UInt8 NUM_EVE_MBX = 12;
- 54
- 55 <span class="comment">/* Number of System Mailboxes */</span>
- 56 <span class=key>const</span> UInt8 NUM_SYS_MBX = 4;
- 57
- 58 <span class="comment">/* Base address for the Mailbox subsystem */</span>
- 59 <span class=key>config</span> UInt32 mailboxBaseAddr[NUM_EVE_MBX + NUM_SYS_MBX];
- 60
- 61 <span class=key>internal</span>:
- 62
- 63 <span class="comment">/*
-</span> 64 <span class="comment"> * Mailbox table for storing encoded Base Address, mailbox user Id,
-</span> 65 <span class="comment"> * and sub-mailbox index.
-</span> 66 <span class="comment"> */</span>
- 67 <span class=key>config</span> UInt32 mailboxTable[NUM_CORES * NUM_CORES];
- 68
- 69 <span class=key>config</span> UInt32 eveInterruptTable[NUM_CORES];
- 70
- 71 <span class=key>config</span> UInt32 procIdTable[NUM_CORES];
- 72
- 73 <span class="xdoc">/*! Statically retrieve procIds to avoid doing this at runtime */</span>
- 74 <span class=key>config</span> UInt eve1ProcId = MultiProc.INVALIDID;
- 75 <span class=key>config</span> UInt eve2ProcId = MultiProc.INVALIDID;
- 76 <span class=key>config</span> UInt eve3ProcId = MultiProc.INVALIDID;
- 77 <span class=key>config</span> UInt eve4ProcId = MultiProc.INVALIDID;
- 78 <span class=key>config</span> UInt dsp1ProcId = MultiProc.INVALIDID;
- 79 <span class=key>config</span> UInt dsp2ProcId = MultiProc.INVALIDID;
- 80 <span class=key>config</span> UInt ipu1_0ProcId = MultiProc.INVALIDID;
- 81 <span class=key>config</span> UInt ipu2_0ProcId = MultiProc.INVALIDID;
- 82 <span class=key>config</span> UInt hostProcId = MultiProc.INVALIDID;
- 83 <span class=key>config</span> UInt ipu1_1ProcId = MultiProc.INVALIDID;
- 84 <span class=key>config</span> UInt ipu2_1ProcId = MultiProc.INVALIDID;
- 85
- 86 <span class="xdoc">/*! Function table */</span>
- 87 <span class=key>struct</span> FxnTable {
- 88 Fxn func;
- 89 UArg arg;
- 90 }
- 91
- 92 <span class="xdoc">/*! Stub to be plugged for dsp-arp32 interrupts */</span>
- 93 Void intShmStub(UInt16 idx);
- 94
- 95 <span class=key>struct</span> Module_State {
- 96
- 97 <span class="comment">/* Interrupt isr dispatch table. This table is indexed
-</span> 98 <span class="comment"> * by virtual processor ID.
-</span> 99 <span class="comment"> */</span>
- 100 FxnTable fxnTable[NUM_CORES];
- 101 };
- 102 }
-</pre>
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