[processor-sdk/performance-audio-sr.git] / psdk_cust / pdk_k2g_1_0_1_2_eng / packages / ti / board / src / flash / qspi_nor / s25fl512s / qspi_nor.c
diff --git a/psdk_cust/pdk_k2g_1_0_1_2_eng/packages/ti/board/src/flash/qspi_nor/s25fl512s/qspi_nor.c b/psdk_cust/pdk_k2g_1_0_1_2_eng/packages/ti/board/src/flash/qspi_nor/s25fl512s/qspi_nor.c
+++ /dev/null
@@ -1,522 +0,0 @@
-/*
- * Copyright (c) 2016, Texas Instruments Incorporated
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- *
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * * Neither the name of Texas Instruments Incorporated nor the names of
- * its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
- * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
- * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
- * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
- * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
- * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-
-#include "board_utils.h"
-#include <ti/board/src/flash/qspi_nor/s25fl512s/qspi_nor.h>
-#include <ti/csl/soc.h>
-#include <ti/drv/spi/src/v0/QSPI_v0.h>
-
-#define SPI_CONFIG_OFFSET CSL_SPI_CNT
-
-QSPI_NorInfo QSPI_info =
-{
- 0
-};
-
-FLASH_HANDLE qspiNorInit(uint32_t portNum, void *params)
-{
- SPI_Params spiParams; /* SPI params structure */
- SPI_Handle spiHandle; /* SPI handle */
- FLASH_HANDLE norHandle = 0;
-
- /* Init SPI driver */
- SPI_init();
-
- if (params)
- {
- memcpy(&spiParams, params, sizeof(SPI_Params));
- }
- else
- {
- /* Use default SPI config params if no params provided */
- SPI_Params_init(&spiParams);
- }
- spiHandle = (SPI_Handle)SPI_open(portNum + SPI_CONFIG_OFFSET, &spiParams);
-
- if (spiHandle)
- {
- QSPI_info.spiHandle = spiHandle;
- norHandle = (FLASH_HANDLE)&(QSPI_info);
- }
-
- return (norHandle);
-}
-
-static QSPI_NOR_STATUS qspiCommandRead(SPI_Handle handle, uint8_t *cmdBuf,
- uint32_t cmdLen, uint8_t *rxBuf, uint32_t rxLen)
-{
- SPI_Transaction transaction;
- uint32_t transferType = SPI_TRANSACTION_TYPE_READ;
- bool ret;
-
- /* Update the mode and transfer type with the required values */
- SPI_control(handle, SPI_V0_CMD_SETCONFIGMODE, NULL);
- SPI_control(handle, SPI_V0_CMD_TRANSFERMODE_RW, (void *)&transferType);
-
- transaction.txBuf = (void *)cmdBuf;
- transaction.rxBuf = (void *)rxBuf;
- transaction.count = cmdLen + rxLen;
-
- ret = SPI_transfer(handle, &transaction);
- if (ret == true)
- {
- return QSPI_NOR_SUCCESS;
- }
- else
- {
- return QSPI_NOR_ERR;
- }
-}
-
-QSPI_NOR_STATUS qspiNorReadId(FLASH_HANDLE handle, uint8_t *idCode)
-{
- QSPI_NOR_STATUS retVal = QSPI_NOR_ERR;
- QSPI_NorInfo *qspi_info;
- uint8_t cmd = QSPI_FLASH_CMD_RDID;
-
- if (handle)
- {
- qspi_info = (QSPI_NorInfo *)handle;
- if (qspi_info->spiHandle)
- {
- retVal = qspiCommandRead(qspi_info->spiHandle, &cmd, 1, idCode, 3);
- }
- }
-
- return (retVal);
-}
-
-void qspiNorClose(FLASH_HANDLE handle)
-{
- QSPI_NorInfo *qspi_info;
-
- if (handle)
- {
- qspi_info = (QSPI_NorInfo *)handle;
- if (qspi_info->spiHandle)
- {
- SPI_close(qspi_info->spiHandle);
- }
- }
-}
-
-static QSPI_NOR_STATUS qspiCommandWrite(SPI_Handle handle, uint8_t *cmdBuf,
- uint32_t cmdLen, uint32_t dataLen)
-{
- SPI_Transaction transaction;
- uint32_t transferType = SPI_TRANSACTION_TYPE_WRITE;
- bool ret;
-
- /* Update the mode and transfer type with the required values */
- SPI_control(handle, SPI_V0_CMD_SETCONFIGMODE, NULL);
- SPI_control(handle, SPI_V0_CMD_TRANSFERMODE_RW, (void *)&transferType);
-
- transaction.txBuf = (void *)cmdBuf; /* Buffer includes command and write data */
- transaction.count = cmdLen + dataLen;
- transaction.rxBuf = NULL;
- transaction.arg = (void *)dataLen;
-
- ret = SPI_transfer(handle, &transaction);
- if (ret == true)
- {
- return QSPI_NOR_SUCCESS;
- }
- else
- {
- return QSPI_NOR_ERR;
- }
-}
-
-static QSPI_NOR_STATUS qspiNorWaitReady(SPI_Handle handle, uint32_t timeOut)
-{
- uint8_t status;
- uint8_t cmd = QSPI_FLASH_CMD_RDSR;
-
- do
- {
- if (qspiCommandRead(handle, &cmd, 1, &status, 1))
- {
- return QSPI_NOR_ERR;
- }
- if ((status & QSPI_FLASH_SR_WIP) == 0)
- {
- break;
- }
-
- timeOut--;
- if (!timeOut) {
- break;
- }
-
- } while (1);
-
- if ((status & QSPI_FLASH_SR_WIP) == 0)
- {
- return QSPI_NOR_SUCCESS;
- }
-
- /* Timed out */
- return QSPI_NOR_ERR;
-}
-
-static QSPI_NOR_STATUS qspiNorQuadModeCtrl(SPI_Handle handle,
- uint8_t enable)
-{
- uint8_t status;
- uint8_t cmd[3];
-
- /* Write enable command */
- cmd[0] = QSPI_FLASH_CMD_WREN;
- if (qspiCommandWrite(handle, cmd, 1, 0))
- {
- goto err;
- }
-
- /* Read status register */
- cmd[0] = QSPI_FLASH_CMD_RDSR;
- status = 0;
- if (qspiCommandRead(handle, cmd, 1, &status, 1))
- {
- goto err;
- }
-
- cmd[0] = QSPI_FLASH_CMD_WRR;
- cmd[1] = status;
-
- /* The first byte will be written to the status register, while the
- second byte will be written to the configuration register */
- if (enable)
- {
- /* Write enabled, quad enabled, no protected blocks */
- cmd[2] = 0x02;
- }
- else
- {
- /* Write enabled, quad disabled, no protected block */
- cmd[2] = 0x0;
- }
-
- if (qspiCommandWrite(handle, cmd, 1, 2)) /* 1 byte command and 2 bytes write data */
- {
- goto err;
- }
-
- if (qspiNorWaitReady(handle, QSPI_FLASH_WRR_WRITE_TIMEOUT))
- {
- goto err;
- }
-
- cmd[0] = QSPI_FLASH_CMD_RDCR;
- status = 0;
- if (qspiCommandRead(handle, cmd, 1, &status, 1))
- {
- goto err;
- }
-
- if (status != cmd[2])
- {
- goto err;
- }
-
- return QSPI_NOR_SUCCESS;
-
-err :
- return QSPI_NOR_ERR;
-}
-
-QSPI_NOR_STATUS qspiNorRead(FLASH_HANDLE handle, uint32_t addr,
- uint32_t len, uint8_t *buf, uint32_t mode)
-{
- QSPI_NorInfo *qspi_info;
- uint32_t command;
- uint32_t dummyCycles;
- uint32_t rx_lines;
- SPI_Transaction transaction;
- bool ret;
-
- if (!handle)
- {
- return QSPI_NOR_ERR;
- }
-
- qspi_info = (QSPI_NorInfo *)handle;
- if (!qspi_info->spiHandle)
- {
- return QSPI_NOR_ERR;
- }
-
- /* Validate address input */
- if ((addr + len) > QSPI_FLASH_SIZE)
- {
- return QSPI_NOR_ERR;
- }
-
- /* To set or unset the QUAD bit in CR1 register */
- if (mode != QSPI_FLASH_SINGLE_READ)
- {
- if (qspiNorQuadModeCtrl(qspi_info->spiHandle, 1))
- {
- return QSPI_NOR_ERR;
- }
- }
- else
- {
- if (qspiNorQuadModeCtrl(qspi_info->spiHandle, 0))
- {
- return QSPI_NOR_ERR;
- }
- }
-
- switch(mode)
- {
- case QSPI_FLASH_SINGLE_READ :
- command = QSPI_FLASH_CMD_READ;
- dummyCycles = QSPI_FLASH_SINGLE_READ_DUMMY_CYCLE;
- rx_lines = QSPI_XFER_LINES_SINGLE;
- break;
- case QSPI_FLASH_DUAL_READ :
- command = QSPI_FLASH_CMD_DUAL_READ;
- dummyCycles = QSPI_FLASH_DUAL_READ_DUMMY_CYCLE;
- rx_lines = QSPI_XFER_LINES_DUAL;
- break;
- case QSPI_FLASH_QUAD_READ :
- command = QSPI_FLASH_CMD_QUAD_READ;
- dummyCycles = QSPI_FLASH_QUAD_READ_DUMMY_CYCLE;
- rx_lines = QSPI_XFER_LINES_QUAD;
- break;
- default :
- command = QSPI_FLASH_CMD_READ;
- dummyCycles = QSPI_FLASH_SINGLE_READ_DUMMY_CYCLE;
- rx_lines = QSPI_XFER_LINES_SINGLE;
- break;
- }
-
- /* Update the indirect read command, rx lines and read dummy cycles */
- SPI_control(qspi_info->spiHandle, SPI_V0_CMD_SETINDXFERMODE, NULL);
- SPI_control(qspi_info->spiHandle, SPI_V0_CMD_IND_TRANSFER_CMD, (void *)&command);
- SPI_control(qspi_info->spiHandle, SPI_V0_CMD_SETXFERLINES, (void *)&rx_lines);
- SPI_control(qspi_info->spiHandle, SPI_V0_CMD_RD_DUMMY_CLKS, (void *)&dummyCycles);
-
- transaction.arg = (void *)addr;
- transaction.txBuf = NULL;
- transaction.rxBuf = (void *)buf;
- transaction.count = len;
-
- ret = SPI_transfer(qspi_info->spiHandle, &transaction);
- if (ret == true)
- {
- return QSPI_NOR_SUCCESS;
- }
- else
- {
- return QSPI_NOR_ERR;
- }
-}
-
-QSPI_NOR_STATUS qspiNorWrite(FLASH_HANDLE handle, uint32_t addr, uint32_t len,
- uint8_t *buf, uint32_t mode)
-{
- QSPI_NorInfo *qspi_info;
- uint32_t command;
- uint32_t tx_lines;
- SPI_Transaction transaction;
- bool ret;
- uint32_t byteAddr;
- uint32_t pageSize;
- uint32_t chunkLen;
- uint32_t actual;
- uint8_t cmdWren = QSPI_FLASH_CMD_WREN;
-
- if (!handle)
- {
- return QSPI_NOR_ERR;
- }
-
- qspi_info = (QSPI_NorInfo *)handle;
- if (!qspi_info->spiHandle)
- {
- return QSPI_NOR_ERR;
- }
-
- /* Validate address input */
- if ((addr + len) > QSPI_FLASH_SIZE)
- {
- return QSPI_NOR_ERR;
- }
-
- if (mode == QSPI_FLASH_QUAD_PAGE_PROG)
- {
- if (qspiNorQuadModeCtrl(qspi_info->spiHandle, 1))
- {
- return QSPI_NOR_ERR;
- }
- }
- else
- {
- if (qspiNorQuadModeCtrl(qspi_info->spiHandle, 0))
- {
- return QSPI_NOR_ERR;
- }
- }
-
- switch(mode)
- {
- case QSPI_FLASH_SINGLE_PAGE_PROG :
- command = QSPI_FLASH_CMD_PAGE_PROG;
- tx_lines = QSPI_XFER_LINES_SINGLE;
- break;
- case QSPI_FLASH_QUAD_PAGE_PROG:
- command = QSPI_FLASH_CMD_QUAD_PAGE_PROG;
- tx_lines = QSPI_XFER_LINES_QUAD;
- break;
- default :
- command = QSPI_FLASH_CMD_PAGE_PROG;
- tx_lines = QSPI_XFER_LINES_SINGLE;
- break;
- }
-
- /* The QSPI Flash Controller will automatically issue
- the WREN command before triggering a write command via the direct or
- indirect access controllers (DAC/INDAC) – i.e the user does not need
- to perform this operation.
- */
- pageSize = QSPI_FLASH_PAGE_SIZE;
- byteAddr = addr & (QSPI_FLASH_PAGE_SIZE - 1); /* % page_size; */
-
- for (actual = 0; actual < len; actual += chunkLen)
- {
- /* Send Write Enable command */
- if (qspiCommandWrite(qspi_info->spiHandle, &cmdWren, 1, 0))
- {
- return QSPI_NOR_ERR;
- }
-
- /* Update the indirect write command and tx lines */
- SPI_control(qspi_info->spiHandle, SPI_V0_CMD_SETINDXFERMODE, NULL);
- SPI_control(qspi_info->spiHandle, SPI_V0_CMD_IND_TRANSFER_CMD, (void *)&command);
- SPI_control(qspi_info->spiHandle, SPI_V0_CMD_SETXFERLINES, (void *)&tx_lines);
-
- /* Send Page Program command */
- chunkLen = ((len - actual) < (pageSize - byteAddr) ?
- (len - actual) : (pageSize - byteAddr));
-
- transaction.arg = (void *)addr;
- transaction.txBuf = (void *)(buf + actual);
- transaction.rxBuf = NULL;
- transaction.count = chunkLen;
-
- ret = SPI_transfer(qspi_info->spiHandle, &transaction);
- if (ret == false)
- {
- return QSPI_NOR_ERR;
- }
-
- if (qspiNorWaitReady(qspi_info->spiHandle, QSPI_FLASH_PAGE_PROG_TIMEOUT)) {
- return QSPI_NOR_ERR;
- }
-
- addr += chunkLen;
- byteAddr = 0;
-
- BOARD_delay(10);
- }
-
- return QSPI_NOR_SUCCESS;
-}
-
-QSPI_NOR_STATUS qspiNorErase(FLASH_HANDLE handle, int32_t sector)
-{
- uint8_t cmd[5];
- uint32_t cmdLen;
- uint32_t address = 0;
- uint8_t cmdWren = QSPI_FLASH_CMD_WREN;
- QSPI_NorInfo *qspi_info;
-
- if (!handle)
- {
- return QSPI_NOR_ERR;
- }
-
- qspi_info = (QSPI_NorInfo *)handle;
- if (!qspi_info->spiHandle)
- {
- return QSPI_NOR_ERR;
- }
-
- if (sector == QSPI_FLASH_BE_SECTOR_NUM)
- {
- cmd[0] = QSPI_FLASH_CMD_BULK_ERASE;
- cmdLen = 1;
- }
- else if (sector >= QSPI_FLASH_NUM_SECTORS)
- {
- return QSPI_NOR_ERR;
- }
- else
- {
- address = sector * QSPI_FLASH_SECTOR_SIZE;
- cmd[0] = QSPI_FLASH_CMD_SECTOR_ERASE;
- //cmd[1] = (address >> 24) & 0xff; /* 64MB flash device */
- //cmd[2] = (address >> 16) & 0xff;
- //cmd[3] = (address >> 8) & 0xff;
- //cmd[4] = (address >> 0) & 0xff;
- cmd[1] = (address >> 16) & 0xff; /* 64MB flash device */
- cmd[2] = (address >> 8) & 0xff;
- cmd[3] = (address >> 0) & 0xff;
-
- //cmdLen = 5;
- cmdLen = 4;
- }
-
- if (qspiCommandWrite(qspi_info->spiHandle, &cmdWren, 1, 0))
- {
- return QSPI_NOR_ERR;
- }
-
- if (qspiNorWaitReady(qspi_info->spiHandle, QSPI_FLASH_WRR_WRITE_TIMEOUT))
- {
- return QSPI_NOR_ERR;
- }
-
- if (qspiCommandWrite(qspi_info->spiHandle, cmd, cmdLen, 0))
- {
- return QSPI_NOR_ERR;
- }
-
- if (qspiNorWaitReady(qspi_info->spiHandle, QSPI_FLASH_BULK_ERASE_TIMEOUT))
- {
- return QSPI_NOR_ERR;
- }
-
- return QSPI_NOR_SUCCESS;
-}