]> Gitweb @ Texas Instruments - Open Source Git Repositories - git.TI.com/gitweb - processor-sdk/performance-audio-sr.git/blobdiff - psdk_cust/pdk_k2g_1_0_1_2_eng/packages/ti/csl/cslr_cppidma_global_config.h
Removed IPC and PDK from psdk_cust folder.
[processor-sdk/performance-audio-sr.git] / psdk_cust / pdk_k2g_1_0_1_2_eng / packages / ti / csl / cslr_cppidma_global_config.h
diff --git a/psdk_cust/pdk_k2g_1_0_1_2_eng/packages/ti/csl/cslr_cppidma_global_config.h b/psdk_cust/pdk_k2g_1_0_1_2_eng/packages/ti/csl/cslr_cppidma_global_config.h
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-/********************************************************************
- * Copyright (C) 2013-2014 Texas Instruments Incorporated.
- * 
- *  Redistribution and use in source and binary forms, with or without 
- *  modification, are permitted provided that the following conditions 
- *  are met:
- *
- *    Redistributions of source code must retain the above copyright 
- *    notice, this list of conditions and the following disclaimer.
- *
- *    Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the 
- *    documentation and/or other materials provided with the   
- *    distribution.
- *
- *    Neither the name of Texas Instruments Incorporated nor the names of
- *    its contributors may be used to endorse or promote products derived
- *    from this software without specific prior written permission.
- *
- *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
- *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
- *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
- *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
- *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
- *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
- *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
-*/
-#ifndef _CSLR_CPPIDMA_GLOBAL_CONFIG_H_
-#define _CSLR_CPPIDMA_GLOBAL_CONFIG_H_
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-#include <ti/csl/cslr.h>
-#include <ti/csl/tistdtypes.h>
-
-
-/**************************************************************************
-* Register Overlay Structure
-**************************************************************************/
-typedef struct {
-    volatile Uint32 REVISION_REG;
-    volatile Uint32 PERF_CONTROL_REG;
-    volatile Uint32 EMULATION_CONTROL_REG;
-    volatile Uint32 PRIORITY_CONTROL_REG;
-    volatile Uint32 QM_BASE_ADDRESS_REG[4];
-} CSL_Cppidma_global_configRegs;
-
-
-
-
-/**************************************************************************
-* Register Macros
-**************************************************************************/
-
-/* REVISION_REG */
-#define CSL_CPPIDMA_GLOBAL_CONFIG_REVISION_REG                  (0x0U)
-
-/* PERF_CONTROL_REG */
-#define CSL_CPPIDMA_GLOBAL_CONFIG_PERF_CONTROL_REG              (0x4U)
-
-/* EMULATION_CONTROL_REG */
-#define CSL_CPPIDMA_GLOBAL_CONFIG_EMULATION_CONTROL_REG         (0x8U)
-
-/* PRIORITY_CONTROL_REG */
-#define CSL_CPPIDMA_GLOBAL_CONFIG_PRIORITY_CONTROL_REG          (0xCU)
-
-/* QM_BASE_ADDRESS_REG */
-#define CSL_CPPIDMA_GLOBAL_CONFIG_QM_BASE_ADDRESS_REG(i)        (0x10U + ((i) * (0x4U)))
-
-
-/**************************************************************************
-* Field Definition Macros
-**************************************************************************/
-
-/* REVISION_REG */
-
-#define CSL_CPPIDMA_GLOBAL_CONFIG_REVISION_REG_REVMIN_MASK      (0x0000003FU)
-#define CSL_CPPIDMA_GLOBAL_CONFIG_REVISION_REG_REVMIN_SHIFT     (0U)
-#define CSL_CPPIDMA_GLOBAL_CONFIG_REVISION_REG_REVMIN_RESETVAL  (0x00000000U)
-#define CSL_CPPIDMA_GLOBAL_CONFIG_REVISION_REG_REVMIN_MAX       (0x0000003fU)
-
-#define CSL_CPPIDMA_GLOBAL_CONFIG_REVISION_REG_CUSTOM_MASK      (0x000000C0U)
-#define CSL_CPPIDMA_GLOBAL_CONFIG_REVISION_REG_CUSTOM_SHIFT     (6U)
-#define CSL_CPPIDMA_GLOBAL_CONFIG_REVISION_REG_CUSTOM_RESETVAL  (0x00000000U)
-#define CSL_CPPIDMA_GLOBAL_CONFIG_REVISION_REG_CUSTOM_MAX       (0x00000003U)
-
-#define CSL_CPPIDMA_GLOBAL_CONFIG_REVISION_REG_REVMAJ_MASK      (0x00000700U)
-#define CSL_CPPIDMA_GLOBAL_CONFIG_REVISION_REG_REVMAJ_SHIFT     (8U)
-#define CSL_CPPIDMA_GLOBAL_CONFIG_REVISION_REG_REVMAJ_RESETVAL  (0x00000000U)
-#define CSL_CPPIDMA_GLOBAL_CONFIG_REVISION_REG_REVMAJ_MAX       (0x00000007U)
-
-#define CSL_CPPIDMA_GLOBAL_CONFIG_REVISION_REG_REVRTL_MASK      (0x0000F800U)
-#define CSL_CPPIDMA_GLOBAL_CONFIG_REVISION_REG_REVRTL_SHIFT     (11U)
-#define CSL_CPPIDMA_GLOBAL_CONFIG_REVISION_REG_REVRTL_RESETVAL  (0x00000000U)
-#define CSL_CPPIDMA_GLOBAL_CONFIG_REVISION_REG_REVRTL_MAX       (0x0000001fU)
-
-#define CSL_CPPIDMA_GLOBAL_CONFIG_REVISION_REG_FUNCTION_ID_MASK  (0x0FFF0000U)
-#define CSL_CPPIDMA_GLOBAL_CONFIG_REVISION_REG_FUNCTION_ID_SHIFT  (16U)
-#define CSL_CPPIDMA_GLOBAL_CONFIG_REVISION_REG_FUNCTION_ID_RESETVAL  (0x00000000U)
-#define CSL_CPPIDMA_GLOBAL_CONFIG_REVISION_REG_FUNCTION_ID_MAX  (0x00000fffU)
-
-#define CSL_CPPIDMA_GLOBAL_CONFIG_REVISION_REG_BU_MASK          (0x30000000U)
-#define CSL_CPPIDMA_GLOBAL_CONFIG_REVISION_REG_BU_SHIFT         (28U)
-#define CSL_CPPIDMA_GLOBAL_CONFIG_REVISION_REG_BU_RESETVAL      (0x00000000U)
-#define CSL_CPPIDMA_GLOBAL_CONFIG_REVISION_REG_BU_MAX           (0x00000003U)
-
-#define CSL_CPPIDMA_GLOBAL_CONFIG_REVISION_REG_RESETVAL         (0x00000000U)
-
-/* PERF_CONTROL_REG */
-
-#define CSL_CPPIDMA_GLOBAL_CONFIG_PERF_CONTROL_REG_TIMEOUT_CNT_MASK  (0x0000FFFFU)
-#define CSL_CPPIDMA_GLOBAL_CONFIG_PERF_CONTROL_REG_TIMEOUT_CNT_SHIFT  (0U)
-#define CSL_CPPIDMA_GLOBAL_CONFIG_PERF_CONTROL_REG_TIMEOUT_CNT_RESETVAL  (0x00000000U)
-#define CSL_CPPIDMA_GLOBAL_CONFIG_PERF_CONTROL_REG_TIMEOUT_CNT_MAX  (0x0000ffffU)
-
-#define CSL_CPPIDMA_GLOBAL_CONFIG_PERF_CONTROL_REG_WARB_FIFO_DEPTH_MASK  (0x003F0000U)
-#define CSL_CPPIDMA_GLOBAL_CONFIG_PERF_CONTROL_REG_WARB_FIFO_DEPTH_SHIFT  (16U)
-#define CSL_CPPIDMA_GLOBAL_CONFIG_PERF_CONTROL_REG_WARB_FIFO_DEPTH_RESETVAL  (0x00000000U)
-#define CSL_CPPIDMA_GLOBAL_CONFIG_PERF_CONTROL_REG_WARB_FIFO_DEPTH_MAX  (0x0000003fU)
-
-#define CSL_CPPIDMA_GLOBAL_CONFIG_PERF_CONTROL_REG_RESETVAL     (0x00000000U)
-
-/* EMULATION_CONTROL_REG */
-
-#define CSL_CPPIDMA_GLOBAL_CONFIG_EMULATION_CONTROL_REG_FREE_MASK  (0x00000001U)
-#define CSL_CPPIDMA_GLOBAL_CONFIG_EMULATION_CONTROL_REG_FREE_SHIFT  (0U)
-#define CSL_CPPIDMA_GLOBAL_CONFIG_EMULATION_CONTROL_REG_FREE_RESETVAL  (0x00000000U)
-#define CSL_CPPIDMA_GLOBAL_CONFIG_EMULATION_CONTROL_REG_FREE_MAX  (0x00000001U)
-
-#define CSL_CPPIDMA_GLOBAL_CONFIG_EMULATION_CONTROL_REG_SOFT_MASK  (0x00000002U)
-#define CSL_CPPIDMA_GLOBAL_CONFIG_EMULATION_CONTROL_REG_SOFT_SHIFT  (1U)
-#define CSL_CPPIDMA_GLOBAL_CONFIG_EMULATION_CONTROL_REG_SOFT_RESETVAL  (0x00000000U)
-#define CSL_CPPIDMA_GLOBAL_CONFIG_EMULATION_CONTROL_REG_SOFT_MAX  (0x00000001U)
-
-#define CSL_CPPIDMA_GLOBAL_CONFIG_EMULATION_CONTROL_REG_LOOPBACK_EN_MASK  (0x80000000U)
-#define CSL_CPPIDMA_GLOBAL_CONFIG_EMULATION_CONTROL_REG_LOOPBACK_EN_SHIFT  (31U)
-#define CSL_CPPIDMA_GLOBAL_CONFIG_EMULATION_CONTROL_REG_LOOPBACK_EN_RESETVAL  (0x00000000U)
-#define CSL_CPPIDMA_GLOBAL_CONFIG_EMULATION_CONTROL_REG_LOOPBACK_EN_MAX  (0x00000001U)
-
-#define CSL_CPPIDMA_GLOBAL_CONFIG_EMULATION_CONTROL_REG_RESETVAL  (0x00000000U)
-
-/* PRIORITY_CONTROL_REG */
-
-#define CSL_CPPIDMA_GLOBAL_CONFIG_PRIORITY_CONTROL_REG_TX_PRIORITY_MASK  (0x00000007U)
-#define CSL_CPPIDMA_GLOBAL_CONFIG_PRIORITY_CONTROL_REG_TX_PRIORITY_SHIFT  (0U)
-#define CSL_CPPIDMA_GLOBAL_CONFIG_PRIORITY_CONTROL_REG_TX_PRIORITY_RESETVAL  (0x00000000U)
-#define CSL_CPPIDMA_GLOBAL_CONFIG_PRIORITY_CONTROL_REG_TX_PRIORITY_MAX  (0x00000007U)
-
-#define CSL_CPPIDMA_GLOBAL_CONFIG_PRIORITY_CONTROL_REG_RX_PRIORITY_MASK  (0x00070000U)
-#define CSL_CPPIDMA_GLOBAL_CONFIG_PRIORITY_CONTROL_REG_RX_PRIORITY_SHIFT  (16U)
-#define CSL_CPPIDMA_GLOBAL_CONFIG_PRIORITY_CONTROL_REG_RX_PRIORITY_RESETVAL  (0x00000000U)
-#define CSL_CPPIDMA_GLOBAL_CONFIG_PRIORITY_CONTROL_REG_RX_PRIORITY_MAX  (0x00000007U)
-
-#define CSL_CPPIDMA_GLOBAL_CONFIG_PRIORITY_CONTROL_REG_RESETVAL  (0x00000000U)
-
-/* QM_BASE_ADDRESS_REG */
-
-#define CSL_CPPIDMA_GLOBAL_CONFIG_QM_BASE_ADDRESS_REG_QM_BASE_MASK  (0xFFFFFFFFU)
-#define CSL_CPPIDMA_GLOBAL_CONFIG_QM_BASE_ADDRESS_REG_QM_BASE_SHIFT  (0U)
-#define CSL_CPPIDMA_GLOBAL_CONFIG_QM_BASE_ADDRESS_REG_QM_BASE_RESETVAL  (0x00000000U)
-#define CSL_CPPIDMA_GLOBAL_CONFIG_QM_BASE_ADDRESS_REG_QM_BASE_MAX  (0xffffffffU)
-
-#define CSL_CPPIDMA_GLOBAL_CONFIG_QM_BASE_ADDRESS_REG_RESETVAL  (0x00000000U)
-
-#ifdef __cplusplus
-}
-#endif
-#endif