X-Git-Url: https://git.ti.com/gitweb?p=processor-sdk%2Fperformance-audio-sr.git;a=blobdiff_plain;f=pasdk%2Ftest_dsp%2Fframework%2FsystemInit.c;h=d0f746fd04388681fba6845f15b9e8b960930908;hp=943c306b1e460d1de187a5f3620a3c6ed22fcfc6;hb=8dd048c30945e6df4bd06e60aa751471cbb5d741;hpb=c37f5cc7763c211fd1f88471d63b47c59dd7d328 diff --git a/pasdk/test_dsp/framework/systemInit.c b/pasdk/test_dsp/framework/systemInit.c index 943c306b..d0f746fd 100644 --- a/pasdk/test_dsp/framework/systemInit.c +++ b/pasdk/test_dsp/framework/systemInit.c @@ -58,7 +58,7 @@ All rights reserved. #include "fwkSim.h" extern Void ACP_main_cus(Void); // (*** ?) FL: revisit -- check method of patching alpha codes -extern Void idleAudioStream(Void); // (*** ?) FL: revisit -- shouldn't need to call this from system init +extern Void taskSystemStreamFxn(Void); // (*** ?) FL: revisit -- shouldn't need to call this from system init const PAFHJT_t *pafhjt; @@ -74,11 +74,14 @@ Int gSysInit=0; #define TASK_AFP_PRI ( 3 )//( 1 ) // (***) FL: temporary fix for PASDK-64 #define TASK_AIP_PRI ( 1 )//( 2 ) +#define TASK_SSP_PRI ( 1 ) #define TASK_ASIP_PRI ( 2 )//( 3 ) #define TASK_ASOP_PRI ( 2 )//( 3 ) #define __TASK_NAME__ "TaskSysInit" +#define SYS_INIT_SLEEP 100 + /* * ======== taskSysInitFxn ======== * System Initializations task function @@ -93,6 +96,16 @@ Void taskSysInitFxn(Void) Log_info0("Enter taskSysInitFxn()"); + // Create Shared DDR region as non-Cacheable, Before IPC attach + // TODO: remove hardcoded address and get correct values from .bld + { // base: 0x81000000, len: 0x01000000, + UInt Common2_DDR3_MAR_base = 0x01848204; + UInt Common2_DDR3_base = 0x81000000; + UInt Common2_DDR3_len = 0x01000000; + // disable cache for common2 DDR3 + Cache_setMar(Common2_DDR3_base, Common2_DDR3_len, Cache_Mar_DISABLE); + } + //taskPriAfp = Task_setPri(TaskAfp, -1); //taskPriAip = Task_setPri(TaskAip, -1); //taskPriAsip = Task_setPri(TaskAsip, -1); @@ -108,16 +121,6 @@ Void taskSysInitFxn(Void) //} while ((status < 0) && (status == Ipc_E_NOTREADY)); } while (status != Ipc_S_SUCCESS); - // Create Shared DDR region as non-Cacheable - // TODO: remove hardcoded address and get correct values from .bld - { // base: 0x81000000, len: 0x01000000, - UInt Common2_DDR3_MAR_base = 0x01848204; - UInt Common2_DDR3_base = 0x81000000; - UInt Common2_DDR3_len = 0x01000000; - // disable cache for common2 DDR3 - Cache_setMar(Common2_DDR3_base, Common2_DDR3_len, Cache_Mar_DISABLE); - } - /* Initialize (IPC) ASP master messaging */ /* Note: MessageQ_open() called in this function. MessageQ_open() blocks. */ @@ -176,13 +179,19 @@ Void taskSysInitFxn(Void) PAF_ASOT_params_fxns.memStatusPrint = PAF_ALG_memStatusPrint; #endif - gSysInit=1; /* This is required to use SYS alpha codes in atboot? */ - Log_info0("taskSysInitFxn:idleAudioStream()"); - idleAudioStream(); - - // Circumvent MessageQ_open() blocking. + Log_info0("taskSysInitFxn:TaskSystemStream resume"); + gSysInit = 0; + Task_setPri(TaskSystemStream, TASK_SSP_PRI); + // Wait until Execution of TaskSystemStream is complete + // once. + while (gSysInit == 0) // gSysInit is set to 1 in TaskSystemStream + { + Task_sleep(SYS_INIT_SLEEP); + } + + Task_setPri(TaskAfp, TASK_AFP_PRI); Task_setPri(TaskAip, TASK_AIP_PRI); Task_setPri(TaskAsip, TASK_ASIP_PRI);