* Fixes towards PASDK-53 include --- PART I (HDMI-Input CleanUp, mainly):
authorGovind Jeyaram <govind.j@ti.com>
Tue, 17 Jan 2017 21:07:09 +0000 (13:07 -0800)
committerFrank Livingston <frank-livingston@ti.com>
Fri, 27 Jan 2017 21:04:20 +0000 (15:04 -0600)
1.(dbgDib.c) capIb now performs necessary wrap-around handling (in IB), along with necessary cache operations.
2.(io.c) General clean up of the IO shortcuts.
3.(audioStreamInpProc.c) Debug counters added.
4.(params.c) The 2nd Memtab in inpMemTabPrimary is configured to size=0, now. No impact to the system observed thus far.
5.(audio_dc_cfg.c) APIs to Read Error/Audio/Clock statuses from HSR41, in addition to samprate, periodically.
EDID configuration updated to reflect ATMOS + DTS:X support in accordance with CEA prescribed values.
At system startup (audioHDMIConfig (), one-time call) now wait for VideoSync event from HSR41 before returning.
6.(sap_d10.c) manageInput revamped now to periodically look for lock/clock/error statuses + minor clean-up.
7.(sap_mcasp.c) General clean-up and debug counters.

pasdk/common/dbgDib.c
pasdk/test_dsp/application/itopo/evmk2g/io.c
pasdk/test_dsp/framework/audioStreamInpProc.c
pasdk/test_dsp/framework/itopo/params.c
pasdk/test_dsp/sap/audio_dc_cfg.c
pasdk/test_dsp/sap/sap_d10.c
pasdk/test_dsp/sap/sap_mcasp.c

index 03ec55a750ee790cc462595fe3fd37a2d1a229d4..a5f730181507a8c9b1871cdbc3996473bbff2ffd 100644 (file)
@@ -212,6 +212,8 @@ Int capIbReset(Void)
     return 0;
 }
 
+int gCapIbAccBytes=0;
+
 // Capture data in IB buffer to memory
 Void capIb(
     PAF_InpBufConfig *pInpBufConfig
@@ -242,9 +244,9 @@ Void capIb(
 
     if ((CAP_IB_BUF_SZ - gCapIbBufIdx[gCapIbBufPingPongSel]) < nBytes)
     {
-        //return; // fixed buffer
-        gCapIbBufIdx[gCapIbBufPingPongSel] = 0;
-        gCapIbBufWrapCnt[gCapIbBufPingPongSel]++;
+            //return; // fixed buffer
+            gCapIbBufIdx[gCapIbBufPingPongSel] = 0;
+            gCapIbBufWrapCnt[gCapIbBufPingPongSel]++;
     }
 
     // invalidate input data
index e36a164e378451577c65df9ea5a8ef39f52cefad..6316bbc90d7924ae5e1f7981752ef1ff27bac16e 100644 (file)
@@ -118,7 +118,10 @@ const struct
 // .............................................................................
 // execPAIInNone
 #define CUS_SIGMA32_S \
-    writeDECSourceSelectNone, \
+       writeDECSourceSelectNone, \
+       writePA3Await(rb32DECSourceDecode,ob32DECSourceDecodeNone), \
+       wroteDECSourceProgramUnknown, \
+    writeIBSampleRateOverrideUnknown, \
     writeIBSioSelectN(DEVINP_NULL), \
     0xcdf0,execPAIInNone
 
@@ -495,6 +498,9 @@ const struct
 #else
 // execPAIOutNone
 #define CUS_SIGMA48_S \
+       rb32DECSourceSelect_3, \
+       writeDECSourceSelectNone, \
+       writePA3Await(rb32DECSourceDecode,ob32DECSourceDecodeNone), \
     writeOBSioSelectN(DEVOUT_NULL), \
     writePA3Await(rb32OBSioSelect,ob32OBSioSelect(DEVOUT_NULL)), \
     0xcdf0,execPAIOutNone
@@ -526,8 +532,12 @@ const ACP_Unit cus_sigma48_s[] = {
             0xcdf0,execPAIOutAnalog
         #else
         #define CUS_SIGMA49_S \
+               rb32DECSourceSelect_3, \
+                       writeDECSourceSelectNone, \
+                       writePA3Await(rb32DECSourceDecode,ob32DECSourceDecodeNone), \
             writeOBSioSelectN(DEVOUT_DAC), \
             writeENCChannelMapTo16(0,4,1,5,2,6,3,7,-3,-3,-3,-3,-3,-3,-3,-3), \
+                   wb32DECSourceSelect_3, \
             0xcdf0,execPAIOutAnalog
         #endif
     #else // TEST_MULTICHANNEL
@@ -586,8 +596,12 @@ const ACP_Unit cus_sigma49_s[] = {
     0xcdf0,execPAIOutAnalogSlave
 #else
 #define CUS_SIGMA50_S \
+    rb32DECSourceSelect_3, \
+       writeDECSourceSelectNone, \
+       writePA3Await(rb32DECSourceDecode,ob32DECSourceDecodeNone), \
     writeOBSioSelectN(DEVOUT_DAC_SLAVE), \
        writeENCChannelMapTo16(0,4,1,5,2,6,3,7,-3,-3,-3,-3,-3,-3,-3,-3), \
+    wb32DECSourceSelect_3, \
     0xcdf0,execPAIOutAnalogSlave
 #endif    
 
@@ -605,8 +619,12 @@ const ACP_Unit cus_sigma50_s[] = {
 // .............................................................................
 // execPAIOutAnalog12Ch
 #define CUS_SIGMA51_S \
+       rb32DECSourceSelect_3, \
+       writeDECSourceSelectNone, \
+       writePA3Await(rb32DECSourceDecode,ob32DECSourceDecodeNone), \
     writeOBSioSelectN(DEVOUT_DAC_12CH), \
        writeENCChannelMapTo16(0,6,1,7,2,8,3,9,4,10,5,11,-3,-3,-3,-3), \
+    wb32DECSourceSelect_3, \
     0xcdf0,execPAIOutAnalog12Ch
 
 #pragma DATA_SECTION(cus_sigma51_s0, ".none")
@@ -623,8 +641,12 @@ const ACP_Unit cus_sigma51_s[] = {
 // .............................................................................
 // execPAIOutAnalog16Ch
 #define CUS_SIGMA52_S \
+       rb32DECSourceSelect_3, \
+       writeDECSourceSelectNone, \
+       writePA3Await(rb32DECSourceDecode,ob32DECSourceDecodeNone), \
     writeOBSioSelectN(DEVOUT_DAC_16CH), \
        writeENCChannelMapTo16(0,8,1,9,2,10,3,11,4,12,5,13,6,14,7,15), \
+    wb32DECSourceSelect_3, \
     0xcdf0,execPAIOutAnalog16Ch
 
 #pragma DATA_SECTION(cus_sigma52_s0, ".none")
index 6f2fa24f9873b77182afe7e88306e2a2d44071fd..937b61ca2c732b34b9a85628f99173b5f320609e 100644 (file)
@@ -306,10 +306,10 @@ UInt32 gAsipDecodeCnt   =0;
 UInt32 gAsipDecodeErrCnt   =0;
 UInt32 gAsipFinalCnt    =0;
 UInt32 gAsipQuitCnt     =0;
-UInt32 gIbReset_cnt     =0;
-UInt32 gcapIb_cnt        =0;
+UInt32 gIbReset_cnt    =0;
+UInt32 gcapIb_cnt              =0;
 UInt32 gAsipInfo2_PrimaryErrCnt =0;
-UInt32 gAsipInfo2_ErrCnt        =0;
+UInt32 gAsipInfo2_ErrCnt               =0;
 
 #include "dbgDib.h"
 
@@ -883,7 +883,7 @@ Void taskAsipFxn(
         capIbReset();
         gIbReset_cnt++;
         Log_info0("capIbReset()");
-        
+
         // FL: send source select message to slave
         pAspMsg = (ASP_Msg *)MessageQ_alloc(hAspMsgMaster->heapId, hAspMsgMaster->msgSize); /* allocate message */
         MessageQ_setReplyQueue(hAspMsgMaster->masterQue, (MessageQ_Msg)pAspMsg);            /* set the return address in the message header */
@@ -2304,8 +2304,8 @@ PAF_ASIT_decodeProcessing(
             
                 if (errno = pP->fxns->decodeDecode(pP, pQ, pC, sourceSelect, frame, block))
                 {
-                    gAsipDecodeErrCnt++;
-                    TRACE_TERSE1("PAF_ASIT_decodeProcessing: state: DECODE.  decodeDecode err 0x%04x", errno);
+                       gAsipDecodeErrCnt++;
+                       TRACE_TERSE1("PAF_ASIT_decodeProcessing: state: DECODE.  decodeDecode err 0x%04x", errno);
                     break;
                 }
       
@@ -2566,7 +2566,7 @@ PAF_ASIT_decodeInit(
             // write back Dec configuration
             Cache_wb(&pAstCfg->xDec[z], sizeof(PAF_AST_Decode), Cache_Type_ALLD, 0);
             Cache_wait();
-            
+
             // FL: send dec activate message to slave
             pAspMsg = (ASP_Msg *)MessageQ_alloc(hAspMsgMaster->heapId, hAspMsgMaster->msgSize);  /* allocate message */
             if (pAspMsg == NULL)
@@ -2844,8 +2844,8 @@ PAF_ASIT_decodeInfo(
     Int tempVar;
 #endif
     // FL: revisit
-    //Int size;
-    //PAF_InpBufConfig *pIpBufConfig;
+    Int size;
+    PAF_InpBufConfig *pIpBufConfig;
 
     pAstCfg = pC->pAstCfg; // get pointer to common (shared) configuration
     as = pAstCfg->as;
@@ -2923,7 +2923,6 @@ PAF_ASIT_decodeInfo(
         }
         
         // FL: debug, capture input buffer
-
         capIb(pAstCfg->xInp[zMI].pInpBuf);
         gcapIb_cnt++;
         
index 0173dfb7d72d6b478367b4a3eeed632e26128fe7..43b6ef0004f5e57276506d7ee582053d505773b3 100644 (file)
@@ -596,23 +596,25 @@ const IALG_MemRec inpMemTabPrimary[] =
     // SDRAM circular buffer
     // 2 buffers * 256 samples/buffer * 8 words/sample * 3 bytes/word
     {
-        (3 * 60 * 1024) + 2,                                    // size 184320 + 1 16-bit word for EDMA padding
+        (3 * 60 * 1024) + 2,                                    // size 184320 + 1 16-bit word for EDMA padding        // GJ Debug.
         //180 * 1024,                                           // size
         //6 * 60 * 1024,                                        // size
         128,                                                    // alignment
-        IALG_SARAM_SHM, //IALG_EXTERNAL_SHM, //IALG_SARAM2, //IALG_SARAM1, //IALG_EXTERNAL,                           // space
+               IALG_SARAM_SHM, //IALG_EXTERNAL_SHM, //IALG_SARAM2, //IALG_SARAM1, //IALG_EXTERNAL,                           // space
         IALG_PERSIST,                                           // attrs
         NULL,                                                   // base
      },
 
+        // GJ Debug: The below is not required; hence 0
+
     // IRAM scratch memory for autodetection and stereo PCM input
     // High watermark needs are set by the latter:
     // double buffer stereo 32bit PCM input 512 max frame size
     // 1 buffers * 512 samples/buffer * 2 words/sample * 4 bytes/word
     {
-        8 * 1024,                                              // size
+        0 * 1024,                                              // size
         128,                                                   // alignment
-        IALG_SARAM,                                            // space
+               IALG_EXTERNAL_SHM,                                            // space
         IALG_SCRATCH,                                          // attrs
         NULL,                                                  // base
     }
index 148f31fceff17d70dc4dd45bd779bf905de8b156..e4d5fef79d6444ea9bc99f4b614ad32f067e62a7 100644 (file)
@@ -383,20 +383,15 @@ return ret_val;
 void set_audio_desc(unsigned char var1,unsigned char var2,unsigned char var3,unsigned char var4,unsigned char var5)
 {
        int ret_val=I2C_RET_OK;
-       do{ret_val=alpha_i2c_write(HSDIO_EDID_AUDIO_DESC_FORMAT(var1, var2));}while (ret_val !=I2C_RET_OK);
-       platform_delay(1000);
-       do{ret_val=alpha_i2c_write(HSDIO_EDID_AUDIO_DESC_NUM_CHANNELS(var1, var3));}while (ret_val !=I2C_RET_OK);
-       platform_delay(1000);
-       do{ret_val=alpha_i2c_write(HSDIO_EDID_AUDIO_DESC_SAMPLE_RATES(var1, var4));}while (ret_val !=I2C_RET_OK);
-       platform_delay(1000);
-       do{ret_val=alpha_i2c_write(HSDIO_EDID_AUDIO_DESC_MISC(var1, var5));}while (ret_val !=I2C_RET_OK);
-       platform_delay(1000);
-       do{ret_val=alpha_i2c_write(HSDIO_ALERT(HSDIO_ALERT_INPUT_AUDIO_CHANGE_msk));}while (ret_val !=I2C_RET_OK);
-       platform_delay(1000);
-       do{ret_val=alpha_i2c_write(HSDIO_ALERT(HSDIO_ALERT_INPUT_AUDIO_MUTE_msk));}while (ret_val !=I2C_RET_OK);
-       platform_delay(1000);
+
+       platform_delay(1000);do{ret_val=alpha_i2c_write(HSDIO_EDID_AUDIO_DESC_FORMAT(var1, var2));}while (ret_val !=I2C_RET_OK);
+       platform_delay(1000);do{ret_val=alpha_i2c_write(HSDIO_EDID_AUDIO_DESC_NUM_CHANNELS(var1, var3));}while (ret_val !=I2C_RET_OK);
+       platform_delay(1000);do{ret_val=alpha_i2c_write(HSDIO_EDID_AUDIO_DESC_SAMPLE_RATES(var1, var4));}while (ret_val !=I2C_RET_OK);
+       platform_delay(1000);do{ret_val=alpha_i2c_write(HSDIO_EDID_AUDIO_DESC_MISC(var1, var5));}while (ret_val !=I2C_RET_OK);
 }
 
+
+// Program HDMI CEA / EDID values, as necessary.
 void hrptredid()
 {
        int ret_val=I2C_RET_OK;
@@ -412,21 +407,20 @@ void hrptredid()
        platform_delay(1000);
        do{ret_val=alpha_i2c_write(HSDIO_EDID_SPEAKER_ALLOCATION_BLOCK_2(0x7));}while (ret_val !=I2C_RET_OK);
 
-       set_audio_desc(0,1,2,0x7f,7);   // Stero PCM
-       set_audio_desc(1,1,8,0x7f,7);   // Multi Ch PCM
-       set_audio_desc(2,2,6,0x7,80);   //AC3
-       //set_audio_desc(2,0,0,0,0);        //AC3; (GJ) currently not supported
-       set_audio_desc(3,10,8,0x07,1);  // EAC3 //DTS (3,7,6,0x1e,192)
-       set_audio_desc(4,12,8,0x7F,1);  // MLP (THD) //DTS (4,7,8,0x6,192)
-       //set_audio_desc(4,0,0,0,0);    // MLP (THD) //DTS (4,7,8,0x6,192) ; (GJ) currently not supported
-       // Empty descriptors to be programmed to 0s
-       set_audio_desc(5,0,0,0,0);      //AAC LC (5,6,6,0x1f,192);
-       set_audio_desc(6,0,0,0,0);
-       set_audio_desc(7,0,0,0,0);
-       set_audio_desc(8,0,0,0,0);      // DTS-HD (8,11,8,0x7F,1)
+       set_audio_desc(0,1,2,0x7f,7);   // PCM 2 channel, 32kHz, 44.1kHz, 48kHz, 88.2kHz, 96kHz, 176.4 KHz, 192 KHz, 16bit, 20bit, 24bit
+       set_audio_desc(1,1,8,0x7f,7);   // PCM 8 channel, 32kHz, 44.1kHz, 48kHz, 88.2kHz, 96kHz, 176.4 KHz, 192 KHz, 16bit, 20bit, 24bit
+       set_audio_desc(2,2,6,0x7,80);   // AC3 6 channel, 32kHz, 44.1kHz, 48kHz, 640kHz max bit rate
+       set_audio_desc(3,10,8,0x07,1);  // Dolby Digital Plus, 8 channel, 32kHz, 44.1kHz, 48kHz, codec specific:1
+       set_audio_desc(4,12,8,0x7F,1);  // MAT(MPL)(Dolby TrueHD), 8 channel, 32kHz, 44.1kHz, 48kHz, 88.2kHz, 96kHz,
+                                                                       // 176.4kHz, 192kHz,  codec specific:1
+       set_audio_desc(5,7,6,0x1E,192); // DTS 6 channel, 44.1kHz, 48kHz, 88.2kHz, 96kHz, 1,536kHz max bit rate
+       set_audio_desc(6,7,8,0x6,192);  // DTS 8 channel, 44.1kHz, 48kHz, 1,536kHz max bit rate
+       set_audio_desc(7,11,8,0x7F,3);  // DTS-HD, 8 channel, 32kHz, 44.1kHz, 48kHz, 88.2kHz, 96kHz, 176.4kHz, 192kHz,
+                                                                       // last byte is 3 for DTS:X, 1 otherwise.
+       set_audio_desc(8,11,8,0x7F,1);  // DTS-HD, 8 channel - same as above, but last byte = 1
        set_audio_desc(9,0,0,0,0);
        set_audio_desc(10,0,0,0,0);
-       set_audio_desc(11,0,0,0,0);
+       set_audio_desc(11,0,0,0,0); //AAC LC (5,6,6,0x1f,192);
        set_audio_desc(12,0,0,0,0);
        set_audio_desc(13,0,0,0,0);
        set_audio_desc(14,0,0,0,0);
@@ -436,58 +430,97 @@ void hrptredid()
        set_audio_desc(18,0,0,0,0);
        set_audio_desc(19,0,0,0,0);
        platform_delay(1000);
-       do{ret_val=alpha_i2c_write(HSDIO_EDID_GO);}while (ret_val !=0);
-       //fclose(fp1);
+       do{ret_val=alpha_i2c_write(HSDIO_EDID_GO);}while (ret_val !=I2C_RET_OK);
 }
 
+// Configure the HOST port of HSR41 for EXTRACT mode of operation.
+// Note: HDMI Tx/Out Port's state is not cared for, at all.
 void  hdmi128()
 {
-               int ret_val=0;
-       platform_delay(1000);
-       do{ret_val=alpha_i2c_write(HSDIO_AUDIO_MCLK_TO_HOST(HSDIO_AudioMClk_128X));}while (ret_val !=0);
-       platform_delay(1000);
-       do{ret_val=alpha_i2c_write(HSDIO_AUDIO_FORMAT_TO_HOST(HSDIO_AudioFmt_I2S));}while (ret_val !=0);
-       platform_delay(1000);
-       do{ret_val=alpha_i2c_write(HSDIO_IMPLEMENT_AUDIO_TO_HOST_CMDS);}while (ret_val !=0);
-       platform_delay(1000);
-       do{ret_val=alpha_i2c_write(HSDIO_AUDIO_OUTPUT_PRESENT(HSDIO_AudioPresent_HAS_NO_AUDIO));}while (ret_val !=0);
-       platform_delay(1000);
-       do{ret_val=alpha_i2c_write(HSDIO_AUDIO_OUTPUT_FORMAT(HSDIO_AudioFmt_I2S));}while (ret_val !=0);
-       platform_delay(1000);
-       do{ret_val=alpha_i2c_write(HSDIO_AUDIO_OUTPUT_SAMPLE_SIZE(HSDIO_AudioSampleSize_32));}while (ret_val !=0);
-       platform_delay(1000);
-       do{ret_val=alpha_i2c_write(HSDIO_AUDIO_OUTPUT_FREQ(HSDIO_AudioFreq_48K));}while (ret_val !=0);
-       platform_delay(1000);
-       do{ret_val=alpha_i2c_write(HSDIO_AUDIO_OUTPUT_LAYOUT(HSDIO_AudioLayout_2));}while (ret_val !=0);
-       platform_delay(1000);
-       do{ret_val=alpha_i2c_write(HSDIO_AUDIO_OUTPUT_MCLK(HSDIO_AudioMClk_AUTO));}while (ret_val !=0);
-       platform_delay(1000);
-       do{ret_val=alpha_i2c_write(HSDIO_AUDIO_OUTPUT_AUX_CHANNEL_CNT(1));}while (ret_val !=0);
-       platform_delay(1000);
-       do{ret_val=alpha_i2c_write(HSDIO_AUDIO_OUTPUT_AUX_SPEAKER_MAPPING(0));}while (ret_val !=0);
-       platform_delay(1000);
-       do{ret_val=alpha_i2c_write(HSDIO_AUDIO_OUTPUT_CHSTS_PCM_PREEMPHASIS(HSDIO_CSFormatInfo_PCM_NO_PRE));}while (ret_val !=0);
-       platform_delay(1000);
-       do{ret_val=alpha_i2c_write(HSDIO_AUDIO_OUTPUT_CHSTS_COPYRIGHT(HSDIO_CSCopyright_PROTECTED));}while (ret_val !=0);
-       platform_delay(1000);
-       do{ret_val=alpha_i2c_write(HSDIO_AUDIO_OUTPUT_CHSTS_WORD_LENGTH(HSDIO_CSWordLength_24));}while (ret_val !=0);
-       platform_delay(1000);
-       do{ret_val=alpha_i2c_write(HSDIO_AUDIO_OUTPUT_GO);}while (ret_val !=0);
-       platform_delay(1000);
-       do{ret_val=alpha_i2c_write(HSDIO_AUDIO_ROUTING(HSDIO_AudioRouting_HSDIOIN_HOSTOUT));}while (ret_val !=0);
-       platform_delay(1000);
-       do{ret_val=alpha_i2c_write(HSDIO_SYS_CFG_GO);}while (ret_val !=0);
+       int ret_val=I2C_RET_OK;
+
+       platform_delay(1000);do{ret_val=alpha_i2c_write(HSDIO_ALERT(HSDIO_ALERT_INPUT_AUDIO_CHANGE_msk));}while (ret_val !=I2C_RET_OK);
+       platform_delay(1000);do{ret_val=alpha_i2c_write(HSDIO_ALERT(HSDIO_ALERT_INPUT_AUDIO_MUTE_msk));}while (ret_val !=I2C_RET_OK);
+       platform_delay(1000);do{ret_val=alpha_i2c_write(HSDIO_AUDIO_MCLK_TO_HOST(HSDIO_AudioMClk_128X));}while (ret_val !=I2C_RET_OK);
+       platform_delay(1000);do{ret_val=alpha_i2c_write(HSDIO_AUDIO_UNMUTE_DELAY_TO_HOST(HSDIO_AudioUnMuteDelay_NO_DELAY));}while (ret_val !=I2C_RET_OK);
+       platform_delay(1000);do{ret_val=alpha_i2c_write(HSDIO_AUDIO_FORMAT_TO_HOST(HSDIO_AudioFmt_I2S));}while (ret_val !=I2C_RET_OK);
+       platform_delay(1000);do{ret_val=alpha_i2c_write(HSDIO_IMPLEMENT_AUDIO_TO_HOST_CMDS);}while (ret_val !=I2C_RET_OK);
+       platform_delay(1000);do{ret_val=alpha_i2c_write(HSDIO_AUDIO_ROUTING(HSDIO_AudioRouting_HSDIOIN_NOOUT));}while (ret_val !=I2C_RET_OK);
+       platform_delay(1000);do{ret_val=alpha_i2c_write(HSDIO_SYS_CFG_GO);}while (ret_val !=I2C_RET_OK);
 }
 
-Platform_STATUS audioHDMIConfig(void)
+//
+// Fetch Video Sync Status from HSR41
+unsigned int read_hdmi_videosyncstatus()
 {
-       Platform_STATUS status = 0;
+       unsigned char data[50];
+       Uint8 length;
+       int ret_val=0;
 
-       hrptredid();
+       ret_val=alpha_i2c_write(HSDIO_INPUT_SYNC_STS);
+       if(!ret_val) i2cRead(HSR4_I2C_PORT_NUM, HSR4_I2C_ADDR,&length,0,1,1);
+       if(!ret_val) i2cRead(HSR4_I2C_PORT_NUM, HSR4_I2C_ADDR,&data[0],0,1,length);
+       if(!ret_val) ret_val= data[3]; // 1-byte / indicates error status
 
-       hdmi128();
+       return ret_val;
+}
 
-       return (status);
+//
+// Fetch Audio Present Status from HSR41
+unsigned int read_hdmi_audiostatus()
+{
+       unsigned char data[50];
+       Uint8 length;
+       int ret_val=0;
+
+       ret_val=alpha_i2c_write(HSDIO_AUDIO_INPUT_PRESENT_STS);
+       if(!ret_val) i2cRead(HSR4_I2C_PORT_NUM, HSR4_I2C_ADDR,&length,0,1,1);
+       if(!ret_val) i2cRead(HSR4_I2C_PORT_NUM, HSR4_I2C_ADDR,&data[0],0,1,length);
+       if(!ret_val) ret_val= data[3]; // 1-byte / indicates error status
+
+       return ret_val;
+}
+
+// Fetch Clock Status from HSR41
+unsigned int read_hdmi_clockstatus()
+{
+       unsigned char data[50];
+       Uint8 length;
+       int ret_val=0;
+
+       ret_val=alpha_i2c_write(HSDIO_GET_AUDIO_MCLK_TO_HOST);
+       if(!ret_val) i2cRead(HSR4_I2C_PORT_NUM, HSR4_I2C_ADDR,&length,0,1,1);
+       if(!ret_val) i2cRead(HSR4_I2C_PORT_NUM, HSR4_I2C_ADDR,&data[0],0,1,length);
+       if(!ret_val) ret_val= data[3]; // 1-byte / indicates clock status
+
+       return ret_val;
+}
+
+// Fetch Error Status from HSR41
+unsigned int read_hdmi_errstatus()
+{
+       unsigned char data[50];
+       Uint8 length;
+       int ret_val=0;
+
+       ret_val=alpha_i2c_write(HSDIO_AUDIO_INPUT_ERROR_STS);
+       if(!ret_val) i2cRead(HSR4_I2C_PORT_NUM, HSR4_I2C_ADDR,&length,0,1,1);
+       if(!ret_val) i2cRead(HSR4_I2C_PORT_NUM, HSR4_I2C_ADDR,&data[0],0,1,length);
+       if(!ret_val) ret_val= data[3]; // 1-byte / indicates error status
+
+       return ret_val;
+}
+
+void clear_hdmi_hmint()
+{
+       int ret_val=0;
+
+       ret_val=alpha_i2c_write(HSDIO_ALERT_STS); //clear the interrupt on ~HMINT by reading the Alert Status register
+
+       if(ret_val)
+               while(1);               // Control shouldn't be here
+
+       return;
 }
 
 unsigned int read_hdmi_samprate()
@@ -495,10 +528,6 @@ unsigned int read_hdmi_samprate()
        unsigned char data[50];
        Uint8 length;
        int ret_val=7;
-       //int ret_val2=0;
-       int clear_to_read=5;
-
-       clear_to_read=alpha_i2c_write(HSDIO_ALERT_STS); //clear the interrupt on ~HMINT by reading the Alert Status register
 
        ret_val=alpha_i2c_write(HSDIO_AUDIO_INPUT_FREQ_STS);
 
@@ -511,4 +540,22 @@ unsigned int read_hdmi_samprate()
        return ret_val;
 }
 
+
+Platform_STATUS audioHDMIConfig(void)
+{
+       Platform_STATUS status = Platform_EOK;
+
+       hrptredid();
+
+       hdmi128();
+
+       //while((HSDIO_InSync_SYNC_DETECTED != read_hdmi_videosyncstatus()) || (HSDIO_AudioMClk_128X != read_hdmi_clockstatus()));// || (HSDIO_AudioPresent_HAS_AUDIO != read_hdmi_audiostatus()));
+       while((HSDIO_InSync_SYNC_DETECTED != read_hdmi_videosyncstatus()));
+       //while((HSDIO_AudioMClk_128X != read_hdmi_clockstatus()) || (HSDIO_AudioErr_NO_ERROR != read_hdmi_errstatus()));
+
+       return (status);
+}
+
+
+
 /* Nothing past this point */
index 56284129b7038e4855c1f6472bb4e0a838f02ef6..306650ba019aeaf9e72d3cd8033d66f9c95f99ce 100644 (file)
@@ -67,8 +67,7 @@ All rights reserved.
 
 #include <sap_d10.h>
 #include <audio_dc_cfg.h>
-
-
+#include "vproccmds_a.h"
 
 // -----------------------------------------------------------------------------
 // Local function declarations
@@ -323,7 +322,7 @@ static const MCASP_ConfigXmt txConfigDAC =
         MCASP_ACLKXCTL_CLKXP_FALLING,
         MCASP_ACLKXCTL_ASYNC_ASYNC,
         MCASP_ACLKXCTL_CLKXM_INTERNAL,
-               MCASP_ACLKXCTL_CLKXDIV_OF(1)),
+               MCASP_ACLKXCTL_CLKXDIV_DEFAULT),
     MCASP_AHCLKXCTL_RMK(
         MCASP_AHCLKXCTL_HCLKXM_EXTERNAL,
         MCASP_AHCLKXCTL_HCLKXP_FALLING,
@@ -393,6 +392,7 @@ static const MCASP_ConfigXmt txConfigDIT =
     MCASP_XCLKCHK_DEFAULT
 };
 
+#if 0
 static const MCASP_ConfigXmt txConfigDIT_16bit =
 {
     MCASP_XMASK_OF(0x0000FFFF),
@@ -422,6 +422,7 @@ static const MCASP_ConfigXmt txConfigDIT_16bit =
     MCASP_XINTCTL_DEFAULT,
     MCASP_XCLKCHK_DEFAULT
 };
+#endif
 
 // -----------------------------------------------------------------------------
 // DAP Input Parameter Definitions
@@ -748,9 +749,10 @@ static inline XDAS_Int32 initD10 (DEV2_Handle device)
        // This is needed because DAC configuration needs some default clocking.
        // We start with S/PDIF, because it's onboard the Audio DC & has its own crystal.
        // HDMI is an add-on board & Audio OSC would need AUX clocking - both unfit for "default".
+       // ADCs default clock is not available to clock the DAC with.
        status = platformAudioSelectClkSrc(AUDIO_CLK_SRC_DIR);
 
-       platform_delay(20000); // Without delay between these 2 calls system aborts.
+       platform_delay(5000); // Without delay between these 2 calls system aborts.
 
        status = setAudioDacConfig();
 
@@ -796,19 +798,22 @@ static XDAS_Int32 clockMuxTx (int sel, int force)
 // This is called once when the device is opened
 // (PAF_SIO_CONTROL_OPEN) and periodically thereafter
 // (PAF_SIO_CONTROL_GET_INPUT_STATUS).
+int gHmint_ctr = 0, gNonAudio = 0, gLockStatus=0, gPrevAudio=0, gPrevLock=0;
+int gSync_ctr, gLock_ctr, gAudioErr_ctr, gNonAudio_ctr = 0;
 
 static int manageInput (DEV2_Handle device, const SAP_D10_Rx_Params *pParams, PAF_SIO_InputStatus *pStatusOut)
 {
     PAF_SIO_InputStatus *pStatusIn = &primaryStatus;
-    volatile Uint32 *mcasp0 = (volatile Uint32 *) _MCASP_BASE_PORT0;
-    volatile Uint32 *mcasp1 = (volatile Uint32 *) _MCASP_BASE_PORT1;
-    volatile Uint32 *mcasp2 = (volatile Uint32 *) _MCASP_BASE_PORT2;
+    //volatile Uint32 *mcasp0 = (volatile Uint32 *) _MCASP_BASE_PORT0;
+    //volatile Uint32 *mcasp1 = (volatile Uint32 *) _MCASP_BASE_PORT1;
+    //volatile Uint32 *mcasp2 = (volatile Uint32 *) _MCASP_BASE_PORT2;
 
-       Platform_STATUS status;
+       //Platform_STATUS status;
 
     static int PrevSampRate = 0;
-       int Rate_spdif=0;
+       int RateHdmi =0;
 
+       /* Mode & MCLK info embedded statically in the Rx IO definition for SPDIF Input */
     if ((((pParams->d10rx.mode & D10_MCLK_MASK) >> D10_MCLK_SHIFT) == D10_MCLK_DIR) &
         (((pParams->d10rx.mode & D10_MODE_MASK) >> D10_MODE_SHIFT) == D10_MODE_STD))
     {
@@ -820,14 +825,15 @@ static int manageInput (DEV2_Handle device, const SAP_D10_Rx_Params *pParams, PA
                PrevSampRate = pStatusIn->sampleRateMeasured;
 
                // GJ: Is this needed? Probably not.
-        mcasp0[_MCASP_PDOUT_OFFSET] = 0x000 ;
-        mcasp0[_MCASP_PDOUT_OFFSET] = 0x400 ;
+               // GJ: Mute Control during input-change seemingly intended.
+        //mcasp0[_MCASP_PDOUT_OFFSET] = 0x000 ;
+        //mcasp0[_MCASP_PDOUT_OFFSET] = 0x400 ;
 
     }
+    /* Mode & MCLK info embedded statically in the Rx IO definition for ANALOG/ADC Input */
     else if ((((pParams->d10rx.mode & D10_MCLK_MASK) >> D10_MCLK_SHIFT) == D10_MCLK_OSC) &
              (((pParams->d10rx.mode & D10_MODE_MASK) >> D10_MODE_SHIFT) == D10_MODE_STD)) {
         int adcRate = (pParams->d10rx.mode & D10_RATE_MASK) >> D10_RATE_SHIFT;
-        int regData;
 
         pStatusIn->lock = 1;
         pStatusIn->nonaudio = PAF_IEC_AUDIOMODE_AUDIO;
@@ -836,27 +842,78 @@ static int manageInput (DEV2_Handle device, const SAP_D10_Rx_Params *pParams, PA
         pStatusIn->sampleRateData = pStatusIn->sampleRateMeasured;
 
     }
+    /* Mode & MCLK info embedded statically in the Rx IO definition for HDMI */
     else if ((((pParams->d10rx.mode & D10_MCLK_MASK) >> D10_MCLK_SHIFT) == D10_MCLK_HDMI) &
              (((pParams->d10rx.mode & D10_MODE_MASK) >> D10_MODE_SHIFT) == D10_MODE_HDMI))
     {
-        pStatusIn->lock = 1;
-        pStatusIn->nonaudio = PAF_IEC_AUDIOMODE_AUDIO;
+
         pStatusIn->emphasis = PAF_IEC_PREEMPHASIS_NO;
-               
+        //pStatusIn->lock = 1;
+        //pStatusIn->nonaudio = PAF_IEC_AUDIOMODE_AUDIO;
 
-               if(!HDMIGpioGetState()) {
-                       HSR4_readStatus (pStatusIn);
+       if(!HDMIGpioGetState())
+       {
+               clear_hdmi_hmint();
+               gHmint_ctr++;
+
+               RateHdmi=read_hdmi_samprate();
+                       pStatusIn->sampleRateMeasured = RateTable_hdmi[RateHdmi];
                        pStatusIn->sampleRateData = pStatusIn->sampleRateMeasured;
                        PrevSampRate = pStatusIn->sampleRateMeasured;
-               }
-               else {
-                       pStatusIn->sampleRateMeasured = PrevSampRate;
-                       pStatusIn->sampleRateData = pStatusIn->sampleRateMeasured;
-               }
 
-    }
+               switch(read_hdmi_errstatus())
+                       {
+                               case HSDIO_AudioErr_NO_ERROR:
+                               {
+                                       gPrevLock=pStatusIn->lock;
+                                       gPrevAudio=pStatusIn->nonaudio;
+                                       pStatusIn->lock = 1;
+                                       pStatusIn->nonaudio = PAF_IEC_AUDIOMODE_AUDIO;
+                                       break;
+                               }
+                               case HSDIO_AudioErr_AUDIO_NO_PLL_LOCK:
+                               {
+                                       gLock_ctr++;
+                                       pStatusIn->lock = 0;
+                                       //pStatusIn->nonaudio = PAF_IEC_AUDIOMODE_AUDIO;
+                                       break;
+                               }
+                               case HSDIO_AudioErr_AUDIO_NO_AUDIO:
+                               {
+                                       gAudioErr_ctr++;
+                                       //pStatusIn->lock = 1;
+                                       pStatusIn->nonaudio = PAF_IEC_AUDIOMODE_NONAUDIO;
+                                       break;
+                               }
+                               default:
+                                       while(1);               // Control shouldn't be here.
+                       }
+
+               if(HSDIO_AudioMClk_128X != read_hdmi_clockstatus())
+               {
+                       gLock_ctr++;
+                       pStatusIn->lock = 0;
+               }
+               else if (HSDIO_AudioPresent_HAS_AUDIO != read_hdmi_audiostatus())
+                       {
+                               gNonAudio_ctr++;
+                               pStatusIn->nonaudio = PAF_IEC_AUDIOMODE_NONAUDIO;
+                       }
+
+
+       }
+       else
+       {
+               pStatusIn->sampleRateMeasured = PrevSampRate;
+               pStatusIn->sampleRateData = pStatusIn->sampleRateMeasured;
+       }
+       }
+
     else
-        return -1;
+        return -1;             // Control shouldn't be here!
+
+    gNonAudio=pStatusIn->nonaudio;
+    gLockStatus=pStatusIn->lock;
 
     // update another status if requested
     if (pStatusOut)
@@ -879,7 +936,7 @@ static int manageOutput (DEV2_Handle device, const SAP_D10_Tx_Params *pParams, f
 
 
     if (!pClkxDiv)
-        return 1;
+        return SIO2_EINVAL;
 
     // set clock divider
     if (rateX < .354)
@@ -901,7 +958,7 @@ static int manageOutput (DEV2_Handle device, const SAP_D10_Tx_Params *pParams, f
         divider = pClkxDiv[pStatusIn->sampleRateMeasured];
     divider /= rateX;
 
-    Log_info2("SAP_D10: Inside manageOutput with divider = %d, rateX = %d", divider, rateX);
+    Log_info2("SAP_D10: Inside manageOutput with divider = %d, rateX = %f", divider, rateX);
 
     // DIT requires 2x clock
     if ((mcasp[_MCASP_AFSXCTL_OFFSET] & _MCASP_AFSXCTL_XMOD_MASK) ==
@@ -925,7 +982,7 @@ XDAS_Int32 D10_sapControl (DEV2_Handle device, const PAF_SIO_Params *pParams, XD
 {
     const SAP_D10_Rx_Params *pDapD10RxParams = (const SAP_D10_Rx_Params *)pParams;
     const SAP_D10_Tx_Params *pDapD10TxParams = (const SAP_D10_Tx_Params *)pParams;
-    Platform_STATUS status;
+    //Platform_STATUS status;
 
     volatile Uint32 *mcasp = mcaspAddr[pParams->sio.moduleNum];
     XDAS_Int32 result = 0;
@@ -988,10 +1045,10 @@ XDAS_Int32 D10_sapControl (DEV2_Handle device, const PAF_SIO_Params *pParams, XD
 
                     // Since DAC is a slave to the chosen input, operate the clksel switch appropriately
                     // Also, this is a create-time (i.e, CTRL_OPEN) only call & not appropriate under
-                    // the periodic manage_(in/out)put calls
+                    // the periodic manage_output calls.
                     int sel = (pDapD10RxParams->d10rx.mode & D10_MCLK_MASK) >> D10_MCLK_SHIFT;
                     clockMuxTx (sel, -1);
-                    platform_delay(20000); // Without delay between Tx McASP & DAC configs, system aborts.
+                    platform_delay(5000); // GJ REVISIT: Without delay between Tx McASP & DAC configs, system aborts.
                     setAudioDacConfig();
                                        dacHardUnMute ();
 
@@ -1088,15 +1145,6 @@ XDAS_Int32 D10_sapControl (DEV2_Handle device, const PAF_SIO_Params *pParams, XD
 // -----------------------------------------------------------------------------
 
 
-extern unsigned int read_hdmi_samprate();
-int RateHdmi=0;
-void HSR4_readStatus (PAF_SIO_InputStatus *pStatus)
-{
-       //if(!RateHdmi)
-       RateHdmi=read_hdmi_samprate();
-       pStatus->sampleRateMeasured = RateTable_hdmi[RateHdmi];
-}
-
 unsigned int HDMIGpioGetState (void) {
        return(gpioReadInput(GPIO_PORT_0, PLATFORM_AUDIO_HSR_HMINTz_GPIO));
 }
index 4f4093f905c2cf0cc97c5605877278d3315a9842..722aa2e5259215363d18767a808b36ccd3b6818a 100644 (file)
@@ -224,7 +224,6 @@ Void SAP_MCASP_init (Void)
         {
             Uint32 save = *pSers;
             *pSers = 0;
-            //TRACE_TERSE3(("SAP_MCASP_init: pSers: 0x%x.  was 0x%x.  is 0x%x", (IArg) pSers, (IArg) save, (IArg) *pSers));
             pSers++;
         }
         base[_MCASP_PDIR_OFFSET] = 0;  // all input by default
@@ -713,7 +712,7 @@ Int SAP_MCASP_reset (DEV2_Handle device)
 Int SAP_MCASP_waitSet (MCASP_Handle hMcasp, Uint32 wrReg, Uint32 rdReg, Uint32 mask, Uint32 timeout)
 {
     volatile Uint32 *base = (volatile Uint32 *)(hMcasp->baseAddr);
-    Uint32 timeStart, timeNow, elapsed, resMask, i;
+    Uint32 timeStart, timeNow, elapsed, resMask;
 
     //TRACE_TERSE3(("SAP_MCASP_waitSet(0x%x, 0x%x, 0x%x).", hMcasp, wrReg, rdReg));
 
@@ -751,11 +750,8 @@ Int SAP_MCASP_waitSet (MCASP_Handle hMcasp, Uint32 wrReg, Uint32 rdReg, Uint32 m
     }
 #endif
 
-    //timeout = timeout * USEC_PER_MSEC;
     timeStart = Clock_getTicks();
     while (1) {
-               //for(i=0; i < 20000; i++);
-       // return success if register has latched value
                if ((base[rdReg] & mask) == mask)
                        break;
                timeNow = Clock_getTicks();
@@ -774,6 +770,8 @@ Int SAP_MCASP_waitSet (MCASP_Handle hMcasp, Uint32 wrReg, Uint32 rdReg, Uint32 m
     return DEV2_OK;
 } //SAP_MCASP_waitSet
 
+int gMcASPWatchDogInCnt=0;
+int gMcASPWatchDogOutCnt=0;
 // -----------------------------------------------------------------------------
 
 Int SAP_MCASP_watchDog (DEV2_Handle device)
@@ -786,13 +784,19 @@ Int SAP_MCASP_watchDog (DEV2_Handle device)
         stat = MCASP_RGETH (hPort, RSTAT);
         if ((stat & _MCASP_RSTAT_ROVRN_MASK) ||
             (stat & _MCASP_RSTAT_RDMAERR_MASK))
+        {
+               gMcASPWatchDogInCnt++;
             return DEV2_EBADIO;
+        }
     }
     else {
         stat = MCASP_RGETH (hPort, XSTAT);
         if ((stat & _MCASP_XSTAT_XUNDRN_MASK) ||
             (stat & _MCASP_XSTAT_XDMAERR_MASK))
-        return DEV2_EBADIO;
+        {
+               gMcASPWatchDogOutCnt++;
+               return DEV2_EBADIO;
+        }
     }
     
     return DEV2_OK;