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raw | patch | inline | side by side (parent: a67b167)
raw | patch | inline | side by side (parent: a67b167)
| author | Frank Livingston <frank-livingston@ti.com> | |
| Thu, 11 Aug 2016 18:44:43 +0000 (13:44 -0500) | ||
| committer | Frank Livingston <frank-livingston@ti.com> | |
| Thu, 11 Aug 2016 18:44:43 +0000 (13:44 -0500) |
14 files changed:
diff --git a/pdk_k2g_1_0_1/packages/ti/platform/evmk2g/platform_lib/include/platform_audio.h b/pdk_k2g_1_0_1/packages/ti/platform/evmk2g/platform_lib/include/platform_audio.h
index 8828551265fb2fbd8352c8540e834c4c9ff0e3ca..fdd3914935845204dd633be2fd2e82ddfd27221b 100644 (file)
typedef enum _AudioClkSrc
{
AUDIO_CLK_SRC_DIR = 0,
- AUDIO_CLK_SRC_I2S
+ AUDIO_CLK_SRC_I2S,
+ AUDIO_CLK_SRC_OSC
} AudioClkSrc;
/** @defgroup Platform Audio ADC Enums */
diff --git a/pdk_k2g_1_0_1/packages/ti/platform/evmk2g/platform_lib/src/platform_audio.c b/pdk_k2g_1_0_1/packages/ti/platform/evmk2g/platform_lib/src/platform_audio.c
index 38848db9810773d268fe7f55370572e15e6789d9..988ba84435ac2af4d2146d352e7b27c4940b8dda 100644 (file)
gpioClearOutput(GPIO_PORT_0, PLATFORM_AUDIO_CLK_SEL_GPIO);
gpioSetOutput(GPIO_PORT_0, PLATFORM_AUDIO_CLK_SELz_GPIO);
}
+ else if(clkSrc == AUDIO_CLK_SRC_OSC)
+ {
+ gpioSetOutput(GPIO_PORT_0, PLATFORM_AUDIO_CLK_SEL_GPIO);
+ gpioSetOutput(GPIO_PORT_0, PLATFORM_AUDIO_CLK_SELz_GPIO);
+ }
else
{
IFPRINT(platform_write("platformAudioSelectClkSrc : Invalid Inputs\n"));
diff --git a/procsdk_audio_x_xx_xx_xx/test_dsp/application/acp_main_cus.c b/procsdk_audio_x_xx_xx_xx/test_dsp/application/acp_main_cus.c
index 0b3b6178e28dee6c9aef424fe1426ccfd8241df2..107dc810efb338d90e979e286976f567d0abbebe 100644 (file)
extern const ACP_Unit cus_sigma32_s[];
#ifndef SIMULATE_SIO
extern const ACP_Unit cus_sigma33_s[];
- //extern const ACP_Unit cus_sigma34_s[];
+ extern const ACP_Unit cus_sigma34_s[];
+ extern const ACP_Unit cus_sigma35_s[];
+ extern const ACP_Unit cus_sigma36_s[];
#else // SIMULATE_SIO
//extern const ACP_Unit cus_sigma33_s[];
extern const ACP_Unit cus_sigma34_s[];
-#endif // SIMULATE_SIO
//extern const ACP_Unit cus_sigma35_s[];
//extern const ACP_Unit cus_sigma36_s[];
+#endif // SIMULATE_SIO
//extern const ACP_Unit cus_sigma37_s[];
//extern const ACP_Unit cus_sigma38_s[];
//extern const ACP_Unit cus_sigma39_s[];
extern const ACP_Unit cus_sigma48_s[];
extern const ACP_Unit cus_sigma49_s[];
+#ifndef SIMULATE_SIO
+ extern const ACP_Unit cus_sigma50_s[];
+#else // SIMULATE_SIO
//extern const ACP_Unit cus_sigma50_s[];
+#endif // SIMULATE_SIO
//extern const ACP_Unit cus_sigma51_s[];
//extern const ACP_Unit cus_sigma52_s[];
//extern const ACP_Unit cus_sigma53_s[];
shortcut[32] = cus_sigma32_s;
#ifndef SIMULATE_SIO
shortcut[33] = cus_sigma33_s;
- //shortcut[34] = cus_sigma34_s;
+ shortcut[34] = cus_sigma34_s;
+ shortcut[35] = cus_sigma35_s;
+ shortcut[36] = cus_sigma36_s;
#else // SIMULATE_SIO
//shortcut[33] = cus_sigma33_s;
shortcut[34] = cus_sigma34_s;
-#endif // SIMULATE_SIO
//shortcut[35] = cus_sigma35_s;
//shortcut[36] = cus_sigma36_s;
+#endif // SIMULATE_SIO
//shortcut[37] = cus_sigma37_s;
//shortcut[38] = cus_sigma38_s;
//shortcut[39] = cus_sigma39_s;
//shortcut[47] = cus_sigma47_s;
// CUStom Output switching alpha codes
+#ifndef SIMULATE_SIO
+ shortcut[48] = cus_sigma48_s;
+ shortcut[49] = cus_sigma49_s;
+ shortcut[50] = cus_sigma50_s;
+#else // SIMULATE_SIO
shortcut[48] = cus_sigma48_s;
shortcut[49] = cus_sigma49_s;
//shortcut[50] = cus_sigma50_s;
+#endif // SIMULATE_SIO
//shortcut[51] = cus_sigma51_s;
//shortcut[52] = cus_sigma52_s;
//shortcut[53] = cus_sigma53_s;
diff --git a/procsdk_audio_x_xx_xx_xx/test_dsp/application/itopo/evmk2g/alpha/pa_i13_evmk2g_io_a.h b/procsdk_audio_x_xx_xx_xx/test_dsp/application/itopo/evmk2g/alpha/pa_i13_evmk2g_io_a.h
index 2a09e63d37f37bd77fd4ab33cdd37b84e015df21..32ebf727b434fcd9666dc4c66f28d0163109b0af 100644 (file)
#ifndef SIMULATE_SIO
#define execPAIInNone 0xf120
#define execPAIInHDMIStereo 0xf121
-/*#define execPAIInDigital 0xf121
-#define execPAIInAnalog 0xf122
-#define execPAIInAnalogStereo 0xf123
-#define execPAIInSing 0xf126
-#define execPAIInHDMI 0xf128
-#define execPAIInHDMIStereo 0xf129
-
-#define execPAIIn1394 0xf12e
-#define execPAIInRingIO 0xf12f */
+#define execPAIInHDMI 0xf122
+#define execPAIInDigital 0xf123
+#define execPAIInAnalog 0xf124
// These values reflect the definition of devinp[]
#define DEVINP_NULL 0
-#define DEVINP_HDMI_STEREO 1
-#define DEVINP_N 2
-/*#define DEVINP_DIR 1
-#define DEVINP_ADC1 2
-#define DEVINP_ADC_STEREO 3
-#define DEVINP_1394_STEREO 4
-#define DEVINP_1394 5
-#define DEVINP_RIO 6
-#define DEVINP_HDMI 7 */
+#define DEVINP_HDMI_STEREO 1
+#define DEVINP_HDMI 2
+#define DEVINP_DIR 3
+#define DEVINP_ADC 4
+#define DEVINP_N 5
#else // SIMULATE_SIO
#define execPAIInNone 0xf120
#define wroteIBSioCommandNone 0xca00+STD_BETA_IB,0x0500+DEVINP_NULL
-#define wroteIBSioCommandDigital 0xca00+STD_BETA_IB,0x0500+DEVINP_DIR
-#define wroteIBSioCommandAnalog 0xca00+STD_BETA_IB,0x0500+DEVINP_ADC1
-#define wroteIBSioCommandAnalogStereo 0xca00+STD_BETA_IB,0x0500+DEVINP_ADC_STEREO
-#define wroteIBSioCommand1394Stereo 0xca00+STD_BETA_IB,0x0500+DEVINP_1394_STEREO
-#define wroteIBSioCommand1394 0xca00+STD_BETA_IB,0x0500+DEVINP_1394
-#define wroteIBSioCommandRingIO 0xca00+STD_BETA_IB,0x0500+DEVINP_RIO
-#define wroteIBSioCommandHDMI 0xca00+STD_BETA_IB,0x0500+DEVINP_HDMI
#define wroteIBSioCommandHDMIStereo 0xca00+STD_BETA_IB,0x0500+DEVINP_HDMI_STEREO
-
+#define wroteIBSioCommandHDMI 0xca00+STD_BETA_IB,0x0500+DEVINP_HDMI
+#define wroteIBSioCommandDigital 0xca00+STD_BETA_IB,0x0500+DEVINP_DIR
+#define wroteIBSioCommandAnalog 0xca00+STD_BETA_IB,0x0500+DEVINP_ADC
#define wroteIBSioSelectNone 0xca00+STD_BETA_IB,0x0580+DEVINP_NULL
-#define wroteIBSioSelectDigital 0xca00+STD_BETA_IB,0x0580+DEVINP_DIR
-#define wroteIBSioSelectAnalog 0xca00+STD_BETA_IB,0x0580+DEVINP_ADC1
-#define wroteIBSioSelectAnalogStereo 0xca00+STD_BETA_IB,0x0580+DEVINP_ADC_STEREO
-#define wroteIBSioSelect1394Stereo 0xca00+STD_BETA_IB,0x0580+DEVINP_1394_STEREO
-#define wroteIBSioSelect1394 0xca00+STD_BETA_IB,0x0580+DEVINP_1394
-#define wroteIBSioSelectRingIO 0xca00+STD_BETA_IB,0x0580+DEVINP_RIO
-#define wroteIBSioSelectHDMI 0xca00+STD_BETA_IB,0x0580+DEVINP_HDMI
#define wroteIBSioSelectHDMIStereo 0xca00+STD_BETA_IB,0x0580+DEVINP_HDMI_STEREO
+#define wroteIBSioSelectHDMI 0xca00+STD_BETA_IB,0x0580+DEVINP_HDMI
+#define wroteIBSioSelectDigital 0xca00+STD_BETA_IB,0x0580+DEVINP_DIR
+#define wroteIBSioSelectAnalog 0xca00+STD_BETA_IB,0x0580+DEVINP_ADC
// -----------------------------------------------------------------------------
#define execPAIOutNone 0xf130
#define execPAIOutAnalog 0xf131 //8 channel output analog (24bit)
-#define execPAIOutDigital 0xf132 //8 channel output analog (24bit)
-#define execPAIOutAnalogSlave 0xf138 //8 channel output analog (24bit) slave to input
-#define execPAIOutRingIO16bit 0xf139
-#define execPAIOutAnalogSlaveStereo 0xf13a //2 channel output analog (24bit) slave to input
-#define execPAIOutAnalogSlave2Stereo 0xf13b //4 channel output analog (24bit) slave to input
-#define execPAIOutAnalogSlave2Stereo 0xf13b //4 channel output analog (24bit) slave to input
-#define execPAIOutTdm4 0xf13c //4 channel output analog (24bit) slave to input
-#define execPAIOutTdm8 0xf13d //4 channel output analog (24bit) slave to input
-#define execPAIOutRingIO24bit 0xf13f
+#define execPAIOutAnalogSlave 0xf132 //8 channel output analog (24bit)
// These values reflect the definition of devout[]
#define DEVOUT_NULL 0
#define DEVOUT_DAC 1
-#define DEVOUT_DIT 2
-#define DEVOUT_DAC_SLAVE 3
-#define DEVOUT_DAC_STEREO 4
-#define DEVOUT_DAC_2STEREO 5
-#define DEVOUT_RRIO_16bit 6
-#define DEVOUT_RRIO_24bit 7
-#define DEVOUT_RRIO_32bit 8
-#define DEVOUT_4TDM 9
-#define DEVOUT_8TDM 10
-#define DEVOUT_N 11
+#define DEVOUT_DAC_SLAVE 2
+#define DEVOUT_N 3
#define wroteOBSioCommandNone 0xca00+STD_BETA_OB,0x0500+DEVOUT_NULL
#define wroteOBSioCommandAnalog 0xca00+STD_BETA_OB,0x0500+DEVOUT_DAC
-#define wroteOBSioCommandDigital 0xca00+STD_BETA_OB,0x0500+DEVOUT_DIT
#define wroteOBSioCommandAnalogSlave 0xca00+STD_BETA_OB,0x0500+DEVOUT_DAC_SLAVE
-#define wroteOBSioCommandAnalogSlaveStereo 0xca00+STD_BETA_OB,0x0500+DEVOUT_DAC_STEREO
-#define wroteOBSioCommandAnalogSlave2Stereo 0xca00+STD_BETA_OB,0x0500+DEVOUT_DAC_2STEREO
-#define wroteOBSioCommandRRINGIO_16bit 0xca00+STD_BETA_OB,0x0500+DEVOUT_RRIO_16bit
-#define wroteOBSioCommandRRINGIO_24bit 0xca00+STD_BETA_OB,0x0500+DEVOUT_RRIO_24bit
-#define wroteOBSioCommandRRINGIO_32bit 0xca00+STD_BETA_OB,0x0500+DEVOUT_RRIO_32bit
#define wroteOBSioSelectNone 0xca00+STD_BETA_OB,0x0580+DEVOUT_NULL
#define wroteOBSioSelectAnalog 0xca00+STD_BETA_OB,0x0580+DEVOUT_DAC
-#define wroteOBSioSelectDigital 0xca00+STD_BETA_OB,0x0580+DEVOUT_DIT
#define wroteOBSioSelectAnalogSlave 0xca00+STD_BETA_OB,0x0580+DEVOUT_DAC_SLAVE
-#define wroteOBSioSelectAnalogSlaveStereo 0xca00+STD_BETA_OB,0x0580+DEVOUT_DAC_STEREO
-#define wroteOBSioSelectAnalogSlave2Stereo 0xca00+STD_BETA_OB,0x0580+DEVOUT_DAC_2STEREO
-#define wroteOBSioSelectRRINGIO_16bit 0xca00+STD_BETA_OB,0x0580+DEVOUT_RRIO_16bit
-#define wroteOBSioSelectRRINGIO_24bit 0xca00+STD_BETA_OB,0x0580+DEVOUT_RRIO_24bit
-#define wroteOBSioSelectRRINGIO_32bit 0xca00+STD_BETA_OB,0x0580+DEVOUT_RRIO_32bit
// -----------------------------------------------------------------------------
#endif // _PAI_EVMK2G_IO_A_H_
diff --git a/procsdk_audio_x_xx_xx_xx/test_dsp/application/itopo/evmk2g/atboot.c b/procsdk_audio_x_xx_xx_xx/test_dsp/application/itopo/evmk2g/atboot.c
index 1246413d3648879fe7dc78b39bf957860584f32e..95a6b6e94c468431227faaafd97af7403d7265c4 100644 (file)
writeSYSRecreationModeDirect, \
writeSYSChannelConfigurationRequestSurround4_1, \
writeDDPJOCDecodeModeDisable, \
- execPAIOutAnalog, \
- execPAIInHDMIStereo
+ execPAIOutAnalogSlave, \
+ execPAIInAnalog
#else
#define CUS_ATBOOT_S \
diff --git a/procsdk_audio_x_xx_xx_xx/test_dsp/application/itopo/evmk2g/io.c b/procsdk_audio_x_xx_xx_xx/test_dsp/application/itopo/evmk2g/io.c
index c96f344160782d449d9e4246b72031c0632ef014..c6cbc5ec8c383672ce1dfd5d679e8797cc74abb2 100644 (file)
DEVINP_N,
// These values reflect the definitions DEVINP_* in pa*io_a.h:
NULL, // InNone
- (const PAF_SIO_Params *) &SAP_D10_RX_HDMI_STEREO // InHDMIStereo
- /*NULL, //(const PAF_SIO_Params *) &DAP_E17_RX_DIR, // InDigital
- NULL, //(const PAF_SIO_Params *) &DAP_E17_RX_ADC_48000HZ, // InAnalog
- NULL, //(const PAF_SIO_Params *) &DAP_E17_RX_ADC_STEREO_48000HZ, // InAnalogStereo
- NULL, //(const PAF_SIO_Params *) &DAP_E17_RX_1394_STEREO, // In1394Stereo
- NULL, //(const PAF_SIO_Params *) &DAP_E17_RX_1394, // In1394
- NULL, // InRingIO
- NULL, //(const PAF_SIO_Params *) &DAP_E17_RX_HDMI, // InHDMI*/
-
+ (const PAF_SIO_Params *) &SAP_D10_RX_HDMI_STEREO, // InHDMIStereo
+ (const PAF_SIO_Params *) &SAP_D10_RX_HDMI, // InHDMI
+ (const PAF_SIO_Params *) &SAP_D10_RX_DIR, // InDigital
+ (const PAF_SIO_Params *) &SAP_D10_RX_ADC_44100HZ, // InAnalog
};
#else // SIMULATE_SIO
#define CUS_SIGMA33_S \
writeDECSourceSelectNone, \
writePA3Await(rb32DECSourceDecode,ob32DECSourceDecodeNone), \
- writePCMChannelConfigurationProgramStereo, \
+ writePCMChannelConfigurationProgramStereoUnknown, \
writePCMScaleVolumeN(0), \
- writeDECASPGearControlNil, \
writeDECChannelMapFrom2(0,1), \
writeIBUnknownTimeoutN(8*1024), \
writeIBScanAtHighSampleRateModeEnable, \
writeIBEmphasisOverrideNo, \
writeIBPrecisionOverride24, \
- writeIBSampleRateOverrideStandard, \
+ writeIBSampleRateOverrideStandard, \
writeIBSioSelectN(DEVINP_HDMI_STEREO), \
wroteDECSourceProgramUnknown, \
writeDECSourceSelectAuto, \
0xcdf0,execPAIInHDMIStereo
-//writeDECSourceSelectPCM
-
+
#pragma DATA_SECTION(cus_sigma33_s0, ".none")
const ACP_Unit cus_sigma33_s0[] = {
0xc900 + 0 - 1,
CUS_SIGMA33_S,
};
-#if 0
-// execPAIInHDMIStereo
-#define CUS_SIGMA33_S \
+// execPAIInHDMI
+#define CUS_SIGMA34_S \
writeDECSourceSelectNone, \
writePA3Await(rb32DECSourceDecode,ob32DECSourceDecodeNone), \
- writePCMChannelConfigurationProgramStereoUnknown, \
+ writePCMChannelConfigurationProgramSurround4_1, \
writePCMScaleVolumeN(0), \
- writeDECASPGearControlNil, \
- writeDECChannelMapFrom2(0,1), \
- writeIBUnknownTimeoutN(8*1024), \
+ writeDECChannelMapFrom16(0,4,1,5,2,6,3,7,-3,-3,-3,-3,-3,-3,-3,-3), \
+ writeIBUnknownTimeoutN(15*1024), \
writeIBScanAtHighSampleRateModeEnable, \
writeIBEmphasisOverrideNo, \
writeIBPrecisionOverride24, \
writeIBSampleRateOverrideStandard, \
- writeIBSioSelectN(DEVINP_HDMI_STEREO), \
+ writeIBSioSelectN(DEVINP_HDMI), \
wroteDECSourceProgramUnknown, \
writeDECSourceSelectAuto, \
- 0xcdf0,execPAIInHDMIStereo
+ 0xcdf0,execPAIInHDMI
-#pragma DATA_SECTION(cus_sigma33_s0, ".none")
-const ACP_Unit cus_sigma33_s0[] = {
+// writeDECChannelMapFrom16(0,4,1,5,2,6,3,7,-3,-3,-3,-3,-3,-3,-3,-3), \
+#pragma DATA_SECTION(cus_sigma34_s0, ".none")
+const ACP_Unit cus_sigma34_s0[] = {
0xc900 + 0 - 1,
- CUS_SIGMA33_S,
+ CUS_SIGMA34_S,
};
-const ACP_Unit cus_sigma33_s[] = {
- 0xc900 + sizeof (cus_sigma33_s0) / 2 - 1,
- CUS_SIGMA33_S,
+const ACP_Unit cus_sigma34_s[] = {
+ 0xc900 + sizeof (cus_sigma34_s0) / 2 - 1,
+ CUS_SIGMA34_S,
+};
+
+// execPAIInDigital
+#define CUS_SIGMA35_S \
+ writeDECSourceSelectNone, \
+ writePA3Await(rb32DECSourceDecode,ob32DECSourceDecodeNone), \
+ writeIBUnknownTimeoutN(2*2048), \
+ writeIBScanAtHighSampleRateModeDisable, \
+ writePCMChannelConfigurationProgramStereoUnknown, \
+ writePCMScaleVolumeN(0), \
+ writeDECChannelMapFrom16(0,1,-3,-3,-3,-3,-3,-3,-3,-3,-3,-3,-3,-3,-3,-3), \
+ writeIBEmphasisOverrideDisable, \
+ writeIBPrecisionDefaultOriginal, \
+ writeIBPrecisionOverrideDetect, \
+ writeIBSampleRateOverrideStandard, \
+ writeIBSioSelectN(DEVINP_DIR), \
+ wroteDECSourceProgramUnknown, \
+ writeDECSourceSelectAuto, \
+ 0xcdf0,execPAIInDigital
+
+#pragma DATA_SECTION(cus_sigma35_s0, ".none")
+const ACP_Unit cus_sigma35_s0[] = {
+ 0xc900 + 0 - 1,
+ CUS_SIGMA35_S,
+};
+
+const ACP_Unit cus_sigma35_s[] = {
+ 0xc900 + sizeof (cus_sigma35_s0) / 2 - 1,
+ CUS_SIGMA35_S,
+};
+
+// execPAIInAnalog
+#define CUS_SIGMA36_S \
+ writeDECSourceSelectNone, \
+ writePA3Await(rb32DECSourceDecode,ob32DECSourceDecodeNone), \
+ writePCMChannelConfigurationProgramSurround4_1, \
+ writePCMScaleVolumeN(2*6), \
+ writeDECChannelMapFrom16(0,4,1,5,2,6,3,7,-3,-3,-3,-3,-3,-3,-3,-3), \
+ writeIBEmphasisOverrideNo, \
+ writeIBPrecisionOverride24, \
+ writeIBSampleRateOverride44100Hz, \
+ writeIBSioSelectN(DEVINP_ADC), \
+ writeDECSourceSelectPCM, \
+ 0xcdf0,execPAIInAnalog
+
+#pragma DATA_SECTION(cus_sigma36_s0, ".none")
+const ACP_Unit cus_sigma36_s0[] = {
+ 0xc900 + 0 - 1,
+ CUS_SIGMA36_S,
+};
+
+const ACP_Unit cus_sigma36_s[] = {
+ 0xc900 + sizeof (cus_sigma36_s0) / 2 - 1,
+ CUS_SIGMA36_S,
};
-#endif
#else // SIMULATE_SIO
// execPAIInDigital
// These values reflect the definitions DEVOUT_* in pa*io_a.h:
NULL, // OutNone
(const PAF_SIO_Params *) &SAP_D10_TX_DAC, // OutAnalog
-#ifdef TEST_MULTICHANNEL
- NULL, //(const PAF_SIO_Params *) &DAP_E17_TX_DIT, // OutDigital
-#else
- (const PAF_SIO_Params *) &SAP_D10_TX_STEREO_DAC, // OutAnalog
-#endif
- NULL, //(const PAF_SIO_Params *) &DAP_E17_TX_DAC_SLAVE, // OutAnalogSlave
- NULL, //(const PAF_SIO_Params *) &DAP_E17_TX_STEREO_DAC_SLAVE, // OutAnalogSlaveStereo
- NULL, //(const PAF_SIO_Params *) &DAP_E17_TX_2STEREO_DAC_SLAVE, // OutAnalogSlave2Stereo
- NULL, // OutRingIO
- NULL, // OutRingIO
- NULL, // OutRingIO
- NULL, //(const PAF_SIO_Params *) &DAP_E17_TX_4TDM, // OutTdm4
- NULL, //(const PAF_SIO_Params *) &DAP_E17_TX_8TDM, // OutTdm8
+ (const PAF_SIO_Params *) &SAP_D10_TX_DAC_SLAVE, // OutAnalogSlave
};
#else // SIMULATE_SIO
rb32DECSourceSelect_3, \
writeDECSourceSelectNone, \
writePA3Await(rb32DECSourceDecode,ob32DECSourceDecodeNone), \
- writeOBSioSelectN(1), \
+ writeOBSioSelectN(DEVOUT_DAC), \
writeENCChannelMapTo16(0,4,1,5,2,6,3,7,-3,-3,-3,-3,-3,-3,-3,-3), \
wb32DECSourceSelect_3, \
0xcdf0,execPAIOutAnalog
CUS_SIGMA49_S,
};
-// -----------------------------------------------------------------------------
-//execPAIOutRingIO16bit
-
-#define CUS_SIGMA57_S \
- rb32DECSourceSelect_3, \
- writeDECSourceSelectNone, \
- writePA3Await(rb32DECSourceDecode,ob32DECSourceDecodeNone), \
- writeOBSioSelectN(DEVOUT_RRIO_16bit), \
- writeENCChannelMapTo16(0,1,-3,-3,-3,-3,-3,-3,-3,-3,-3,-3,-3,-3,-3,-3), \
- wb32DECSourceSelect_3, \
- 0xcdf0,execPAIOutRingIO16bit
-
-#pragma DATA_SECTION(cus_sigma57_s0, ".none")
-const ACP_Unit cus_sigma57_s0[] = {
- 0xc900 + 0 - 1,
- CUS_SIGMA57_S,
-};
-const ACP_Unit cus_sigma57_s[] = {
- 0xc900 + sizeof (cus_sigma57_s0) / 2 - 1,
- CUS_SIGMA57_S,
-};
-// execPAIOutDigital
+// .............................................................................
+// execPAIOutAnalogSlave
#define CUS_SIGMA50_S \
rb32DECSourceSelect_3, \
writeDECSourceSelectNone, \
writePA3Await(rb32DECSourceDecode,ob32DECSourceDecodeNone), \
- writeOBSioSelectN(DEVOUT_DIT), \
- writeENCChannelMapTo16(0,1,-3,-3,-3,-3,-3,-3,-3,-3,-3,-3,-3,-3,-3,-3), \
+ writeOBSioSelectN(DEVOUT_DAC_SLAVE), \
+ writeENCChannelMapTo16(0,4,1,5,2,6,3,7,-3,-3,-3,-3,-3,-3,-3,-3), \
wb32DECSourceSelect_3, \
- 0xcdf0,execPAIOutDigital
+ 0xcdf0,execPAIOutAnalogSlave
#pragma DATA_SECTION(cus_sigma50_s0, ".none")
const ACP_Unit cus_sigma50_s0[] = {
CUS_SIGMA50_S,
};
-// .............................................................................
-// execPAIOutAnalogSlave
-#define CUS_SIGMA56_S \
- rb32DECSourceSelect_3, \
- writeDECSourceSelectNone, \
- writePA3Await(rb32DECSourceDecode,ob32DECSourceDecodeNone), \
- writeOBSioSelectN(DEVOUT_DAC_SLAVE), \
- writeENCChannelMapTo16(3,7,2,6,1,5,0,4,-3,-3,-3,-3,-3,-3,-3,-3), \
- wb32DECSourceSelect_3, \
- 0xcdf0,execPAIOutAnalogSlave
-
-#pragma DATA_SECTION(cus_sigma56_s0, ".none")
-const ACP_Unit cus_sigma56_s0[] = {
- 0xc900 + 0 - 1,
- CUS_SIGMA56_S,
-};
-
-const ACP_Unit cus_sigma56_s[] = {
- 0xc900 + sizeof (cus_sigma56_s0) / 2 - 1,
- CUS_SIGMA56_S,
-};
-
-// execPAIOutAnalogSlaveStereo
-#define CUS_SIGMA58_S \
- rb32DECSourceSelect_3, \
- writeDECSourceSelectNone, \
- writePA3Await(rb32DECSourceDecode,ob32DECSourceDecodeNone), \
- writeOBSioSelectN(DEVOUT_DAC_STEREO), \
- writeENCChannelMapTo16(0,1,2,3,4,5,6,7,-3,-3,-3,-3,-3,-3,-3,-3), \
- wb32DECSourceSelect_3, \
- 0xcdf0,execPAIOutAnalogSlaveStereo
-
-#pragma DATA_SECTION(cus_sigma58_s0, ".none")
-const ACP_Unit cus_sigma58_s0[] = {
- 0xc900 + 0 - 1,
- CUS_SIGMA58_S,
-};
-
-const ACP_Unit cus_sigma58_s[] = {
- 0xc900 + sizeof (cus_sigma58_s0) / 2 - 1,
- CUS_SIGMA58_S,
-};
-
-// execPAIOutAnalogSlave2Stereo
-#define CUS_SIGMA59_S \
- rb32DECSourceSelect_3, \
- writeDECSourceSelectNone, \
- writePA3Await(rb32DECSourceDecode,ob32DECSourceDecodeNone), \
- writeOBSioSelectN(DEVOUT_DAC_2STEREO), \
- writeENCChannelMapTo16(1,3,0,2,5,7,4,6,-3,-3,-3,-3,-3,-3,-3,-3), \
- wb32DECSourceSelect_3, \
- 0xcdf0,execPAIOutAnalogSlave2Stereo
-
-#pragma DATA_SECTION(cus_sigma59_s0, ".none")
-const ACP_Unit cus_sigma59_s0[] = {
- 0xc900 + 0 - 1,
- CUS_SIGMA59_S,
-};
-
-const ACP_Unit cus_sigma59_s[] = {
- 0xc900 + sizeof (cus_sigma59_s0) / 2 - 1,
- CUS_SIGMA59_S,
-};
-
-// .............................................................................
-// execPAIOutTdm4
-#define CUS_SIGMA60_S \
- rb32DECSourceSelect_3, \
- writeDECSourceSelectNone, \
- writePA3Await(rb32DECSourceDecode,ob32DECSourceDecodeNone), \
- writeOBSioSelectN(DEVOUT_4TDM), \
- writeENCChannelMapTo16(0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15), \
- wb32DECSourceSelect_3, \
- 0xcdf0,execPAIOutTdm4
-
-#pragma DATA_SECTION(cus_sigma60_s0, ".none")
-const ACP_Unit cus_sigma60_s0[] = {
- 0xc900 + 0 - 1,
- CUS_SIGMA60_S,
-};
-
-const ACP_Unit cus_sigma60_s[] = {
- 0xc900 + sizeof(cus_sigma60_s0)/2 - 1,
- CUS_SIGMA60_S,
-};
-// -----------------------------------------------------------------------------
-// .............................................................................
-// execPAIOutTdm8
-#define CUS_SIGMA61_S \
- rb32DECSourceSelect_3, \
- writeDECSourceSelectNone, \
- writePA3Await(rb32DECSourceDecode,ob32DECSourceDecodeNone), \
- writeOBSioSelectN(DEVOUT_8TDM), \
- writeENCChannelMapTo32(0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31), \
- wb32DECSourceSelect_3, \
- 0xcdf0,execPAIOutTdm8
-
-#pragma DATA_SECTION(cus_sigma61_s0, ".none")
-const ACP_Unit cus_sigma61_s0[] = {
- 0xc900 + 0 - 1,
- CUS_SIGMA61_S,
-};
-
-const ACP_Unit cus_sigma61_s[] = {
- 0xc900 + sizeof(cus_sigma61_s0)/2 - 1,
- CUS_SIGMA61_S,
-};
-// -----------------------------------------------------------------------------
-
-
-
-// -----------------------------------------------------------------------------
-//execPAIOutRingIO24bit
-
-#define CUS_SIGMA63_S \
- rb32DECSourceSelect_3, \
- writeDECSourceSelectNone, \
- writePA3Await(rb32DECSourceDecode,ob32DECSourceDecodeNone), \
- writeOBSioSelectN(DEVOUT_RRIO_24bit), \
- writeENCChannelMapTo16(0,1,-3,-3,-3,-3,-3,-3,-3,-3,-3,-3,-3,-3,-3,-3), \
- wb32DECSourceSelect_3, \
- 0xcdf0,execPAIOutRingIO24bit
-
-#pragma DATA_SECTION(cus_sigma63_s0, ".none")
-const ACP_Unit cus_sigma63_s0[] = {
- 0xc900 + 0 - 1,
- CUS_SIGMA63_S,
-};
-
-const ACP_Unit cus_sigma63_s[] = {
- 0xc900 + sizeof (cus_sigma63_s0) / 2 - 1,
- CUS_SIGMA63_S,
-};
// EOF
diff --git a/procsdk_audio_x_xx_xx_xx/test_dsp/application/main.c b/procsdk_audio_x_xx_xx_xx/test_dsp/application/main.c
index 31aa93544915f4daa4bc18b1377e8453b38582a5..d716be7f535827ca5ab2751b13b477efacf2e1df 100644 (file)
#ifndef SIMULATE_SIO
extern Void initDev2(Void);
-
-DacConfig dacCfg =
-{
- DAC_AMUTE_CTRL_SCKI_LOST, /* Amute event */
- 0, /* Amute control */
- DAC_SAMPLING_MODE_SINGLE_RATE, /* Sampling mode */
- DAC_DATA_FORMAT_I2S, /* Data format */
- 0, /* Soft mute control */
- DAC_ATTENUATION_WIDE_RANGE, /* Attenuation mode */
- DAC_DEEMP_44KHZ, /* De-emph control */
- 100 /* Volume */
-};
-/* ADC default configuration parameters */
-AdcConfig adcCfg =
-{
- 90, /* ADC gain */
- ADC_INL_SE_VINL1, /* Left input mux for ADC1L */
- ADC_INL_SE_VINL2, /* Left input mux for ADC2L */
- ADC_INR_SE_VINR1, /* Right input mux for ADC1R */
- ADC_INR_SE_VINR2, /* Right input mux for ADC2R */
- ADC_RX_WLEN_24BIT, /* ADC word length */
- ADC_DATA_FORMAT_I2S, /* ADC data format */
- 0
-};
-
-void setAudioDacConfig(void)
-{
- Platform_STATUS status;
-
- /* Initialize Audio DAC module */
- status = audioDacConfig(DAC_DEVICE_ALL, &dacCfg);
- if(status != Platform_EOK)
- {
- IFPRINT(platform_write("Audio DAC Configuration Failed!\n"));
- exit(1);
- }
-}
#endif // SIMULATE_SIO
//testRet(1);
}
- Log_info0("Platform audio init");
- /* Initialize common audio configurations */
- pfStatus = platformAudioInit();
- if(pfStatus != Platform_EOK)
- {
- //System_printf("Audio Init Failed!\n");
- Log_info0("Audio Init Failed!");
- //testRet(1);
- }
-#ifdef INCLUDE_HDMI_CONFIG
- Log_info0("Configure HDMI");
- /* Initialize the HDMI Card */
- pfStatus = audioHDMIConfig();
- if(pfStatus != Platform_EOK)
- {
- //System_printf("Audio Init Failed!\n");
- Log_info0("Audio Init Failed!");
- //testRet(1);
- }
-#endif
-
- /* Select DIR as audio clock source */
- Log_info0("Select audio clock source");
-#ifdef SPDIF
- pfStatus = platformAudioSelectClkSrc(AUDIO_CLK_SRC_DIR);
-#else
- pfStatus = platformAudioSelectClkSrc(AUDIO_CLK_SRC_I2S);
-#endif
- if(pfStatus != Platform_EOK)
- {
- //System_printf("Audio Clock Selection Failed!\n");
- Log_info0("Audio Clock Selection Failed!");
- }
-
Log_info0("initDev2");
initDev2();
#endif // SIMULATE_SIO
diff --git a/procsdk_audio_x_xx_xx_xx/test_dsp/mob/mob.c b/procsdk_audio_x_xx_xx_xx/test_dsp/mob/mob.c
index d9df6cb0c1cfadb2b8330ccc82a42f2259bd835c..598fbb09e478595aadd0a097ba3b49bc8c7758bd 100644 (file)
return status;
// specify minimal transfer size while still maintaining channel alignment
- xferSize = numChan * wordSize * 1;
+ //xferSize = numChan * wordSize * 1;
+ xferSize = numChan * wordSize * 4; // GJ: Experiment with longer startup transfers
pChildFrame = Queue_get (&((SIO2_Handle)pChild)->framelist);
if (pChildFrame == (DEV2_Frame *)&((SIO2_Handle)pChild)->framelist)
diff --git a/procsdk_audio_x_xx_xx_xx/test_dsp/sap/audio_dc_cfg.c b/procsdk_audio_x_xx_xx_xx/test_dsp/sap/audio_dc_cfg.c
index b911dab8221ad50d3c00ab7bfa93b56963c62d31..b00318e16033a4a04e65de4fd3eaa690ea5d25e3 100644 (file)
else
{
IFPRINT(platform_write("audioDirConfig : Error in Reading FSOUT status \n"));
+ status = Platform_EFAIL;
}
return (status);
else
ret_val = 0;
- /*ret_val2=alpha_i2c_write(HSDIO_GET_AUDIO_OUTPUT_FREQ);
- if(!ret_val2) EVMC6747_I2C_read(HSR4_I2C_ADDR,&length,1);
- if(!ret_val2) EVMC6747_I2C_read(HSR4_I2C_ADDR,&data[0],length);
- if(!ret_val2) ret_val2= data[2]; // indicates sample rate
- else
- ret_val2 = 0;*/
-
-
-#if 0
- //unsigned char cmd[]={4,0x01,0xC2,0x00,0x3A};
- //ret_val=EVMC6747_I2C_write( HSR4_I2C_ADDR, cmd, cmd[0]+1 );
- //ret_val=EVMC6747_I2C_read( HSR4_I2C_ADDR, data,5 );
- //if(!ret_val) ret_val= data[3]; // indicates sample rate
- //else
- //ret_val = 0;
-#endif
-
return ret_val;
}
diff --git a/procsdk_audio_x_xx_xx_xx/test_dsp/sap/sap.c b/procsdk_audio_x_xx_xx_xx/test_dsp/sap/sap.c
index 2238faaec513b0220686a4c7c63d4637e2a00919..719382b50e4460b0d6a8f78cb16705b28907caf5 100644 (file)
#include <stdio.h>
#include <string.h> //memset
+#include <xdc/std.h>
+
#include "sap.h"
#include <ti/sdo/edma3/drv/edma3_drv.h>
// global allocated in bios_edma3_drv_sample_init.c
extern EDMA3_DRV_Handle hEdma0;
+extern EDMA3_DRV_Handle hEdma1;
int gStartError;
int gIsrCnt;
int gIsrNotRunCnt;
int gisrOutput;
+typedef xdc_Short MdInt;
+
+void swapHdmi(Ptr, int);
+
+#define TEST_MULTICHANNEL
+
+
#ifdef TEST_MULTICHANNEL
#define SAP_UNDER_LEN 4
+//#define SAP_UNDER_LEN 1024 // GJ: experiment
#else
#define SAP_UNDER_LEN 1024
#endif
SAP_DeviceExtension *pDevExt = (SAP_DeviceExtension *)device->object;
const SAP_Params *pParams;
Int result = SIO2_OK;
-
+ EDMA3_DRV_Handle hEdma;
//TRACE_GEN((&TR_MOD, "SAP_ctrl.%d (0x%x) code = 0x%x", __LINE__, device, code));
switch (code) {
if (pDevExt->runState)
return SIO2_EBUSY;
+ if (pDevExt->pParams == NULL)
+ return SIO2_EINVAL;
+
+ pParams = pDevExt->pParams;
+
+ if (pParams->sio.moduleNum == 0)
+ hEdma = hEdma0;
+ else if (pParams->sio.moduleNum == 1 || pParams->sio.moduleNum == 2)
+ hEdma = hEdma1;
if (pDevExt->activeEdma != EDMA_HINV) {
- EDMA3_DRV_freeChannel (hEdma0, pDevExt->activeEdma);
+ EDMA3_DRV_freeChannel (hEdma, pDevExt->activeEdma);
pDevExt->activeEdma = EDMA_HINV;
}
// 1. Here we are intentionally not using SIO_Idle() and
// leaving the Tx clock running. We need this to avoid DAC noise,
// as well as provide a DIT clock when using digital output.
- if (device->mode != DEV2_OUTPUT)
+ if (device->mode != DEV2_OUTPUT || pDevExt->pParams == NULL)
return SIO2_EINVAL;
pParams = pDevExt->pParams;
- if (pParams == NULL)
- return SIO2_OK;
+
+ if (pParams->sio.moduleNum == 0)
+ hEdma = hEdma0;
+ else if (pParams->sio.moduleNum == 1 || pParams->sio.moduleNum == 2)
+ hEdma = hEdma1;
result = SAP_FTABLE_shutdown (device);
if (result)
if (pDevExt->activeEdma != EDMA_HINV) {
//EDMA3_DRV_disableTransfer (hEdma0, pDevExt->activeEdma, EDMA3_DRV_TRIG_MODE_EVENT);
//if(*((unsigned int *)0x02701000) & 0x01000000) *((unsigned int *)0x02701008) = 0x01000000; //Clear pending even in bit 24! //DJDBG
- EDMA3_DRV_enableTransfer (hEdma0, pDevExt->activeEdma, EDMA3_DRV_TRIG_MODE_EVENT);
+ EDMA3_DRV_enableTransfer (hEdma, pDevExt->activeEdma, EDMA3_DRV_TRIG_MODE_EVENT);
}
#endif
//TRACE_GEN((&TR_MOD, "SAP_ctrl.%d: (0x%x) errorState = PAF_SIO_ERROR_IDLE_STAGE1 0x%x.", __LINE__, device, PAF_SIO_ERROR_IDLE_STAGE1));
{
SAP_DeviceExtension *pDevExt = (SAP_DeviceExtension *)device->object;
Int result = SIO2_OK;
+ EDMA3_DRV_Handle hEdma;
// do nothing if already idled or unattached
if ((!pDevExt->runState) || (pDevExt->pParams == NULL))
return result;
+ if (pDevExt->pParams->sio.moduleNum == 0)
+ hEdma = hEdma0;
+ else if (pDevExt->pParams->sio.moduleNum == 1 || pDevExt->pParams->sio.moduleNum == 2)
+ hEdma = hEdma1;
+
// reset serial port -- stop generating sync events
result = SAP_PORT_FTABLE_reset (device);
if (result)
// disable interrupts and EDMA servicing
if (pDevExt->activeEdma != EDMA_HINV)
- EDMA3_DRV_disableTransfer (hEdma0, pDevExt->activeEdma, EDMA3_DRV_TRIG_MODE_EVENT);
+ EDMA3_DRV_disableTransfer (hEdma, pDevExt->activeEdma, EDMA3_DRV_TRIG_MODE_EVENT);
pDevExt->numQueued = 0;
SAP_DeviceExtension *pDevExt = (SAP_DeviceExtension *)device->object;
DEV2_Frame *pFrame;
int result;
+ EDMA3_DRV_Handle hEdma;
//TRACE_GEN((&TR_MOD, "SAP_start.%d (0x%x)", __LINE__, device));
// inidicate this xfer did not use param entry - just the active one
pFrame->misc = NULL;
+ if (pDevExt->pParams->sio.moduleNum == 0)
+ hEdma = hEdma0;
+ else if (pDevExt->pParams->sio.moduleNum == 1 || pDevExt->pParams->sio.moduleNum == 2)
+ hEdma = hEdma1;
// non-atomic functions since not running yet.
Queue_enqueue (Queue_handle(&pDevExt->xferQue), (Queue_Elem *)pFrame);
pDevExt->shutDown = 0;
//Log_info0 ("SAP_start runState=1 & ENABLE TRANSFERS");
// enable interrupts and event servicing for this channel
- EDMA3_DRV_enableTransfer (hEdma0, pDevExt->activeEdma, EDMA3_DRV_TRIG_MODE_EVENT);
+ EDMA3_DRV_enableTransfer (hEdma, pDevExt->activeEdma, EDMA3_DRV_TRIG_MODE_EVENT);
// enable peripheral
result = SAP_PORT_FTABLE_enable (device);
// if here then xferQue has more than one element so ok to use tail
// last scheduled transfer must be queue->prev
DEV2_Frame *tail = (DEV2_Frame *) Queue_prev ((Queue_Elem *)&pDevExt->xferQue);
- parentEdma = ((SAP_EDMA_Param *) tail->misc)->hEdma;
+ parentEdma = ((SAP_EDMA_Param *) tail->misc)->hEdmaParam;
}
// get frame and parameter table to use; ints off => non-atomic OK
/* if (pFrame->addr == NULL)
SW_BREAKPOINT; */
- if (pParam->hEdma == NULL)
+ if (pParam->hEdmaParam == NULL)
Log_info0("SAP_issue: hEdma value is NULL");
// set misc argument to pParam so get enqueue later
pFrame->misc = (Arg) pParam;
// increment count
pDevExt->numQueued += 1;
- result = SAP_EDMA_setupXfer (device, pParam->hEdma, parentEdma, pDevExt->errorEdma, pFrame);
+ result = SAP_EDMA_setupXfer (device, pParam->hEdmaParam, parentEdma, pDevExt->errorEdma, pFrame);
//Log_info4("SAP_issue.%d, EDMA_setupXfer: Target EDMA: 0x%x, Parent Edma: 0x%x Error Edma: 0x%x",
// __LINE__, pParam->hEdma, parentEdma, pDevExt->errorEdma);
// -----------------------------------------------------------------------------
+void swapHdmi(Ptr Input, int size)
+{
+
+ MdInt L0, L1, L2, L3, R0, R1, R2, R3 = 0;
+ MdInt *p1, *p2;
+ int i=0;
+
+ for (i=0; i< size; i+=16)
+ {
+ p1 = (MdInt *)&Input[i];
+ p2 = p1;
+
+ L0 = *p1++;
+ L1 = *p1++;
+ L2 = *p1++;
+ L3 = *p1++;
+ R0 = *p1++;
+ R1 = *p1++;
+ R2 = *p1++;
+ R3 = *p1++;
+
+ *p2++ = L0;
+ *p2++ = R0;
+ *p2++ = L1;
+ *p2++ = R1;
+ *p2++ = L2;
+ *p2++ = R2;
+ *p2++ = L3;
+ *p2++ = R3;
+
+ }
+
+ Log_info3("SAP: Exiting swapHdmi with Frame->Addr: 0x%x, p1->addr: 0x%x, p2->addr: 0x%x ", (MdInt *)Input, p1, p2);
+
+ /**p2++ = 0xF872;
+ *p2++ = 0x4E1F;
+ *p2++ = 0x0016;
+ *p2++ = 0xEFF0;
+ *p2++ = 0x079E;
+ *p2++ = 0x0003;
+ *p2++ = 0x8401;
+ *p2++ = 0x0101; */
+
+ return;
+}
+
Int SAP_reclaim (DEV2_Handle device)
{
SAP_DeviceExtension *pDevExt = (SAP_DeviceExtension *)(device->object);
- Int result;
+ Int result, i, oldMask;
#ifdef SAP_CACHE_SUPPORT
DEV2_Frame *pFrame;
#endif
pFrame = Queue_head (device->fromdevice);
Log_info2("SAP: Inside SAP_Reclaim with From Device Frame->Addr: 0x%x and Frame->Size: %d", pFrame->addr, pFrame->size);
if ((device->mode == DEV2_INPUT) && (pFrame->addr != NULL))
+ {
Cache_inv (pFrame->addr, pFrame->size, Cache_Type_ALL, TRUE);
+
+ if(pDevExt->edmaWordSize == 2 && pDevExt->numSers == 4)
+ {
+ //note: size here is in # of bytes, so incrementing by 4X32b words ( or 8X16b)
+ //for(i=0; i<(pFrame->size)/(4*4); i+=16)
+ //{
+ oldMask = Hwi_disable ();
+ swapHdmi(pFrame->addr, pFrame->size);
+ Hwi_restore(oldMask);
+ //}
+ }
+
+ }
+
#endif
/*if ((device->mode == DEV2_OUTPUT) && (pFrame->addr == NULL))
SW_BREAKPOINT; */
return SIO2_OK;
} // SAP_reclaim
+
// -----------------------------------------------------------------------------
Int SAP_open (DEV2_Handle device, String name)
{
SAP_DeviceExtension *pDevExt;
DEV2_Device *entry;
- EDMA3_DRV_Result edmaResult;
- Uint32 reqTcc;
- Int oldMask, result,i, Que_num;
+ Int oldMask, result;
Error_Block eb;
//TRACE_GEN((&TR_MOD, "SAP_open.%d (0x%x)", __LINE__, device));
if ((device->mode != DEV2_INPUT) && (device->mode != DEV2_OUTPUT))
return SIO2_EMODE;
- if (device->mode == DEV2_OUTPUT)
- {
- Que_num = 1;
- Log_info0("In SAP Open for Output");
- }
- else
- Que_num = 0;
-
-
// allocate memory for device extension
device->object = NULL;
pDevExt = (SAP_DeviceExtension *) Memory_alloc (device->bufSeg, (sizeof(SAP_DeviceExtension)+3)/4*4, 4, &eb);
pDevExt->firstTCC = 0;
pDevExt->optLevel = 0;
pDevExt->numParamSetup = 0;
+ pDevExt->numEdmaParams = 4;
// use dev match to fetch function table pointer for SAP
DEV2_match(SAP_NAME, &entry);
pDevExt->deviceNum = sapDrv.numDevices++;
Hwi_restore (oldMask);
- // DMA init
- /*result = SAP_DMA_FTABLE_open (device);
- if (result)
- {
- //TRACE_TERSE((&TR_MOD, "%s.%d: SAP_DMA_FTABLE_open returned %d.\n", __FUNCTION__, __LINE__, result));
- return result;
- }*/
-
- pDevExt->numEdmaParams = 4;
-
- for (i=0; i < pDevExt->numEdmaParams; i++) {
- reqTcc = EDMA3_DRV_TCC_ANY;
- pDevExt->edmaParams[i].hEdma = EDMA3_DRV_LINK_CHANNEL;
- edmaResult = EDMA3_DRV_requestChannel (
- hEdma0,
- &pDevExt->edmaParams[i].hEdma,
- &reqTcc,
- (EDMA3_RM_EventQueue) Que_num,
- SAP_isrCallback,
- (void *) device);
- if (edmaResult != EDMA3_DRV_SOK)
- return SIO2_EALLOC;
-
- //not running => can use non-atomic functions
- Queue_enqueue (Queue_handle(&pDevExt->paramQue), (Queue_Elem *)&pDevExt->edmaParams[i]);
-
- /*if (pDevExt->edmaParams[i].hEdma == NULL)
- gStartError++; */
- }
-
- reqTcc = EDMA3_DRV_TCC_ANY;
- pDevExt->errorEdma = EDMA3_DRV_LINK_CHANNEL;
- edmaResult = EDMA3_DRV_requestChannel (
- hEdma0,
- &pDevExt->errorEdma,
- &reqTcc,
- (EDMA3_RM_EventQueue)Que_num,
- SAP_isrCallback,
- (void *) device);
- if (edmaResult != EDMA3_DRV_SOK)
- return SIO2_EALLOC;
-
// PORT init
result = SAP_PORT_FTABLE_open (device);
if (result)
Int SAP_config (DEV2_Handle device, const SAP_Params *pParams)
{
SAP_DeviceExtension *pDevExt = (SAP_DeviceExtension *)device->object;
- Int result;
+ Int result, Que_num, i;
EDMA3_DRV_Result edmaResult;
-
+ Uint32 reqTcc;
+ EDMA3_DRV_Handle hEdma;
Log_info2("SAP_config.%d (0x%x)", __LINE__, device);
// cannot configure if transfer started
// .............................................................................
// EDMA configuration
+ // DA10x McASP0 Specific
+ if (pParams->sio.moduleNum == 0)
+ {
+ hEdma = hEdma0;
+ if (device->mode == DEV2_INPUT)
+ {
+ Que_num = 0;
+ pDevExt->activeEdma = CSL_EDMACC_0_McASP_0_REVT;
+ }
+ else
+ {
+ Que_num = 1;
+ pDevExt->activeEdma = CSL_EDMACC_0_McASP_0_XEVT;
+ }
+ }
+ // DA10x McASP1 Specific
+ else if (pParams->sio.moduleNum == 1)
+ {
+ hEdma = hEdma1;
+ if (device->mode == DEV2_INPUT)
+ {
+ Que_num = 0;
+ pDevExt->activeEdma = CSL_EDMACC_1_McASP_1_REVT;
+ }
+ else
+ {
+ Que_num = 1;
+ pDevExt->activeEdma = CSL_EDMACC_1_McASP_1_XEVT;
+ }
+ }
+ // DA10x McASP2 Specific
+ else if (pParams->sio.moduleNum == 2)
+ {
+ hEdma = hEdma1;
+ if (device->mode == DEV2_INPUT)
+ {
+ Que_num = 0;
+ pDevExt->activeEdma = CSL_EDMACC_1_McASP_2_REVT;
+ }
+ else
+ {
+ Que_num = 1;
+ pDevExt->activeEdma = CSL_EDMACC_1_McASP_2_XEVT;
+ }
+ }
+
+
+ for (i=0; i < pDevExt->numEdmaParams; i++) {
+
+ reqTcc = EDMA3_DRV_TCC_ANY;
+ pDevExt->edmaParams[i].hEdmaParam = EDMA3_DRV_LINK_CHANNEL;
+ edmaResult = EDMA3_DRV_requestChannel (
+ hEdma,
+ &pDevExt->edmaParams[i].hEdmaParam,
+ &reqTcc,
+ (EDMA3_RM_EventQueue) Que_num,
+ SAP_isrCallback,
+ (void *) device);
+
+ if (edmaResult != EDMA3_DRV_SOK)
+ return SIO2_EALLOC;
+
+ //not running => can use non-atomic functions
+ Queue_enqueue (Queue_handle(&pDevExt->paramQue), (Queue_Elem *)&pDevExt->edmaParams[i]);
+
+ }
+
+ reqTcc = EDMA3_DRV_TCC_ANY;
+ pDevExt->errorEdma = EDMA3_DRV_LINK_CHANNEL;
+ edmaResult = EDMA3_DRV_requestChannel (
+ hEdma,
+ &pDevExt->errorEdma,
+ &reqTcc,
+ (EDMA3_RM_EventQueue)Que_num,
+ SAP_isrCallback,
+ (void *) device);
+ if (edmaResult != EDMA3_DRV_SOK)
+ return SIO2_EALLOC;
+
// allocate edma channel -- also disable and clear the interrupt
- if (device->mode == DEV2_INPUT)
- {
- pDevExt->activeEdma = CSL_EDMACC_0_McASP_0_REVT;
- }
- else
- {
- pDevExt->activeEdma = CSL_EDMACC_0_McASP_0_XEVT;
- }
+
pDevExt->firstTCC = pDevExt->activeEdma ;
edmaResult = EDMA3_DRV_requestChannel (
- hEdma0,
+ hEdma,
&pDevExt->activeEdma,
&pDevExt->firstTCC,
(EDMA3_RM_EventQueue) 0,
SIO2_Handle stream = (SIO2_Handle) device;
DEV2_Frame *pFrame;
Int result,i;
-
+ EDMA3_DRV_Handle hEdma;
//TRACE_GEN((&TR_MOD, "SAP_shutdown.%d (0x%x)", __LINE__, device));
if (pDevExt->shutDown)
return SIO2_EBADIO;
if (pDevExt->pParams == NULL)
- return SIO2_OK;
+ return SIO2_EINVAL;
+ if (pDevExt->pParams->sio.moduleNum == 0)
+ hEdma = hEdma0;
+ else if (pDevExt->pParams->sio.moduleNum == 1 || pDevExt->pParams->sio.moduleNum == 2)
+ hEdma = hEdma1;
if (pDevExt->activeEdma != EDMA_HINV)
- EDMA3_DRV_disableTransfer (hEdma0, pDevExt->activeEdma, EDMA3_DRV_TRIG_MODE_EVENT);
+ EDMA3_DRV_disableTransfer (hEdma, pDevExt->activeEdma, EDMA3_DRV_TRIG_MODE_EVENT);
// reset queues
while (!Queue_empty(device->todevice)) {
pDevExt->numQueued = 0;
// make sure active is linked to error
- EDMA3_DRV_linkChannel (hEdma0, pDevExt->activeEdma, pDevExt->errorEdma);
+ EDMA3_DRV_linkChannel (hEdma, pDevExt->activeEdma, pDevExt->errorEdma);
// think this is better (from SIO_idle for standard model )
// refill frame list -- so user needn't call reclaim, which may cause Rx underrun.
SAP_DeviceExtension *pDevExt;
DEV2_Frame *pFrame;
unsigned int opt;
-
+ EDMA3_DRV_Handle hEdma;
// could be here after Tx idle/overrun and this is the interrupt
// for the last occuring error transfer so there is no transfer
device = (DEV2_Handle) context;
pDevExt = (SAP_DeviceExtension *)(device->object);
+ if (pDevExt->pParams == NULL)
+ return SIO2_EINVAL;
+
+ if (pDevExt->pParams->sio.moduleNum == 0)
+ hEdma = hEdma0;
+ else if (pDevExt->pParams->sio.moduleNum == 1 || pDevExt->pParams->sio.moduleNum == 2)
+ hEdma = hEdma1;
if ((pDevExt->runState == 1) && !pDevExt->errorState) {
// if here then an interrupt occured due to errorEdma or valid
// determine if currently transferring buffer is valid based on interrupt enable bit
// only valid transfers will generate interrupts
- EDMA3_DRV_getPaRAMEntry (hEdma0, pDevExt->activeEdma, EDMA3_DRV_PARAM_ENTRY_OPT, &opt);
+ EDMA3_DRV_getPaRAMEntry (hEdma, pDevExt->activeEdma, EDMA3_DRV_PARAM_ENTRY_OPT, &opt);
if (!(opt & EDMA3_DRV_OPT_TCINTEN_SET_MASK (1)))
{
Int SAP_EDMA_setupXfer (DEV2_Handle device, XDAS_UInt32 targetEdma, XDAS_UInt32 parentEdma, XDAS_UInt32 childEdma, DEV2_Frame *pFrame)
{
+ EDMA3_DRV_Handle hEdma;
SAP_DeviceExtension *pDevExt = (SAP_DeviceExtension *)device->object;
// int mcbspNum = pDevExt->pParams->sio.moduleNum;
- //Log_info5("Entered SAP_EDMA_setupXfer(mode=%d) for Target: 0x%x, Parent: 0x%x, Child: 0x%x. gIsrOutput: %d\n", device->mode, targetEdma, parentEdma, childEdma, gisrOutput); //DJDBG
+ if (pDevExt->pParams == NULL)
+ return SIO2_EINVAL;
+ if (pDevExt->pParams->sio.moduleNum == 0)
+ hEdma = hEdma0;
+ else if (pDevExt->pParams->sio.moduleNum == 1 || pDevExt->pParams->sio.moduleNum == 2)
+ hEdma = hEdma1;
// TODO: shouldn't this just be tcc interrupt disable?
// at least until linkage phase...
@@ -1188,7 +1322,7 @@ Int SAP_EDMA_setupXfer (DEV2_Handle device, XDAS_UInt32 targetEdma, XDAS_UInt32
SAP_DMA_FTABLE_setupParam (device, targetEdma, childEdma, pFrame->addr, pFrame->size);
if (parentEdma != EDMA_HINV)
- EDMA3_DRV_linkChannel (hEdma0, parentEdma, targetEdma);
+ EDMA3_DRV_linkChannel (hEdma, parentEdma, targetEdma);
Hwi_restore (key); //DJDBG
@@ -1202,9 +1336,16 @@ Int SAP_EDMA_setupXfer (DEV2_Handle device, XDAS_UInt32 targetEdma, XDAS_UInt32
Int SAP_EDMA_setupParam (DEV2_Handle device, XDAS_UInt32 targetEdma, XDAS_UInt32 childEdma, unsigned int addr, unsigned int size)
{
SAP_DeviceExtension *pDevExt = (SAP_DeviceExtension *)device->object;
-
+ EDMA3_DRV_Handle hEdma;
EDMA3_DRV_PaRAMRegs edmaConfig;
+ if (pDevExt->pParams == NULL)
+ return SIO2_EINVAL;
+
+ if (pDevExt->pParams->sio.moduleNum == 0)
+ hEdma = hEdma0;
+ else if (pDevExt->pParams->sio.moduleNum == 1 || pDevExt->pParams->sio.moduleNum == 2)
+ hEdma = hEdma1;
MCASP_Handle hPort = sapMcaspDrv.hPort[pDevExt->pParams->sio.moduleNum];
volatile Uint32 *base = (volatile Uint32 *)(hPort->baseAddr);
@@ -1239,22 +1380,13 @@ Int SAP_EDMA_setupParam (DEV2_Handle device, XDAS_UInt32 targetEdma, XDAS_UInt32
edmaConfig.opt |= EDMA3_DRV_OPT_TCC_SET_MASK (pDevExt->firstTCC);
}
-#if 0
- // cCnt blocks of bCnt words with word size of aCnt bytes
- // since cCnt is 1 no bCntReload
- edmaConfig.aCnt = pDevExt->edmaWordSize;
- edmaConfig.bCnt = size/pDevExt->edmaWordSize;
- edmaConfig.cCnt = 1;
- edmaConfig.bCntReload = 0;
-#else
- //edmaConfig.aCnt = pDevExt->edmaWordSize;
edmaConfig.aCnt = 4;
edmaConfig.bCnt = pDevExt->numSers;
edmaConfig.cCnt = size/(edmaConfig.aCnt * edmaConfig.bCnt);
edmaConfig.bCntReload = edmaConfig.bCnt;
-#endif
+
// handle direction specific requirements
if (device->mode == DEV2_INPUT) {
edmaConfig.srcBIdx = 0;
@@ -1291,7 +1423,6 @@ Int SAP_EDMA_setupParam (DEV2_Handle device, XDAS_UInt32 targetEdma, XDAS_UInt32
//edmaConfig.cCnt = (SAP_UNDER_LEN * sizeof(int))/(edmaConfig.aCnt * edmaConfig.bCnt); //DJDBG
edmaConfig.cCnt = 512; //DJDBG, if underrun have frame of silence
#endif
- Log_info2("SAP_setupParam TX, null transfer size: 0x%x addr: 0x%x", edmaConfig.cCnt, edmaConfig.srcAddr);
}
}
edmaConfig.srcAddr = (unsigned int) getGlobalAddr(edmaConfig.srcAddr);
@@ -1299,11 +1430,11 @@ Int SAP_EDMA_setupParam (DEV2_Handle device, XDAS_UInt32 targetEdma, XDAS_UInt32
//Log_info3("SAP: Inside SAP_EDMA_setupParam with targetEdma = 0x%x linked to childEdma = 0x%x & dest-addr: 0x%x", targetEdma, childEdma, edmaConfig.destAddr);
- EDMA3_DRV_setPaRAM (hEdma0, targetEdma, &edmaConfig);
+ EDMA3_DRV_setPaRAM (hEdma, targetEdma, &edmaConfig);
// link child xfer
if (childEdma != EDMA_HINV)
- EDMA3_DRV_linkChannel (hEdma0, targetEdma, childEdma);
+ EDMA3_DRV_linkChannel (hEdma, targetEdma, childEdma);
return SIO2_OK;
} //SAP_setupParam
diff --git a/procsdk_audio_x_xx_xx_xx/test_dsp/sap/sap.h b/procsdk_audio_x_xx_xx_xx/test_dsp/sap/sap.h
index ad70ab641db085698e54c46f971f9f60776519ed..afc63996843e83bd8e4e1be134926225222934f0 100644 (file)
typedef struct SAP_EDMA_Param
{
Queue_Elem link; // queue link
- XDAS_UInt32 hEdma; // parameter table handle
+ XDAS_UInt32 hEdmaParam; // parameter table handle
} SAP_EDMA_Param;
// .............................................................................
diff --git a/procsdk_audio_x_xx_xx_xx/test_dsp/sap/sap_csl_mcasphal.h b/procsdk_audio_x_xx_xx_xx/test_dsp/sap/sap_csl_mcasphal.h
index e9806c1c922a9153a4a9aca94e76745b66f5397e..81d591c614bb43e036d704206cec1c4185933c9a 100644 (file)
#define _MCASP_CHANNEL_CNT 16
#define _MCASP_PORT_CNT 3
-#if (PAF_DEVICE&0xFF000000) == 0xDA000000 // TO DO: Resolve from cslr_soc_baseaddress.h
+
#define _MCASP_BASE_PORT0 0x2340000U
#define _MCASP_BASE_PORT1 0x2342000U
#define _MCASP_BASE_PORT2 0x2344000U
-#elif (PAF_DEVICE&0xFF000000) == 0xD8000000
-#define _MCASP_BASE_PORT0 0x01D00000u
-#define _MCASP_BASE_PORT1 0x01D04000u
-#define _MCASP_BASE_PORT2 0x01D08000u
-#elif (PAF_DEVICE&0xFF000000) == 0xD7000000
-#define _MCASP_BASE_PORT0 0x44000000u
-#define _MCASP_BASE_PORT1 0x45000000u
-#define _MCASP_BASE_PORT2 0x46000000u
-#else
-#error Undefined PAF_DEVICE -- not supported.
-#endif
+
/******************************************************************************\
* Step 4. Module level register/field access macros
\******************************************************************************/
#ifndef RELEASE_QT
#define _MCASP_XBUF0_ADDR 0x21804000U
- #define _MCASP_XBUF1_ADDR 0x3C100000u
- #define _MCASP_XBUF2_ADDR 0x3C200000u
+ #define _MCASP_XBUF1_ADDR 0x21804400U
+ #define _MCASP_XBUF2_ADDR 0x21804800U
#else
#define _MCASP_XBUF0_ADDR 0x01d02000u
#define _MCASP_XBUF1_ADDR 0x01d06000u
\******************************************************************************/
#ifndef RELEASE_QT
#define _MCASP_RBUF0_ADDR 0x21804000U
- #define _MCASP_RBUF1_ADDR 0x3C100000u
- #define _MCASP_RBUF2_ADDR 0x3C200000u
+ #define _MCASP_RBUF1_ADDR 0x21804400U
+ #define _MCASP_RBUF2_ADDR 0x21804800U
#else
#define _MCASP_RBUF0_ADDR 0x01d02000u
#define _MCASP_RBUF1_ADDR 0x01d06000u
diff --git a/procsdk_audio_x_xx_xx_xx/test_dsp/sap/sap_d10.c b/procsdk_audio_x_xx_xx_xx/test_dsp/sap/sap_d10.c
index 41ff6b2f3c90c40d97ad27443350d0440a7476f8..4066b5717adad39e923cd674b90e9a4d22a2acc2 100644 (file)
#include <sap_d10.h>
#include <audio_dc_cfg.h>
-//#include <xdc/runtime/System.h>
-//#define AUD_OSC_CLOCK
+
// -----------------------------------------------------------------------------
// Local function declarations
XDAS_Int32 D10_sapControl (DEV2_Handle device, const PAF_SIO_Params *pParams, XDAS_Int32 code, XDAS_Int32 arg);
-//static inline XDAS_Int32 initD10 (DEV2_Handle device) ;
-static XDAS_Int32 clockMuxTx1 (int sel, int force);
+static inline XDAS_Int32 initD10 (DEV2_Handle device) ;
+static XDAS_Int32 clockMuxTx (int sel, int force);
static int manageInput (DEV2_Handle device, const SAP_D10_Rx_Params *pParams, PAF_SIO_InputStatus *pStatusOut);
static int manageOutput (DEV2_Handle device, const SAP_D10_Tx_Params *pParams, float rateX);
-//static int FireWorks_read1394Status (PAF_SIO_InputStatus *pStatus);
void HSR4_readStatus (PAF_SIO_InputStatus *pStatus);
-//void HDMIGpioInit (void);
unsigned int HDMIGpioGetState (void);
// -----------------------------------------------------------------------------
// State machine variables and defines
+// flag to facilitate one time initialization of DA10x Audio hardware
+// 0 ==> not initialized, 1 ==> initialized
static char initDone = 0;
// input status
static const unsigned char clkxDivDIR[PAF_SAMPLERATE_N] =
{
- 0x8, //PAF_SAMPLERATE_UNKNOWN
+ 0x2, //PAF_SAMPLERATE_UNKNOWN
0x8, //PAF_SAMPLERATE_NONE
0x8, //PAF_SAMPLERATE_32000HZ
- 0x8, //PAF_SAMPLERATE_44100HZ
- 0x8, //PAF_SAMPLERATE_48000HZ
+ 0x2, //PAF_SAMPLERATE_44100HZ
+ 0x2, //PAF_SAMPLERATE_48000HZ
0x4, //PAF_SAMPLERATE_88200HZ
- 0x4, //PAF_SAMPLERATE_96000HZ
+ 0x2, //PAF_SAMPLERATE_96000HZ
0x2, //PAF_SAMPLERATE_192000HZ
0x4, //PAF_SAMPLERATE_64000HZ
0x2, //PAF_SAMPLERATE_128000HZ
// generate a limited set of audio sample rates since the clock
// is derived from AUXCLK which is the oscillator connected to the DSP.
// This table faciliates the access and definition of these rates.
-static const Uint16 oscRateTable[4] =
+static const Uint16 oscRateTable[8] =
{
PAF_SAMPLERATE_UNKNOWN, // 0
+ PAF_SAMPLERATE_32000HZ,
PAF_SAMPLERATE_44100HZ, // D10_RATE_44_1KHZ
+ PAF_SAMPLERATE_48000HZ,
PAF_SAMPLERATE_88200HZ, // D10_RATE_88_2KHZ
+ PAF_SAMPLERATE_96000HZ,
PAF_SAMPLERATE_176400HZ, // D10_RATE_176_4KHZ
+ PAF_SAMPLERATE_192000HZ
};
static const Uint16 RateTable_hdmi[8] =
PAF_SAMPLERATE_192000HZ // HSDIO_AudioFreq_192K
};
+static const Uint16 RateTable_spdif[4] =
+{
+ PAF_SAMPLERATE_44100HZ, // AudioFreq_44_1K
+ PAF_SAMPLERATE_48000HZ, // AudioFreq_48K
+ PAF_SAMPLERATE_UNKNOWN, // AudioFreq_RESERVED
+ PAF_SAMPLERATE_32000HZ, // HSDIO_AudioFreq_32K
+};
+
// base mcasp addresses for easy lookup
static volatile Uint32 * mcaspAddr[_MCASP_PORT_CNT] =
(volatile Uint32 *) _MCASP_BASE_PORT2
};
-// The AC7xx contains a single hardware mute circuit for all the DACs
-// which is controlled by AMUTE0. There is no mute control for DIT output.
+// The DA10x HW is configured for the DAC's mute lines to be operated based
+// on McASP0's AMUTE (out) line. This is the hard mute.
static inline void dacHardMute (void) {
volatile Uint32 *mcasp0 = (volatile Uint32 *) _MCASP_BASE_PORT0;
mcasp0[_MCASP_PDOUT_OFFSET] |= _MCASP_PDOUT_AMUTE_MASK;
mcasp0[_MCASP_AMUTE_OFFSET] |= MCASP_AMUTE_MUTEN_ERRLOW;
}
-// The AK4588 provides soft mute/unmute functionlity.
+// How should the PCM18x DAC's soft mute functionality be used here?
+// i.e, as different from the hard mute? need to review.
static inline void dacSoftMute (void) {
volatile Uint32 *mcasp0 = (volatile Uint32 *) _MCASP_BASE_PORT0;
mcasp0[6] = 0x000 ;
- //AK4588_writeAna (hAK4588, 0, AK4588_ANA_REG0_NORMAL | 1);
mcasp0[6] = 0x400 ;
}
static inline void dacSoftUnMute (void) {
volatile Uint32 *mcasp0 = (volatile Uint32 *) _MCASP_BASE_PORT0;
mcasp0[6] = 0x000 ;
- //AK4588_writeAna (hAK4588, 0, AK4588_ANA_REG0_NORMAL);
mcasp0[6] = 0x400 ;
}
MCASP_AFSRCTL_RMOD_OF(2),
MCASP_AFSRCTL_FRWID_WORD,
MCASP_AFSRCTL_FSRM_INTERNAL,
- MCASP_AFSRCTL_FSRP_ACTIVELOW),
+ MCASP_AFSRCTL_FSRP_ACTIVEHIGH),
MCASP_ACLKRCTL_RMK(
MCASP_ACLKRCTL_CLKRP_RISING,
MCASP_ACLKRCTL_CLKRM_INTERNAL,
- MCASP_ACLKRCTL_CLKRDIV_DEFAULT),
+ MCASP_ACLKXCTL_CLKXDIV_OF(7)),
MCASP_AHCLKRCTL_RMK(
- MCASP_AHCLKRCTL_HCLKRM_EXTERNAL,
+ MCASP_AHCLKRCTL_HCLKRM_INTERNAL,
MCASP_AHCLKRCTL_HCLKRP_RISING,
- MCASP_AHCLKRCTL_HCLKRDIV_DEFAULT),
+ MCASP_AHCLKRCTL_HCLKRDIV_DEFAULT),
MCASP_RTDM_OF(3),
MCASP_RINTCTL_DEFAULT,
MCASP_RCLKCHK_DEFAULT
};
-
-
// -----------------------------------------------------------------------------
// McASP Output Configuration Definitions
MCASP_XCLKCHK_DEFAULT
};
-const MCASP_ConfigXmt txConfigDAC_32bit =
+static const MCASP_ConfigXmt txConfigDACSlave =
{
MCASP_XMASK_OF(0xFFFFFFFF),
MCASP_XFMT_RMK(
MCASP_XFMT_XDATDLY_1BIT,
MCASP_XFMT_XRVRS_MSBFIRST,
- MCASP_XFMT_XPAD_DEFAULT,
+ MCASP_XFMT_XPAD_ZERO,
MCASP_XFMT_XPBIT_DEFAULT,
MCASP_XFMT_XSSZ_32BITS,
MCASP_XFMT_XBUSEL_DAT,
- MCASP_XFMT_XROT_NONE),
+ MCASP_XFMT_XROT_NONE),
MCASP_AFSXCTL_RMK(
MCASP_AFSXCTL_XMOD_OF(2),
MCASP_AFSXCTL_FXWID_WORD,
MCASP_AFSXCTL_FSXM_INTERNAL,
- MCASP_AFSXCTL_FSXP_ACTIVELOW),
+ MCASP_AFSXCTL_FSXP_ACTIVEHIGH),
MCASP_ACLKXCTL_RMK(
MCASP_ACLKXCTL_CLKXP_FALLING,
MCASP_ACLKXCTL_ASYNC_ASYNC,
MCASP_ACLKXCTL_CLKXM_INTERNAL,
- MCASP_ACLKXCTL_CLKXDIV_OF(7)),
+ MCASP_ACLKXCTL_CLKXDIV_OF(1)),
MCASP_AHCLKXCTL_RMK(
MCASP_AHCLKXCTL_HCLKXM_INTERNAL,
MCASP_AHCLKXCTL_HCLKXP_FALLING,
MCASP_XCLKCHK_DEFAULT
};
-static const MCASP_ConfigXmt txConfigDITSlave =
-{
- MCASP_XMASK_OF(0x00FFFFFF),
- MCASP_XFMT_RMK(
- MCASP_XFMT_XDATDLY_1BIT,
- MCASP_XFMT_XRVRS_LSBFIRST,
- MCASP_XFMT_XPAD_DEFAULT,
- MCASP_XFMT_XPBIT_DEFAULT,
- MCASP_XFMT_XSSZ_32BITS,
- MCASP_XFMT_XBUSEL_DAT,
- MCASP_XFMT_XROT_NONE),
- MCASP_AFSXCTL_RMK(
- MCASP_AFSXCTL_XMOD_OF(0x180),
- MCASP_AFSXCTL_FXWID_BIT,
- MCASP_AFSXCTL_FSXM_EXTERNAL,
- MCASP_AFSXCTL_FSXP_ACTIVEHIGH),
- MCASP_ACLKXCTL_RMK(
- MCASP_ACLKXCTL_CLKXP_FALLING,
- MCASP_ACLKXCTL_ASYNC_ASYNC,
- MCASP_ACLKXCTL_CLKXM_EXTERNAL,
- MCASP_ACLKXCTL_CLKXDIV_OF(0)),
- MCASP_AHCLKXCTL_RMK(
- MCASP_AHCLKXCTL_HCLKXM_EXTERNAL,
- MCASP_AHCLKXCTL_HCLKXP_FALLING,
- MCASP_AHCLKXCTL_HCLKXDIV_OF(0)),
- MCASP_XTDM_OF(0xFFFFFFFF),
- MCASP_XINTCTL_DEFAULT,
- MCASP_XCLKCHK_DEFAULT
-};
-
static const MCASP_ConfigXmt txConfigDIT_16bit =
{
MCASP_XMASK_OF(0x0000FFFF),
MCASP_XCLKCHK_DEFAULT
};
-static const MCASP_ConfigXmt txConfigDIT_16bitSlave =
-{
- MCASP_XMASK_OF(0x0000FFFF),
- MCASP_XFMT_RMK(
- MCASP_XFMT_XDATDLY_1BIT,
- MCASP_XFMT_XRVRS_LSBFIRST,
- MCASP_XFMT_XPAD_DEFAULT,
- MCASP_XFMT_XPBIT_DEFAULT,
- MCASP_XFMT_XSSZ_32BITS,
- MCASP_XFMT_XBUSEL_DAT,
- MCASP_XFMT_XROT_24BITS),
- MCASP_AFSXCTL_RMK(
- MCASP_AFSXCTL_XMOD_OF(0x180),
- MCASP_AFSXCTL_FXWID_BIT,
- MCASP_AFSXCTL_FSXM_EXTERNAL,
- MCASP_AFSXCTL_FSXP_ACTIVEHIGH),
- MCASP_ACLKXCTL_RMK(
- MCASP_ACLKXCTL_CLKXP_FALLING,
- MCASP_ACLKXCTL_ASYNC_ASYNC,
- MCASP_ACLKXCTL_CLKXM_EXTERNAL,
- MCASP_ACLKXCTL_CLKXDIV_OF(0)),
- MCASP_AHCLKXCTL_RMK(
- MCASP_AHCLKXCTL_HCLKXM_EXTERNAL,
- MCASP_AHCLKXCTL_HCLKXP_FALLING,
- MCASP_AHCLKXCTL_HCLKXDIV_OF(0)),
- MCASP_XTDM_OF(0xFFFFFFFF),
- MCASP_XINTCTL_DEFAULT,
- MCASP_XCLKCHK_DEFAULT
-};
-
// -----------------------------------------------------------------------------
// DAP Input Parameter Definitions
"SAP", // name
MCASP_DEV2, // moduleNum --> mcasp #
(Void *)&rxConfigDIR, // pConfig
- -1, // wordSize (unused)
- -1, // precision (unused)
+ 4, // wordSize (unused)
+ 24, // precision (unused)
D10_sapControl, // control
- 0xA0000020, // pinMask
- (D10_MCLK_DIR << D10_MCLK_SHIFT), // mode
+ 0x00000020, // pinMask
+ (D10_MCLK_DIR << D10_MCLK_SHIFT), // mode
0,0 // unused[2]
};
"SAP", // name
MCASP_DEV1, // moduleNum --> mcasp #
(Void *)&rxConfigADC, // pConfig
- -1, // wordSize (unused)
- -1, // precision (unused)
+ 4, // wordSize (unused)
+ 24, // precision (unused)
D10_sapControl, // control
0xE000000F, // pinMask
(D10_RATE_44_1KHZ << D10_RATE_SHIFT) |
(D10_MCLK_HDMI << D10_MCLK_SHIFT), // mode
0,0 // unused[2]
};
+
const SAP_D10_Rx_Params SAP_D10_RX_HDMI =
{
sizeof (SAP_D10_Rx_Params), // size
"SAP", // name
MCASP_DEV0, // moduleNum --> mcasp #
(Void *)&rxConfigDIR, // pConfig
- -1, // wordSize (unused)
+ 4, // wordSize (unused)
-1, // precision (unused)
D10_sapControl, // control
0xE000F000, // pinMask
4, // wordSize (in bytes)
24, // precision (in bits)
D10_sapControl, // control
-#ifdef AUD_OSC_CLOCK
- 0x000001e0,
-#else
0x1600000F, // pinMask
-#endif
0, // mode
0,0,0 // unused[3]
};
0,0,0 // unused[3]
};
-const SAP_D10_Tx_Params SAP_D10_TX_DIT_SLAVE =
+const SAP_D10_Tx_Params SAP_D10_TX_DAC_SLAVE =
{
sizeof (SAP_D10_Tx_Params), // size
"SAP", // name
- MCASP_DEV2, // moduleNum --> mcasp #
- (Void *) &txConfigDITSlave, // pConfig
- 3, // wordSize (in bytes)
+ MCASP_DEV0, // moduleNum --> mcasp #
+ (Void *)&txConfigDACSlave, // pConfig
+ 4, // wordSize (in bytes)
24, // precision (in bits)
D10_sapControl, // control
- 0x1C000001, // pinMask
+ 0x1E00000F, // pinMask
0, // mode
0,0,0 // unused[3]
};
-const SAP_D10_Tx_Params SAP_D10_TX_DIT_16BIT =
+const SAP_D10_Tx_Params SAP_D10_TX_STEREO_DAC_SLAVE =
{
sizeof (SAP_D10_Tx_Params), // size
"SAP", // name
- MCASP_DEV2, // moduleNum --> mcasp #
- (Void *) &txConfigDIT_16bit, // pConfig
- 2, // wordSize (in bytes)
- 16, // precision (in bits)
+ MCASP_DEV0, // moduleNum --> mcasp #
+ (Void *)&txConfigDAC, // pConfig
+ 4, // wordSize (in bytes)
+ 24, // precision (in bits)
D10_sapControl, // control
- 0x1C000001, // pinMask
+ 0x16000001, // pinMask
0, // mode
0,0,0 // unused[3]
};
-const SAP_D10_Tx_Params SAP_D10_TX_DIT_16BIT_SLAVE =
+
+// -----------------------------------------------------------------------------
+// One time initialization of the DA10x audio hardware.
+
+/* DAC default configuration parameters */
+DacConfig dacCfg =
{
- sizeof (SAP_D10_Tx_Params), // size
- "SAP", // name
- MCASP_DEV2, // moduleNum --> mcasp #
- (Void *) &txConfigDIT_16bitSlave, // pConfig
- 2, // wordSize (in bytes)
- 16, // precision (in bits)
- D10_sapControl, // control
- 0x1C000001, // pinMask
- 0, // mode
- 0,0,0 // unused[3]
+ DAC_AMUTE_CTRL_SCKI_LOST, /* Amute event */
+ 0, /* Amute control */
+ DAC_SAMPLING_MODE_SINGLE_RATE, /* Sampling mode */
+ DAC_DATA_FORMAT_I2S, /* Data format */
+ 0, /* Soft mute control */
+ DAC_ATTENUATION_WIDE_RANGE, /* Attenuation mode */
+ DAC_DEEMP_44KHZ, /* De-emph control */
+ 100 /* Volume */
};
+/* ADC default configuration parameters */
+AdcConfig adcCfg =
+{
+ 90, /* ADC gain */
+ ADC_INL_SE_VINL1, /* Left input mux for ADC1L */
+ ADC_INL_SE_VINL2, /* Left input mux for ADC2L */
+ ADC_INR_SE_VINR1, /* Right input mux for ADC1R */
+ ADC_INR_SE_VINR2, /* Right input mux for ADC2R */
+ ADC_RX_WLEN_24BIT, /* ADC word length */
+ ADC_DATA_FORMAT_I2S, /* ADC data format */
+ 0
+};
+
+Platform_STATUS setAudioDacConfig(void)
+{
+ Platform_STATUS status;
+
+ /* Initialize Audio DAC module */
+ status = audioDacConfig(DAC_DEVICE_ALL, &dacCfg);
+ if (status)
+ Log_info0("SAP_D10: Audio DAC Configuration Failed!!!\n");
+ return status;
+
+}
+
+static inline XDAS_Int32 initD10 (DEV2_Handle device)
+{
+ Platform_STATUS status = Platform_EOK;
+
+ /* Initialize common audio configurations */
+ status = platformAudioInit();
+ if(status != Platform_EOK)
+ {
+ System_printf("Audio Init Failed!\n");
+ return status;
+ }
+
+ /* Initialize Audio ADC module */
+ status = audioAdcConfig(ADC_DEVICE_ALL, &adcCfg);
+ if(status != Platform_EOK)
+ {
+ platform_write("Audio ADC Configuration Failed!\n");
+ return status;
+ }
+
+ /* Setup DIR 9001 for SPDIF input operation */
+ //status = platformAudioSelectClkSrc(AUDIO_CLK_SRC_DIR);
+ status = audioDirConfig();
+ if(status != Platform_EOK)
+ {
+ Log_info0("Audio DIR Init Failed!\n");
+ return status;
+ }
+
+ /* Setup HSR41 for HDMI input operation */
+ //status = platformAudioSelectClkSrc(AUDIO_CLK_SRC_I2S);
+ /* Initialize the HDMI Card */
+ status = audioHDMIConfig();
+ if(status != Platform_EOK)
+ {
+ Log_info0("Audio HDMI Init Failed!\n");
+ return status;
+ }
+
+ // This is needed because DAC configuration needs some default clocking.
+ // We start with S/PDIF, because it's onboard the Audio DC & has its own crystal.
+ // HDMI is an add-on board & Audio OSC would need AUX clocking - both unfit for "default".
+ status = platformAudioSelectClkSrc(AUDIO_CLK_SRC_DIR);
+
+ platform_delay(20000); // Without delay between these 2 calls system aborts.
+
+ status = setAudioDacConfig();
+
+ return status;
+
+} //initD10
// -----------------------------------------------------------------------------
-// The McASP TX1 section is *only* used as a master clock mux.
-// Mux functionality is achieved by selecting either an external high
-// speed clock (DIR) or the internal AUXCLK (OSC). This is divided down
-// by 1 and output via ACLKX1 which is connected to the high speed input
+// The McASP TX section is *only* used as a master clock mux.
+// Mux functionality is achieved by selecting either external high
+// speed clocks (DIR/HDMI) or the internal AUXCLK (Audio_OSC). This is divided down
+// output via ACLKX0 which is connected to the high speed input
// of TX0 (DAC) and TX2 (DIT).
-// Override is provided for asynchronous output functionality. Once the
-// mux has been set with override it cannot be changed until the override
-// is cleared.
-// Force == -1 --> change only if override is clear
-// == 0 --> no change but clear override
-// == 1 --> change and set override
-
-static XDAS_Int32 clockMuxTx1 (int sel, int force)
+
+static XDAS_Int32 clockMuxTx (int sel, int force)
{
+ Platform_STATUS status = 0;
// select clkxDiv table
if (sel == D10_MCLK_DIR)
- while(1);
- //pClkxDiv = (unsigned char *) clkxDivDIR;
+ {
+ status = platformAudioSelectClkSrc(AUDIO_CLK_SRC_DIR);
+ pClkxDiv = (unsigned char *) clkxDivDIR;
+ }
else if (sel == D10_MCLK_HDMI)
- pClkxDiv = (unsigned char *) clkxDivHDMI;
- //else
- //while(1);
- // pClkxDiv = (unsigned char *) clkxDivADC;
- return 0;
-} //clockMuxTx1
+ {
+ status = platformAudioSelectClkSrc(AUDIO_CLK_SRC_I2S);
+ pClkxDiv = (unsigned char *) clkxDivHDMI;
+ }
+ else if (sel == D10_MCLK_OSC)
+ {
+ status = platformAudioSelectClkSrc(AUDIO_CLK_SRC_OSC);
+ pClkxDiv = (unsigned char *) clkxDivADC;
+ }
+
+ platform_delay(20000);
+
+ return status;
+} //clockMuxTx
// -----------------------------------------------------------------------------
-// This function returns the input status of the specified device. In the
-// case of DIR input, this also configures the AK4588 to generate the needed
-// MCLK ration. This is called once when the device is opened
+// This function returns the input status of the specified device.
+// This is called once when the device is opened
// (PAF_SIO_CONTROL_OPEN) and periodically thereafter
// (PAF_SIO_CONTROL_GET_INPUT_STATUS).
@@ -740,41 +768,44 @@ static int manageInput (DEV2_Handle device, const SAP_D10_Rx_Params *pParams, PA
{
PAF_SIO_InputStatus *pStatusIn = &primaryStatus;
volatile Uint32 *mcasp0 = (volatile Uint32 *) _MCASP_BASE_PORT0;
- static int PrevSampRate = 0;
+ volatile Uint32 *mcasp1 = (volatile Uint32 *) _MCASP_BASE_PORT1;
+ volatile Uint32 *mcasp2 = (volatile Uint32 *) _MCASP_BASE_PORT2;
- if ((((pParams->d10rx.mode & D10_MCLK_MASK) >> D10_MCLK_SHIFT) == D10_MCLK_DIR) &
- (((pParams->d10rx.mode & D10_MODE_MASK) >> D10_MODE_SHIFT) == D10_MODE_STD)) {
- int regData;
+ Platform_STATUS status;
- // fetch input status from the AK4588 register file
- // AK4588_readDIRStatus (hAK4588, pStatusIn);
+ static int PrevSampRate = 0;
+ int Rate_spdif=0;
- // since DIR set MCLK per fs
- // regData = 0x3 | (dirOCKS[pStatusIn->sampleRateMeasured] << 2)|0x20;
+ if ((((pParams->d10rx.mode & D10_MCLK_MASK) >> D10_MCLK_SHIFT) == D10_MCLK_DIR) &
+ (((pParams->d10rx.mode & D10_MODE_MASK) >> D10_MODE_SHIFT) == D10_MODE_STD))
+ {
+ pStatusIn->lock = !(platformAudioDirGetClkStatus());
+ pStatusIn->nonaudio = !(platformAudioDirGetAudioStatus());
+ pStatusIn->emphasis = platformAudioDirGetEmphStatus();
+ pStatusIn->sampleRateMeasured = RateTable_spdif[platformAudioDirGetFsOut()];
+ pStatusIn->sampleRateData = pStatusIn->sampleRateMeasured;
+ PrevSampRate = pStatusIn->sampleRateMeasured;
+
+ // GJ: Is this needed? Probably not.
+ mcasp0[_MCASP_PDOUT_OFFSET] = 0x000 ;
+ mcasp0[_MCASP_PDOUT_OFFSET] = 0x400 ;
- //mcasp0[_MCASP_PDOUT_OFFSET] = 0x000 ;
- //AK4588_writeDig (hAK4588, 0, regData);
- //mcasp0[_MCASP_PDOUT_OFFSET] = 0x400 ;
}
else if ((((pParams->d10rx.mode & D10_MCLK_MASK) >> D10_MCLK_SHIFT) == D10_MCLK_OSC) &
(((pParams->d10rx.mode & D10_MODE_MASK) >> D10_MODE_SHIFT) == D10_MODE_STD)) {
int adcRate = (pParams->d10rx.mode & D10_RATE_MASK) >> D10_RATE_SHIFT;
int regData;
+
pStatusIn->lock = 1;
pStatusIn->nonaudio = PAF_IEC_AUDIOMODE_AUDIO;
pStatusIn->emphasis = PAF_IEC_PREEMPHASIS_NO;
pStatusIn->sampleRateMeasured = oscRateTable[adcRate];
pStatusIn->sampleRateData = pStatusIn->sampleRateMeasured;
- // since DIR set MCLK per fs
- // regData = 0x3 | (dirOCKS[pStatusIn->sampleRateMeasured] << 2)|0x30;
-
- //mcasp0[_MCASP_PDOUT_OFFSET] = 0x000 ;
- //AK4588_writeDig (hAK4588, 0, regData);
- //mcasp0[_MCASP_PDOUT_OFFSET] = 0x400 ;
}
else if ((((pParams->d10rx.mode & D10_MCLK_MASK) >> D10_MCLK_SHIFT) == D10_MCLK_HDMI) &
- (((pParams->d10rx.mode & D10_MODE_MASK) >> D10_MODE_SHIFT) == D10_MODE_HDMI)) {
+ (((pParams->d10rx.mode & D10_MODE_MASK) >> D10_MODE_SHIFT) == D10_MODE_HDMI))
+ {
pStatusIn->lock = 1;
pStatusIn->nonaudio = PAF_IEC_AUDIOMODE_AUDIO;
pStatusIn->emphasis = PAF_IEC_PREEMPHASIS_NO;
@@ -790,13 +821,9 @@ static int manageInput (DEV2_Handle device, const SAP_D10_Rx_Params *pParams, PA
pStatusIn->sampleRateData = pStatusIn->sampleRateMeasured;
}
-#if 0
- pStatusIn->sampleRateMeasured = PAF_SAMPLERATE_192000HZ;
- pStatusIn->sampleRateData = pStatusIn->sampleRateMeasured;
-#endif
}
else
- return 0;
+ return -1;
// update another status if requested
if (pStatusOut)
@@ -870,6 +897,14 @@ XDAS_Int32 D10_sapControl (DEV2_Handle device, const PAF_SIO_Params *pParams, XD
volatile Uint32 *mcasp = mcaspAddr[pParams->sio.moduleNum];
XDAS_Int32 result = 0;
+ // perform one time hardware initialization
+ if (!initDone) {
+ result = initD10 (device);
+ if (result)
+ return result;
+ initDone = 1;
+ }
+
switch (code) {
// .............................................................................
@@ -906,68 +941,26 @@ XDAS_Int32 D10_sapControl (DEV2_Handle device, const PAF_SIO_Params *pParams, XD
case PAF_SIO_CONTROL_OPEN:
if (device->mode == DEV2_INPUT) {
- //int adcRate = (pDapD10RxParams->d10rx.mode & D10_RATE_MASK) >> D10_RATE_SHIFT;
-
// determine the master clock based on the mode element of the
// parameter configuration.
int sel = (pDapD10RxParams->d10rx.mode & D10_MCLK_MASK) >> D10_MCLK_SHIFT;
-
- // When DIR input then configure the AK4588 to generate
- // the bit and frame clocks
manageInput (device, pDapD10RxParams, NULL);
// select appropriate master clock (but dont force)
- clockMuxTx1 (sel, -1);
-
- // For Lynx Card Input change the clk divider Table
- // this requires separte divider apart from DIR and ADC
- //if(((pDapD10RxParams->d10rx.mode & D10_MODE_MASK) >> D10_MODE_SHIFT) == D10_MODE_LYNX)
- //pClkxDiv = (unsigned char *) clkxDivLYNX;
-
-
-
- // A value of MCLK_OSC means that the high clock signal is coming,
- // via passthrough the AK4588, from the 24.576 oscillator on the
- // audio card. On DA8xx EVM AUXCLK = 24MHz which is close to the
- // OSC value so we can use the same divider values per the table.
- // This with the understanding that the effective sample rate will
- // not be exact but only close.
- /*if ((sel == D10_MCLK_OSC) || (sel == D10_MCLK_AUX)) {
- Uint32 divider = pClkxDiv[oscRateTable[adcRate]];
-
- mcasp[_MCASP_ACLKRCTL_OFFSET] =
- (mcasp[_MCASP_ACLKRCTL_OFFSET] & ~_MCASP_ACLKRCTL_CLKRDIV_MASK) |
- (MCASP_ACLKRCTL_CLKRDIV_OF(divider-1) << _MCASP_ACLKRCTL_CLKRDIV_SHIFT);
- }*/
+
+ clockMuxTx (sel, -1);
+
}
else {
- // If appropriate then signal TX0 in use for DAC output.
- // Also deassert the hardware mute and assert the soft mute.
- if (pParams->sio.moduleNum == MCASP_DEV0) {
- int sel = (pDapD10TxParams->d10tx.mode & D10_MCLK_MASK) >> D10_MCLK_SHIFT;
- platform_delay(20000); // Without delay between Tx McASP & DAC configs, system aborts.
+ // Since DAC is a slave to the chosen input, operate the clksel switch appropriately
+ // Also, this is a create-time (i.e, CTRL_OPEN) only call & not appropriate under
+ // the periodic manage_(in/out)put calls
+ int sel = (pDapD10RxParams->d10rx.mode & D10_MCLK_MASK) >> D10_MCLK_SHIFT;
+ clockMuxTx (sel, -1);
+ platform_delay(20000); // Without delay between Tx McASP & DAC configs, system aborts.
setAudioDacConfig();
dacHardUnMute ();
- dacSoftMute ();
-
- // If AUX mode then, we ideally, need to configure mux (U16) for IN1
- // note this is not driven on RevB audio cards but is on
- // RevC cards with a 24.576 clock. However this isn't currently
- // working as expected. i.e. when driven high there is no audio output
- // but when driven low, which is unchanged from default, then audio is good.
- // TODO: investigate this and add back in this code as needed.
-// if (sel == D10_MCLK_AUX) {
-// volatile Uint32 *mcasp1 = (volatile Uint32 *) _MCASP_BASE_PORT1;
-// mcasp1[_MCASP_PFUNC_OFFSET] |= _MCASP_PFUNC_AXR11_MASK;
-// mcasp1[_MCASP_PDIR_OFFSET] |= _MCASP_PDIR_AXR11_MASK;
-// mcasp1[_MCASP_PDSET_OFFSET] |= ~_MCASP_PDSET_AXR11_MASK;
-// }
-
- // if asynchronous then force clock change
- if (pDapD10TxParams->d10tx.mode & D10_SYNC_MASK)
- clockMuxTx1 (sel, 1);
- }
// configure clock divider (bit and frame clocks)
manageOutput (device, pDapD10TxParams, 1.0);
@@ -988,7 +981,7 @@ XDAS_Int32 D10_sapControl (DEV2_Handle device, const PAF_SIO_Params *pParams, XD
// if async then clear forced clock mux
// if asynchronous then force clock change
if (pDapD10TxParams->d10tx.mode & D10_SYNC_MASK)
- clockMuxTx1 (0, 0);
+ clockMuxTx (0, 0);
}
break;
@@ -1035,15 +1028,18 @@ XDAS_Int32 D10_sapControl (DEV2_Handle device, const PAF_SIO_Params *pParams, XD
break;
case PAF_SIO_CONTROL_SET_WORDSIZE:
+ if(((pDapD10RxParams->d10rx.mode & D10_MCLK_MASK) >> D10_MCLK_SHIFT) != D10_MCLK_OSC)
+ {
if ((device->mode == DEV2_INPUT) && (arg == 2))
{
Log_info0("Inside SAP_D10Control PAF_SIO_CONTROL_SET_WORDSIZE for arg=2");
mcasp[_MCASP_RFMT_OFFSET] = (mcasp[_MCASP_RFMT_OFFSET] & ~_MCASP_RFMT_RROT_MASK) | MCASP_RFMT_RROT_16BITS;
}
- if ((device->mode == DEV2_INPUT) && (arg == 4))
+ else if ((device->mode == DEV2_INPUT) && (arg == 4))
{
Log_info0("Inside SAP_D10Control PAF_SIO_CONTROL_SET_WORDSIZE for arg=4");
mcasp[_MCASP_RFMT_OFFSET] = (mcasp[_MCASP_RFMT_OFFSET] & ~_MCASP_RFMT_RROT_MASK) | MCASP_RFMT_RROT_NONE;
+ }
}
break;
// .............................................................................
return(gpioReadInput(GPIO_PORT_0, PLATFORM_AUDIO_HSR_HMINTz_GPIO));
}
-// -----------------------------------------------------------------------------
-
-void *SAP_D10_getConfig(int mode)
-{
- if(mode == DEV2_INPUT) return (void *)&SAP_D10_RX_HDMI_STEREO;
- else return (void *)&SAP_D10_TX_DAC;
-}
// EOF
diff --git a/procsdk_audio_x_xx_xx_xx/test_dsp/sap/sap_mcasp.c b/procsdk_audio_x_xx_xx_xx/test_dsp/sap/sap_mcasp.c
index 8b91983635f3fb548c2bf6091f75ee84801d8fdf..f4a5889128c79148167d1c320e244c8f8f152cb4 100644 (file)
// the settings will never take affect which would lead to a lockup condition.
#define INT_MAX 0xFFFFFFFF // maximum value returned by Clock_getTicks
+#define USEC_PER_MSEC ( 1000 ) // microseconds per millisecond
Int SAP_MCASP_waitSet (MCASP_Handle hMcasp, Uint32 wrReg, Uint32 rdReg, Uint32 mask, Uint32 timeout)
{
@@ -750,10 +751,10 @@ Int SAP_MCASP_waitSet (MCASP_Handle hMcasp, Uint32 wrReg, Uint32 rdReg, Uint32 m
}
#endif
- timeout = timeout * 10; // from ms to nticks
+ //timeout = timeout * USEC_PER_MSEC;
timeStart = Clock_getTicks();
while (1) {
- for(i=0; i < 20000; i++);
+ //for(i=0; i < 20000; i++);
// return success if register has latched value
if ((base[rdReg] & mask) == mask)
break;
@@ -761,7 +762,7 @@ Int SAP_MCASP_waitSet (MCASP_Handle hMcasp, Uint32 wrReg, Uint32 rdReg, Uint32 m
elapsed = timeNow - timeStart;
// check for wrap aound
- if (timeNow <= timeStart)
+ if (timeNow < timeStart)
elapsed = INT_MAX - timeStart + timeNow;
// return error if timeout reached;