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raw | patch | inline | side by side (parent: 05aac8f)
raw | patch | inline | side by side (parent: 05aac8f)
author | Jianzhong Xu <a0869574@ti.com> | |
Thu, 5 Apr 2018 19:26:10 +0000 (15:26 -0400) | ||
committer | Jianzhong Xu <a0869574@ti.com> | |
Thu, 5 Apr 2018 19:26:10 +0000 (15:26 -0400) |
pasdk/test_dsp/application/itopo/evmk2g/mcasp_cfg.c | patch | blob | history |
diff --git a/pasdk/test_dsp/application/itopo/evmk2g/mcasp_cfg.c b/pasdk/test_dsp/application/itopo/evmk2g/mcasp_cfg.c
index 7457e4a7996dd3acea4e29bdee29139f09ae9d8d..b256772e8ced49b052cd112dcecf878a3653b19f 100644 (file)
/* .xevtctl = */ 0x00000000, /* DMA request is enabled or disabled */
{
// /* .aclkxctl = */ 0X000000E1, // Transmit bit clock divide ratio = 2 --> works for 48khz PCM but not for DDP
- /* .aclkxctl = */ 0X000000E7, // Transmit bit clock divide ratio = 8 --> working for DDP 48khz but not for PCM
+ /* .aclkxctl = */ 0X000000E7, // Transmit bit clock divide ratio = 8 --> working for DDP/MAT/THD 48khz but not for PCM
+// /* .aclkxctl = */ 0X000000E3, // Transmit bit clock divide ratio = 4 --> THD 96khz
+// /* .aclkxctl = */ 0X000000E1, // Transmit bit clock divide ratio = 2 --> THD 192khz
/* .ahclkxctl = */ 0x00004000,
/* .xclkchk = */ 0x00000000
},