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raw | patch | inline | side by side (parent: 87978bd)
raw | patch | inline | side by side (parent: 87978bd)
author | Govind Jeyaram <govind.j@ti.com> | |
Tue, 4 Apr 2017 03:45:57 +0000 (20:45 -0700) | ||
committer | Govind Jeyaram <govind.j@ti.com> | |
Tue, 4 Apr 2017 03:45:57 +0000 (20:45 -0700) |
pasdk/test_dsp/sap/audio_dc_cfg.c | patch | blob | history |
index ddd2ab178d0771ef25d95d0e11035aafbac36b19..98f10e866b6bc39f3933d3072d9d7e9e852e54c4 100644 (file)
#define HSR4_I2C_ADDR 0x5D
#define HSR4_I2C_PORT_NUM I2C_PORT_1
+Int16 DA10x_I2C_init();
+Int16 DA10x_I2C_close();
+void DA10x_waitusec( Uint32);
+Int16 DA10x_I2C_reset();
+Int16 DA10x_I2C_write( Uint16, Uint8*, Uint16);
+Int16 DA10x_I2C_read( Uint16, Uint8*, Uint16);
/* ------------------------------------------------------------------------ *
* Prototypes *
* ------------------------------------------------------------------------ */
int gret_val=0;
+int gI2cWrite_errCnt=0;
int alpha_i2c_write(unsigned short var1, ...)
{
unsigned short alpha_type,length,temp_var;
}
va_end(argp);
+#define DA10x_I2C 1
+#ifdef DA10x_I2C
+do
+{
+ ret_val = DA10x_I2C_write(HSR4_I2C_ADDR, cmd, cmd[0]+1);
+
+ if(ret_val !=I2C_RET_OK)
+ {
+ gret_val++;
+ gI2cWrite_errCnt++;
+ DA10x_I2C_reset();
+ }
+}while(ret_val !=I2C_RET_OK);
+
+#else
+do
+{
ret_val = i2cWrite(HSR4_I2C_PORT_NUM, HSR4_I2C_ADDR, cmd, cmd[0]+1, I2C_RELEASE_BUS);
if(ret_val !=I2C_RET_OK)
+ {
gret_val++;
-
+ gI2cWrite_errCnt++;
+ i2cConfig(HSR4_I2C_PORT_NUM);
+ }
+}while(ret_val !=I2C_RET_OK);
+ret_val = i2cWrite(HSR4_I2C_PORT_NUM, HSR4_I2C_ADDR, cmd, cmd[0]+1, I2C_RELEASE_BUS);
+if(ret_val !=I2C_RET_OK)
+ gret_val++;
+#endif
return ret_val;
}
{
int ret_val=I2C_RET_OK;
- do{
+ /*do{
platform_delay(10);
ret_val=alpha_i2c_write(HSDIO_EDID_SPEAKER_ALLOCATION_BLOCK(0xFF));
if (ret_val !=I2C_RET_OK)
{
gI2Ccnt++;
+#ifdef DA10x_I2C
+ DA10x_I2C_reset();
+#else
i2cConfig(HSR4_I2C_PORT_NUM);
+#endif
}
- }while (ret_val !=I2C_RET_OK);
-
+ }while (ret_val !=I2C_RET_OK); */
+ do{ret_val=alpha_i2c_write(HSDIO_EDID_SPEAKER_ALLOCATION_BLOCK(0xFF));}while (ret_val !=I2C_RET_OK);
platform_delay(10);
do{ret_val=alpha_i2c_write(HSDIO_EDID_SPEAKER_ALLOCATION_BLOCK_2(0x7));}while (ret_val !=I2C_RET_OK);
int ret_val=0;
ret_val=alpha_i2c_write(HSDIO_INPUT_SYNC_STS);
+#ifdef DA10x_I2C
+ if(!ret_val) DA10x_I2C_read(HSR4_I2C_ADDR,&length,1);
+ if(!ret_val) DA10x_I2C_read(HSR4_I2C_ADDR,&data[0],length);
+#else
if(!ret_val) i2cRead(HSR4_I2C_PORT_NUM, HSR4_I2C_ADDR,&length,0,1,1);
if(!ret_val) i2cRead(HSR4_I2C_PORT_NUM, HSR4_I2C_ADDR,&data[0],0,1,length);
- if(!ret_val) ret_val= data[3]; // 1-byte / indicates error status
+#endif
+ if(!ret_val) ret_val= data[2]; // 1-byte / indicates error status
return ret_val;
}
int ret_val=0;
ret_val=alpha_i2c_write(HSDIO_AUDIO_INPUT_PRESENT_STS);
+#ifdef DA10x_I2C
+ if(!ret_val) DA10x_I2C_read(HSR4_I2C_ADDR,&length,1);
+ if(!ret_val) DA10x_I2C_read(HSR4_I2C_ADDR,&data[0],length);
+#else
if(!ret_val) i2cRead(HSR4_I2C_PORT_NUM, HSR4_I2C_ADDR,&length,0,1,1);
if(!ret_val) i2cRead(HSR4_I2C_PORT_NUM, HSR4_I2C_ADDR,&data[0],0,1,length);
- if(!ret_val) ret_val= data[3]; // 1-byte / indicates error status
+#endif
+ if(!ret_val) ret_val= data[2]; // 1-byte / indicates error status
return ret_val;
}
int ret_val=0;
ret_val=alpha_i2c_write(HSDIO_GET_AUDIO_MCLK_TO_HOST);
+#ifdef DA10x_I2C
+ if(!ret_val) DA10x_I2C_read(HSR4_I2C_ADDR,&length,1);
+ if(!ret_val) DA10x_I2C_read(HSR4_I2C_ADDR,&data[0],length);
+#else
if(!ret_val) i2cRead(HSR4_I2C_PORT_NUM, HSR4_I2C_ADDR,&length,0,1,1);
if(!ret_val) i2cRead(HSR4_I2C_PORT_NUM, HSR4_I2C_ADDR,&data[0],0,1,length);
- if(!ret_val) ret_val= data[3]; // 1-byte / indicates clock status
+#endif
+ if(!ret_val) ret_val= data[2]; // 1-byte / indicates clock status
return ret_val;
}
int ret_val=0;
ret_val=alpha_i2c_write(HSDIO_AUDIO_INPUT_ERROR_STS);
+#ifdef DA10x_I2C
+ if(!ret_val) DA10x_I2C_read(HSR4_I2C_ADDR,&length,1);
+ if(!ret_val) DA10x_I2C_read(HSR4_I2C_ADDR,&data[0],length);
+#else
if(!ret_val) i2cRead(HSR4_I2C_PORT_NUM, HSR4_I2C_ADDR,&length,0,1,1);
if(!ret_val) i2cRead(HSR4_I2C_PORT_NUM, HSR4_I2C_ADDR,&data[0],0,1,length);
- if(!ret_val) ret_val= data[3]; // 1-byte / indicates error status
+#endif
+ if(!ret_val) ret_val= data[2]; // 1-byte / indicates error status
return ret_val;
}
Log_info0("Audio DC CFG: Entered read_hdmi_samprate");
ret_val=alpha_i2c_write(HSDIO_AUDIO_INPUT_FREQ_STS);
+
+#ifdef DA10x_I2C
+ if(!ret_val) DA10x_I2C_read(HSR4_I2C_ADDR,&length,1);
+ if(!ret_val) DA10x_I2C_read(HSR4_I2C_ADDR,&data[0],length);
+#else
if(!ret_val) i2cRead(HSR4_I2C_PORT_NUM, HSR4_I2C_ADDR,&length,0,1,1);
if(!ret_val) i2cRead(HSR4_I2C_PORT_NUM, HSR4_I2C_ADDR,&data[0],0,1,length);
+#endif
Log_info0("Audio DC CFG: Leaving read_hdmi_samprate");
- if(!ret_val) ret_val= data[3]; // indicates sample rate
+ if(!ret_val) ret_val= data[2]; // indicates sample rate
else
ret_val = 0;
{
Platform_STATUS status = Platform_EOK;
+ DA10x_I2C_init();
hrptredid();
hdmi128();
return (status);
}
+/* ------------------------------------------------------------------------ *
+ * *
+ * DA10x_wait( delay ) *
+ * *
+ * Wait in a software loop for 'x' delay *
+ * *
+ * ------------------------------------------------------------------------ */
+void DA10x_wait( Uint32 delay )
+{
+ volatile Uint32 i;
+ for ( i = 0 ; i < delay ; i++ ){ };
+}
+
+/* ------------------------------------------------------------------------ *
+ * *
+ * DA10x_waitusec( usec ) *
+ * *
+ * Wait in a software loop for 'x' microseconds *
+ * *
+ * ------------------------------------------------------------------------ */
+void DA10x_waitusec( Uint32 usec )
+{
+ DA10x_wait( usec * 3 );
+}
+Int32 i2c_timeout = 0x10000;
+
+/* ------------------------------------------------------------------------ *
+ * *
+ * _I2C_init( ) *
+ * *
+ * Enable and initalize the I2C module *
+ * The I2C clk is set to run at 400 (384) KHz *
+ * *
+ * ------------------------------------------------------------------------ */
+Int16 DA10x_I2C_init()
+{
+ I2C_ICMDR = 0; // Reset I2C
+ I2C_ICPSC = 9; // Prescale to get 10MHz I2C internal
+ I2C_ICCLKL = 7; // Config clk LOW for 400kHz
+ I2C_ICCLKH = 7; // Config clk HIGH for 400kHz
+ I2C_ICMDR |= ICMDR_IRS; // Release I2C from reset
+ return 0;
+}
+
+/* ------------------------------------------------------------------------ *
+ * *
+ * _I2C_close( ) *
+ * *
+ * ------------------------------------------------------------------------ */
+Int16 DA10x_I2C_close()
+{
+ I2C_ICMDR = 0; // Reset I2C
+ return 0;
+}
+
+/* ------------------------------------------------------------------------ *
+ * *
+ * _I2C_reset( ) *
+ * *
+ * ------------------------------------------------------------------------ */
+Int16 DA10x_I2C_reset( )
+{
+ DA10x_I2C_close( );
+ DA10x_I2C_init( );
+ return 0;
+}
+
+/* ------------------------------------------------------------------------ *
+ * *
+ * _I2C_write( i2c_addr, data, len ) *
+ * *
+ * I2C write in Master mode *
+ * *
+ * i2c_addr <- I2C slave address *
+ * data <- I2C data ptr *
+ * len <- # of bytes to write *
+ * *
+ * ------------------------------------------------------------------------ */
+Int16 DA10x_I2C_write( Uint16 i2c_addr, Uint8* data, Uint16 len )
+{
+ Int32 timeout, i;
+ Int32 oldMask;
+
+
+ I2C_ICCNT = len; // Set length
+ I2C_ICSAR = i2c_addr; // Set I2C slave address
+ I2C_ICMDR = ICMDR_STT // Set for Master Write
+ | ICMDR_TRX
+ | ICMDR_MST
+ | ICMDR_IRS
+ | ICMDR_FREE;
+
+ DA10x_wait( 10 ); // Short delay
+
+ for ( i = 0 ; i < len ; i++ )
+ {
+
+ I2C_ICDXR = data[i]; // Write
+
+ timeout = i2c_timeout;
+ do
+ {
+ DA10x_wait( 10);
+ if ( timeout-- < 0 )
+ {
+ DA10x_I2C_reset( );
+ return -1;
+ }
+ } while ( ( I2C_ICSTR & ICSTR_ICXRDY ) == 0 );// Wait for Tx Ready
+
+ }
+
+ I2C_ICMDR |= ICMDR_STP; // Generate STOP
+
+ return 0;
+
+}
+
+/* ------------------------------------------------------------------------ *
+ * *
+ * _I2C_read( i2c_addr, data, len ) *
+ * *
+ * I2C read in Master mode *
+ * *
+ * i2c_addr <- I2C slave address *
+ * data <- I2C data ptr *
+ * len <- # of bytes to write *
+ * *
+ * Returns: 0: PASS *
+ * -1: FAIL Timeout *
+ * *
+ * ------------------------------------------------------------------------ */
+Int16 DA10x_I2C_read( Uint16 i2c_addr, Uint8* data, Uint16 len )
+{
+ Int32 timeout, i;
+
+ I2C_ICCNT = len; // Set length
+ I2C_ICSAR = i2c_addr; // Set I2C slave address
+ I2C_ICMDR = ICMDR_STT // Set for Master Read
+ | ICMDR_MST
+ | ICMDR_IRS
+ | ICMDR_FREE;
+
+ DA10x_wait( 10 ); // Short delay
+
+ for ( i = 0 ; i < len ; i++ )
+ {
+ timeout = i2c_timeout;
+
+ /* Wait for Rx Ready */
+ do
+ {
+ DA10x_wait( 10 );
+ if ( timeout-- < 0 )
+ {
+ DA10x_I2C_reset( );
+ return -1;
+ }
+ } while ( ( I2C_ICSTR & ICSTR_ICRRDY ) == 0 );// Wait for Rx Ready
+
+ data[i] = I2C_ICDRR; // Read
+
+ }
+
+ I2C_ICMDR |= ICMDR_STP; // Generate STOP
+
+ return 0;
+}
+
/* Nothing past this point */