| author | Jianzhong Xu <a0869574@ti.com> | |
| Wed, 21 Mar 2018 19:10:06 +0000 (15:10 -0400) | ||
| committer | Jianzhong Xu <a0869574@ti.com> | |
| Wed, 21 Mar 2018 19:10:06 +0000 (15:10 -0400) |
diff --combined pasdk/test_dsp/application/itopo/evmk2g/mcasp_cfg.c
index 08c7b67aad2e6f91123889ab47c9fbead4c5c8f7,d1c12ff42dfb928c7d14b87b2554c665c35fd38f..9c165fad8533d02e1fe8a302eb7f66892f42e5db
extern void asopMcaspCallback(void* arg, MCASP_Packet *mcasp_packet);
#endif
-/* McASP HW setup that is common for receive and transmit. It is the same for
- * all of 3 McASP ports. */
-Mcasp_HwSetupGbl mcaspGblSetup = {
- (Uint32)0x0, /* pfunc */
- (Uint32)0x2000001, /* pdir */
- (Uint32)0x0, /* ctl */
- (Uint32)0x0, /* ditCtl */
- (Uint32)0x0, /* dlbMode */
- (Uint32)0x2, /* amute */
- {
- (Uint32)0x0, /* [0] */
- (Uint32)0x0, /* [1] */
- (Uint32)0x0, /* [2] */
- (Uint32)0x0, /* [3] */
- (Uint32)0x0, /* [4] */
- (Uint32)0x0, /* [5] */
- (Uint32)0x0, /* [6] */
- (Uint32)0x0, /* [7] */
- (Uint32)0x0, /* [8] */
- (Uint32)0x0, /* [9] */
- (Uint32)0x0, /* [10] */
- (Uint32)0x0, /* [11] */
- (Uint32)0x0, /* [12] */
- (Uint32)0x0, /* [13] */
- (Uint32)0x0, /* [14] */
- (Uint32)0x0, /* [15] */
- } /* serSetup */
-};
/* McASP HW setup for receive (ADC) */
Mcasp_HwSetupData mcaspRcvSetupADC = {
/* .rmask = */ 0xFFFFFFFF, /* 16 bits are to be used */
- /* .rfmt = */ 0x000180F2, /*
+ /* .rfmt = */ 0x0001C0F0, /*
* 0 bit delay from framesync
* MSB first
* No extra bit padding
/* .rstat = */ 0x000001FF, /* reset any existing status bits */
/* .revtctl = */ 0x00000000, /* DMA request is enabled */
{
- /* .aclkrctl = */ 0x000000A7,
- /* .ahclkrctl = */ 0x0000C000,
+ /* .aclkrctl = */ 0x000000A7, // Receiver samples data on the rising edge of the serial clock
+ // Internal receive clock source from output of programmable bit clock divider
+ // Receive bit clock divide ratio = 8
+ /* .ahclkrctl = */ 0x00008000, // Internal receive high-frequency clock source from output of programmable high clock divider.
+ // Falling edge. AHCLKR is inverted before programmable bit clock divider.
/* .rclkchk = */ 0x00000000
}
};
MCASP_DIR_RSTAT, /* .rstat: 0x000001FF */
MCASP_DIR_REVTCTL, /* .revtctl */
{
- MCASP_DIR_ACLKRCTL, /* .aclkrctl: 0x00000080 */
+ MCASP_DIR_ACLKRCTL, /* .aclkrctl: 0x00000080 */ // Receiver samples data on the rising edge of the serial clock
+ // External receive clock source from ACLKR pin.
+ // Receive bit clock divide ratio = 1
MCASP_DIR_AHCLKRCTL, /* .ahclkrctl: 0x00000000 */
MCASP_DIR_RCLKCHK /* .rclkchk: 0x00000000 */
}
/* .xstat = */ 0x000001FF, /* reset any existing status bits */
/* .xevtctl = */ 0x00000000, /* DMA request is enabled or disabled */
{
- /* .aclkxctl = */ 0X000000E1,
- /* .ahclkxctl = */ 0x00004000 ,
+ /* .aclkxctl = */ 0X000000E1, // Transmit bit clock divide ratio = 2
+ /* .ahclkxctl = */ 0x00004000,
/* .xclkchk = */ 0x00000000
},
};
/* McASP HW setup for transmit (DAC slave) */
Mcasp_HwSetupData mcaspXmtSetupDACSlave = {
/* .xmask = */ 0xFFFFFFFF, /* 16 bits are to be used */
- /* .xfmt = */ 0x000180F6, /*
+ /* .xfmt = */ 0x000180F0, /*
* 0 bit delay from framesync
* MSB first
* No extra bit padding
* Reads from DMA port
* NO rotation
*/
- /* .afsxctl = */ 0x00000112, /* I2S mode - 2 slot TDM
+ /* .afsxctl = */ 0x00000113, /* I2S mode - 2 slot TDM
* Frame sync is one word
* Rising edge is start of frame
* Internally generated frame sync
/* DAC default configuration parameters */
DacConfig DAC_Cfg =
{
- AUDK2G_DAC_AMUTE_CTRL_DAC_DISABLE_CMD, /* Amute event */
- 0, /* Amute control */
- AUDK2G_DAC_SAMPLING_MODE_AUTO, /* Sampling mode */
- AUDK2G_DAC_DATA_FORMAT_I2S, /* Data format */
- 0, /* Soft mute control */
- AUDK2G_DAC_ATTENUATION_WIDE_RANGE, /* Attenuation mode */
- AUDK2G_DAC_DEEMP_DISABLE, /* De-emph control */
- 100 /* Volume */
+ AUD_DAC_AMUTE_CTRL_DAC_DISABLE_CMD, /* Amute event */
+ 0, /* Amute control */
+ AUD_DAC_SAMPLING_MODE_AUTO, /* Sampling mode */
+ AUD_DAC_DATA_FORMAT_I2S, /* Data format */
+ 0, /* Soft mute control */
+ AUD_DAC_ATTENUATION_WIDE_RANGE, /* Attenuation mode */
+ AUD_DAC_DEEMP_DISABLE, /* De-emph control */
+ 100 /* Volume */
};
/**
*/
void configAudioDAC(void)
{
- Audk2g_STATUS status;
+ Aud_STATUS status;
- audk2g_delay(10000);
+ aud_delay(10000);
/* Initialize Audio DAC module */
- status = audioDacConfig(AUDK2G_DAC_DEVICE_ALL, &DAC_Cfg);
- if(status != Audk2g_EOK)
+ status = audioDacConfig(AUD_DAC_DEVICE_ALL, &DAC_Cfg);
+ if(status != Aud_EOK)
{
//platform_write("Audio DAC Configuration Failed!\n");
//testRet(1);
* \brief Configures McASP module and creates the channel
* for audio Tx and Rx
*
- * \return Audk2g_EOK on Success or error code
+ * \return Aud_EOK on Success or error code
*/
- Audk2g_STATUS mcaspAudioConfig(void)
+ Aud_STATUS mcaspAudioConfig(void)
{
int32_t status;
mcaspRxParams.mcaspHwSetup.tx.clk.clkSetupClk = 0x63; // Asynchronous. Separate clock and frame sync used by transmit and receive sections.
#ifndef INPUT_SPDIF
- mcaspRxParams.mcaspHwSetup.glb.pdir |= 0x2000000; //Special case, since for HDMI input - mcasp0 is both Rx & Tx
- mcaspRxParams.mcaspHwSetup.glb.amute = 0x2; // this to ensure one doesn't overwrite the other (rx/tx)
- mcaspTxParams.mcaspHwSetup.glb.pdir |= 0x2000000; //Set Amute pin as output for Tx channel
- mcaspTxParams.mcaspHwSetup.glb.amute = 0x2;
+ mcaspRxParams.mcaspHwSetup.glb.pdir |= 0x2000000; //Special case, since for HDMI input - mcasp0 is both Rx & Tx
+ mcaspRxParams.mcaspHwSetup.glb.amute = 0x2; // this to ensure one doesn't overwrite the other (rx/tx)
+ mcaspTxParams.mcaspHwSetup.glb.pdir |= 0x2000000; //Set Amute pin as output for Tx channel
+ mcaspTxParams.mcaspHwSetup.glb.amute = 0x2;
#else
- mcaspTxParams.mcaspHwSetup.glb.pdir |= 0x2000000; //Set Amute pin as output for Tx channel
- mcaspTxParams.mcaspHwSetup.glb.amute = 0x2;
+ mcaspTxParams.mcaspHwSetup.glb.pdir |= 0x2000000; //Set Amute pin as output for Tx channel
+ mcaspTxParams.mcaspHwSetup.glb.amute = 0x2;
#endif
/* Set the HW interrupt number */
if((status != MCASP_COMPLETED) || (hMcaspDevTx == NULL))
{
//IFPRINT(platform_write("mcaspBindDev for Tx Failed\n"));
- return (Audk2g_EFAIL);
+ return (Aud_EFAIL);
}
/* Bind McASP2 for Rx */
if((status != MCASP_COMPLETED) || (hMcaspDevRx == NULL))
{
//IFPRINT(platform_write("mcaspBindDev for Rx Failed\n"));
- return (Audk2g_EFAIL);
+ return (Aud_EFAIL);
}
#else /* HDMI or HDMI_STEREO */
if((status != MCASP_COMPLETED) || (hMcaspDevRx == NULL))
{
//IFPRINT(platform_write("mcaspBindDev for Rx Failed\n"));
- return (Audk2g_EFAIL);
+ return (Aud_EFAIL);
}
hMcaspDevTx = hMcaspDevRx;
if((status != MCASP_COMPLETED) || (hMcaspTxChan == NULL))
{
//IFPRINT(platform_write("mcaspCreateChan for Tx Failed\n"));
- return (Audk2g_EFAIL);
+ return (Aud_EFAIL);
}
/* Create McASP channel for Rx */
if((status != MCASP_COMPLETED) || (hMcaspRxChan == NULL))
{
//IFPRINT(platform_write("mcaspCreateChan for Rx Failed\n"));
- return (Audk2g_EFAIL);
+ return (Aud_EFAIL);
}
- return (Audk2g_EOK);
+ return (Aud_EOK);
} /* mcaspAudioConfig */
- Audk2g_STATUS mcaspRx(void)
+ Aud_STATUS mcaspRx(void)
{
}
- Audk2g_STATUS mcaspRxDeInit(void)
+ Aud_STATUS mcaspRxDeInit(void)
{
mcaspDeleteChan(hMcaspRxChan);
hMcaspRxChan = NULL;
mcaspUnBindDev(hMcaspDevRx);
hMcaspDevRx = NULL;
- return (Audk2g_EOK);
+ return (Aud_EOK);
}
- Audk2g_STATUS mcaspChanReset(Ptr hMcaspDev, Ptr hMcaspChan)
+ Aud_STATUS mcaspChanReset(Ptr hMcaspDev, Ptr hMcaspChan)
{
if(hMcaspChan != NULL) {
mcaspDeleteChan(hMcaspChan);
}
}
- Audk2g_STATUS mcaspRxReset(void)
+ Aud_STATUS mcaspRxReset(void)
{
if(hMcaspRxChan != NULL) {
mcaspDeleteChan(hMcaspRxChan);
hMcaspRxChan = NULL;
}
- return (Audk2g_EOK);
+ return (Aud_EOK);
}
- Audk2g_STATUS mcaspRxCreate(void)
+ Aud_STATUS mcaspRxCreate(void)
{
int32_t status;
if((status != MCASP_COMPLETED) || (hMcaspRxChan == NULL))
{
//IFPRINT(platform_write("mcaspCreateChan for Rx Failed\n"));
- return (Audk2g_EFAIL);
+ return (Aud_EFAIL);
}
- return (Audk2g_EOK);
+ return (Aud_EOK);
}
- Audk2g_STATUS mcaspTxReset(void)
+ Aud_STATUS mcaspTxReset(void)
{
if(hMcaspTxChan != NULL) {
mcaspDeleteChan(hMcaspTxChan);
hMcaspTxChan = NULL;
}
- return (Audk2g_EOK);
+ return (Aud_EOK);
}
- Audk2g_STATUS mcaspTxCreate(void)
+ Aud_STATUS mcaspTxCreate(void)
{
int32_t status;
if((status != MCASP_COMPLETED) || (hMcaspTxChan == NULL))
{
//IFPRINT(platform_write("mcaspCreateChan for Tx Failed\n"));
- return (Audk2g_EFAIL);
+ return (Aud_EFAIL);
}
- return (Audk2g_EOK);
+ return (Aud_EOK);
}
#endif
- Audk2g_STATUS mcaspRecfgWordWidth(Ptr hMcaspChan, uint16_t wordWidth)
+ Aud_STATUS mcaspRecfgWordWidth(Ptr hMcaspChan, uint16_t wordWidth)
{
Mcasp_ChanParams chanParams;
int32_t status;
status = mcaspControlChan(hMcaspChan, Mcasp_IOCTL_CHAN_PARAMS_WORD_WIDTH, &chanParams);
if((status != MCASP_COMPLETED)) {
- return (Audk2g_EFAIL);
+ return (Aud_EFAIL);
}
else {
- return (Audk2g_EOK);
+ return (Aud_EOK);
}
} /* mcaspRecfgWordWidth */
/** McASP LLD configuration parameters for all input and output interfaces */
mcaspLLDconfig LLDconfigRxDIR = // for SAP_D10_RX_DIR
{
- &mcaspGblSetup,
&mcaspRcvSetupDIR,
&mcaspRxChanParamDIR,
0x23,
- 0x23,
+ 0x63, // Asynchronous. Separate clock and frame sync used by transmit and receive sections.
+ 0x0,
+ 0x2,
CSL_MCASP_2,
MCASP_INPUT,
asipMcaspCallback,
mcaspLLDconfig LLDconfigRxADC = // for SAP_D10_RX_ADC_44100HZ, SAP_D10_RX_ADC_88200HZ
{
- &mcaspGblSetup,
&mcaspRcvSetupADC,
&mcaspRxChanParamADC,
0x23,
- 0x23,
+ 0x63,
+ 0x0,
+ 0x2,
CSL_MCASP_1,
MCASP_INPUT,
asipMcaspCallback,
mcaspLLDconfig LLDconfigRxADC6ch = // for SAP_D10_RX_ADC_6CH_44100HZ, SAP_D10_RX_ADC_6CH_88200HZ
{
- &mcaspGblSetup,
&mcaspRcvSetupADC,
&mcaspRxChanParamADC6ch,
0x23,
- 0x23,
+ 0x63,
+ 0x0,
+ 0x2,
CSL_MCASP_1,
MCASP_INPUT,
asipMcaspCallback,
mcaspLLDconfig LLDconfigRxADCStereo = // for SAP_D10_RX_ADC_STEREO_44100HZ, SAP_D10_RX_ADC_STEREO_88200HZ
{
- &mcaspGblSetup,
&mcaspRcvSetupADC,
&mcaspRxChanParamADCStereo,
0x23,
- 0x23,
+ 0x63,
+ 0x0,
+ 0x2,
CSL_MCASP_1,
MCASP_INPUT,
asipMcaspCallback,
mcaspLLDconfig LLDconfigRxHDMIStereo = // for SAP_D10_RX_HDMI_STEREO
{
- &mcaspGblSetup,
&mcaspRcvSetupDIR,
&mcaspRxChanParamHDMIStereo,
0x23,
0x63,
+ 0x02000000, // Set Amute pin as output since mcasp0 is both Rx & Tx for DIR/HDMI
+ 0x2,
CSL_MCASP_0,
MCASP_INPUT,
asipMcaspCallback,
mcaspLLDconfig LLDconfigRxHDMI = // for SAP_D10_RX_HDMI
{
- &mcaspGblSetup,
&mcaspRcvSetupDIR,
&mcaspRxChanParamHDMI,
0x23,
0x63,
+ 0x02000000, // Set Amute pin as output since mcasp0 is both Rx & Tx for DIR/HDMI
+ 0x2,
CSL_MCASP_0,
MCASP_INPUT,
asipMcaspCallback,
/*
mcaspLLDconfig LLDconfigTxDIT = // for SAP_D10_TX_DIT
{
- &mcaspGblSetup,
&mcaspXmtSetupDIT,
&mcaspTx0ChanParamDIT,
NULL,
mcaspLLDconfig LLDconfigTxDAC = // for SAP_D10_TX_DAC
{
- &mcaspGblSetup,
- &mcaspXmtSetupDAC,
+ &mcaspXmtSetupDAC,
&mcaspTx0ChanParamDAC,
0x23,
0x63,
+ 0x02000000, // Set Amute pin as output for Tx channel
+ 0x2,
CSL_MCASP_0,
MCASP_OUTPUT,
asopMcaspCallback,
mcaspLLDconfig LLDconfigTxDACSlave = // for SAP_D10_TX_DAC_SLAVE
{
- &mcaspGblSetup,
&mcaspXmtSetupDACSlave,
&mcaspTx0ChanParamDAC,
0x23,
0x63,
+ 0x02000000,
+ 0x2,
CSL_MCASP_0,
MCASP_OUTPUT,
asopMcaspCallback,
mcaspLLDconfig LLDconfigTxDACStereo = // for SAP_D10_TX_STEREO_DAC
{
- &mcaspGblSetup,
&mcaspXmtSetupDAC,
&mcaspTx0ChanParamDACStereo,
0x23,
0x63,
+ 0x02000000,
+ 0x2,
CSL_MCASP_0,
MCASP_OUTPUT,
asopMcaspCallback,
mcaspLLDconfig LLDconfigTxDACStereoSlave = // for SAP_D10_TX_STEREO_DAC_SLAVE
{
- &mcaspGblSetup,
&mcaspXmtSetupDACSlave,
&mcaspTx0ChanParamDACStereo,
0x23,
0x63,
+ 0x02000000,
+ 0x2,
CSL_MCASP_0,
MCASP_OUTPUT,
asopMcaspCallback,
mcaspLLDconfig LLDconfigTxDAC12ch = // for SAP_D10_TX_DAC_12CH
{
- &mcaspGblSetup,
&mcaspXmtSetupDAC,
&mcaspTx0ChanParamDAC12ch,
0x23,
0x63,
+ 0x02000000,
+ 0x2,
CSL_MCASP_0,
MCASP_OUTPUT,
asopMcaspCallback,
mcaspLLDconfig LLDconfigTxDAC16ch = // for SAP_D10_TX_DAC_16CH
{
- &mcaspGblSetup,
&mcaspXmtSetupDAC,
&mcaspTx0ChanParamDAC16ch,
0x23,
0x63,
+ 0x02000000,
+ 0x2,
CSL_MCASP_0,
MCASP_OUTPUT,
asopMcaspCallback,
/**
* \brief Create a channel of McASP LLD and return the handle.
*
- * \return Audk2g_EOK on Success or error code
+ * \return Aud_EOK on Success or error code
*/
- Audk2g_STATUS mcasplldChanCreate(mcaspLLDconfig *lldCfg, Ptr *pChanHandle)
+ Aud_STATUS mcasplldChanCreate(mcaspLLDconfig *lldCfg, Ptr *pChanHandle)
{
int32_t status;
if(mcaspDevHandles[lldCfg->mcaspPort] == NULL) {
- /* Initialize McASP Tx and Rx parameters */
- mcaspParams = Mcasp_PARAMS;
+ /* Initialize McASP parameters */
+ mcaspParams = Mcasp_PARAMS; // Mcasp_PARAMS defined in McASP LLD
- //mcaspParams.mcaspHwSetup.tx.clk.clkSetupClk = 0x23; // not used
- //mcaspParams.mcaspHwSetup.rx.clk.clkSetupClk = 0x23; // not used
mcaspParams.mcaspHwSetup.rx.clk.clkSetupClk = lldCfg->clkSetupClkRx;
mcaspParams.mcaspHwSetup.tx.clk.clkSetupClk = lldCfg->clkSetupClkTx;
-
- mcaspParams.mcaspHwSetup.glb.pdir = lldCfg->mcaspSetupGbl->pdir;
- mcaspParams.mcaspHwSetup.glb.amute = lldCfg->mcaspSetupGbl->amute;
+ mcaspParams.mcaspHwSetup.glb.pdir |= lldCfg->pdirAmute;
+ mcaspParams.mcaspHwSetup.glb.amute = lldCfg->amute;
status = mcaspBindDev(&mcaspDevHandles[lldCfg->mcaspPort], lldCfg->mcaspPort, &mcaspParams);
if((status != MCASP_COMPLETED) || (mcaspDevHandles[lldCfg->mcaspPort] == NULL)) {
- return (Audk2g_EFAIL);
- //IFPRINT(platform_write("mcaspBindDev for Tx Failed\n"));
+ return (Aud_EFAIL);
}
}
lldCfg->mcaspChanParams->edmaHandle = hEdma1;
}
- /* Create McASP channel for Tx */
+ /* Create McASP channel */
*pChanHandle = NULL;
status = mcaspCreateChan(pChanHandle, lldCfg->hMcaspDev,
lldCfg->chanMode, lldCfg->mcaspChanParams,
if((status != MCASP_COMPLETED) || (*pChanHandle == NULL))
{
//IFPRINT(platform_write("mcaspCreateChan for Tx Failed\n"));
- return (Audk2g_EFAIL);
+ return (Aud_EFAIL);
}
- return (Audk2g_EOK);
+ return (Aud_EOK);
} /* mcasplldChanCreate */
/* Nothing past this point */
diff --combined pasdk/test_dsp/application/itopo/evmk2g/mcasp_cfg.h
index fb9d8f684477b73434489edbab6672c529040e83,78e567848847f7afff6348b41d6bc23b3e7af889..13f9907c7e710a8d0a590efa837a9be315f77369
/** Data structure McASP LLD configuration parameters */
typedef struct {
- Mcasp_HwSetupGbl * mcaspSetupGbl; // McASP global setup.
Mcasp_HwSetupData * mcaspSetupData; // McASP setup for Tx or Rx
Mcasp_ChanParams * mcaspChanParams; // LLD channel params
- uint32_t clkSetupClkRx;
- uint32_t clkSetupClkTx;
- Int mcaspPort;
- Mcasp_chanMode_e chanMode;
- MCASP_TiomCallback cbFxn;
+ uint32_t clkSetupClkRx; // set ACLKRCTL during mcaspBindDev
+ uint32_t clkSetupClkTx; // set ACLKXCTL during mcaspBindDev
+ uint32_t pdirAmute; // set the AMUTE bit in Pin Direction Register (PDIR)
+ uint32_t amute; // set the Audio Mute Control Register (AMUTE)
+ Int mcaspPort; // McASP port number
+ Mcasp_chanMode_e chanMode; // MCASP_INPUT or MCASP_OUTPUT
+ MCASP_TiomCallback cbFxn; // call back function for transfer completion
Ptr hMcaspDev; // McASP device handle
Ptr hMcaspChan; // McASP channel handle
} mcaspLLDconfig;
*
* \return Platform_EOK on Success or error code
*/
- Audk2g_STATUS mcaspAudioConfig(void);
+ Aud_STATUS mcaspAudioConfig(void);
- Audk2g_STATUS mcaspTxCreate(void);
- Audk2g_STATUS mcaspTxReset(void);
- Audk2g_STATUS mcaspRxCreate(void);
- Audk2g_STATUS mcaspRxReset(void);
- Audk2g_STATUS mcaspRecfgWordWidth(Ptr hMcaspChan, uint16_t wordWidth);
+ Aud_STATUS mcaspTxCreate(void);
+ Aud_STATUS mcaspTxReset(void);
+ Aud_STATUS mcaspRxCreate(void);
+ Aud_STATUS mcaspRxReset(void);
+ Aud_STATUS mcaspRecfgWordWidth(Ptr hMcaspChan, uint16_t wordWidth);
int mcaspCheckOverUnderRun(Ptr mcaspChanHandle);
- Audk2g_STATUS mcasplldChanCreate(mcaspLLDconfig *lldCfg, Ptr *pChanHandle);
+ Aud_STATUS mcasplldChanCreate(mcaspLLDconfig *lldCfg, Ptr *pChanHandle);
#endif /* _MCASP_CONFIG_H_ */
diff --combined pasdk/test_dsp/application/itopo/evmk2g/sap_d10.c
index a23cbee9dbb4b0514d90f45227358e0f95ec3c2d,6a06f3a5d4ea1ad5942854da444e89433a03a032..7d96e6b6b88fe491d631c56de44f341f85d10ac2
#include <sap_d10.h>
#include <audio_dc_cfg.h>
#include "vproccmds_a.h"
- #include "evmc66x_gpio.h" // in "${PDK_INSTALL_PATH}/ti/addon/audk2g/include"
+ #include "evmc66x_gpio.h" // in "${PDK_INSTALL_PATH}/ti/addon/aud/include"
#include "dbgBenchmark.h" // PCM high-sampling rate + SRC + CAR benchmarking
#include "mcasp_cfg.h"
unsigned int HDMIGpioGetState (void);
/** GPIO number for I2S Header HSR4's ~HMINT pin - GPIO port 0 */
- #define AUDK2G_AUDIO_HSR_HMINTz_GPIO (105) // missing from audio addon
+ #define AUD_AUDIO_HSR_HMINTz_GPIO (105) // missing from audio addon
/** GPIO number for I2S Header HSR4's ~RESET pin - GPIO port 0 */
- #define AUDK2G_AUDIO_HSR_RESETz_GPIO (104) // missing from audio addon
+ #define AUD_AUDIO_HSR_RESETz_GPIO (104) // missing from audio addon
// -----------------------------------------------------------------------------
// State machine variables and defines
// -----------------------------------------------------------------------------
// McASP Input Configuration Definitions
-static const MCASP_ConfigRcv rxConfigDIR = // This is used for both DIR and HDMI?? Yes. Same digital format.
+const MCASP_ConfigRcv rxConfigDIR = // This is used for both DIR and HDMI?? Yes. Same digital format.
{
// The receive format unit bit mask register (RMASK) determines which bits
// of the received data are masked off and padded with a known value before
MCASP_RCLKCHK_DEFAULT // 0x00000000
};
-static const MCASP_ConfigRcv rxConfigADC =
+const MCASP_ConfigRcv rxConfigADC =
{
MCASP_RMASK_OF(0xFFFFFFFF),
MCASP_RFMT_RMK(
// -----------------------------------------------------------------------------
// McASP Output Configuration Definitions
-static const MCASP_ConfigXmt txConfigDAC =
+const MCASP_ConfigXmt txConfigDAC =
{
MCASP_XMASK_OF(0xFFFFFFFF),
MCASP_XFMT_RMK(
MCASP_XCLKCHK_DEFAULT
};
-static const MCASP_ConfigXmt txConfigDACSlave =
+const MCASP_ConfigXmt txConfigDACSlave =
{
MCASP_XMASK_OF(0xFFFFFFFF),
MCASP_XFMT_RMK(
sizeof (SAP_D10_Rx_Params), // size
"SAP", // name
MCASP_DEV2, // moduleNum --> mcasp #
- (Void *)&rxConfigDIR, // pConfig
+ //(Void *)&rxConfigDIR, // pConfig
+ (Void *)&LLDconfigRxDIR,
4, // wordSize (unused)
24, // precision (unused)
D10_sapControl, // control
sizeof (SAP_D10_Rx_Params), // size
"SAP", // name
MCASP_DEV1, // moduleNum --> mcasp #
- (Void *)&rxConfigADC, // pConfig
+ //(Void *)&rxConfigADC, // pConfig
+ (Void *)&LLDconfigRxADC,
4, // wordSize (unused)
24, // precision (unused)
D10_sapControl, // control
sizeof (SAP_D10_Rx_Params), // size
"SAP", // name
MCASP_DEV1, // moduleNum --> mcasp #
- (Void *)&rxConfigADC, // pConfig
+ //(Void *)&rxConfigADC, // pConfig
+ (Void *)&LLDconfigRxADC6ch,
-1, // wordSize (unused)
-1, // precision (unused)
D10_sapControl, // control
sizeof (SAP_D10_Rx_Params), // size
"SAP", // name
MCASP_DEV1, // moduleNum --> mcasp #
- (Void *)&rxConfigADC, // pConfig
+ //(Void *)&rxConfigADC, // pConfig
+ (Void *)&LLDconfigRxADCStereo,
-1, // wordSize (unused)
-1, // precision (unused)
D10_sapControl, // control
(D10_MCLK_HDMI << D10_MCLK_SHIFT), // mode
0,0,0 // unused[3]
};
-
+/* - SAP_D10_TX_STEREO_DAC is not used
const SAP_D10_Tx_Params SAP_D10_TX_STEREO_DAC =
{
sizeof (SAP_D10_Tx_Params), // size
0, // mode
0,0,0 // unused[3]
};
-
+*/
const SAP_D10_Tx_Params SAP_D10_TX_DIT =
{
sizeof (SAP_D10_Tx_Params), // size
sizeof (SAP_D10_Tx_Params), // size
"SAP", // name
MCASP_DEV0, // moduleNum --> mcasp #
- (Void *)&txConfigDACSlave, // pConfig
+ //(Void *)&txConfigDACSlave, // pConfig
+ (Void *)&LLDconfigTxDACSlave,
4, // wordSize (in bytes)
24, // precision (in bits)
D10_sapControl, // control
sizeof (SAP_D10_Tx_Params), // size
"SAP", // name
MCASP_DEV0, // moduleNum --> mcasp #
- (Void *)&txConfigDAC, // pConfig
+ //(Void *)&txConfigDAC, // pConfig
+ (Void *)&LLDconfigTxDACStereoSlave,
4, // wordSize (in bytes)
24, // precision (in bits)
D10_sapControl, // control
sizeof (SAP_D10_Tx_Params), // size
"SAP", // name
MCASP_DEV0, // moduleNum --> mcasp #
- (Void *)&txConfigDAC, // pConfig
+ //(Void *)&txConfigDAC, // pConfig
+ (Void *)&LLDconfigTxDAC12ch,
4, // wordSize (in bytes)
24, // precision (in bits)
D10_sapControl, // control
sizeof (SAP_D10_Tx_Params), // size
"SAP", // name
MCASP_DEV0, // moduleNum --> mcasp #
- (Void *)&txConfigDAC, // pConfig
+ //(Void *)&txConfigDAC, // pConfig
+ (Void *)&LLDconfigTxDAC16ch,
4, // wordSize (in bytes)
24, // precision (in bits)
D10_sapControl, // control
/* DAC default configuration parameters */
DacConfig dacCfg =
{
- AUDK2G_DAC_AMUTE_CTRL_SCKI_LOST, /* Amute event */
- 0, /* Amute control */
- AUDK2G_DAC_SAMPLING_MODE_SINGLE_RATE, /* Sampling mode */
- AUDK2G_DAC_DATA_FORMAT_I2S, /* Data format */
- 0, /* Soft mute control */
- AUDK2G_DAC_ATTENUATION_WIDE_RANGE, /* Attenuation mode */
- AUDK2G_DAC_DEEMP_44KHZ, /* De-emph control */
- 100 /* Volume */
+ AUD_DAC_AMUTE_CTRL_SCKI_LOST, /* Amute event */
+ 0, /* Amute control */
+ AUD_DAC_SAMPLING_MODE_SINGLE_RATE, /* Sampling mode */
+ AUD_DAC_DATA_FORMAT_I2S, /* Data format */
+ 0, /* Soft mute control */
+ AUD_DAC_ATTENUATION_WIDE_RANGE, /* Attenuation mode */
+ AUD_DAC_DEEMP_44KHZ, /* De-emph control */
+ 100 /* Volume */
};
/* ADC default configuration parameters */
AdcConfig adcCfg =
{
- 90, /* ADC gain */
- AUDK2G_ADC_INL_SE_VINL1, /* Left input mux for ADC1L */
- AUDK2G_ADC_INL_SE_VINL2, /* Left input mux for ADC2L */
- AUDK2G_ADC_INR_SE_VINR1, /* Right input mux for ADC1R */
- AUDK2G_ADC_INR_SE_VINR2, /* Right input mux for ADC2R */
- AUDK2G_ADC_RX_WLEN_24BIT, /* ADC word length */
- AUDK2G_ADC_DATA_FORMAT_I2S, /* ADC data format */
+ 90, /* ADC gain */
+ AUD_ADC_INL_SE_VINL1, /* Left input mux for ADC1L */
+ AUD_ADC_INL_SE_VINL2, /* Left input mux for ADC2L */
+ AUD_ADC_INR_SE_VINR1, /* Right input mux for ADC1R */
+ AUD_ADC_INR_SE_VINR2, /* Right input mux for ADC2R */
+ AUD_ADC_RX_WLEN_24BIT, /* ADC word length */
+ AUD_ADC_DATA_FORMAT_I2S, /* ADC data format */
0
};
- Audk2g_STATUS setAudioDacConfig(void)
+ Aud_STATUS setAudioDacConfig(void)
{
- Audk2g_STATUS status;
+ Aud_STATUS status;
/* Initialize Audio DAC module */
- status = audioDacConfig(AUDK2G_DAC_DEVICE_ALL, &dacCfg); // defined in sap\audio_dc_cfg.c
+ status = audioDacConfig(AUD_DAC_DEVICE_ALL, &dacCfg); // defined in sap\audio_dc_cfg.c
if (status)
Log_info0("SAP_D10: Audio DAC Configuration Failed!!!\n");
return status;
}
- // Configure GPIO for HSR HDMI signaling. This needs to be added to audk2g_AudioInit()
- // in ti\addon\audk2g\src\audk2g.c.
- Audk2g_STATUS audk2g_AudioInit_Extra()
+ // Configure GPIO for HSR HDMI signaling. This needs to be added to aud_AudioInit()
+ // in ti\addon\aud\src\aud.c.
+ Aud_STATUS aud_AudioInit_Extra()
{
/* Configure GPIO for HSR HDMI Signaling - GPIO0 104 (~RESET) & 105 (~HMINT) */
- audk2g_pinMuxSetMode(114, AUDK2G_PADCONFIG_MUX_MODE_QUATERNARY);
- audk2g_gpioSetDirection(AUDK2G_GPIO_PORT_0, AUDK2G_AUDIO_HSR_HMINTz_GPIO, AUDK2G_GPIO_IN);
+ aud_pinMuxSetMode(114, AUD_PADCONFIG_MUX_MODE_QUATERNARY);
+ aud_gpioSetDirection(AUD_GPIO_PORT_0, AUD_AUDIO_HSR_HMINTz_GPIO, AUD_GPIO_IN);
- audk2g_pinMuxSetMode(113, AUDK2G_PADCONFIG_MUX_MODE_QUATERNARY);
- audk2g_gpioSetDirection(AUDK2G_GPIO_PORT_0, AUDK2G_AUDIO_HSR_RESETz_GPIO, AUDK2G_GPIO_OUT);
- audk2g_gpioSetOutput(AUDK2G_GPIO_PORT_0, AUDK2G_AUDIO_HSR_RESETz_GPIO);
+ aud_pinMuxSetMode(113, AUD_PADCONFIG_MUX_MODE_QUATERNARY);
+ aud_gpioSetDirection(AUD_GPIO_PORT_0, AUD_AUDIO_HSR_RESETz_GPIO, AUD_GPIO_OUT);
+ aud_gpioSetOutput(AUD_GPIO_PORT_0, AUD_AUDIO_HSR_RESETz_GPIO);
- return Audk2g_EOK;
+ return Aud_EOK;
}
static inline XDAS_Int32 initD10 (DEV2_Handle device)
{
- Audk2g_STATUS status = Audk2g_EOK;
+ Aud_STATUS status = Aud_EOK;
/* Initialize common audio configurations */
- status = audk2g_AudioInit(); // defined in in ti\addon\audk2g\src\audk2g.c
- if(status != Audk2g_EOK)
+ status = aud_AudioInit(); // defined in in ti\addon\aud\src\aud.c
+ if(status != Aud_EOK)
{
- Log_info0("audk2g_AudioInit Failed!\n");
+ Log_info0("aud_AudioInit Failed!\n");
return status;
}
else
- Log_info0("audk2g_AudioInit Passed!\n");
+ Log_info0("aud_AudioInit Passed!\n");
- status = (Audk2g_STATUS)audk2g_AudioInit_Extra();
- if(status != Audk2g_EOK)
+ status = (Aud_STATUS)aud_AudioInit_Extra();
+ if(status != Aud_EOK)
{
- Log_info0("audk2g_AudioInit_Extra Failed!\n");
+ Log_info0("aud_AudioInit_Extra Failed!\n");
return status;
}
else
- Log_info0("audk2g_AudioInit_Extra Passed!\n");
+ Log_info0("aud_AudioInit_Extra Passed!\n");
/* Initialize Audio ADC module */
- status = audioAdcConfig(AUDK2G_ADC_DEVICE_ALL, &adcCfg);
- if(status != Audk2g_EOK)
+ status = audioAdcConfig(AUD_ADC_DEVICE_ALL, &adcCfg);
+ if(status != Aud_EOK)
{
Log_info0("Audio ADC Configuration Failed!\n");
return status;
/* Setup DIR 9001 for SPDIF input operation */
//status = platformAudioSelectClkSrc(AUDIO_CLK_SRC_DIR);
status = audioDirConfig();
- if(status != Audk2g_EOK)
+ if(status != Aud_EOK)
{
Log_info0("Audio DIR Init Failed!\n");
return status;
/* Initialize the HDMI Card */
while(HDMIGpioGetState());
status = audioHDMIConfig();
- if(status != Audk2g_EOK)
+ if(status != Aud_EOK)
{
Log_info0("Audio HDMI Init Failed!\n");
return status;
Log_info0("Audio HDMI Init Passed!\n");
#endif
- status = audk2g_AudioSelectClkSrc(AUDK2G_AUDIO_CLK_SRC_DIR);
- audk2g_delay(50000); // Without delay between these 2 calls system aborts.
+ status = aud_AudioSelectClkSrc(AUD_AUDIO_CLK_SRC_DIR);
+ aud_delay(50000); // Without delay between these 2 calls system aborts.
status = setAudioDacConfig();
Log_info1("Leaving initD10 with status = %d", status);
// of TX0 (DAC) and TX2 (DIT).
static XDAS_Int32 clockMuxTx (int sel, int force)
{
- Audk2g_STATUS status = 0;
+ Aud_STATUS status = 0;
// select clkxDiv table
if (sel == D10_MCLK_DIR)
{
- status = audk2g_AudioSelectClkSrc(AUDK2G_AUDIO_CLK_SRC_DIR);
+ status = aud_AudioSelectClkSrc(AUD_AUDIO_CLK_SRC_DIR);
pClkxDiv = (unsigned char *) clkxDivDIR;
}
else if (sel == D10_MCLK_HDMI)
{
- status = audk2g_AudioSelectClkSrc(AUDK2G_AUDIO_CLK_SRC_I2S);
+ status = aud_AudioSelectClkSrc(AUD_AUDIO_CLK_SRC_I2S);
pClkxDiv = (unsigned char *) clkxDivHDMI;
}
else if (sel == D10_MCLK_OSC)
{
- status = audk2g_AudioSelectClkSrc((Audk2gAudioClkSrc)AUDK2G_AUDIO_CLK_SRC_OSC);
+ status = aud_AudioSelectClkSrc((AudAudioClkSrc)AUD_AUDIO_CLK_SRC_OSC);
pClkxDiv = (unsigned char *) clkxDivADC;
}
Log_info1("SAP_D10: Inside clockMuxTx with sel = %d", sel);
- audk2g_delay(20000);
+ aud_delay(20000);
return status;
} //clockMuxTx
if ((((pParams->d10rx.mode & D10_MCLK_MASK) >> D10_MCLK_SHIFT) == D10_MCLK_DIR) &
(((pParams->d10rx.mode & D10_MODE_MASK) >> D10_MODE_SHIFT) == D10_MODE_STD))
{
- pStatusIn->lock = !(audk2g_AudioDirGetClkStatus());
- pStatusIn->nonaudio = !(audk2g_AudioDirGetAudioStatus());
- pStatusIn->emphasis = audk2g_AudioDirGetEmphStatus();
- pStatusIn->sampleRateMeasured = RateTable_spdif[audk2g_AudioDirGetFsOut()];
+ pStatusIn->lock = !(aud_AudioDirGetClkStatus());
+ pStatusIn->nonaudio = !(aud_AudioDirGetAudioStatus());
+ pStatusIn->emphasis = aud_AudioDirGetEmphStatus();
+ pStatusIn->sampleRateMeasured = RateTable_spdif[aud_AudioDirGetFsOut()];
pStatusIn->sampleRateData = pStatusIn->sampleRateMeasured;
PrevSampRate = pStatusIn->sampleRateMeasured;
// the periodic manage_output calls.
int sel = (pDapD10TxParams->d10tx.mode & D10_MCLK_MASK) >> D10_MCLK_SHIFT;
clockMuxTx (sel, -1);
- audk2g_delay(50000); // GJ REVISIT: Without delay between Tx McASP & DAC configs, system aborts.
+ aud_delay(50000); // GJ REVISIT: Without delay between Tx McASP & DAC configs, system aborts.
setAudioDacConfig();
dacHardUnMute ();
unsigned int HDMIGpioGetState (void) {
- return(audk2g_gpioReadInput(AUDK2G_GPIO_PORT_0, AUDK2G_AUDIO_HSR_HMINTz_GPIO));
+ return(aud_gpioReadInput(AUD_GPIO_PORT_0, AUD_AUDIO_HSR_HMINTz_GPIO));
}
void setD10ClkMux(UInt16 mode)
diff --combined pasdk/test_dsp/framework/audioStreamInpProcNewIO.c
index 67f902fa010c19879a58f6687ad8a2e1817855d9,7540e15f6f578ce8ffa02fa66c232e9145e892f5..5460aeefc307996d3dd4d82ae946d7624387b7d2
#include "asperr.h"
#include "common.h"
- #include "audk2g.h"
- #include "audk2g_audio.h"
+ #include "aud.h"
+ #include "aud_audio.h"
#include "mcasp_cfg.h"
#include "ioConfig.h" //TODO: remove this header
#include "ioBuff.h"
case ASIT_DECODE_PROCESSING:
if(events & ASIT_DEC_EVENTS) {
+
+ #if 1 // debug
+ if (events & ASIT_EVTMSK_INPDATA)
+ {
+ // shows timing of Input (Rx McASP EDMA)
+ // ADC B5
+ {
+ static Uint8 toggleState = 0;
+ if (toggleState == 0)
+ GPIOSetOutput(GPIO_PORT_0, GPIO_PIN_99);
+ else
+ GPIOClearOutput(GPIO_PORT_0, GPIO_PIN_99);
+ toggleState = ~(toggleState);
+ }
+ }
+ #endif
+
// Decode processing for either PCM or bitstream
// New state will be decided inside the function
asitErr = asitDecodeProcessing(pP, pQ, pAsitCfg, events);
// Reconfigure McASP LLD to transfer 32-bit unpacked data
mcaspErr = mcaspRecfgWordWidth(pInp->hMcaspChan, Mcasp_WordLength_32);
- if(mcaspErr != Audk2g_EOK) {
+ if(mcaspErr != Aud_EOK) {
return ASIT_ERR_MCASP_CFG;
}
if(!pInpIo->swapData) {
Int mcaspErr;
mcaspErr = mcaspRecfgWordWidth(pInpIo->hMcaspChan, Mcasp_WordLength_16);
- if(mcaspErr != Audk2g_EOK) {
+ if(mcaspErr != Aud_EOK) {
return ASIT_ERR_MCASP_CFG;
}
if(!pInp->swapData) {
// If it was PCM, reconfigure McASP LLD to receive 16-bit packed bits
mcaspErr = mcaspRecfgWordWidth(pInp->hMcaspChan, Mcasp_WordLength_16);
- if(mcaspErr != Audk2g_EOK) {
+ if(mcaspErr != Aud_EOK) {
return ASIT_ERR_MCASP_CFG;
}
}
Int d10Initialized = 0;
- //extern Audk2g_STATUS mcaspAudioConfig(void);
+ //extern Aud_STATUS mcaspAudioConfig(void);
extern void McaspDevice_init(void);
/*======================================================================================
*====================================================================================*/
Int asitSelectDevices(const PAF_ASIT_Patchs *pQ, PAF_AST_Config *pAstCfg, PAF_AST_IoInp *pInp)
{
- Audk2g_STATUS status;
+ Aud_STATUS status;
mcaspLLDconfig *lldCfg;
Ptr mcaspChanHandle;
Int zMD, interface;
if(lldCfg->hMcaspChan == NULL) {
mcaspChanHandle = NULL;
status = mcasplldChanCreate(lldCfg, &mcaspChanHandle);
- if(status != Audk2g_EOK) {
+ if(status != Aud_EOK) {
Log_info0("McASP channel creation failed!\n");
return ASIT_ERR_MCASP_CFG;
}
lldCfg->hMcaspChan = mcaspChanHandle;
}
+ else {
+ /* Configure McASP to receive 16/32-bit data according to default configuration */
+ status = mcaspRecfgWordWidth(pInp->hMcaspChan, lldCfg->mcaspChanParams->wordWidth);
+ if(status != Audk2g_EOK) {
+ return ASIT_ERR_MCASP_CFG;
+ }
+ }
pInp->pRxParams = pQ->devinp->x[interface];
pInp->hMcaspChan = lldCfg->hMcaspChan;
if( (lldCfg->mcaspChanParams->wordWidth == Mcasp_WordLength_16)
&&(lldCfg->mcaspChanParams->noOfSerRequested == 4)
) {
- Int mcaspErr;
- mcaspErr = mcaspRecfgWordWidth(pInp->hMcaspChan, Mcasp_WordLength_16);
- if(mcaspErr != Aud_EOK) {
- return ASIT_ERR_MCASP_CFG;
- }
-
pInp->swapData = TRUE;
}
else {