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raw | patch | inline | side by side (parent: 574da98)
raw | patch | inline | side by side (parent: 574da98)
author | Frank Livingston <frank-livingston@ti.com> | |
Tue, 7 Nov 2017 22:21:03 +0000 (16:21 -0600) | ||
committer | Frank Livingston <frank-livingston@ti.com> | |
Tue, 7 Nov 2017 22:21:03 +0000 (16:21 -0600) |
McASP clock mux selection incorrect for 12- and 16-ch analog output
shortcuts. This was causing Test #15 CIDK to have incorrect output rate,
which resulted in CB underflow.
shortcuts. This was causing Test #15 CIDK to have incorrect output rate,
which resulted in CB underflow.
pasdk/test_dsp/application/itopo/evmk2g/sap_d10.c | patch | blob | history |
diff --git a/pasdk/test_dsp/application/itopo/evmk2g/sap_d10.c b/pasdk/test_dsp/application/itopo/evmk2g/sap_d10.c
index 92dfbbfb65c7a49ac6bebe68cdd0fcdf17f0904e..8a1d201e73005396b47a9be699d3fe99cac76028 100644 (file)
24, // precision (in bits)
D10_sapControl, // control
0x1600003F, // pinMask
- 0, // mode
+ (D10_MCLK_HDMI << D10_MCLK_SHIFT), // mode
0,0,0 // unused[3]
};
24, // precision (in bits)
D10_sapControl, // control
0x160000FF, // pinMask
- 0, // mode
+ (D10_MCLK_HDMI << D10_MCLK_SHIFT), // mode
0,0,0 // unused[3]
};