Pyalpha tools for performance audio demo in PRSDK.
[processor-sdk/performance-audio-tools.git] / alpha / dm_a.h
1 /******************************************************************************
2 * Copyright (c) 2016, Texas Instruments Incorporated - http://www.ti.com
3 *   All rights reserved.
4 *
5 *   Redistribution and use in source and binary forms, with or without
6 *   modification, are permitted provided that the following conditions are met:
7 *       * Redistributions of source code must retain the above copyright
8 *         notice, this list of conditions and the following disclaimer.
9 *       * Redistributions in binary form must reproduce the above copyright
10 *         notice, this list of conditions and the following disclaimer in the
11 *         documentation and/or other materials provided with the distribution.
12 *       * Neither the name of Texas Instruments Incorporated nor the
13 *         names of its contributors may be used to endorse or promote products
14 *         derived from this software without specific prior written permission.
15 *
16 *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17 *   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 *   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 *   ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
20 *   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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23 *   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 *   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 *   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
26 *   THE POSSIBILITY OF SUCH DAMAGE.
27 *****************************************************************************/
29 //
30 //
31 // Downmix alpha codes
32 //
33 //
34 //
36 #ifndef _DM_A
37 #define _DM_A
39 #include <acpbeta.h>
41 #define  readDMMode  \ 
42 0xc200+STD_BETA_DM,0x0400
43 #define writeDMModeDisable  \ 
44 0xca00+STD_BETA_DM,0x0400
45 #define writeDMModeEnable  \ 
46 0xca00+STD_BETA_DM,0x0401
48 #define  readDMLFEDownmixVolume  \ 
49 0xc200+STD_BETA_DM,0x0500
50 #define writeDMLFEDownmixVolumeN(NN)  \ 
51 0xca00+STD_BETA_DM,0x0500+(0xff&(NN))
52 /* in support of inverse compilation only */
53 #define writeDMLFEDownmixVolumeN__20__ writeDMLFEDownmixVolumeN(20)
55 #define  readDMLFEDownmixInclude  \ 
56 0xc200+STD_BETA_DM,0x0600
57 #define writeDMLFEDownmixIncludeNo  \ 
58 0xca00+STD_BETA_DM,0x0600
59 #define writeDMLFEDownmixIncludeYes  \ 
60 0xca00+STD_BETA_DM,0x0601
62 #define  readDMCenterMixLevel  \ 
63 0xc300+STD_BETA_DM,0x0008
64 #define writeDMCenterMixLevelN(NN)  \ 
65 0xcb00+STD_BETA_DM,0x0008,(0xFFFF&(NN))
66 #define wroteDMCenterMixLevel  \ 
67 0xcb00+STD_BETA_DM,0x0008
69 #define  readDMSurroundMixLevel  \ 
70 0xc300+STD_BETA_DM,0x000a
71 #define writeDMSurroundMixLevelN(NN)  \ 
72 0xcb00+STD_BETA_DM,0x000a,(0xFFFF&(NN))
73 #define wroteDMSurroundMixLevel  \ 
74 0xcb00+STD_BETA_DM,0x000a
76 #define  readDMChannelConfigurationRequest  \ 
77 0xc400+STD_BETA_DM,0x000c
78 #define writeDMChannelConfigurationRequestUnknown \
79 0xcc00+STD_BETA_DM,0x000c,0x0000,0x0000
81 #define writeDMChannelConfigurationRequestNone  \ 
82 0xcc00+STD_BETA_DM,0x000c,0x0001,0x0000
83 #define writeDMChannelConfigurationRequestMono  \ 
84 0xcc00+STD_BETA_DM,0x000c,0x0002,0x0000
85 #define writeDMChannelConfigurationRequestStereo  \ 
86 0xcc00+STD_BETA_DM,0x000c,0x0003,0x0000
87 #define writeDMChannelConfigurationRequestStereoLtRt  \ 
88 0xcc00+STD_BETA_DM,0x000c,0x0003,0x0002
89 #define writeDMChannelConfigurationRequestStereoMono  \ 
90 0xcc00+STD_BETA_DM,0x000c,0x0003,0x0003
91 #define writeDMChannelConfigurationRequest3Stereo  \ 
92 0xcc00+STD_BETA_DM,0x000c,0x0108,0x0000
93 #define writeDMChannelConfigurationRequestPhantom  \ 
94 0xcc00+STD_BETA_DM,0x000c,0x0105,0x0000
95 #define writeDMChannelConfigurationRequestSurround  \ 
96 0xcc00+STD_BETA_DM,0x000c,0x010a,0x0000
98 #define writeDMChannelConfigurationRequestNone_0  \ 
99 0xcc00+STD_BETA_DM,0x000c,0x0001,0x0000
100 #define writeDMChannelConfigurationRequestMono_0  \ 
101 0xcc00+STD_BETA_DM,0x000c,0x0002,0x0000
102 #define writeDMChannelConfigurationRequestPhantom0_0  \ 
103 0xcc00+STD_BETA_DM,0x000c,0x0003,0x0000
104 #define writeDMChannelConfigurationRequestPhantom0Stereo_0  \ 
105 0xcc00+STD_BETA_DM,0x000c,0x0003,0x0001
106 #define writeDMChannelConfigurationRequestPhantom0LtRt_0  \ 
107 0xcc00+STD_BETA_DM,0x000c,0x0003,0x0002
108 #define writeDMChannelConfigurationRequestPhantom0Mono_0  \ 
109 0xcc00+STD_BETA_DM,0x000c,0x0003,0x0003
111 #define wroteDMChannelConfigurationRequestPhantom0Dual_0  \ 
112 0xcc00+STD_BETA_DM,0x000c,0x0003,0x0004
114 #define writeDMChannelConfigurationRequestPhantom1_0  \ 
115 0xcc00+STD_BETA_DM,0x000c,0x0004,0x0000
116 #define writeDMChannelConfigurationRequestPhantom2_0  \ 
117 0xcc00+STD_BETA_DM,0x000c,0x0005,0x0000
119 #define wroteDMChannelConfigurationRequestPhantom2Stereo_0  \ 
120 0xcc00+STD_BETA_DM,0x000c,0x0005,0x0001
122 #define writeDMChannelConfigurationRequestPhantom2LtRt_0  \ 
123 0xcc00+STD_BETA_DM,0x000c,0x0005,0x0002
125 #define wroteDMChannelConfigurationRequestPhantom2Mono_0  \ 
126 0xcc00+STD_BETA_DM,0x000c,0x0005,0x0003
128 #define writeDMChannelConfigurationRequestPhantom3_0  \ 
129 0xcc00+STD_BETA_DM,0x000c,0x0006,0x0000
130 #define writeDMChannelConfigurationRequestPhantom4_0  \ 
131 0xcc00+STD_BETA_DM,0x000c,0x0007,0x0000
132 #define writeDMChannelConfigurationRequestSurround0_0  \ 
133 0xcc00+STD_BETA_DM,0x000c,0x0008,0x0000
134 #define writeDMChannelConfigurationRequestSurround1_0  \ 
135 0xcc00+STD_BETA_DM,0x000c,0x0009,0x0000
136 #define writeDMChannelConfigurationRequestSurround2_0  \ 
137 0xcc00+STD_BETA_DM,0x000c,0x000a,0x0000
139 #define wroteDMChannelConfigurationRequestSurround2Stereo_0  \ 
140 0xcc00+STD_BETA_DM,0x000c,0x000a,0x0001
142 #define writeDMChannelConfigurationRequestSurround2LtRt_0  \ 
143 0xcc00+STD_BETA_DM,0x000c,0x000a,0x0002
145 #define wroteDMChannelConfigurationRequestSurround2Mono_0  \ 
146 0xcc00+STD_BETA_DM,0x000c,0x000a,0x0003
148 #define writeDMChannelConfigurationRequestSurround3_0  \ 
149 0xcc00+STD_BETA_DM,0x000c,0x000b,0x0000
150 #define writeDMChannelConfigurationRequestSurround4_0  \ 
151 0xcc00+STD_BETA_DM,0x000c,0x000c,0x0000
153 #define writeDMChannelConfigurationRequestNone_1  \ 
154 0xcc00+STD_BETA_DM,0x000c,0x0101,0x0000
155 #define writeDMChannelConfigurationRequestMono_1  \ 
156 0xcc00+STD_BETA_DM,0x000c,0x0102,0x0000
157 #define writeDMChannelConfigurationRequestPhantom0_1  \ 
158 0xcc00+STD_BETA_DM,0x000c,0x0103,0x0000
159 #define writeDMChannelConfigurationRequestPhantom0Stereo_1  \ 
160 0xcc00+STD_BETA_DM,0x000c,0x0103,0x0001
161 #define writeDMChannelConfigurationRequestPhantom0LtRt_1  \ 
162 0xcc00+STD_BETA_DM,0x000c,0x0103,0x0002
163 #define writeDMChannelConfigurationRequestPhantom0Mono_1  \ 
164 0xcc00+STD_BETA_DM,0x000c,0x0103,0x0003
166 #define wroteDMChannelConfigurationRequestPhantom0Dual_1  \ 
167 0xcc00+STD_BETA_DM,0x000c,0x0103,0x0004
169 #define writeDMChannelConfigurationRequestPhantom1_1  \ 
170 0xcc00+STD_BETA_DM,0x000c,0x0104,0x0000
171 #define writeDMChannelConfigurationRequestPhantom2_1  \ 
172 0xcc00+STD_BETA_DM,0x000c,0x0105,0x0000
174 #define wroteDMChannelConfigurationRequestPhantom2Stereo_1  \ 
175 0xcc00+STD_BETA_DM,0x000c,0x0105,0x0001
177 #define writeDMChannelConfigurationRequestPhantom2LtRt_1  \ 
178 0xcc00+STD_BETA_DM,0x000c,0x0105,0x0002
180 #define wroteDMChannelConfigurationRequestPhantom2Mono_1  \ 
181 0xcc00+STD_BETA_DM,0x000c,0x0105,0x0003
183 #define writeDMChannelConfigurationRequestPhantom3_1  \ 
184 0xcc00+STD_BETA_DM,0x000c,0x0106,0x0000
185 #define writeDMChannelConfigurationRequestPhantom4_1  \ 
186 0xcc00+STD_BETA_DM,0x000c,0x0107,0x0000
187 #define writeDMChannelConfigurationRequestSurround0_1  \ 
188 0xcc00+STD_BETA_DM,0x000c,0x0108,0x0000
189 #define writeDMChannelConfigurationRequestSurround1_1  \ 
190 0xcc00+STD_BETA_DM,0x000c,0x0109,0x0000
191 #define writeDMChannelConfigurationRequestSurround2_1  \ 
192 0xcc00+STD_BETA_DM,0x000c,0x010a,0x0000
194 #define wroteDMChannelConfigurationRequestSurround2Stereo_1  \ 
195 0xcc00+STD_BETA_DM,0x000c,0x010a,0x0001
197 #define writeDMChannelConfigurationRequestSurround2LtRt_1  \ 
198 0xcc00+STD_BETA_DM,0x000c,0x010a,0x0002
200 #define wroteDMChannelConfigurationRequestSurround2Mono_1  \ 
201 0xcc00+STD_BETA_DM,0x000c,0x010a,0x0003
203 #define writeDMChannelConfigurationRequestSurround3_1  \ 
204 0xcc00+STD_BETA_DM,0x000c,0x010b,0x0000
205 #define writeDMChannelConfigurationRequestSurround4_1  \ 
206 0xcc00+STD_BETA_DM,0x000c,0x010c,0x0000
208 #define writeDMChannelConfigurationRequestHL(HH,LL)  \ 
209 0xcc00+STD_BETA_DM,0x000c,LL,HH
211 #define  readDMStatus  \ 
212 0xc508,STD_BETA_DM
213 #define  readDMControl \
214          readDMMode, \
215          readDMLFEDownmixVolume, \
216          readDMLFEDownmixInclude, \
217          readDMCenterMixLevel, \
218          readDMSurroundMixLevel, \
219          readDMChannelConfigurationRequest
221 #endif /* _DM_A */